From 962f60abca82bb11501bc0c627abacda15bed076 Mon Sep 17 00:00:00 2001 From: Dhruva Gole Date: Mon, 5 Aug 2024 19:59:32 +0530 Subject: doc: ti: k3: Add TIFS Stub documentation * Add documentation to briefly explain the role of TIFS Stub in relevant K3 SoC's. * Shed light on why TIFS Stub isn't package with the DM firmware itself. * Modify the platform docs wherever the TIFS Stub documentation applies. * Also, refactor and add a few new labels to help split the firmware documentation chunks. This will make it easier to include them one by one wherever applicable Reviewed-by: Nishanth Menon Signed-off-by: Dhruva Gole Acked-by: Francesco Dolcini # verdin-am62 --- doc/board/ti/am62ax_sk.rst | 4 ++++ doc/board/ti/am62px_sk.rst | 4 ++++ doc/board/ti/am62x_sk.rst | 4 ++++ doc/board/ti/k3.rst | 47 +++++++++++++++++++++++++++------------ doc/board/toradex/verdin-am62.rst | 4 ++++ 5 files changed, 49 insertions(+), 14 deletions(-) (limited to 'doc') diff --git a/doc/board/ti/am62ax_sk.rst b/doc/board/ti/am62ax_sk.rst index 60726b6652c..72fa5a8d8cd 100644 --- a/doc/board/ti/am62ax_sk.rst +++ b/doc/board/ti/am62ax_sk.rst @@ -60,6 +60,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_tifsstub + Build procedure: ---------------- 0. Setup the environment variables: diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst index c80b5068117..bcef6653cb9 100644 --- a/doc/board/ti/am62px_sk.rst +++ b/doc/board/ti/am62px_sk.rst @@ -68,6 +68,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_tifsstub + Build procedure: ---------------- diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst index 2a25e84f6c9..e2a848d159f 100644 --- a/doc/board/ti/am62x_sk.rst +++ b/doc/board/ti/am62x_sk.rst @@ -59,6 +59,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_tifsstub + Build procedure: ---------------- 0. Setup the environment variables: diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 67b066a07d3..c3513f0aee2 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -182,24 +182,43 @@ online .. note:: - The TI Firmware required for functionality of the system can be - one of the following combination (see platform specific boot diagram for - further information as to which component runs on which processor): + The TI Firmwares required for functionality of the system are (see + platform specific boot diagram for further information as to which + component runs on which processor): - * **TIFS** - TI Foundational Security Firmware - Consists of purely firmware - meant to run on the security enclave. - * **DM** - Device Management firmware also called TI System Control Interface - server (TISCI Server) - This component purely plays the role of managing - device resources such as power, clock, interrupts, dma etc. This firmware - runs on a dedicated or multi-use microcontroller outside the security - enclave. +.. k3_rst_include_end_boot_sources - OR +.. k3_rst_include_start_boot_firmwares - * **SYSFW** - System firmware - consists of both TIFS and DM both running on - the security enclave. +* **TIFS** - TI Foundational Security Firmware - Consists of purely firmware + meant to run on the security enclave. +* **DM** - Device Management firmware also called TI System Control Interface + server (TISCI Server) - This component purely plays the role of managing + device resources such as power, clock, interrupts, dma etc. This firmware + runs on a dedicated or multi-use microcontroller outside the security + enclave. -.. k3_rst_include_end_boot_sources +.. k3_rst_include_end_boot_firmwares +.. k3_rst_include_start_tifsstub + +* **TIFS Stub** - The TIFS stub is a small piece of binary designed to help + restore the required security context and resume the TIFS firmware when + the system resumes from low-power modes such as suspend-to-RAM/Deep + Sleep. This stub uses the same encryption and customer key signing model + as TIFS and is loaded into the ATCM (Tightly Coupled Memory 'A' of the + DM R5) during DM startup. Due to the independent certificate signing + process, the stub is maintained separately from DM. + +.. k3_rst_include_end_tifsstub + +OR + +.. k3_rst_include_start_boot_firmwares_sysfw + +* **SYSFW** - System firmware - consists of both TIFS and DM both running on + the security enclave. + +.. k3_rst_include_end_boot_firmwares_sysfw Build Procedure --------------- diff --git a/doc/board/toradex/verdin-am62.rst b/doc/board/toradex/verdin-am62.rst index e8d90273288..93912adc896 100644 --- a/doc/board/toradex/verdin-am62.rst +++ b/doc/board/toradex/verdin-am62.rst @@ -29,6 +29,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_tifsstub + Build procedure: ---------------- -- cgit v1.3.1 From d7b23a06023bf9d12c2bd7d39497c877f8eb1296 Mon Sep 17 00:00:00 2001 From: Dhruva Gole Date: Mon, 5 Aug 2024 19:59:33 +0530 Subject: doc: board: ti: Update to use the new boot firmware labels Use the new boot_firmwares labels that help make documentation more specific as to which firmwares are used in which devices Signed-off-by: Dhruva Gole --- doc/board/beagle/j721e_beagleboneai64.rst | 4 ++++ doc/board/phytec/phycore-am62x.rst | 4 ++++ doc/board/phytec/phycore-am64x.rst | 4 ++++ doc/board/ti/am64x_evm.rst | 4 ++++ doc/board/ti/am65x_evm.rst | 4 ++++ doc/board/ti/j7200_evm.rst | 4 ++++ doc/board/ti/j721e_evm.rst | 4 ++++ doc/board/ti/j721s2_evm.rst | 4 ++++ doc/board/ti/j722s_evm.rst | 4 ++++ doc/board/ti/j784s4_evm.rst | 4 ++++ 10 files changed, 40 insertions(+) (limited to 'doc') diff --git a/doc/board/beagle/j721e_beagleboneai64.rst b/doc/board/beagle/j721e_beagleboneai64.rst index d6b9c8ca606..090b2b3b86a 100644 --- a/doc/board/beagle/j721e_beagleboneai64.rst +++ b/doc/board/beagle/j721e_beagleboneai64.rst @@ -42,6 +42,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_boot_firmwares + Build procedure: ---------------- 0. Setup the environment variables: diff --git a/doc/board/phytec/phycore-am62x.rst b/doc/board/phytec/phycore-am62x.rst index a7ce2c58825..af24acf9aac 100644 --- a/doc/board/phytec/phycore-am62x.rst +++ b/doc/board/phytec/phycore-am62x.rst @@ -30,6 +30,10 @@ Sources :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_boot_firmwares + Build procedure --------------- diff --git a/doc/board/phytec/phycore-am64x.rst b/doc/board/phytec/phycore-am64x.rst index 68d78ad7c25..01c42b90660 100644 --- a/doc/board/phytec/phycore-am64x.rst +++ b/doc/board/phytec/phycore-am64x.rst @@ -30,6 +30,10 @@ Sources :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares_sysfw + :end-before: .. k3_rst_include_end_boot_firmwares_sysfw + Build procedure --------------- diff --git a/doc/board/ti/am64x_evm.rst b/doc/board/ti/am64x_evm.rst index 88997b6a283..65c4c456528 100644 --- a/doc/board/ti/am64x_evm.rst +++ b/doc/board/ti/am64x_evm.rst @@ -48,6 +48,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares_sysfw + :end-before: .. k3_rst_include_end_boot_firmwares_sysfw + Build procedure: ---------------- 0. Setup the environment variables: diff --git a/doc/board/ti/am65x_evm.rst b/doc/board/ti/am65x_evm.rst index 89011c08dd4..60b08ceebf0 100644 --- a/doc/board/ti/am65x_evm.rst +++ b/doc/board/ti/am65x_evm.rst @@ -58,6 +58,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares_sysfw + :end-before: .. k3_rst_include_end_boot_firmwares_sysfw + Build procedure: ---------------- 0. Setup the environment variables: diff --git a/doc/board/ti/j7200_evm.rst b/doc/board/ti/j7200_evm.rst index d4a823fa26c..4fd2aff8354 100644 --- a/doc/board/ti/j7200_evm.rst +++ b/doc/board/ti/j7200_evm.rst @@ -47,6 +47,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_boot_firmwares + Build procedure: ---------------- 0. Setup the environment variables: diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst index 80d91cafab0..41c8d4c72a8 100644 --- a/doc/board/ti/j721e_evm.rst +++ b/doc/board/ti/j721e_evm.rst @@ -52,6 +52,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_boot_firmwares + Build procedure: ---------------- 0. Setup the environment variables: diff --git a/doc/board/ti/j721s2_evm.rst b/doc/board/ti/j721s2_evm.rst index f5c48c96a83..21683b90b1a 100644 --- a/doc/board/ti/j721s2_evm.rst +++ b/doc/board/ti/j721s2_evm.rst @@ -60,6 +60,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_boot_firmwares + Build procedure: ---------------- diff --git a/doc/board/ti/j722s_evm.rst b/doc/board/ti/j722s_evm.rst index 10b243908a1..e5a1be50c4f 100644 --- a/doc/board/ti/j722s_evm.rst +++ b/doc/board/ti/j722s_evm.rst @@ -45,6 +45,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_boot_firmwares + Build procedure: ---------------- diff --git a/doc/board/ti/j784s4_evm.rst b/doc/board/ti/j784s4_evm.rst index 2ffec3dbd3b..a1e927cb743 100644 --- a/doc/board/ti/j784s4_evm.rst +++ b/doc/board/ti/j784s4_evm.rst @@ -60,6 +60,10 @@ Sources :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_boot_firmwares + Build procedure --------------- 0. Setup the environment variables: -- cgit v1.3.1 From fa25c1ddd35738c6894a7deba832c1bb8e6a7f57 Mon Sep 17 00:00:00 2001 From: Dhruva Gole Date: Mon, 5 Aug 2024 19:59:34 +0530 Subject: doc: ti: am62*: Mention TIFS Stub in img fmts and boot flow Since AM62x, AM62P and AM62A all use similar boot flows and their low power mode s/w ARCH is also similar in the way that they make use of the TIFS Stub, update their documentation to show where TIFS Stub is. Reviewed-by: Nishanth Menon Signed-off-by: Dhruva Gole --- doc/board/ti/am62ax_sk.rst | 4 +- doc/board/ti/am62px_sk.rst | 4 +- doc/board/ti/am62x_sk.rst | 4 +- doc/board/ti/img/boot_diagram_am62.svg | 1983 ++++++++++++++++++++++++++++ doc/board/ti/img/tifsstub_dm_tispl.bin.svg | 353 +++++ 5 files changed, 2342 insertions(+), 6 deletions(-) create mode 100644 doc/board/ti/img/boot_diagram_am62.svg create mode 100644 doc/board/ti/img/tifsstub_dm_tispl.bin.svg (limited to 'doc') diff --git a/doc/board/ti/am62ax_sk.rst b/doc/board/ti/am62ax_sk.rst index 72fa5a8d8cd..262340ef59a 100644 --- a/doc/board/ti/am62ax_sk.rst +++ b/doc/board/ti/am62ax_sk.rst @@ -47,7 +47,7 @@ Boot Flow: ---------- Below is the pictorial representation of boot flow: -.. image:: img/boot_diagram_k3_current.svg +.. image:: img/boot_diagram_am62.svg :alt: Boot flow diagram - Here TIFS acts as master and provides all the critical services. R5/A53 @@ -148,7 +148,7 @@ Image formats: - tispl.bin -.. image:: img/dm_tispl.bin.svg +.. image:: img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format Switch Setting for Boot Mode diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst index bcef6653cb9..99bdc034869 100644 --- a/doc/board/ti/am62px_sk.rst +++ b/doc/board/ti/am62px_sk.rst @@ -55,7 +55,7 @@ Boot Flow: The bootflow is exactly the same as all SoCs in the am62xxx extended SoC family. Below is the pictorial representation: -.. image:: img/boot_diagram_k3_current.svg +.. image:: img/boot_diagram_am62.svg :alt: Boot flow diagram - Here TIFS acts as master and provides all the critical services. R5/A53 @@ -157,7 +157,7 @@ Image formats: - tispl.bin -.. image:: img/dm_tispl.bin.svg +.. image:: img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format OSPI: diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst index e2a848d159f..b9d35244d44 100644 --- a/doc/board/ti/am62x_sk.rst +++ b/doc/board/ti/am62x_sk.rst @@ -46,7 +46,7 @@ Boot Flow: ---------- Below is the pictorial representation of boot flow: -.. image:: img/boot_diagram_k3_current.svg +.. image:: img/boot_diagram_am62.svg :alt: Boot flow diagram - Here TIFS acts as master and provides all the critical services. R5/A53 @@ -165,7 +165,7 @@ Image formats: - tispl.bin -.. image:: img/dm_tispl.bin.svg +.. image:: img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format OSPI: diff --git a/doc/board/ti/img/boot_diagram_am62.svg b/doc/board/ti/img/boot_diagram_am62.svg new file mode 100644 index 00000000000..44c54dbd2c1 --- /dev/null +++ b/doc/board/ti/img/boot_diagram_am62.svg @@ -0,0 +1,1983 @@ + + + + + + + + + + + + + + + + + + Cortex-R + + + + Cortex-R + + + + + + + + + + ROM + + + + ROM + + + + + + + + + + Cortex-R SPL + + + + Cortex-R SPL + + + + + + + + + Load and auth tiboot3.bin + + + + Load and auth t... + + + + + + + + + Load system +config data + + + + Load system... + + + + + + + + + DDR Config + + + + DDR Config + + + + + + + + + Load tispl.bin + + + + Load tispl.bin + + + + + + + + + Start Cortex-A + + + + Start Cortex-A + + + + + + + + + Start DM + + + + Start DM + + + + + + + + + + + + Device Mgr + + + + Device Mgr + + + + + + + + + + Start Cortex-A + + + + Start Cort... + + + + + + + + + + + + + + + + + + + + + Load TIFS Stub in TCM + + + + Load TIFS St... + + + + + + + + + + + + Cortex-A + + + + Cortex-A + + + + + + + + + + + + + + OP-TEE + + + + OP-TEE + + + + + + + + + + Cortex-R/M +C6x/C7x + + + + Cortex-R/M... + + + + + + + + + + Aux f/w + + + + Aux f/w + + + + + + + + + + TIFS/DMSC + + + + TIFS/DMSC + + + + + + + + + + ROM + + + + ROM + + + + + + + + + + + Start TIFS + + + + Start TIFS + + + + + + + + + TIFS + + + + TIFS + + + + + + + + + + Security Enclave Boot Processor + + + + Security Enclave Boot... + + + + + + + + + + Boot Loader +Processor + + + + Boot Loader... + + + + + + + + + + Main CPU + + + + Main CPU + + + + + + + + + + Auxiliary +Processor + + + + Auxiliary... + + + + + + + + + + H/w Seq: Reset rls + + + + H/w Seq: Reset rls + + + + + + + + + + Auth tiboot3.bin + + + + Auth tiboo... + + + + + + + + + + Release Reset + + + + Release Re... + + + + + + + + + + Load system config data + + + + Load syste... + + + + + + + + + Start TIFS + + + + Start TIFS + + + + + + + + + Load DM f/w + + + + Load DM f/w + + + + + + + + + + branch + + + + branch + + + + + + + + + + Release Reset + + + + Release Re... + + + + + + + + + TF-A  + + + + TF-A  + + + + + + + + + + Cortex-A SPL + + + + Cortex-A SPL + + + + + + + + + + U-Boot + + + + U-Boot + + + + + + + + + Load u-boot.img + + + + Load u-boot.img + + + + + + + + + Load Aux core f/w +(optional) + + + + Load Aux core f/w... + + + + + + + + + Start Aux core +(optional) + + + + Start Aux core... + + + + + + + + + + Release Reset + + + + Release Re... + + + + + + + Text is not SVG - cannot display + + + diff --git a/doc/board/ti/img/tifsstub_dm_tispl.bin.svg b/doc/board/ti/img/tifsstub_dm_tispl.bin.svg new file mode 100644 index 00000000000..5d56d81f667 --- /dev/null +++ b/doc/board/ti/img/tifsstub_dm_tispl.bin.svg @@ -0,0 +1,353 @@ + + + + + + + + + + + + + + + + + FIT Header + + + + FIT Header + + + + + + + + + TIFS Stub +(GP, HS-FS, HS-SE) + + + + TIFS Stub... + + + + + + + + + TF-A + + + + TF-A + + + + + + + + + OP-TEE + + + + OP-TEE + + + + + + + + + R5 DM FW + + + + R5 DM FW + + + + + + + + + Cortex-A SPL + + + + Cortex-A SPL + + + + + + + + + SPL DTB 1..N + + + + SPL DTB 1..N + + + + + + + Text is not SVG - cannot display + + + -- cgit v1.3.1 From f8f2d74ed540635cd413822d5ac07530b1fd822f Mon Sep 17 00:00:00 2001 From: Dhruva Gole Date: Mon, 5 Aug 2024 19:59:36 +0530 Subject: doc: beagle: am62x_beagleplay: Document the use of TIFS Stub * Include the actual common documentation about the TIFS Stub and role it plays to enable Low Power Modes in the platform. * Add the AM62x boot flow to show at which point the TIFS Stub actually gets loaded. * Mention the TIFS Stub in the TISPL image format. Reviewed-by: Nishanth Menon Signed-off-by: Dhruva Gole --- doc/board/beagle/am62x_beagleplay.rst | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'doc') diff --git a/doc/board/beagle/am62x_beagleplay.rst b/doc/board/beagle/am62x_beagleplay.rst index 01f04beb55a..bc71aabaac3 100644 --- a/doc/board/beagle/am62x_beagleplay.rst +++ b/doc/board/beagle/am62x_beagleplay.rst @@ -23,7 +23,7 @@ Boot Flow: ---------- Below is the pictorial representation of boot flow: -.. image:: ../ti/img/boot_diagram_k3_current.svg +.. image:: ../ti/img/boot_diagram_am62.svg :alt: Boot flow diagram - On this platform, 'TI Foundational Security' (TIFS) functions as the @@ -38,6 +38,10 @@ Sources: :start-after: .. k3_rst_include_start_boot_sources :end-before: .. k3_rst_include_end_boot_sources +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_tifsstub + Build procedure: ---------------- 0. Setup the environment variables: @@ -86,7 +90,7 @@ Image formats - tispl.bin -.. image:: ../ti/img/dm_tispl.bin.svg +.. image:: ../ti/img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format Additional hardware for U-Boot development -- cgit v1.3.1 From 622f826bf025704cbcc4f39252d4a83129a9cabb Mon Sep 17 00:00:00 2001 From: Dhruva Gole Date: Mon, 5 Aug 2024 19:59:37 +0530 Subject: arm: dts: phycore-am62x: Package TIFS Stub Add support for packaging the TIFS Stub as it's required for basic Low Power Modes like Deep Sleep. The reason it is packaged using binman and not inherently as part of the DM firmware is because for HS devices, customer owns the customer key and only customer has access to it. DM is release by TI, Since TI doesn't have access to the customer key it cannot have a component that is signed by customer key. Hence, it's left as part of binman to be signed and packaged. While at it, also make sure it's documented in phycore-am62x Reviewed-by: Nishanth Menon Reviewed-by: Wadim Egorov Signed-off-by: Dhruva Gole --- arch/arm/dts/k3-am625-phycore-som-binman.dtsi | 101 +++++++++++++++++++++++++- doc/board/phytec/phycore-am62x.rst | 2 +- 2 files changed, 100 insertions(+), 3 deletions(-) (limited to 'doc') diff --git a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi index dbee4aa8d8a..0961ca66f28 100644 --- a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi +++ b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi @@ -150,12 +150,107 @@ filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f"; }; }; + + tifsstub-hs { + filename = "tifsstub.bin_hs"; + ti-secure-rom { + content = <&tifsstub_hs_cert>; + core = "secure"; + load = <0x40000>; + sw-rev = ; + keyfile = "custMpk.pem"; + countersign; + tifsstub; + }; + tifsstub_hs_cert: tifsstub-hs-cert.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + tifsstub_hs_enc: tifsstub-hs-enc.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + }; + + tifsstub-fs { + filename = "tifsstub.bin_fs"; + tifsstub_fs_cert: tifsstub-fs-cert.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + tifsstub_fs_enc: tifsstub-fs-enc.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + + }; + + tifsstub-gp { + filename = "tifsstub.bin_gp"; + ti-secure-rom { + content = <&tifsstub_gp>; + core = "secure"; + load = <0x60000>; + sw-rev = ; + keyfile = "ti-degenerate-key.pem"; + tifsstub; + }; + tifsstub_gp: tifsstub-gp.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin"; + type = "blob-ext"; + optional; + }; + }; + + ti-spl { insert-template = <&ti_spl_template>; fit { images { + tifsstub-hs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + + tifsstub-fs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + + tifsstub-gp { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-gp"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_gp"; + }; + }; dm { ti-secure { content = <&dm>; @@ -187,7 +282,8 @@ conf-0 { description = "k3-am625-phyboard-lyra-rdk"; firmware = "atf"; - loadables = "tee", "dm", "spl"; + loadables = "tee", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp", "dm", "spl"; fdt = "fdt-0"; }; }; @@ -266,7 +362,8 @@ conf-0 { description = "k3-am625-phyboard-lyra-rdk"; firmware = "atf"; - loadables = "tee", "dm", "spl"; + loadables = "tee", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp", "dm", "spl"; fdt = "fdt-0"; }; }; diff --git a/doc/board/phytec/phycore-am62x.rst b/doc/board/phytec/phycore-am62x.rst index af24acf9aac..56c1fd8354b 100644 --- a/doc/board/phytec/phycore-am62x.rst +++ b/doc/board/phytec/phycore-am62x.rst @@ -32,7 +32,7 @@ Sources .. include:: ../ti/k3.rst :start-after: .. k3_rst_include_start_boot_firmwares - :end-before: .. k3_rst_include_end_boot_firmwares + :end-before: .. k3_rst_include_end_tifsstub Build procedure --------------- -- cgit v1.3.1 From 25438c40a0070bf3b49de6cff6c4f5762b59799e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 30 Jul 2024 19:48:37 +0000 Subject: board: rockchip: Add Radxa ROCK S0 Radxa ROCK S0 is a single-board computer based on the Rockchip RK3308B SoC in an ultra-compact form factor. Add a board target for the board. Features tested on a ROCK S0 v1.2 with 512 MiB RAM and 8 GiB eMMC: - SD-card boot - eMMC boot - Ethernet - USB gadget - USB host Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3308-rock-s0-u-boot.dtsi | 21 ++++++++++ board/rockchip/evb_rk3308/MAINTAINERS | 6 +++ configs/rock-s0-rk3308_defconfig | 72 +++++++++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + 4 files changed, 100 insertions(+) create mode 100644 arch/arm/dts/rk3308-rock-s0-u-boot.dtsi create mode 100644 configs/rock-s0-rk3308_defconfig (limited to 'doc') diff --git a/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi b/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi new file mode 100644 index 00000000000..84ca2ee0d5f --- /dev/null +++ b/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3308-u-boot.dtsi" + +&emmc_pwren { + bootph-pre-ram; + bootph-some-ram; +}; + +&uart0 { + bootph-all; + clock-frequency = <24000000>; +}; + +&uart0_xfer { + bootph-all; +}; + +&vdd_core { + regulator-init-microvolt = <1015000>; +}; diff --git a/board/rockchip/evb_rk3308/MAINTAINERS b/board/rockchip/evb_rk3308/MAINTAINERS index abffbb1eb0a..cd219c65f27 100644 --- a/board/rockchip/evb_rk3308/MAINTAINERS +++ b/board/rockchip/evb_rk3308/MAINTAINERS @@ -12,3 +12,9 @@ R: Jonas Karlman S: Maintained F: configs/rock-pi-s-rk3308_defconfig F: arch/arm/dts/rk3308-rock-pi-s* + +ROCK-S0 +M: Jonas Karlman +S: Maintained +F: configs/rock-s0-rk3308_defconfig +F: arch/arm/dts/rk3308-rock-s0* diff --git a/configs/rock-s0-rk3308_defconfig b/configs/rock-s0-rk3308_defconfig new file mode 100644 index 00000000000..074ec4cd66b --- /dev/null +++ b/configs/rock-s0-rk3308_defconfig @@ -0,0 +1,72 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-rock-s0" +CONFIG_DM_RESET=y +CONFIG_ROCKCHIP_RK3308=y +CONFIG_TARGET_EVB_RK3308=y +CONFIG_DEBUG_UART_BASE=0xFF0A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +# CONFIG_DEBUG_UART_BOARD_INIT is not set +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-rock-s0.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y +CONFIG_CMD_REGULATOR=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PINCTRL=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSINFO=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_LZO=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index bedc52e03e2..82cbc6e3e0d 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -54,6 +54,7 @@ List of mainline supported Rockchip boards: - Amarula Vyasa-RK3288 (vyasa-rk3288) * rk3308 - Radxa ROCK Pi S (rock-pi-s-rk3308) + - Radxa ROCK S0 (rock-s0-rk3308) - Rockchip Evb-RK3308 (evb-rk3308) - Roc-cc-RK3308 (roc-cc-rk3308) * rk3326 -- cgit v1.3.1 From e6e82ce24d4e9d20c232db2a95b2d10faf8f2bcf Mon Sep 17 00:00:00 2001 From: Maxim Moskalets Date: Thu, 8 Aug 2024 22:37:10 +0300 Subject: board: rockchip: add Radxa ROCK 3 Model C Based on rock-3a-rk3568_defconfig. Tested on v1.31 revision. Board Specifications: - Rockchip RK3566 - 1/2/4GB LPDDR4 2112MT/s - eMMC socket - uSD card slot - M.2 2230 Connector - GbE LAN with POE - 3.5mm jack with mic - HDMI 2.0, MIPI DSI/CSI - USB 3.0 Host, USB 2.0 Host/OTG - 40-pin GPIO expansion ports Signed-off-by: Maxim Moskalets Suggested-by: Jonas Karlman Reviewed-by: Jonas Karlman Tested-by: FUKAUMI Naoki Reviewed-by: Kever Yang --- arch/arm/dts/rk3566-rock-3c-u-boot.dtsi | 18 ++++++ board/rockchip/evb_rk3568/MAINTAINERS | 7 +++ configs/rock-3c-rk3566_defconfig | 97 +++++++++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + 4 files changed, 123 insertions(+) create mode 100644 arch/arm/dts/rk3566-rock-3c-u-boot.dtsi create mode 100644 configs/rock-3c-rk3566_defconfig (limited to 'doc') diff --git a/arch/arm/dts/rk3566-rock-3c-u-boot.dtsi b/arch/arm/dts/rk3566-rock-3c-u-boot.dtsi new file mode 100644 index 00000000000..f4124aa48fc --- /dev/null +++ b/arch/arm/dts/rk3566-rock-3c-u-boot.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; + +/ { + leds { + led-0 { + default-state = "on"; + }; + }; +}; diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS index e5b0986ead9..ba4884db8e1 100644 --- a/board/rockchip/evb_rk3568/MAINTAINERS +++ b/board/rockchip/evb_rk3568/MAINTAINERS @@ -69,3 +69,10 @@ S: Maintained F: configs/rock-3a-rk3568_defconfig F: arch/arm/dts/rk3568-rock-3a.dts F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi + +ROCK-3C +M: Jonas Karlman +M: Maxim Moskalets +S: Maintained +F: arch/arm/dts/rk3566-rock-3c-u-boot.dtsi +F: configs/rock-3c-rk3566_defconfig diff --git a/configs/rock-3c-rk3566_defconfig b/configs/rock-3c-rk3566_defconfig new file mode 100644 index 00000000000..f44b202c8c3 --- /dev/null +++ b/configs/rock-3c-rk3566_defconfig @@ -0,0 +1,97 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-rock-3c" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_ROCKCHIP_SPI_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-rock-3c.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SCSI_AHCI=y +CONFIG_AHCI_PCI=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=4 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 82cbc6e3e0d..a78d6dbedb6 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -106,6 +106,7 @@ List of mainline supported Rockchip boards: - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566) - Powkiddy X55 (powkiddy-x55-rk3566) - Radxa CM3 IO Board (radxa-cm3-io-rk3566) + - Radxa ROCK 3C (rock-3c-rk3566) * rk3568 - Rockchip Evb-RK3568 (evb-rk3568) -- cgit v1.3.1 From e20d57ae7e0c28f2d770a7d18c1501d332e8766a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 31 Jul 2024 07:28:54 +0000 Subject: board: rockchip: Add Radxa ROCK 3B The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community version based on the RK3568 SoC and an industrial version based on the RK3568J SoC. Features tested on ROCK 3B 8GB v1.51 (both variants): - SD-card boot - eMMC boot - SPI Flash boot - Ethernet - PCIe/NVMe - USB gadget - USB host Signed-off-by: Jonas Karlman Tested-by: FUKAUMI Naoki Reviewed-by: Kever Yang --- arch/arm/dts/rk3568-rock-3b-u-boot.dtsi | 15 +++++ board/rockchip/evb_rk3568/MAINTAINERS | 6 ++ configs/rock-3b-rk3568_defconfig | 100 ++++++++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 3 +- 4 files changed, 123 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3568-rock-3b-u-boot.dtsi create mode 100644 configs/rock-3b-rk3568_defconfig (limited to 'doc') diff --git a/arch/arm/dts/rk3568-rock-3b-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3b-u-boot.dtsi new file mode 100644 index 00000000000..b1f324282ba --- /dev/null +++ b/arch/arm/dts/rk3568-rock-3b-u-boot.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" + +&sdhci { + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; +}; + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS index ba4884db8e1..588134ecb27 100644 --- a/board/rockchip/evb_rk3568/MAINTAINERS +++ b/board/rockchip/evb_rk3568/MAINTAINERS @@ -70,6 +70,12 @@ F: configs/rock-3a-rk3568_defconfig F: arch/arm/dts/rk3568-rock-3a.dts F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi +ROCK-3B +M: Jonas Karlman +S: Maintained +F: configs/rock-3b-rk3568_defconfig +F: arch/arm/dts/rk3568-rock-3b* + ROCK-3C M: Jonas Karlman M: Maxim Moskalets diff --git a/configs/rock-3b-rk3568_defconfig b/configs/rock-3b-rk3568_defconfig new file mode 100644 index 00000000000..937796811a9 --- /dev/null +++ b/configs/rock-3b-rk3568_defconfig @@ -0,0 +1,100 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-rock-3b" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_ROCKCHIP_SPI_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-rock-3b.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SCSI_AHCI=y +CONFIG_AHCI_PCI=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=4 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_FAN53555=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index a78d6dbedb6..7115cfbe2ec 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -117,7 +117,8 @@ List of mainline supported Rockchip boards: - Generic RK3566/RK3568 (generic-rk3568) - Hardkernel ODROID-M1 (odroid-m1-rk3568) - Radxa E25 Carrier Board (radxa-e25-rk3568) - - Radxa ROCK 3 Model A (rock-3a-rk3568) + - Radxa ROCK 3A (rock-3a-rk3568) + - Radxa ROCK 3B (rock-3b-rk3568) * rk3588 - ArmSoM Sige7 (sige7-rk3588) -- cgit v1.3.1 From 5d199ad9a6bb43dbf43efe45ec37002c4ae305a0 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 2 Aug 2024 22:12:23 +0000 Subject: board: rockchip: Add Radxa ZERO 3W/3E The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. Implement rk_board_late_init() to set correct fdtfile env var and board_fit_config_name_match() to load correct FIT config based on what board is detected at runtime so a single board target can be used for both board models. Features tested on a ZERO 3W 8GB v1.11: - SD-card boot - eMMC boot - USB gadget - USB host Features tested on a ZERO 3E 4GB v1.2: - SD-card boot - Ethernet - USB gadget - USB host Signed-off-by: Jonas Karlman Tested-by: FUKAUMI Naoki Reviewed-by: Kever Yang --- arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi | 15 +++++ arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi | 15 +++++ arch/arm/mach-rockchip/rk3568/Kconfig | 6 ++ board/radxa/zero3-rk3566/Kconfig | 12 ++++ board/radxa/zero3-rk3566/MAINTAINERS | 6 ++ board/radxa/zero3-rk3566/Makefile | 3 + board/radxa/zero3-rk3566/zero3-rk3566.c | 59 +++++++++++++++++++ configs/radxa-zero-3-rk3566_defconfig | 85 +++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + 9 files changed, 202 insertions(+) create mode 100644 arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi create mode 100644 arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi create mode 100644 board/radxa/zero3-rk3566/Kconfig create mode 100644 board/radxa/zero3-rk3566/MAINTAINERS create mode 100644 board/radxa/zero3-rk3566/Makefile create mode 100644 board/radxa/zero3-rk3566/zero3-rk3566.c create mode 100644 configs/radxa-zero-3-rk3566_defconfig (limited to 'doc') diff --git a/arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi b/arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi new file mode 100644 index 00000000000..8af2581163b --- /dev/null +++ b/arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" + +&saradc { + bootph-pre-ram; +}; + +&usb_host0_xhci { + dr_mode = "otg"; +}; + +&vcca_1v8 { + bootph-pre-ram; +}; diff --git a/arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi b/arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi new file mode 100644 index 00000000000..8af2581163b --- /dev/null +++ b/arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" + +&saradc { + bootph-pre-ram; +}; + +&usb_host0_xhci { + dr_mode = "otg"; +}; + +&vcca_1v8 { + bootph-pre-ram; +}; diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index 014ebf9f0ba..0f32f243be4 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -32,6 +32,11 @@ config TARGET_QUARTZ64_RK3566 help Pine64 Quartz64 single board computer with a RK3566 SoC. +config TARGET_RADXA_ZERO_3_RK3566 + bool "Radxa ZERO 3W/3E" + help + Radxa ZERO 3W/3E single board computers with a RK3566 SoC. + endchoice config ROCKCHIP_BOOT_MODE_REG @@ -54,5 +59,6 @@ source "board/anbernic/rgxx3_rk3566/Kconfig" source "board/hardkernel/odroid_m1/Kconfig" source "board/pine64/quartz64_rk3566/Kconfig" source "board/powkiddy/x55/Kconfig" +source "board/radxa/zero3-rk3566/Kconfig" endif diff --git a/board/radxa/zero3-rk3566/Kconfig b/board/radxa/zero3-rk3566/Kconfig new file mode 100644 index 00000000000..7d46efc9c40 --- /dev/null +++ b/board/radxa/zero3-rk3566/Kconfig @@ -0,0 +1,12 @@ +if TARGET_RADXA_ZERO_3_RK3566 + +config SYS_BOARD + default "zero3-rk3566" + +config SYS_VENDOR + default "radxa" + +config SYS_CONFIG_NAME + default "evb_rk3568" + +endif diff --git a/board/radxa/zero3-rk3566/MAINTAINERS b/board/radxa/zero3-rk3566/MAINTAINERS new file mode 100644 index 00000000000..e5a5d856113 --- /dev/null +++ b/board/radxa/zero3-rk3566/MAINTAINERS @@ -0,0 +1,6 @@ +RADXA-ZERO-3-RK3566 +M: Jonas Karlman +S: Maintained +F: board/radxa/zero3-rk3566 +F: configs/radxa-zero-3-rk3566_defconfig +F: arch/arm/dts/rk3566-radxa-zero-3* diff --git a/board/radxa/zero3-rk3566/Makefile b/board/radxa/zero3-rk3566/Makefile new file mode 100644 index 00000000000..b28b58ed5d8 --- /dev/null +++ b/board/radxa/zero3-rk3566/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += zero3-rk3566.o diff --git a/board/radxa/zero3-rk3566/zero3-rk3566.c b/board/radxa/zero3-rk3566/zero3-rk3566.c new file mode 100644 index 00000000000..cf30c4e3898 --- /dev/null +++ b/board/radxa/zero3-rk3566/zero3-rk3566.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include + +#define HW_ID_CHANNEL 1 + +struct board_model { + unsigned int low; + unsigned int high; + const char *fdtfile; +}; + +static const struct board_model board_models[] = { + { 230, 270, "rockchip/rk3566-radxa-zero-3w.dtb" }, + { 400, 450, "rockchip/rk3566-radxa-zero-3e.dtb" }, +}; + +static const struct board_model *get_board_model(void) +{ + unsigned int val; + int i, ret; + + ret = adc_channel_single_shot("saradc@fe720000", HW_ID_CHANNEL, &val); + if (ret) + return NULL; + + for (i = 0; i < ARRAY_SIZE(board_models); i++) { + unsigned int min = board_models[i].low; + unsigned int max = board_models[i].high; + + if (min <= val && val <= max) + return &board_models[i]; + } + + return NULL; +} + +int rk_board_late_init(void) +{ + const struct board_model *model = get_board_model(); + + if (model) + env_set("fdtfile", model->fdtfile); + + return 0; +} + +int board_fit_config_name_match(const char *name) +{ + const struct board_model *model = get_board_model(); + + if (model && !strcmp(name, model->fdtfile)) + return 0; + + return -EINVAL; +} diff --git a/configs/radxa-zero-3-rk3566_defconfig b/configs/radxa-zero-3-rk3566_defconfig new file mode 100644 index 00000000000..7606edf393e --- /dev/null +++ b/configs/radxa-zero-3-rk3566_defconfig @@ -0,0 +1,85 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-radxa-zero-3w" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_RADXA_ZERO_3_RK3566=y +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-radxa-zero-3w.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_POWER=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_LIST="rockchip/rk3566-radxa-zero-3w rockchip/rk3566-radxa-zero-3e" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_ADC=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_FAN53555=y +CONFIG_PMIC_RK8XX=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 7115cfbe2ec..3febebd0b83 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -107,6 +107,7 @@ List of mainline supported Rockchip boards: - Powkiddy X55 (powkiddy-x55-rk3566) - Radxa CM3 IO Board (radxa-cm3-io-rk3566) - Radxa ROCK 3C (rock-3c-rk3566) + - Radxa ZERO 3W/3E (radxa-zero-3-rk3566) * rk3568 - Rockchip Evb-RK3568 (evb-rk3568) -- cgit v1.3.1 From a52099b4a2ae9e8cafc79268325249bcad308012 Mon Sep 17 00:00:00 2001 From: Ricardo Pardini Date: Wed, 31 Jul 2024 09:03:31 +0000 Subject: board: rockchip: Add Xunlong Orange Pi 3B The Xunlong Orange Pi 3B is a single-board computer based on the Rockchip RK3566 SoC. The two hw revisions use different io-voltage for Ethernet PHY and can be identified using GPIO4_C4: - v1.1.1: x (internal pull-down) - v2.1: PHY_RESET (external pull-up) Implement rk_board_late_init() to set correct fdtfile env var and board_fit_config_name_match() to load correct FIT config based on what board is detected at runtime so a single board target can be used for both hw revisions. Minimal DTs that includ DT from dts/upstream is added to support booting from both hw revision and only set Ethernet PHY io-voltage when the hw revision is detected at runtime. A side-affect of this is that defconfig show OF_UPSTREAM=n, however dts/upstream DTs is used for this board. Features tested on Orange Pi 3B 4GB (v1.1.1 and v2.1): - SD-card boot - eMMC boot - SPI Flash boot - Ethernet - PCIe/NVMe - USB host Signed-off-by: Ricardo Pardini Co-developed-by: Jonas Karlman Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3566-orangepi-3b-u-boot.dtsi | 14 ++++ arch/arm/dts/rk3566-orangepi-3b-v1.1-u-boot.dtsi | 3 + arch/arm/dts/rk3566-orangepi-3b-v1.1.dts | 3 + arch/arm/dts/rk3566-orangepi-3b-v2.1-u-boot.dtsi | 3 + arch/arm/dts/rk3566-orangepi-3b-v2.1.dts | 3 + arch/arm/dts/rk3566-orangepi-3b.dts | 5 ++ arch/arm/mach-rockchip/rk3568/Kconfig | 6 ++ board/xunlong/orangepi-3b-rk3566/Kconfig | 12 +++ board/xunlong/orangepi-3b-rk3566/MAINTAINERS | 6 ++ board/xunlong/orangepi-3b-rk3566/Makefile | 3 + .../orangepi-3b-rk3566/orangepi-3b-rk3566.c | 77 +++++++++++++++++ configs/orangepi-3b-rk3566_defconfig | 98 ++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + 13 files changed, 234 insertions(+) create mode 100644 arch/arm/dts/rk3566-orangepi-3b-u-boot.dtsi create mode 100644 arch/arm/dts/rk3566-orangepi-3b-v1.1-u-boot.dtsi create mode 100644 arch/arm/dts/rk3566-orangepi-3b-v1.1.dts create mode 100644 arch/arm/dts/rk3566-orangepi-3b-v2.1-u-boot.dtsi create mode 100644 arch/arm/dts/rk3566-orangepi-3b-v2.1.dts create mode 100644 arch/arm/dts/rk3566-orangepi-3b.dts create mode 100644 board/xunlong/orangepi-3b-rk3566/Kconfig create mode 100644 board/xunlong/orangepi-3b-rk3566/MAINTAINERS create mode 100644 board/xunlong/orangepi-3b-rk3566/Makefile create mode 100644 board/xunlong/orangepi-3b-rk3566/orangepi-3b-rk3566.c create mode 100644 configs/orangepi-3b-rk3566_defconfig (limited to 'doc') diff --git a/arch/arm/dts/rk3566-orangepi-3b-u-boot.dtsi b/arch/arm/dts/rk3566-orangepi-3b-u-boot.dtsi new file mode 100644 index 00000000000..e44b699af72 --- /dev/null +++ b/arch/arm/dts/rk3566-orangepi-3b-u-boot.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk356x-u-boot.dtsi" + +&gpio4 { + bootph-pre-ram; +}; + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; diff --git a/arch/arm/dts/rk3566-orangepi-3b-v1.1-u-boot.dtsi b/arch/arm/dts/rk3566-orangepi-3b-v1.1-u-boot.dtsi new file mode 100644 index 00000000000..50ea6ede728 --- /dev/null +++ b/arch/arm/dts/rk3566-orangepi-3b-v1.1-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3566-orangepi-3b-u-boot.dtsi" diff --git a/arch/arm/dts/rk3566-orangepi-3b-v1.1.dts b/arch/arm/dts/rk3566-orangepi-3b-v1.1.dts new file mode 100644 index 00000000000..f97e33bd810 --- /dev/null +++ b/arch/arm/dts/rk3566-orangepi-3b-v1.1.dts @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include diff --git a/arch/arm/dts/rk3566-orangepi-3b-v2.1-u-boot.dtsi b/arch/arm/dts/rk3566-orangepi-3b-v2.1-u-boot.dtsi new file mode 100644 index 00000000000..50ea6ede728 --- /dev/null +++ b/arch/arm/dts/rk3566-orangepi-3b-v2.1-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3566-orangepi-3b-u-boot.dtsi" diff --git a/arch/arm/dts/rk3566-orangepi-3b-v2.1.dts b/arch/arm/dts/rk3566-orangepi-3b-v2.1.dts new file mode 100644 index 00000000000..0031e2477ab --- /dev/null +++ b/arch/arm/dts/rk3566-orangepi-3b-v2.1.dts @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include diff --git a/arch/arm/dts/rk3566-orangepi-3b.dts b/arch/arm/dts/rk3566-orangepi-3b.dts new file mode 100644 index 00000000000..44b9a9c89f0 --- /dev/null +++ b/arch/arm/dts/rk3566-orangepi-3b.dts @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index 0f32f243be4..899cf909fbb 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -37,6 +37,11 @@ config TARGET_RADXA_ZERO_3_RK3566 help Radxa ZERO 3W/3E single board computers with a RK3566 SoC. +config TARGET_ORANGEPI_3B_RK3566 + bool "Xunlong Orange Pi 3B" + help + Xunlong Orange Pi 3B single board computer with a RK3566 SoC. + endchoice config ROCKCHIP_BOOT_MODE_REG @@ -60,5 +65,6 @@ source "board/hardkernel/odroid_m1/Kconfig" source "board/pine64/quartz64_rk3566/Kconfig" source "board/powkiddy/x55/Kconfig" source "board/radxa/zero3-rk3566/Kconfig" +source "board/xunlong/orangepi-3b-rk3566/Kconfig" endif diff --git a/board/xunlong/orangepi-3b-rk3566/Kconfig b/board/xunlong/orangepi-3b-rk3566/Kconfig new file mode 100644 index 00000000000..36ccc056c62 --- /dev/null +++ b/board/xunlong/orangepi-3b-rk3566/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ORANGEPI_3B_RK3566 + +config SYS_BOARD + default "orangepi-3b-rk3566" + +config SYS_VENDOR + default "xunlong" + +config SYS_CONFIG_NAME + default "evb_rk3568" + +endif diff --git a/board/xunlong/orangepi-3b-rk3566/MAINTAINERS b/board/xunlong/orangepi-3b-rk3566/MAINTAINERS new file mode 100644 index 00000000000..6e1df1052ba --- /dev/null +++ b/board/xunlong/orangepi-3b-rk3566/MAINTAINERS @@ -0,0 +1,6 @@ +ORANGEPI-3B-RK3566 +M: Jonas Karlman +S: Maintained +F: board/xunlong/orangepi-3b-rk3566 +F: configs/orangepi-3b-rk3566_defconfig +F: arch/arm/dts/rk3566-orangepi-3b* diff --git a/board/xunlong/orangepi-3b-rk3566/Makefile b/board/xunlong/orangepi-3b-rk3566/Makefile new file mode 100644 index 00000000000..9ce25549e21 --- /dev/null +++ b/board/xunlong/orangepi-3b-rk3566/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += orangepi-3b-rk3566.o diff --git a/board/xunlong/orangepi-3b-rk3566/orangepi-3b-rk3566.c b/board/xunlong/orangepi-3b-rk3566/orangepi-3b-rk3566.c new file mode 100644 index 00000000000..d05c33adefa --- /dev/null +++ b/board/xunlong/orangepi-3b-rk3566/orangepi-3b-rk3566.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include + +struct board_model { + int value; + const char *fdtfile; + const char *config; +}; + +static const struct board_model board_models[] = { + { 0, "rockchip/rk3566-orangepi-3b-v1.1.dtb", "rk3566-orangepi-3b-v1.1.dtb" }, + { 1, "rockchip/rk3566-orangepi-3b-v2.1.dtb", "rk3566-orangepi-3b-v2.1.dtb" }, +}; + +static int get_board_value(void) +{ + struct gpio_desc desc; + int ret; + + /* + * GPIO4_C4 (E20): + * v1.1.1: x (internal pull-down) + * v2.1: PHY_RESET (external pull-up) + */ + ret = dm_gpio_lookup_name("E20", &desc); + if (ret) + return ret; + + ret = dm_gpio_request(&desc, "phy_reset"); + if (ret && ret != -EBUSY) + return ret; + + dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN); + ret = dm_gpio_get_value(&desc); + dm_gpio_free(desc.dev, &desc); + + return ret; +} + +static const struct board_model *get_board_model(void) +{ + int i, val; + + val = get_board_value(); + if (val < 0) + return NULL; + + for (i = 0; i < ARRAY_SIZE(board_models); i++) { + if (val == board_models[i].value) + return &board_models[i]; + } + + return NULL; +} + +int rk_board_late_init(void) +{ + const struct board_model *model = get_board_model(); + + if (model) + env_set("fdtfile", model->fdtfile); + + return 0; +} + +int board_fit_config_name_match(const char *name) +{ + const struct board_model *model = get_board_model(); + + if (model && (!strcmp(name, model->fdtfile) || + !strcmp(name, model->config))) + return 0; + + return -EINVAL; +} diff --git a/configs/orangepi-3b-rk3566_defconfig b/configs/orangepi-3b-rk3566_defconfig new file mode 100644 index 00000000000..575dc4340d3 --- /dev/null +++ b/configs/orangepi-3b-rk3566_defconfig @@ -0,0 +1,98 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_GPIO=y +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3566-orangepi-3b" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_ROCKCHIP_SPI_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_ORANGEPI_3B_RK3566=y +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-orangepi-3b.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +# CONFIG_OF_UPSTREAM is not set +CONFIG_OF_LIST="rk3566-orangepi-3b rk3566-orangepi-3b-v1.1 rk3566-orangepi-3b-v2.1" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SCSI_AHCI=y +CONFIG_AHCI_PCI=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=4 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_FAN53555=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 3febebd0b83..7003f05d088 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -108,6 +108,7 @@ List of mainline supported Rockchip boards: - Radxa CM3 IO Board (radxa-cm3-io-rk3566) - Radxa ROCK 3C (rock-3c-rk3566) - Radxa ZERO 3W/3E (radxa-zero-3-rk3566) + - Xunlong Orange Pi 3B (orangepi-3b-rk3566) * rk3568 - Rockchip Evb-RK3568 (evb-rk3568) -- cgit v1.3.1 From 5bc8209e1ba7f52af8238a98a468041c13ccb85c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 31 Jul 2024 21:12:16 +0000 Subject: board: rockchip: Add FriendlyElec CM3588 NAS The CM3588 NAS by FriendlyElec pairs the CM3588 compute module, based on the Rockchip RK3588 SoC, with the CM3588 NAS Kit carrier board. Features tested on a CM3588 NAS Kit with 8GB RAM 64GB eMMC module: - SD-card boot - eMMC boot - Ethernet - PCIe/NVMe - USB gadget - USB host Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- .../dts/rk3588-friendlyelec-cm3588-nas-u-boot.dtsi | 8 ++ arch/arm/mach-rockchip/rk3588/Kconfig | 24 ++++++ board/friendlyelec/cm3588-nas-rk3588/Kconfig | 12 +++ board/friendlyelec/cm3588-nas-rk3588/MAINTAINERS | 6 ++ configs/cm3588-nas-rk3588_defconfig | 90 ++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + 6 files changed, 141 insertions(+) create mode 100644 arch/arm/dts/rk3588-friendlyelec-cm3588-nas-u-boot.dtsi create mode 100644 board/friendlyelec/cm3588-nas-rk3588/Kconfig create mode 100644 board/friendlyelec/cm3588-nas-rk3588/MAINTAINERS create mode 100644 configs/cm3588-nas-rk3588_defconfig (limited to 'doc') diff --git a/arch/arm/dts/rk3588-friendlyelec-cm3588-nas-u-boot.dtsi b/arch/arm/dts/rk3588-friendlyelec-cm3588-nas-u-boot.dtsi new file mode 100644 index 00000000000..2e60f2dce8f --- /dev/null +++ b/arch/arm/dts/rk3588-friendlyelec-cm3588-nas-u-boot.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588-u-boot.dtsi" + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index e751d64e1a1..72c5e569fb8 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -6,6 +6,29 @@ config TARGET_EVB_RK3588 help RK3588 EVB is a evaluation board for Rockchp RK3588. +config TARGET_CM3588_NAS_RK3588 + bool "FriendlyElec CM3588 NAS" + select BOARD_LATE_INIT + help + The CM3588 NAS by FriendlyElec pairs the CM3588 compute module, based + on the Rockchip RK3588 SoC, with the CM3588 NAS Kit carrier board. + + Hardware features: + - Rockchip RK3588 SoC + - 4GB/8GB/16GB LPDDR4x RAM + - 0GB/64GB HS400 eMMC + - MicroSD card slot + - 1x RTL8125B 2.5G Ethernet + - 4x M.2 M-Key with PCIe 3.0 x1 (via bifurcation) for NVMe SSDs + - 2x USB 3.0 (USB 3.1 Gen1) Type-A, 1x USB 2.0 Type-A + - 1x USB 3.0 Type-C with DP AltMode support + - 2x HDMI 2.1 out, 1x HDMI in + - MIPI-CSI Connector, MIPI-DSI Connector + - 40-pin GPIO header + - 4 buttons: power, reset, recovery, MASK, user button + - 3.5mm Headphone out, 2.0mm PH-2A Mic in + - 5V Fan connector, PWM beeper, IR receiver, RTC battery connector + config TARGET_JAGUAR_RK3588 bool "Theobroma Systems SBC-RK3588-AMR (Jaguar)" select BOARD_LATE_INIT @@ -311,6 +334,7 @@ config TEXT_BASE source "board/armsom/sige7-rk3588/Kconfig" source "board/edgeble/neural-compute-module-6/Kconfig" +source "board/friendlyelec/cm3588-nas-rk3588/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" diff --git a/board/friendlyelec/cm3588-nas-rk3588/Kconfig b/board/friendlyelec/cm3588-nas-rk3588/Kconfig new file mode 100644 index 00000000000..fdc458a4264 --- /dev/null +++ b/board/friendlyelec/cm3588-nas-rk3588/Kconfig @@ -0,0 +1,12 @@ +if TARGET_CM3588_NAS_RK3588 + +config SYS_BOARD + default "cm3588-nas-rk3588" + +config SYS_VENDOR + default "friendlyelec" + +config SYS_CONFIG_NAME + default "nanopc-t6-rk3588" + +endif diff --git a/board/friendlyelec/cm3588-nas-rk3588/MAINTAINERS b/board/friendlyelec/cm3588-nas-rk3588/MAINTAINERS new file mode 100644 index 00000000000..92b958ada6f --- /dev/null +++ b/board/friendlyelec/cm3588-nas-rk3588/MAINTAINERS @@ -0,0 +1,6 @@ +CM3588-NAS-RK3588 +M: Jonas Karlman +S: Maintained +F: board/friendlyelec/cm3588-nas-rk3588 +F: configs/cm3588-nas-rk3588_defconfig +F: arch/arm/dts/rk3588-friendlyelec-cm3588-nas* diff --git a/configs/cm3588-nas-rk3588_defconfig b/configs/cm3588-nas-rk3588_defconfig new file mode 100644 index 00000000000..d6d82757a2d --- /dev/null +++ b/configs/cm3588-nas-rk3588_defconfig @@ -0,0 +1,90 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-friendlyelec-cm3588-nas" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_CM3588_NAS_RK3588=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-friendlyelec-cm3588-nas.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_BUTTON_GPIO=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHYLIB=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 7003f05d088..7523c01f777 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -127,6 +127,7 @@ List of mainline supported Rockchip boards: - Rockchip EVB (evb-rk3588) - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) + - FriendlyElec CM3588 NAS (cm3588-nas-rk3588) - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588) - FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s) - FriendlyElec NanoPi R6S (nanopi-r6s-rk3588s) -- cgit v1.3.1 From d27c3431ae7e2394843a09a1d36a78f22fa8b50f Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 2 Aug 2024 23:00:28 +0200 Subject: board: rockchip: Add Radxa ROCK 5 ITX The Rock 5 ITX is a board in ITX form factor using the RK3588 SoC It can be powered either by 12V, ATX power-supply or PoE. Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot, 2*2.5Gb PCIe-connected Ethernet NICs. Display options are 2*HDMI, DP via USB-c, eDP + 2*DSI via PCB connectors. USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel connector. Schematics for the board can be found on - https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf - https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf The naming scheme with the dashes follows Dragan's comment on the mainline devicetree commit: "the name of this board deviates from the standard Radxa naming scheme, which is something like "ROCK " thus, "rock-5a" is fine, but it should be "rock-5-itx", simply because there's a space between "5" and "ITX" in "ROCK 5 ITX" Signed-off-by: Heiko Stuebner Reviewed-by: Kever Yang Signed-off-by: Kever Yang --- arch/arm/dts/rk3588-rock-5-itx-u-boot.dtsi | 22 ++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 29 ++++++++ board/radxa/rock-5-itx-rk3588/Kconfig | 12 ++++ board/radxa/rock-5-itx-rk3588/MAINTAINERS | 8 +++ configs/rock-5-itx-rk3588_defconfig | 111 +++++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/rock-5-itx-rk3588.h | 15 ++++ 7 files changed, 198 insertions(+) create mode 100644 arch/arm/dts/rk3588-rock-5-itx-u-boot.dtsi create mode 100644 board/radxa/rock-5-itx-rk3588/Kconfig create mode 100644 board/radxa/rock-5-itx-rk3588/MAINTAINERS create mode 100644 configs/rock-5-itx-rk3588_defconfig create mode 100644 include/configs/rock-5-itx-rk3588.h (limited to 'doc') diff --git a/arch/arm/dts/rk3588-rock-5-itx-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5-itx-u-boot.dtsi new file mode 100644 index 00000000000..1e5c2674e49 --- /dev/null +++ b/arch/arm/dts/rk3588-rock-5-itx-u-boot.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Collabora Ltd. + */ + +#include "rk3588-u-boot.dtsi" + +&fspim2_pins { + bootph-pre-ram; + bootph-some-ram; +}; + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; + +&vcc3v3_mkey { + regulator-always-on; +}; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 72c5e569fb8..a76a470cc98 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -208,6 +208,34 @@ config TARGET_ROCK5B_RK3588 USB PD over USB Type-C Size: 100mm x 72mm (Pico-ITX form factor) +config TARGET_ROCK_5_ITX_RK3588 + bool "Radxa ROCK-5-ITX RK3588 board" + select BOARD_LATE_INIT + help + Radxa ROCK-5-ITX is a Rockchip RK3588 based SBC (Single Board + Computer) by Radxa in the ITX formfactor. + + There are variants depending on the DRAM size : from 4G up to 32G. + + Specification: + + Rockchip Rk3588 SoC + 4x ARM Cortex-A76, 4x ARM Cortex-A55 + 4/8/16/24/32GB memory LPDDR5 + Mali G610MC4 GPU + 2x MIPI CSI 2 multiple lanes connector + eMMC + uSD slot (up to 128GB) + M.2 M-key and M.2 E-key connector + 4x SATA + 2x USB 2.0 + 4x USB 3.0 Type-A, 2x USB 2.0 Panel, 1x USB 3.0 Type-C + 2x HDMI 2.1 output, 1x HDMI input + DP via Type-C + 2x DSI via PCB connector + 2x 2.5 Gbps Ethernet port + Front-panel connectors for audio and case-power, -leds + Powered by either 12V, ATX power-supply or PoE + config TARGET_SIGE7_RK3588 bool "ArmSoM Sige7 RK3588 board" select BOARD_LATE_INIT @@ -343,6 +371,7 @@ source "board/pine64/quartzpro64-rk3588/Kconfig" source "board/turing/turing-rk1-rk3588/Kconfig" source "board/radxa/rock5a-rk3588s/Kconfig" source "board/radxa/rock5b-rk3588/Kconfig" +source "board/radxa/rock-5-itx-rk3588/Kconfig" source "board/rockchip/evb_rk3588/Kconfig" source "board/rockchip/toybrick_rk3588/Kconfig" source "board/theobroma-systems/jaguar_rk3588/Kconfig" diff --git a/board/radxa/rock-5-itx-rk3588/Kconfig b/board/radxa/rock-5-itx-rk3588/Kconfig new file mode 100644 index 00000000000..f7a7666d531 --- /dev/null +++ b/board/radxa/rock-5-itx-rk3588/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ROCK_5_ITX_RK3588 + +config SYS_BOARD + default "rock-5-itx-rk3588" + +config SYS_VENDOR + default "radxa" + +config SYS_CONFIG_NAME + default "rock-5-itx-rk3588" + +endif diff --git a/board/radxa/rock-5-itx-rk3588/MAINTAINERS b/board/radxa/rock-5-itx-rk3588/MAINTAINERS new file mode 100644 index 00000000000..1c4f24306a0 --- /dev/null +++ b/board/radxa/rock-5-itx-rk3588/MAINTAINERS @@ -0,0 +1,8 @@ +ROCK-5-ITX-RK3588 +M: Heiko Stuebner +R: Jonas Karlman +S: Maintained +F: board/radxa/rock-5-itx-rk3588 +F: include/configs/rock-5-itx-rk3588.h +F: configs/rock-5-itx-rk3588_defconfig +F: arch/arm/dts/rk3588-rock-5-itx-u-boot.dtsi diff --git a/configs/rock-5-itx-rk3588_defconfig b/configs/rock-5-itx-rk3588_defconfig new file mode 100644 index 00000000000..bb9f148692a --- /dev/null +++ b/configs/rock-5-itx-rk3588_defconfig @@ -0,0 +1,111 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-rock-5-itx" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_ROCKCHIP_SPI_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_ROCK5B_RK3588=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5-itx.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_AHCI_PCI=y +CONFIG_DWC_AHCI=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=5 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_PHYLIB=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_LAN75XX=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 7523c01f777..0f9cb404d93 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -134,6 +134,7 @@ List of mainline supported Rockchip boards: - Generic RK3588S/RK3588 (generic-rk3588) - Indiedroid Nova (nova-rk3588s) - Pine64 QuartzPro64 (quartzpro64-rk3588) + - Radxa ROCK 5 ITX (rock-5-itx-rk3588) - Radxa ROCK 5A (rock5a-rk3588s) - Radxa ROCK 5B (rock5b-rk3588) - Rockchip Toybrick TB-RK3588X (toybrick-rk3588) diff --git a/include/configs/rock-5-itx-rk3588.h b/include/configs/rock-5-itx-rk3588.h new file mode 100644 index 00000000000..bc0f9e72bc5 --- /dev/null +++ b/include/configs/rock-5-itx-rk3588.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024 Heiko Stuebner + */ + +#ifndef __ROCK_5_ITX_RK3588_H +#define __ROCK_5_ITX_RK3588_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include + +#endif /* __ROCK_5_ITX_RK3588_H */ -- cgit v1.3.1 From 6967be34dc87262472fd61cc7e7dd869d8ab3a1e Mon Sep 17 00:00:00 2001 From: Gary Bisson Date: Mon, 5 Aug 2024 23:25:11 +0200 Subject: imx8ulp_evk: enable binman support Enable binman support and add documentation for the imx8ul-evk board. Signed-off-by: Gary Bisson --- arch/arm/dts/imx8ulp-evk-u-boot.dtsi | 2 + arch/arm/mach-imx/imx8ulp/Kconfig | 1 + configs/imx8ulp_evk_defconfig | 3 +- doc/board/nxp/imx8ulp_evk.rst | 79 ++++++++++++++++++++++++++++++++++++ doc/board/nxp/index.rst | 1 + 5 files changed, 85 insertions(+), 1 deletion(-) create mode 100644 doc/board/nxp/imx8ulp_evk.rst (limited to 'doc') diff --git a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi index 608bde3a2a3..f67fe166d31 100644 --- a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright 2021 NXP */ +#include "imx8ulp-u-boot.dtsi" + / { mu@27020000 { compatible = "fsl,imx8ulp-mu"; diff --git a/arch/arm/mach-imx/imx8ulp/Kconfig b/arch/arm/mach-imx/imx8ulp/Kconfig index 49ea25250a3..fbca241e106 100644 --- a/arch/arm/mach-imx/imx8ulp/Kconfig +++ b/arch/arm/mach-imx/imx8ulp/Kconfig @@ -23,6 +23,7 @@ choice config TARGET_IMX8ULP_EVK bool "imx8ulp_evk" + select BINMAN select IMX8ULP select SUPPORT_SPL select IMX8ULP_DRAM diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index b302df1f351..0f0748b6792 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -8,7 +8,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x400000 -CONFIG_IMX_CONFIG="" +CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx8ulp/imximage.cfg" CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx8ulp-evk" CONFIG_SPL_TEXT_BASE=0x22020000 @@ -38,6 +38,7 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_LOAD_IMX_CONTAINER=y +CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx8ulp/container.cfg" # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/doc/board/nxp/imx8ulp_evk.rst b/doc/board/nxp/imx8ulp_evk.rst new file mode 100644 index 00000000000..a9f5546311d --- /dev/null +++ b/doc/board/nxp/imx8ulp_evk.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8ulp_evk +======================= + +U-Boot for the NXP i.MX 8ULP EVK board + +Quick Start +----------- + +- Get and Build the ARM Trusted firmware +- Get the uPower firmware +- Get the M33 firmware +- Get ahab-container.img +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +Note: srctree is U-Boot source directory +Get ATF from: https://github.com/nxp-imx/imx-atf/ +branch: lf_v2.10 + +.. code-block:: bash + + $ unset LDFLAGS + $ make PLAT=imx8ulp bl31 + $ cp build/imx8ulp/release/bl31.bin $(srctree) + +Get the uPower firmware +----------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-upower-1.3.1.bin + $ chmod +x firmware-upower-1.3.1.bin + $ ./firmware-upower-1.3.1.bin + $ cp firmware-upower-1.3.1/upower_a1.bin $(srctree)/upower.bin + +Get the M33 firmware +-------------------- + +.. code-block:: bash + + $ wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx8ulp-m33-demo-2.14.1.bin + $ chmod +x imx8ulp-m33-demo-2.14.1.bin + $ ./imx8ulp-m33-demo-2.14.1.bin + $ cp imx8ulp-m33-demo-2.14.1/imx8ulp_m33_TCM_power_mode_switch.bin $(srctree)/m33_image.bin + +Get ahab-container.img +--------------------------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-0.1.2-4ed450a.bin + $ chmod +x firmware-ele-imx-0.1.2-4ed450a.bin + $ ./firmware-ele-imx-0.1.2-4ed450a.bin + $ cp firmware-ele-imx-0.1.2-4ed450a/mx8ulpa2-ahab-container.img $(srctree) + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx8ulp_evk_defconfig + $ make + +Burn the flash.bin to MicroSD card offset 32KB: + +.. code-block:: bash + + $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc + +Boot +---- + +Set Boot switch to SD boot diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst index 94687730544..5f1e878508e 100644 --- a/doc/board/nxp/index.rst +++ b/doc/board/nxp/index.rst @@ -11,6 +11,7 @@ NXP Semiconductors imx8mp_evk imx8mq_evk imx8qxp_mek + imx8ulp_evk imx93_11x11_evk imxrt1020-evk imxrt1050-evk -- cgit v1.3.1 From d11a60610e17373331ad17b6c5c31735cf9fffa8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 19 Aug 2024 17:15:10 -0600 Subject: Prepare v2024.10-rc3 Signed-off-by: Tom Rini --- Makefile | 2 +- doc/develop/release_cycle.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'doc') diff --git a/Makefile b/Makefile index 21aa068ca71..f90e48f58a5 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2024 PATCHLEVEL = 10 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc3 NAME = # *DOCUMENTATION* diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 776af601e20..72863756a42 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -71,7 +71,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2024.10-rc2 was released on Mon 05 August 2024. -.. * U-Boot v2024.10-rc3 was released on Mon 19 August 2024. +* U-Boot v2024.10-rc3 was released on Mon 19 August 2024. .. * U-Boot v2024.10-rc4 was released on Mon 02 September 2024. -- cgit v1.3.1