From 4773e9d5ed4c12e02759f1d732bb66006139037a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 25 Feb 2023 19:01:34 +0000 Subject: rockchip: Use an external TPL binary on RK3568 Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps back to BootRom to load next stage, U-Boot SPL, into DRAM. BootRom then jumps to U-Boot SPL to continue the normal boot flow. However, there is no support to initialize DRAM on RK35xx SoCs using U-Boot TPL and instead an external TPL binary must be used to generate a bootable u-boot-rockchip.bin image. Add CONFIG_ROCKCHIP_EXTERNAL_TPL to indicate that an external TPL should be used. Build U-Boot with ROCKCHIP_TPL=/path/to/ddr.bin to generate a bootable u-boot-rockchip.bin image for RK3568. Signed-off-by: Jonas Karlman Reviewed-by: Simon Glass Reviewed-by: Kever Yang Tested-by: Eugen Hristev --- doc/board/rockchip/rockchip.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'doc') diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 28c837a3820..ac4dcce1a77 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -86,6 +86,8 @@ List of mainline supported Rockchip boards: - Radxa ROCK Pi 4 (rock-pi-4-rk3399) - Rockchip Evb-RK3399 (evb_rk3399) - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) +* rk3568 + - Rockchip Evb-RK3568 (evb-rk3568) * rv1108 - Rockchip Evb-rv1108 (evb-rv1108) - Elgin-R1 (elgin-rv1108) @@ -167,6 +169,15 @@ To build rk3399 boards: make evb-rk3399_defconfig make CROSS_COMPILE=aarch64-linux-gnu- +To build rk3568 boards: + +.. code-block:: bash + + export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf + export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3568_ddr_1560MHz_v1.13.bin + make evb-rk3568_defconfig + make CROSS_COMPILE=aarch64-linux-gnu- + Flashing -------- -- cgit v1.2.3 From 9b78a98ee5e7e349f0f7e7c216d89ce7f8835a0f Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 13 Feb 2023 16:27:42 -0600 Subject: evb-rk3568: Update MAINTAINERS and documentation Update the MAINTAINERS file to include the devicetree for the rk3568-evb1-v10 board. Also update Rockchip board docs to include information on building RK3568 based devices. Signed-off-by: Chris Morgan Signed-off-by: Kever Yang --- doc/board/rockchip/rockchip.rst | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'doc') diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index ac4dcce1a77..c1de34b3cb0 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -173,7 +173,8 @@ To build rk3568 boards: .. code-block:: bash - export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf + export BL31=../arm-trusted-firmware/build/rk3568/release/bl31/bl31.elf + [or]export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3568_ddr_1560MHz_v1.13.bin make evb-rk3568_defconfig make CROSS_COMPILE=aarch64-linux-gnu- -- cgit v1.2.3 From 15b2d1fb727b5e09ec95a0c613f8fac5752f1a76 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Mon, 30 Jan 2023 20:27:49 +0530 Subject: board: rockchip: Add Edgeble Neural Compute Module 6 Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module based on Rockchip RK3588 from Edgeble AI. General features: - Rockchip RK3588 - up to 32GB LPDDR4x - up to 128GB eMMC - 2x MIPI CSI2 FPC On module WiFi6/BT5 is available in the following Neu6 variants. Neural Compute Module 6(Neu6) IO board is an industrial form factor ready-to-use IO board from Edgeble AI. IO board offers plenty of peripherals and connectivity options and this patch enables basic eMMC and UART which is enough to successfully boot Linux. Neu6 needs to mount on top of this IO board in order to create a complete Edgeble Neural Compute Module 6(Neu6) IO platform. Boot log for the record, DDR Version V1.08 20220617 LPDDR4X, 2112MHz channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB Manufacturer ID:0x6 CH0 RX Vref:31.7%, TX Vref:21.8%,21.8% CH1 RX Vref:30.7%, TX Vref:22.8%,23.8% CH2 RX Vref:30.7%, TX Vref:22.8%,22.8% CH3 RX Vref:30.7%, TX Vref:21.8%,21.8% change to F1: 528MHz change to F2: 1068MHz change to F3: 1560MHz change to F0: 2112MHz out U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530) Trying to boot from MMC1 INFO: Preloader serial: 2 NOTICE: BL31: v2.3():v2.3-391-g856309329:derrick.huang NOTICE: BL31: Built : 14:15:50, Jul 18 2022 INFO: ext 32k is not valid INFO: GICv3 without legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: system boots from cpu-hwid-0 INFO: idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001 INFO: dfs DDR fsp_params[0].freq_mhz= 2112MHz INFO: dfs DDR fsp_params[1].freq_mhz= 528MHz INFO: dfs DDR fsp_params[2].freq_mhz= 1068MHz INFO: dfs DDR fsp_params[3].freq_mhz= 1560MHz INFO: BL31: Initialising Exception Handling Framework INFO: BL31: Initializing runtime services WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK ERROR: Error initializing runtime service opteed_fast INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0xa00000 INFO: SPSR = 0x3c9 U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530) Model: Edgeble Neu6A IO Board DRAM: 7.5 GiB (effective 3.7 GiB) Core: 71 devices, 15 uclasses, devicetree: separate MMC: mmc@fe2c0000: 0 Loading Environment from nowhere... OK In: serial@feb50000 Out: serial@feb50000 Err: serial@feb50000 Model: Edgeble Neu6A IO Board Net: No ethernet found. Hit any key to stop autoboot: 0 => Add support for Edgeble Neu6 Model A IO Board. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- doc/board/rockchip/rockchip.rst | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'doc') diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index c1de34b3cb0..0290d81f9da 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -86,8 +86,13 @@ List of mainline supported Rockchip boards: - Radxa ROCK Pi 4 (rock-pi-4-rk3399) - Rockchip Evb-RK3399 (evb_rk3399) - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) + * rk3568 - Rockchip Evb-RK3568 (evb-rk3568) + +* rk3588 + - Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-rk3588) + * rv1108 - Rockchip Evb-rv1108 (evb-rv1108) - Elgin-R1 (elgin-rv1108) -- cgit v1.2.3 From 3bf8e40807632071769f1dfa401662c5336802c9 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Wed, 22 Feb 2023 11:05:12 +0200 Subject: board: rockchip: add Radxa ROCK5B Rk3588 board ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specification: Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x HDMI output, 1x HDMI input Ethernet port 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 54mm Kernel commits: a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board") 6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b") Signed-off-by: Eugen Hristev Reviewed-by: Kever Yang --- doc/board/rockchip/rockchip.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'doc') diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 0290d81f9da..b5563b8f7f9 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -92,6 +92,7 @@ List of mainline supported Rockchip boards: * rk3588 - Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-rk3588) + - Radxa ROCK 5B (rock5b-rk3588) * rv1108 - Rockchip Evb-rv1108 (evb-rv1108) -- cgit v1.2.3 From ac2ac6908095a22bb48ae3ca5f7a2596f7fc13a3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= Date: Mon, 20 Feb 2023 15:37:29 +0100 Subject: doc: uefi: fix links MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix a couple of links so that they are rendered correctly with sphinx. Signed-off-by: Vincent Stehlé Cc: Heinrich Schuchardt Cc: Ilias Apalodimas Reviewed-by: Heinrich Schuchardt --- doc/develop/uefi/fwu_updates.rst | 3 ++- doc/develop/uefi/uefi.rst | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'doc') diff --git a/doc/develop/uefi/fwu_updates.rst b/doc/develop/uefi/fwu_updates.rst index 72c850a7908..e4709d82b41 100644 --- a/doc/develop/uefi/fwu_updates.rst +++ b/doc/develop/uefi/fwu_updates.rst @@ -27,7 +27,8 @@ metadata. Individual drivers can be added based on the type of storage media, and its partitioning method. Details of the storage device containing the FWU metadata partitions are specified through a U-Boot specific device tree property `fwu-mdata-store`. Please refer to -U-Boot `doc `__ +U-Boot :download:`fwu-mdata-gpt.yaml +` for the device tree bindings. Enabling the FWU Multi Bank Update feature diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst index a944c0fb803..ffe25ca2318 100644 --- a/doc/develop/uefi/uefi.rst +++ b/doc/develop/uefi/uefi.rst @@ -386,8 +386,8 @@ is because the FWU feature supports multiple partitions(banks) of updatable images, and the actual dfu alt number to which the image is to be written to is determined at runtime, based on the value of the update bank to which the image is to be written. For more information -on the FWU Multi Bank Update feature, please refer `doc -`__. +on the FWU Multi Bank Update feature, please refer to +:doc:`/develop/uefi/fwu_updates`. When using the FMP for FIT images, the image index value needs to be set to 1. -- cgit v1.2.3 From 5ee8d90f5469572f3b07d42857012d110476cd2f Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 3 Mar 2023 22:48:27 +0100 Subject: doc: man-page for panic command Provide a man-page for the panic command. Signed-off-by: Heinrich Schuchardt Reviewed-by: Simon Glass --- doc/usage/cmd/panic.rst | 33 +++++++++++++++++++++++++++++++++ doc/usage/index.rst | 1 + 2 files changed, 34 insertions(+) create mode 100644 doc/usage/cmd/panic.rst (limited to 'doc') diff --git a/doc/usage/cmd/panic.rst b/doc/usage/cmd/panic.rst new file mode 100644 index 00000000000..115eba5bde1 --- /dev/null +++ b/doc/usage/cmd/panic.rst @@ -0,0 +1,33 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +panic command +============= + +Synopis +------- + +:: + + panic [message] + +Description +----------- + +Display a message and reset the board. + +message + text to be displayed + +Examples +-------- + +:: + + => panic 'Unrecoverable error' + Unrecoverable error + resetting ... + +Configuration +------------- + +If CONFIG_PANIC_HANG=y, the user has to reset the board manually. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 840c20c934d..ebf5eea9f8a 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -65,6 +65,7 @@ Shell commands cmd/md cmd/mmc cmd/mtest + cmd/panic cmd/part cmd/pause cmd/pinmux -- cgit v1.2.3 From 88e08fc5f6e508eac46cd1dfb0379b11ae032c0a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Mar 2023 20:52:48 -0400 Subject: Prepare v2023.04-rc4 Signed-off-by: Tom Rini --- doc/develop/release_cycle.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'doc') diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 80b50be90e5..7634e3dc9c6 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -70,7 +70,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2023.04-rc3 was released on Mon 27 February 2023. -.. * U-Boot v2023.04-rc4 was released on Mon 13 March 2023. +* U-Boot v2023.04-rc4 was released on Mon 13 March 2023. .. * U-Boot v2023.04-rc5 was released on Mon 27 March 2023. -- cgit v1.2.3