From 814ddd7824db7d43dbad3bf70154e0e692a00d1e Mon Sep 17 00:00:00 2001 From: Chali Anis Date: Tue, 29 Jul 2025 22:19:08 -0400 Subject: pinctrl: gpio: sx150x: fix compilation warnings. Fixes: 5451504256d3 ("pinctrl: gpio: sx150x: add Semtech SX150x I2C GPIO expander and pinctrl driver") Signed-off-by: Chali Anis --- drivers/pinctrl/pinctrl-sx150x.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c index 324d7af8fcd..cddde8822ed 100644 --- a/drivers/pinctrl/pinctrl-sx150x.c +++ b/drivers/pinctrl/pinctrl-sx150x.c @@ -7,7 +7,6 @@ * */ -#include #include #include #include @@ -22,6 +21,8 @@ #include #include #include +#include +#include #define err(format, arg...) printf("ERR:" format "\n", ##arg) #define dbg(format, arg...) printf("DBG:" format "\n", ##arg) @@ -413,7 +414,7 @@ static int sx150x_reg_read(struct sx150x_pinctrl_priv *pctl, unsigned int reg, { int ret, n; const int width = sx150x_reg_width(pctl, reg); - unsigned int idx, val; + unsigned int val, idx; /* * There are four potential cases covered by this function: @@ -444,8 +445,9 @@ static int sx150x_reg_read(struct sx150x_pinctrl_priv *pctl, unsigned int reg, * reg 3 [ 3 3 2 2 1 1 0 0 ] */ - for (n = width, val = 0, idx = reg; n > 0; n -= 8, idx) { + for (n = width, val = 0; n > 0; n -= 8) { val <<= 8; + idx = reg; ret = dm_i2c_reg_read(pctl->i2c, idx); if (ret < 0) @@ -475,7 +477,6 @@ static int sx150x_reg_write(struct sx150x_pinctrl_priv *pctl, unsigned int reg, if (ret < 0) return ret; - reg; n -= 8; } while (n >= 0); @@ -724,7 +725,7 @@ static const struct udevice_id sx150x_pinctrl_of_match[] = { {}, }; -static const struct pinconf_param sx150x_conf_params[] = { +static const struct pinconf_param __maybe_unused sx150x_conf_params[] = { { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, @@ -750,7 +751,7 @@ static const char *sx150x_pinctrl_get_pin_name(struct udevice *dev, return pin_name; } -static int sx150x_pinctrl_conf_set(struct udevice *dev, unsigned int pin, +static int __maybe_unused sx150x_pinctrl_conf_set(struct udevice *dev, unsigned int pin, unsigned int param, unsigned int arg) { int ret; @@ -834,13 +835,11 @@ static int sx150x_pinctrl_conf_set(struct udevice *dev, unsigned int pin, static int sx150x_pinctrl_bind(struct udevice *dev) { struct sx150x_pinctrl_priv *pctl = dev_get_plat(dev); - int ret, reg; + int ret; if (!dev_read_bool(dev, "gpio-controller")) return 0; - reg = (int)dev_read_addr_ptr(dev); - ret = device_bind(dev, &sx150x_gpio_driver, dev_read_name(dev), NULL, dev_ofnode(dev), &pctl->gpio); if (ret) @@ -861,7 +860,10 @@ static int sx150x_pinctrl_probe(struct udevice *dev) pctl->data = drv_data; - reg = (int)dev_read_addr_ptr(dev); + reg = dev_read_u32_default(dev, "reg", -ENODEV); + if (reg < 0) + return -ENODEV; + ret = dm_i2c_probe(dev->parent, reg, 0, &pctl->i2c); if (ret) { err("Cannot find I2C chip %02x (%d)", reg, ret); -- cgit v1.3.1 From 7807ed921314cd7af83fd88162d0b8c6fb20a9ca Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 30 Jul 2025 10:03:39 +0200 Subject: pinctrl: sx150x: reformat and fixup Copyright header The Linux pinctrl-sx150 was originally written as a GPIO driver and fully rewritten by me as a Pinctrl driver and extended by other contributors. Fixup the Copyright header style and correctly report the Copyright headers from the Linux driver. Signed-off-by: Neil Armstrong --- drivers/pinctrl/pinctrl-sx150x.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c index cddde8822ed..0d64f4d5ad6 100644 --- a/drivers/pinctrl/pinctrl-sx150x.c +++ b/drivers/pinctrl/pinctrl-sx150x.c @@ -3,8 +3,12 @@ * Copyright (C) 2024, Exfo Inc - All Rights Reserved * * Author: Anis CHALI - * inspired and adapted from linux driver of sx150x written by Gregory Bean - * + * + * Inspired and adapted from the Linux pinctrl-sx150x driver: + * Copyright (c) 2016, BayLibre, SAS. All rights reserved. + * Author: Neil Armstrong + * Copyright (c) 2010, Code Aurora Forum. All rights reserved. + * Author: Gregory Bean */ #include -- cgit v1.3.1 From e7a95ee2b575d7f0f44da3b3aeb951508eac1511 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 4 Aug 2025 15:52:53 -0600 Subject: pinctrl: Tighten some pinctrl driver dependencies A few pinctrl drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini --- drivers/pinctrl/Kconfig | 7 ++++--- drivers/pinctrl/tegra/Kconfig | 4 ++-- 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 5e2808abc8a..48119694031 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -197,7 +197,7 @@ config PINCTRL_AR933X config PINCTRL_AT91 bool "AT91 pinctrl driver" - depends on DM + depends on DM && ARCH_AT91 help This option is to enable the AT91 pinctrl driver for AT91 PIO controller. @@ -213,13 +213,14 @@ config PINCTRL_AT91 config PINCTRL_AT91PIO4 bool "AT91 PIO4 pinctrl driver" - depends on DM + depends on DM && ARCH_AT91 help This option is to enable the AT91 pinctrl driver for AT91 PIO4 controller which is available on SAMA5D2 SoC. config PINCTRL_INTEL bool "Standard Intel pin-control and pin-mux driver" + depends on X86 help Recent Intel chips such as Apollo Lake (APL) use a common pin control and GPIO scheme. The settings for this come from an SoC-specific @@ -248,7 +249,7 @@ config PINCTRL_QCA953X config PINCTRL_QE bool "QE based pinctrl driver, like on mpc83xx" - depends on DM + depends on DM && MPC83xx help This option is to enable the QE pinctrl driver for QE based io controller. diff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig index 669d8e258e4..d2630289d75 100644 --- a/drivers/pinctrl/tegra/Kconfig +++ b/drivers/pinctrl/tegra/Kconfig @@ -2,7 +2,7 @@ config PINCTRL_TEGRA bool "Nvidia Tegra pinctrl driver" - depends on DM + depends on DM && ARCH_TEGRA help Support pin multiplexing control on Nvidia Tegra SoCs. The driver is an overlay to existing driver and allows @@ -11,7 +11,7 @@ config PINCTRL_TEGRA config SPL_PINCTRL_TEGRA bool "Nvidia Tegra SPL pinctrl driver" - depends on SPL_PINCTRL + depends on SPL_PINCTRL && ARCH_TEGRA help Enables support of pre-DM version of pin multiplexing control driver used on SPL stage for board setup and -- cgit v1.3.1 From 64204ab107b51c60e490292ed1eda40a9a64d7d9 Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Thu, 7 Aug 2025 11:04:02 +0100 Subject: pinctrl: single: Remove unreachable code In single_read there is a switch block with a default label. All cases in the switch block, including the default, return directly. So any code following the switch block is unreachable. Remove the unreachable code. This issue was found by Smatch. Signed-off-by: Andrew Goodbody --- drivers/pinctrl/pinctrl-single.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index a3802d22d4f..c96b293aadf 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -109,8 +109,6 @@ static unsigned int single_read(struct udevice *dev, void *reg) default: /* 32 bits */ return readl(reg); } - - return readb(reg); } static void single_write(struct udevice *dev, unsigned int val, void *reg) -- cgit v1.3.1 From 4a2f360bd280b2b5af1c5daffbc189590c83c995 Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Thu, 7 Aug 2025 11:04:03 +0100 Subject: pinctrl: stmfx: Remove duplicated code In stmfx_read_reg there is duplicated code to detect ret < 0 and return ret if so. Remove one version of it. This issue was found by Smatch. Signed-off-by: Andrew Goodbody --- drivers/pinctrl/pinctrl-stmfx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c index 61f335c4eb1..0d5778faef9 100644 --- a/drivers/pinctrl/pinctrl-stmfx.c +++ b/drivers/pinctrl/pinctrl-stmfx.c @@ -87,7 +87,7 @@ static int stmfx_read_reg(struct udevice *dev, u8 reg_base, uint offset) if (ret < 0) return ret; - return ret < 0 ? ret : !!(ret & mask); + return !!(ret & mask); } static int stmfx_write_reg(struct udevice *dev, u8 reg_base, uint offset, -- cgit v1.3.1 From ad3a33e57742bab08a8ca1a9e34c262b6fbf0268 Mon Sep 17 00:00:00 2001 From: Stanley Chu Date: Thu, 7 Aug 2025 13:32:19 +0800 Subject: pinctrl: npcm8xx: add support for setting VCD input source Add pinmux for the VCD input to use the HSYNC signal. Signed-off-by: Stanley Chu Signed-off-by: Jim Liu --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 67e564f85c3..c960ca3393d 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -23,6 +23,7 @@ #define TIPRSTC 0x50 #define CORSTC 0x5c #define FLOCKR1 0x74 +#define INTCR 0x3c #define INTCR4 0xc0 #define I2CSEGSEL 0xe0 #define MFSEL1 0x260 @@ -280,6 +281,7 @@ struct npcm8xx_pinctrl_priv { FUNC(lkgpo2, FLOCKR1, 8, 9) \ FUNC(nprd_smi, FLOCKR1, 20, 190) \ FUNC(mmcwp, FLOCKR1, 24, 153) \ + FUNC(vcdhs, INTCR, 27) \ FUNC(rg2refck, INTCR4, 6) \ FUNC(r1en, INTCR4, 12) \ FUNC(r2en, INTCR4, 13) \ -- cgit v1.3.1 From e416d165723c56658b4a688e790cdcd968c6cfc9 Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Thu, 7 Aug 2025 10:16:55 +0100 Subject: pinctrl: nexell: Cannot test unsigned to be negative In s5pxx18_pinctrl_set_state testing count to be negative will always fail as count is unsigned despite receiving the return value of a function that returns an int. Change count and idx to be of type int to allow the test to work as expected and remove the need for any implicit casts. Also change pin to be u32 which is what all called functions expect. This issue was found by Smatch. Signed-off-by: Andrew Goodbody --- drivers/pinctrl/nexell/pinctrl-s5pxx18.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/nexell/pinctrl-s5pxx18.c b/drivers/pinctrl/nexell/pinctrl-s5pxx18.c index e7d0994f29e..a6ae5764fbc 100644 --- a/drivers/pinctrl/nexell/pinctrl-s5pxx18.c +++ b/drivers/pinctrl/nexell/pinctrl-s5pxx18.c @@ -130,7 +130,8 @@ static int is_pin_alive(const char *name) static int s5pxx18_pinctrl_set_state(struct udevice *dev, struct udevice *config) { - unsigned int count, idx, pin; + u32 pin; + int count, idx; unsigned int pinfunc, pinpud, pindrv; unsigned long reg; const char *name; -- cgit v1.3.1 From 9d8a4728e14eb3971652c30dc262312d5a544a4e Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Wed, 13 Aug 2025 10:09:26 +0000 Subject: pinctrl: th1520: Mark driver as DM_FLAG_PRE_RELOC It's common that UARTs are bound and probed before U-Boot relocation, in which case the UART's pincontroller and pinconfig must be probed first. Let's apply DM_FLAG_PRE_RELOC to the driver, allow it to bind before relocation. Signed-off-by: Yao Zi Reviewed-by: Leo Yu-Chi Liang --- drivers/pinctrl/pinctrl-th1520.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl-th1520.c b/drivers/pinctrl/pinctrl-th1520.c index be7e508f8a4..4eead0875d8 100644 --- a/drivers/pinctrl/pinctrl-th1520.c +++ b/drivers/pinctrl/pinctrl-th1520.c @@ -697,4 +697,5 @@ U_BOOT_DRIVER(th1520_pinctrl) = { .probe = th1520_pinctrl_probe, .priv_auto = sizeof(struct th1520_pinctrl), .ops = &th1520_pinctrl_ops, + .flags = DM_FLAG_PRE_RELOC, }; -- cgit v1.3.1 From 3661d4dc6d81bcf27887c553f400fd4bcdeb2ad2 Mon Sep 17 00:00:00 2001 From: Alice Guo Date: Tue, 23 Sep 2025 10:14:59 +0800 Subject: pinctrl: nxp: Add i.MX94 daisy register offset Define the daisy register offset for i.MX94 at 0x608 within the iomuxc register space. This enables correct pad selection for daisy chain configuration on i.MX94 platforms. Signed-off-by: Jacky Bai Signed-off-by: Alice Guo Acked-by: Peng Fan --- drivers/pinctrl/nxp/pinctrl-imx-scmi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/nxp/pinctrl-imx-scmi.c b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c index aed47be337d..781835c6852 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx-scmi.c +++ b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c @@ -16,6 +16,7 @@ #include "pinctrl-imx.h" #define DAISY_OFFSET_IMX95 0x408 +#define DAISY_OFFSET_IMX94 0x608 /* SCMI pin control types */ #define PINCTRL_TYPE_MUX 192 @@ -133,6 +134,8 @@ static int imx_scmi_pinctrl_probe(struct udevice *dev) if (IS_ENABLED(CONFIG_IMX95)) priv->daisy_offset = DAISY_OFFSET_IMX95; + else if (IS_ENABLED(CONFIG_IMX94)) + priv->daisy_offset = DAISY_OFFSET_IMX94; else return -EINVAL; @@ -141,7 +144,7 @@ static int imx_scmi_pinctrl_probe(struct udevice *dev) static int imx_scmi_pinctrl_bind(struct udevice *dev) { - if (IS_ENABLED(CONFIG_IMX95)) + if (IS_ENABLED(CONFIG_IMX95) || IS_ENABLED(CONFIG_IMX94)) return 0; return -ENODEV; -- cgit v1.3.1 From 033dbc7f9ec969168a2f48766cb16aa26fa381d8 Mon Sep 17 00:00:00 2001 From: Yang Xiwen Date: Tue, 17 Jun 2025 01:01:17 +0800 Subject: pinctrl: meson: support gpio toggle command meson_gpio_get() always assumes gpio is configured to input mode. This is incorrect and breaks `gpio toggle` command: gpio: pin aobus-banks2 (gpio 2) value is 0 Warning: value of pin is still 1 Fix it by adding the logic to handle both input and output mode. Fixes: 2009a8d03fe5 ("pinctrl: meson: add GPIO support") Signed-off-by: Yang Xiwen Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250617-meson_ppinctrl-v3-1-218d9321a8d2@outlook.com Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index babf1bccc96..7dbaf966f93 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -117,8 +117,26 @@ int meson_gpio_get(struct udevice *dev, unsigned int offset) struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; int ret; + enum gpio_func_t direction; + enum meson_reg_type reg_type; - ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_IN, ®, + direction = meson_gpio_get_direction(dev, offset); + + switch (direction) { + case GPIOF_INPUT: + reg_type = REG_IN; + break; + + case GPIOF_OUTPUT: + reg_type = REG_OUT; + break; + + default: + dev_warn(dev, "Failed to get current direction of Pin %u\n", offset); + return -EINVAL; + } + + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, reg_type, ®, &bit); if (ret) return ret; -- cgit v1.3.1