From 8809a2713b1ceaf3da55d9d785470294f15de06a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 11 Dec 2007 11:46:01 +0100 Subject: rtc: Fix merging problem Signed-off-by: Stefan Roese --- drivers/rtc/x1205.c | 178 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 178 insertions(+) create mode 100644 drivers/rtc/x1205.c (limited to 'drivers/rtc') diff --git a/drivers/rtc/x1205.c b/drivers/rtc/x1205.c new file mode 100644 index 00000000000..319f0512ca8 --- /dev/null +++ b/drivers/rtc/x1205.c @@ -0,0 +1,178 @@ +/* + * (C) Copyright 2007 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * based on a the Linux rtc-x1207.c driver which is: + * Copyright 2004 Karen Spearel + * Copyright 2005 Alessandro Zummo + * + * Information and datasheet: + * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Date & Time support for Xicor/Intersil X1205 RTC + */ + +/* #define DEBUG */ + +#include +#include +#include +#include +#include + +#if defined(CONFIG_RTC_X1205) && defined(CONFIG_CMD_DATE) + +#define CCR_SEC 0 +#define CCR_MIN 1 +#define CCR_HOUR 2 +#define CCR_MDAY 3 +#define CCR_MONTH 4 +#define CCR_YEAR 5 +#define CCR_WDAY 6 +#define CCR_Y2K 7 + +#define X1205_REG_SR 0x3F /* status register */ +#define X1205_REG_Y2K 0x37 +#define X1205_REG_DW 0x36 +#define X1205_REG_YR 0x35 +#define X1205_REG_MO 0x34 +#define X1205_REG_DT 0x33 +#define X1205_REG_HR 0x32 +#define X1205_REG_MN 0x31 +#define X1205_REG_SC 0x30 +#define X1205_REG_DTR 0x13 +#define X1205_REG_ATR 0x12 +#define X1205_REG_INT 0x11 +#define X1205_REG_0 0x10 +#define X1205_REG_Y2K1 0x0F +#define X1205_REG_DWA1 0x0E +#define X1205_REG_YRA1 0x0D +#define X1205_REG_MOA1 0x0C +#define X1205_REG_DTA1 0x0B +#define X1205_REG_HRA1 0x0A +#define X1205_REG_MNA1 0x09 +#define X1205_REG_SCA1 0x08 +#define X1205_REG_Y2K0 0x07 +#define X1205_REG_DWA0 0x06 +#define X1205_REG_YRA0 0x05 +#define X1205_REG_MOA0 0x04 +#define X1205_REG_DTA0 0x03 +#define X1205_REG_HRA0 0x02 +#define X1205_REG_MNA0 0x01 +#define X1205_REG_SCA0 0x00 + +#define X1205_CCR_BASE 0x30 /* Base address of CCR */ +#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */ + +#define X1205_SR_RTCF 0x01 /* Clock failure */ +#define X1205_SR_WEL 0x02 /* Write Enable Latch */ +#define X1205_SR_RWEL 0x04 /* Register Write Enable */ + +#define X1205_DTR_DTR0 0x01 +#define X1205_DTR_DTR1 0x02 +#define X1205_DTR_DTR2 0x04 + +#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */ + +static void rtc_write(int reg, u8 val) +{ + i2c_write(CFG_I2C_RTC_ADDR, reg, 2, &val, 1); +} + +/* + * In the routines that deal directly with the x1205 hardware, we use + * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch + * Epoch is initialized as 2000. Time is set to UTC. + */ +void rtc_get(struct rtc_time *tm) +{ + u8 buf[8]; + + i2c_read(CFG_I2C_RTC_ADDR, X1205_CCR_BASE, 2, buf, 8); + + debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " + "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", + __FUNCTION__, + buf[0], buf[1], buf[2], buf[3], + buf[4], buf[5], buf[6], buf[7]); + + tm->tm_sec = BCD2BIN(buf[CCR_SEC]); + tm->tm_min = BCD2BIN(buf[CCR_MIN]); + tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ + tm->tm_mday = BCD2BIN(buf[CCR_MDAY]); + tm->tm_mon = BCD2BIN(buf[CCR_MONTH]); /* mon is 0-11 */ + tm->tm_year = BCD2BIN(buf[CCR_YEAR]) + + (BCD2BIN(buf[CCR_Y2K]) * 100); + tm->tm_wday = buf[CCR_WDAY]; + + debug("%s: tm is secs=%d, mins=%d, hours=%d, " + "mday=%d, mon=%d, year=%d, wday=%d\n", + __FUNCTION__, + tm->tm_sec, tm->tm_min, tm->tm_hour, + tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); +} + +void rtc_set(struct rtc_time *tm) +{ + int i; + u8 buf[8]; + + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + buf[CCR_SEC] = BIN2BCD(tm->tm_sec); + buf[CCR_MIN] = BIN2BCD(tm->tm_min); + + /* set hour and 24hr bit */ + buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL; + + buf[CCR_MDAY] = BIN2BCD(tm->tm_mday); + + /* month, 1 - 12 */ + buf[CCR_MONTH] = BIN2BCD(tm->tm_mon); + + /* year, since the rtc epoch*/ + buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100); + buf[CCR_WDAY] = tm->tm_wday & 0x07; + buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100); + + /* this sequence is required to unlock the chip */ + rtc_write(X1205_REG_SR, X1205_SR_WEL); + rtc_write(X1205_REG_SR, X1205_SR_WEL | X1205_SR_RWEL); + + /* write register's data */ + for (i = 0; i < 8; i++) + rtc_write(X1205_CCR_BASE + i, buf[i]); + + rtc_write(X1205_REG_SR, 0); +} + +void rtc_reset(void) +{ + /* + * Nothing to do + */ +} + +#endif -- cgit v1.3.1 From 12618278688ea9b3d76536960a5ad2e3790fac40 Mon Sep 17 00:00:00 2001 From: Larry Johnson Date: Sat, 22 Dec 2007 15:14:00 -0500 Subject: Add driver for STMicroelectronics M41T60 RTC This driver is based on the driver for the M41T11. In the intended application, the RTC will be powered by a large capacitor, rather than a battery. The driver therefore checks to see whether the RTC has lost power. The chip's OUT bit is normally reset from its power-up state. If the OUT bit is read as set, or if the date and time are not valid, then the RTC is assumed to have lost power, and its date and time are reset to 1900-01-01 00:00:00. Support for adjusting the speed of the clock to improve accuracy is provided through an environment variable. Signed-off-by: Larry Johnson --- drivers/rtc/Makefile | 1 + drivers/rtc/m41t60.c | 261 +++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 262 insertions(+) create mode 100644 drivers/rtc/m41t60.c (limited to 'drivers/rtc') diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 1d6016ef87f..e5ee6113506 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -40,6 +40,7 @@ COBJS-y += ds164x.o COBJS-y += ds174x.o COBJS-y += ds3231.o COBJS-y += m41t11.o +COBJS-y += m41t60.o COBJS-y += max6900.o COBJS-y += m48t35ax.o COBJS-y += mc146818.o diff --git a/drivers/rtc/m41t60.c b/drivers/rtc/m41t60.c new file mode 100644 index 00000000000..7c80143e684 --- /dev/null +++ b/drivers/rtc/m41t60.c @@ -0,0 +1,261 @@ +/* + * (C) Copyright 2007 + * Larry Johnson, lrj@acm.org + * + * based on rtc/m41t11.c which is ... + * + * (C) Copyright 2002 + * Andrew May, Viasat Inc, amay@viasat.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * STMicroelectronics M41T60 serial access real-time clock + */ + +/* #define DEBUG 1 */ + +#include +#include +#include +#include + +#if defined(CONFIG_RTC_M41T60) && defined(CFG_I2C_RTC_ADDR) && \ + defined(CONFIG_CMD_DATE) + +static unsigned bcd2bin(uchar n) +{ + return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); +} + +static unsigned char bin2bcd(unsigned int n) +{ + return (((n / 10) << 4) | (n % 10)); +} + +/* + * Convert between century and "century bits" (CB1 and CB0). These routines + * assume years are in the range 1900 - 2299. + */ + +static unsigned char year2cb(unsigned const year) +{ + if (year < 1900 || year >= 2300) + printf("M41T60 RTC: year %d out of range\n", year); + + return (year / 100) & 0x3; +} + +static unsigned cb2year(unsigned const cb) +{ + return 1900 + 100 * ((cb + 1) & 0x3); +} + +/* + * These are simple defines for the chip local to here so they aren't too + * verbose. DAY/DATE aren't nice but that is how they are on the data sheet. + */ +#define RTC_SEC 0x0 +#define RTC_MIN 0x1 +#define RTC_HOUR 0x2 +#define RTC_DAY 0x3 +#define RTC_DATE 0x4 +#define RTC_MONTH 0x5 +#define RTC_YEAR 0x6 + +#define RTC_REG_CNT 7 + +#define RTC_CTRL 0x7 + +#if defined(DEBUG) +static void rtc_dump(char const *const label) +{ + uchar data[8]; + + if (i2c_read(CFG_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { + printf("I2C read failed in rtc_dump()\n"); + return; + } + printf("RTC dump %s: %02X-%02X-%02X-%02X-%02X-%02X-%02X-%02X\n", + label, data[0], data[1], data[2], data[3], + data[4], data[5], data[6], data[7]); +} +#else +#define rtc_dump(label) +#endif + +static uchar *rtc_validate(void) +{ + /* + * This routine uses the OUT bit and the validity of the time values to + * determine whether there has been an initial power-up since the last + * time the routine was run. It assumes that the OUT bit is not being + * used for any other purpose. + */ + static const uchar daysInMonth[0x13] = { + 0x00, 0x31, 0x29, 0x31, 0x30, 0x31, 0x30, 0x31, + 0x31, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x31, 0x30, 0x31 + }; + static uchar data[8]; + uchar min, date, month, years; + + rtc_dump("begin validate"); + if (i2c_read(CFG_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { + printf("I2C read failed in rtc_validate()\n"); + return 0; + } + /* + * If the OUT bit is "1", there has been a loss of power, so stop the + * oscillator so it can be "kick-started" as per data sheet. + */ + if (0x00 != (data[RTC_CTRL] & 0x80)) { + printf("M41T60 RTC clock lost power.\n"); + data[RTC_SEC] = 0x80; + if (i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC, 1, data, 1)) { + printf("I2C write failed in rtc_validate()\n"); + return 0; + } + } + /* + * If the oscillator is stopped or the date is invalid, then reset the + * OUT bit to "0", reset the date registers, and start the oscillator. + */ + min = data[RTC_MIN] & 0x7F; + date = data[RTC_DATE]; + month = data[RTC_MONTH] & 0x3F; + years = data[RTC_YEAR]; + if (0x59 < data[RTC_SEC] || 0x09 < (data[RTC_SEC] & 0x0F) || + 0x59 < min || 0x09 < (min & 0x0F) || + 0x23 < data[RTC_HOUR] || 0x09 < (data[RTC_HOUR] & 0x0F) || + 0x07 < data[RTC_DAY] || 0x00 == data[RTC_DAY] || + 0x12 < month || + 0x99 < years || 0x09 < (years & 0x0F) || + daysInMonth[month] < date || 0x09 < (date & 0x0F) || 0x00 == date || + (0x29 == date && 0x02 == month && + ((0x00 != (years & 0x03)) || + (0x00 == years && 0x00 != (data[RTC_MONTH] & 0xC0))))) { + printf("Resetting M41T60 RTC clock.\n"); + /* + * Set to 00:00:00 1900-01-01 (Monday) + */ + data[RTC_SEC] = 0x00; + data[RTC_MIN] &= 0x80; /* preserve OFIE bit */ + data[RTC_HOUR] = 0x00; + data[RTC_DAY] = 0x02; + data[RTC_DATE] = 0x01; + data[RTC_MONTH] = 0xC1; + data[RTC_YEAR] = 0x00; + data[RTC_CTRL] &= 0x7F; /* reset OUT bit */ + + if (i2c_write(CFG_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { + printf("I2C write failed in rtc_validate()\n"); + return 0; + } + } + return data; +} + +void rtc_get(struct rtc_time *tmp) +{ + uchar const *const data = rtc_validate(); + + if (!data) + return; + + tmp->tm_sec = bcd2bin(data[RTC_SEC] & 0x7F); + tmp->tm_min = bcd2bin(data[RTC_MIN] & 0x7F); + tmp->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3F); + tmp->tm_mday = bcd2bin(data[RTC_DATE] & 0x3F); + tmp->tm_mon = bcd2bin(data[RTC_MONTH] & 0x1F); + tmp->tm_year = cb2year(data[RTC_MONTH] >> 6) + bcd2bin(data[RTC_YEAR]); + tmp->tm_wday = bcd2bin(data[RTC_DAY] & 0x07) - 1; + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); +} + +void rtc_set(struct rtc_time *tmp) +{ + uchar *const data = rtc_validate(); + + if (!data) + return; + + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + data[RTC_SEC] = (data[RTC_SEC] & 0x80) | (bin2bcd(tmp->tm_sec) & 0x7F); + data[RTC_MIN] = (data[RTC_MIN] & 0X80) | (bin2bcd(tmp->tm_min) & 0X7F); + data[RTC_HOUR] = bin2bcd(tmp->tm_hour) & 0x3F; + data[RTC_DATE] = bin2bcd(tmp->tm_mday) & 0x3F; + data[RTC_MONTH] = bin2bcd(tmp->tm_mon) & 0x1F; + data[RTC_YEAR] = bin2bcd(tmp->tm_year % 100); + data[RTC_MONTH] |= year2cb(tmp->tm_year) << 6; + data[RTC_DAY] = bin2bcd(tmp->tm_wday + 1) & 0x07; + if (i2c_write(CFG_I2C_RTC_ADDR, 0, 1, data, RTC_REG_CNT)) { + printf("I2C write failed in rtc_set()\n"); + return; + } +} + +void rtc_reset(void) +{ + uchar *const data = rtc_validate(); + char const *const s = getenv("rtccal"); + + if (!data) + return; + + rtc_dump("begin reset"); + /* + * If environmental variable "rtccal" is present, it must be a hex value + * between 0x00 and 0x3F, inclusive. The five least-significan bits + * represent the calibration magnitude, and the sixth bit the sign bit. + * If these do not match the contents of the hardware register, that + * register is updated. The value 0x00 imples no correction. Consult + * the M41T60 documentation for further details. + */ + if (s) { + unsigned long const l = simple_strtoul(s, 0, 16); + + if (l <= 0x3F) { + if ((data[RTC_CTRL] & 0x3F) != l) { + printf("Setting RTC calibration to 0x%02X\n", + l); + data[RTC_CTRL] &= 0xC0; + data[RTC_CTRL] |= (uchar) l; + } + } else + printf("environment parameter \"rtccal\" not valid: " + "ignoring\n"); + } + /* + * Turn off frequency test. + */ + data[RTC_CTRL] &= 0xBF; + if (i2c_write(CFG_I2C_RTC_ADDR, RTC_CTRL, 1, data + RTC_CTRL, 1)) { + printf("I2C write failed in rtc_reset()\n"); + return; + } + rtc_dump("end reset"); +} +#endif /* CONFIG_RTC_M41T60 && CFG_I2C_RTC_ADDR && CONFIG_CMD_DATE */ -- cgit v1.3.1 From 95c6bc7d4a3588b452baca610f8c795a83630477 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Thu, 27 Dec 2007 16:55:17 +0100 Subject: Add Epson RX8025 RTC support Signed-off-by: Matthias Fuchs --- drivers/rtc/Makefile | 1 + drivers/rtc/rx8025.c | 227 +++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 228 insertions(+) create mode 100644 drivers/rtc/rx8025.c (limited to 'drivers/rtc') diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index e5ee6113506..8c7f1484b65 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -50,6 +50,7 @@ COBJS-y += mpc8xx.o COBJS-y += pcf8563.o COBJS-y += s3c24x0_rtc.o COBJS-y += rs5c372.o +COBJS-y += rx8025.o COBJS-y += mcfrtc.o COBJS-y += x1205.o diff --git a/drivers/rtc/rx8025.c b/drivers/rtc/rx8025.c new file mode 100644 index 00000000000..6c94ae171d7 --- /dev/null +++ b/drivers/rtc/rx8025.c @@ -0,0 +1,227 @@ +/* + * (C) Copyright 2007 + * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Epson RX8025 RTC driver. + */ + +#include +#include +#include +#include + +#if defined(CONFIG_RTC_RX8025) && defined(CONFIG_CMD_DATE) + +/*---------------------------------------------------------------------*/ +#undef DEBUG_RTC + +#ifdef DEBUG_RTC +#define DEBUGR(fmt,args...) printf(fmt ,##args) +#else +#define DEBUGR(fmt,args...) +#endif +/*---------------------------------------------------------------------*/ + +#ifndef CFG_I2C_RTC_ADDR +# define CFG_I2C_RTC_ADDR 0x32 +#endif + +/* + * RTC register addresses + */ +#define RTC_SEC_REG_ADDR 0x00 +#define RTC_MIN_REG_ADDR 0x01 +#define RTC_HR_REG_ADDR 0x02 +#define RTC_DAY_REG_ADDR 0x03 +#define RTC_DATE_REG_ADDR 0x04 +#define RTC_MON_REG_ADDR 0x05 +#define RTC_YR_REG_ADDR 0x06 + +#define RTC_CTL1_REG_ADDR 0x0e +#define RTC_CTL2_REG_ADDR 0x0f + +/* + * Control register 1 bits + */ +#define RTC_CTL1_BIT_2412 0x20 + +/* + * Control register 2 bits + */ +#define RTC_CTL2_BIT_PON 0x10 +#define RTC_CTL2_BIT_VDET 0x40 +#define RTC_CTL2_BIT_XST 0x20 +#define RTC_CTL2_BIT_VDSL 0x80 + +/* + * Note: the RX8025 I2C RTC requires register + * reads and write to consist of a single bus + * cycle. It is not allowed to write the register + * address in a first cycle that is terminated by + * a STOP condition. The chips needs a 'restart' + * sequence (start sequence without a prior stop). + * This driver has been written for a 4xx board. + * U-Boot's 4xx i2c driver is currently not capable + * to generate such cycles to some work arounds + * are used. + */ + +/* static uchar rtc_read (uchar reg); */ +#define rtc_read(reg) buf[((reg) + 1) & 0xf] + +static void rtc_write (uchar reg, uchar val); +static uchar bin2bcd (unsigned int n); +static unsigned bcd2bin (uchar c); + +/* + * Get the current time from the RTC + */ +void rtc_get (struct rtc_time *tmp) +{ + uchar sec, min, hour, mday, wday, mon, year, ctl2; + uchar buf[16]; + + if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16)) + printf("Error reading from RTC\n"); + + sec = rtc_read(RTC_SEC_REG_ADDR); + min = rtc_read(RTC_MIN_REG_ADDR); + hour = rtc_read(RTC_HR_REG_ADDR); + wday = rtc_read(RTC_DAY_REG_ADDR); + mday = rtc_read(RTC_DATE_REG_ADDR); + mon = rtc_read(RTC_MON_REG_ADDR); + year = rtc_read(RTC_YR_REG_ADDR); + + DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x\n", + year, mon, mday, wday, hour, min, sec); + + /* dump status */ + ctl2 = rtc_read(RTC_CTL2_REG_ADDR); + if (ctl2 & RTC_CTL2_BIT_PON) + printf("RTC: power-on detected\n"); + + if (ctl2 & RTC_CTL2_BIT_VDET) + printf("RTC: voltage drop detected\n"); + + if (!(ctl2 & RTC_CTL2_BIT_XST)) + printf("RTC: oscillator stop detected\n"); + + tmp->tm_sec = bcd2bin (sec & 0x7F); + tmp->tm_min = bcd2bin (min & 0x7F); + tmp->tm_hour = bcd2bin (hour & 0x3F); + tmp->tm_mday = bcd2bin (mday & 0x3F); + tmp->tm_mon = bcd2bin (mon & 0x1F); + tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000); + tmp->tm_wday = bcd2bin (wday & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst= 0; + + DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); +} + + +/* + * Set the RTC + */ +void rtc_set (struct rtc_time *tmp) +{ + DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + if (tmp->tm_year < 1970 || tmp->tm_year > 2069) + printf("WARNING: year should be between 1970 and 2069!\n"); + + rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); + rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon)); + rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday)); + rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); + rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); + rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); + rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); + + rtc_write (RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412); +} + + +/* + * Reset the RTC. We setting the date back to 1970-01-01. + */ +void rtc_reset (void) +{ + struct rtc_time tmp; + uchar buf[16]; + uchar ctl2; + + if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16)) + printf("Error reading from RTC\n"); + + ctl2 = rtc_read(RTC_CTL2_REG_ADDR); + ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET); + ctl2 |= RTC_CTL2_BIT_XST | RTC_CTL2_BIT_VDSL; + rtc_write (RTC_CTL2_REG_ADDR, ctl2); + + tmp.tm_year = 1970; + tmp.tm_mon = 1; + tmp.tm_mday= 1; + tmp.tm_hour = 0; + tmp.tm_min = 0; + tmp.tm_sec = 0; + + rtc_set(&tmp); + + printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", + tmp.tm_year, tmp.tm_mon, tmp.tm_mday, + tmp.tm_hour, tmp.tm_min, tmp.tm_sec); + + return; +} + + +/* + * Helper functions + */ +static void rtc_write (uchar reg, uchar val) +{ + uchar buf[2]; + buf[0] = reg << 4; + buf[1] = val; + if (i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, 2) != 0) + printf("Error writing to RTC\n"); + +} + +static unsigned bcd2bin (uchar n) +{ + return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); +} + +static unsigned char bin2bcd (unsigned int n) +{ + return (((n / 10) << 4) | (n % 10)); +} + +#endif /* CONFIG_RTC_RX8025 && (CFG_COMMANDS & CFG_CMD_DATE) */ -- cgit v1.3.1