From 445aad45f47a19860eff5b09c4c570285265318a Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 21 Jul 2025 11:02:05 -0700 Subject: usb: ehci-mx6: Add i.MX95 OTG support When the usb node is defined dr_mode="otg" ehci_usb_phy_mode() is called to determine the mode from status registers. The IMX95RM does not currently define the USBNC STATUS register but it is assumed to be an omission as the first three registers are defined. It has been expirimentally verified that the USBNC_PHY_STATUS register at offset 0x23C bit4 (USBNC_PHYSTATUS_ID_DIG) reads 0 when USB_ID is GND and 1 when floating. Use is_imx9() as this driver works for i.MX91, i.MX93 and i.MX95 and all of these determine the role based on the USBNC_PHY_STATUS register. Fixes: 801b5fafd35d "(usb: ehci-mx6: Add i.MX95 support") Signed-off-by: Tim Harvey Reviewed-by: Alice Guo Reviewed-by: Peng Fan Reviewed-by: Fabio Estevam --- drivers/usb/host/ehci-mx6.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/usb') diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index a8748cef7ad..25907f22612 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -537,7 +537,7 @@ static int ehci_usb_phy_mode(struct udevice *dev) plat->init_type = USB_INIT_DEVICE; else plat->init_type = USB_INIT_HOST; - } else if (is_mx7() || is_imx8mm() || is_imx8mn() || is_imx93()) { + } else if (is_mx7() || is_imx8mm() || is_imx8mn() || is_imx9()) { phy_status = (void __iomem *)(addr + USBNC_PHY_STATUS_OFFSET); val = readl(phy_status); -- cgit v1.3.1 From 332714b905923d9e97a2cc7590dfc41e49980d35 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 23 Jul 2025 17:09:16 +0200 Subject: usb: dwc2: fix reset logic in dwc2_core_reset Use GUSBCFG_FORCEHOSTMODE to detected the HOST forced mode as it is done in the Linux driver drivers/usb/dwc2/core.c:dwc2_core_reset(). The host polling must be executed only if the current mode is host, either due to the force HOST mode (which persists after core reset) or the connector id pin. The GUSBCFG_FORCEDEVMODE bits is used to force the device mode (for example used on STM32MP1x platform) and when it is activated the DWC2 reset failed with the trace: "dwc2_core_reset: Waiting for GINTSTS_CURMODE_HOST timeout" Fixes: c5d685b8993c ("usb: dwc2: Unify flush and reset logic with v4.20a support") Signed-off-by: Patrick Delaunay Reviewed-by: Junhui Liu Tested-by: Patrice Chotard Reviewed-by: Marek Vasut --- drivers/usb/common/dwc2_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/usb') diff --git a/drivers/usb/common/dwc2_core.c b/drivers/usb/common/dwc2_core.c index 63062d5cc94..37007134e5b 100644 --- a/drivers/usb/common/dwc2_core.c +++ b/drivers/usb/common/dwc2_core.c @@ -17,7 +17,7 @@ int dwc2_core_reset(struct dwc2_core_regs *regs) bool host_mode = false; if (!(readl(®s->global_regs.gotgctl) & GOTGCTL_CONID_B) || - (readl(®s->global_regs.gusbcfg) & GUSBCFG_FORCEDEVMODE)) + (readl(®s->global_regs.gusbcfg) & GUSBCFG_FORCEHOSTMODE)) host_mode = true; /* Core Soft Reset */ -- cgit v1.3.1