From 87a8f9675949da859ed24fe49c3f5250064a13bf Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 15 Feb 2020 21:10:54 +0100 Subject: clk: meson-g12a: missing break Add missing break for CLKID_PCIE_PLL in switch statement. Reported by CppCheck. Cc: Neil Armstrong Fixes: 08e09c263fdf ("clk: meson-g12a: Add PCIE PLL support") Signed-off-by: Heinrich Schuchardt Reviewed-by: Lukasz Majewski Acked-by: Neil Armstrong Signed-off-by: Neil Armstrong --- drivers/clk/meson/g12a.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 686d94ebfe8..cada80e6b5f 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -804,6 +804,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) break; case CLKID_PCIE_PLL: rate = meson_pcie_pll_get_rate(clk); + break; case CLKID_VPU_0: rate = meson_div_get_rate(clk, CLKID_VPU_0_DIV); break; -- cgit v1.3.1 From 0392416fb1f2d8ff91ca6ec0471fc891445406e5 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 5 Mar 2020 12:12:36 +0100 Subject: mmc: meson-gx: enable input clocks Until now, the mmc clock was left in a good enough state by the ROM code to be used by the controller. However on some SoC, if the ROM code finds a bootloader on USB or SPI, it might leave the MMC clock in state the controller cannot work with. Enable the input clocks provided to the mmc controller. While the u-boot mmc controller driver is not doing fancy settings like the Linux, it at least needs to make these clocks are running. Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet Reviewed-by: Anand Moon Signed-off-by: Neil Armstrong --- drivers/mmc/meson_gx_mmc.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c index b5f5122b1b7..86c1a7164a9 100644 --- a/drivers/mmc/meson_gx_mmc.c +++ b/drivers/mmc/meson_gx_mmc.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -241,12 +242,23 @@ static int meson_mmc_probe(struct udevice *dev) struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct mmc *mmc = &pdata->mmc; struct mmc_config *cfg = &pdata->cfg; + struct clk_bulk clocks; uint32_t val; + int ret; + #ifdef CONFIG_PWRSEQ struct udevice *pwr_dev; - int ret; #endif + /* Enable the clocks feeding the MMC controller */ + ret = clk_get_bulk(dev, &clocks); + if (ret) + return ret; + + ret = clk_enable_bulk(&clocks); + if (ret) + return ret; + cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 | MMC_VDD_31_32 | MMC_VDD_165_195; cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT | -- cgit v1.3.1 From b3d69aa596599c7c940f7ad463c04b693589ff9a Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 5 Mar 2020 12:12:37 +0100 Subject: clk: meson: reset mmc clock on probe On some SoCs, depending on the boot device, the MMC clock block may be left in a weird state by the ROM code, in which no decent clock may be provided. Reset the related register to make sure a sane MMC clock is ready for the controller. Reviewed-by: Neil Armstrong Tested-by: Anand Moon Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- drivers/clk/meson/axg.c | 7 +++++++ drivers/clk/meson/g12a.c | 7 +++++++ drivers/clk/meson/gxbb.c | 7 +++++++ 3 files changed, 21 insertions(+) (limited to 'drivers') diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index 7035b59a137..4b0028d04bf 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -291,6 +291,13 @@ static int meson_clk_probe(struct udevice *dev) if (IS_ERR(priv->map)) return PTR_ERR(priv->map); + /* + * Depending on the boot src, the state of the MMC clock might + * be different. Reset it to make sure we won't get stuck + */ + regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); + regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); + debug("meson-clk-axg: probed\n"); return 0; diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index cada80e6b5f..c1976aa1efb 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -978,6 +978,13 @@ static int meson_clk_probe(struct udevice *dev) if (IS_ERR(priv->map)) return PTR_ERR(priv->map); + /* + * Depending on the boot src, the state of the MMC clock might + * be different. Reset it to make sure we won't get stuck + */ + regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); + regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); + debug("meson-clk-g12a: probed\n"); return 0; diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index e781e08d9d5..5ef4dd794d5 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -887,6 +887,13 @@ static int meson_clk_probe(struct udevice *dev) if (IS_ERR(priv->map)) return PTR_ERR(priv->map); + /* + * Depending on the boot src, the state of the MMC clock might + * be different. Reset it to make sure we won't get stuck + */ + regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); + regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); + debug("meson-clk: probed\n"); return 0; -- cgit v1.3.1