From 664e16ce99a0c04ba7ea06892ebafdc2071aefe9 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 6 Aug 2020 15:18:36 +0200 Subject: xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in PL and vice versa. That's why change dependencies and do not limit enabling just for some platforms. Signed-off-by: Michal Simek Reviewed-by: Heiko Schocher --- drivers/gpio/Kconfig | 4 ++-- drivers/i2c/Kconfig | 2 +- drivers/mmc/Kconfig | 1 - drivers/net/Kconfig | 6 +++--- 4 files changed, 6 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 11e9a17f972..202fcc6f475 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -381,8 +381,8 @@ config MVEBU_GPIO config ZYNQ_GPIO bool "Zynq GPIO driver" - depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) - default y + depends on DM_GPIO + default y if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL help Supports GPIO access on Zynq SoC. diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index dec6dc9dfa4..8ae54e1e93b 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -88,7 +88,7 @@ config SYS_I2C_FSL config SYS_I2C_CADENCE tristate "Cadence I2C Controller" - depends on DM_I2C && (ARCH_ZYNQ || ARM64) + depends on DM_I2C help Say yes here to select Cadence I2C Host Controller. This controller is e.g. used by Xilinx Zynq. diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 556b3ac4897..c29d1ea680e 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -653,7 +653,6 @@ config TEGRA124_MMC_DISABLE_EXT_LOOPBACK config MMC_SDHCI_ZYNQ bool "Arasan SDHCI controller support" - depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL depends on DM_MMC && OF_CONTROL && BLK depends on MMC_SDHCI help diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index ecd779d979e..039f9fb0589 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -519,7 +519,7 @@ config TULIP This driver supports DEC DC2114x Fast ethernet chips. config XILINX_AXIEMAC - depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) + depends on DM_ETH select PHYLIB select MII bool "Xilinx AXI Ethernet" @@ -527,7 +527,7 @@ config XILINX_AXIEMAC This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config XILINX_EMACLITE - depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) + depends on DM_ETH select PHYLIB select MII bool "Xilinx Ethernetlite" @@ -535,7 +535,7 @@ config XILINX_EMACLITE This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config ZYNQ_GEM - depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) + depends on DM_ETH select PHYLIB bool "Xilinx Ethernet GEM" help -- cgit v1.3.1 From f692b479f02d9b2689b0686f1f6ff2f06c6ecc59 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 28 May 2020 11:48:55 +0200 Subject: i2c: eeprom: Use reg property instead of offset and size Remove adhoc dt binding for fixed-partition definition for i2c eeprom. fixed-partition are using reg property instead of offset/size pair. Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- arch/arm/dts/imx53-ppd-uboot.dtsi | 12 ++++++------ arch/arm/dts/imx6q-bx50v3-uboot.dtsi | 10 +++++----- arch/sandbox/dts/test.dts | 13 +++++++++++++ configs/sandbox_defconfig | 1 + drivers/misc/i2c_eeprom.c | 15 ++++++++------- test/dm/bootcount.c | 8 ++++++++ 6 files changed, 41 insertions(+), 18 deletions(-) (limited to 'drivers') diff --git a/arch/arm/dts/imx53-ppd-uboot.dtsi b/arch/arm/dts/imx53-ppd-uboot.dtsi index d38a1bc264c..d61b7cb8764 100644 --- a/arch/arm/dts/imx53-ppd-uboot.dtsi +++ b/arch/arm/dts/imx53-ppd-uboot.dtsi @@ -24,15 +24,15 @@ &eeprom { partitions { compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - vpd { - offset = <0>; - size = <1022>; + vpd@0 { + reg = <0 1022>; }; - bootcount: bootcount { - offset = <1022>; - size = <2>; + bootcount: bootcount@1022 { + reg = <1022 2>; }; }; }; diff --git a/arch/arm/dts/imx6q-bx50v3-uboot.dtsi b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi index df446e0ed14..01321cab781 100644 --- a/arch/arm/dts/imx6q-bx50v3-uboot.dtsi +++ b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi @@ -23,15 +23,15 @@ &eeprom { partitions { compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - vpd { - offset = <0>; - size = <1022>; + vpd@0 { + reg = <0 1022>; }; bootcount: bootcount { - offset = <1022>; - size = <2>; + reg = <1022 2>; }; }; }; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 491893a17dc..692c3775dde 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -415,6 +415,14 @@ reg = <0x2c>; compatible = "i2c-eeprom"; sandbox,emul = <&emul_eeprom>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + bootcount_i2c: bootcount@10 { + reg = <10 2>; + }; + }; }; rtc_0: rtc@43 { @@ -462,6 +470,11 @@ offset = <0x13>; }; + bootcount { + compatible = "u-boot,bootcount-i2c-eeprom"; + i2c-eeprom = <&bootcount_i2c>; + }; + adc@0 { compatible = "sandbox,adc"; vdd-supply = <&buck2>; diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index fe111289049..acd70933359 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -119,6 +119,7 @@ CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_RTC=y CONFIG_BUTTON=y CONFIG_BUTTON_GPIO=y +CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y CONFIG_CLK=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SANDBOX_CLK_CCF=y diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 45c34d388c8..3651ba4871e 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -301,19 +301,20 @@ static int i2c_eeprom_partition_probe(struct udevice *dev) static int i2c_eeprom_partition_ofdata_to_platdata(struct udevice *dev) { struct i2c_eeprom_partition *priv = dev_get_priv(dev); - u32 offset, size; + u32 reg[2]; int ret; - ret = dev_read_u32(dev, "offset", &offset); + ret = dev_read_u32_array(dev, "reg", reg, 2); if (ret) return ret; - ret = dev_read_u32(dev, "size", &size); - if (ret) - return ret; + if (!reg[1]) + return -EINVAL; + + priv->offset = reg[0]; + priv->size = reg[1]; - priv->offset = offset; - priv->size = size; + debug("%s: base %x, size %x\n", __func__, priv->offset, priv->size); return 0; } diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c index f911984698d..e0c47b5d7a6 100644 --- a/test/dm/bootcount.c +++ b/test/dm/bootcount.c @@ -25,6 +25,14 @@ static int dm_test_bootcount(struct unit_test_state *uts) ut_assertok(dm_bootcount_get(dev, &val)); ut_assert(val == 0xab); + ut_assertok(uclass_get_device(UCLASS_BOOTCOUNT, 1, &dev)); + ut_assertok(dm_bootcount_set(dev, 0)); + ut_assertok(dm_bootcount_get(dev, &val)); + ut_assert(val == 0); + ut_assertok(dm_bootcount_set(dev, 0xab)); + ut_assertok(dm_bootcount_get(dev, &val)); + ut_assert(val == 0xab); + return 0; } -- cgit v1.3.1 From 01a6da166102f5751985efef4504ac3c2c094d61 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jul 2020 17:42:43 +0200 Subject: xilinx: Fix xlnx,mio_bank property s/xlnx,mio_bank/xlnx,mio-bank/g DT binding is describing mio-bank not mio_bank that's why fix all DTSes and also driver itself. Signed-off-by: Michal Simek Acked-by: Peng Fan --- arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts | 2 +- arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi | 2 +- arch/arm/dts/versal-mini-emmc0.dts | 2 +- arch/arm/dts/versal-mini-emmc1.dts | 2 +- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 2 +- arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 2 +- arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 4 ++-- arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4 ++-- arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4 ++-- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 4 ++-- arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts | 4 ++-- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 4 ++-- arch/arm/dts/zynqmp-zcu100-revC.dts | 4 ++-- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 2 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu111-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +- drivers/mmc/zynq_sdhci.c | 2 +- 23 files changed, 30 insertions(+), 30 deletions(-) (limited to 'drivers') diff --git a/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts index ac641ff1a58..85ab9e9e29a 100644 --- a/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts +++ b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts @@ -51,7 +51,7 @@ /* microSD card slot */ &sdhci1 { status = "okay"; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; clock-frequency = <199998000>; max-frequency = <50000000>; no-1-8-v; diff --git a/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi b/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi index b635db649f4..cbcb290a5c8 100644 --- a/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi +++ b/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi @@ -51,6 +51,6 @@ /* Micron MTFC8GAKAJCN-4M 8 GB eMMC */ &sdhci0 { status = "okay"; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; clock-frequency = <199998000>; }; diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts index 7f57d232b7f..7826a282134 100644 --- a/arch/arm/dts/versal-mini-emmc0.dts +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -43,7 +43,7 @@ clocks = <&clk25 &clk25>; xlnx,device_id = <0>; no-1-8-v; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; #stream-id-cells = <1>; }; }; diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts index 4e0758f6189..2f28f856a6a 100644 --- a/arch/arm/dts/versal-mini-emmc1.dts +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -43,7 +43,7 @@ clocks = <&clk25 &clk25>; xlnx,device_id = <1>; no-1-8-v; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; #stream-id-cells = <1>; }; }; diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index c260411d757..a8bbb14f6cd 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -131,7 +131,7 @@ status = "okay"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts index 09da60b1007..9468dc574fd 100644 --- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts @@ -70,7 +70,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; &uart0 { /* uart0 MIO38-39 */ diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts index e295bac128c..66ea02e5be7 100644 --- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -89,7 +89,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; /* FIXME tap delay */ + xlnx,mio-bank = <0>; /* FIXME tap delay */ }; &uart0 { /* uart0 MIO38-39 */ @@ -106,7 +106,7 @@ status = "disable"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index bd2c1a46bd8..46ec427648f 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -85,7 +85,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; /* FIXME tap delay */ + xlnx,mio-bank = <0>; /* FIXME tap delay */ }; &uart0 { /* uart0 MIO38-39 */ @@ -102,7 +102,7 @@ status = "disable"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 700197c1f3e..6eb58e6701a 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -85,7 +85,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; /* FIXME tap delay */ + xlnx,mio-bank = <0>; /* FIXME tap delay */ }; &uart0 { /* uart0 MIO38-39 */ @@ -102,7 +102,7 @@ status = "disable"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index d49b632a1d3..4f7824ae400 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -50,7 +50,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; &uart0 { /* uart0 MIO38-39 */ @@ -67,7 +67,7 @@ status = "okay"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts index 0ee8c62f6b9..a377f27c50d 100644 --- a/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts +++ b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts @@ -97,13 +97,13 @@ non-removable; disable-wp; /* We don't have a write-protect detection */ bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; /* SD1 with level shifter */ &sdhci1 { status = "okay"; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; disable-wp; /* We don't have a write-protect detection */ bus-width = <4>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index 0805b93c4ac..e2428ec974a 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -148,7 +148,7 @@ &sdhci0 { status = "okay"; bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; /* SD1 with level shifter */ @@ -158,7 +158,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &uart0 { diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 1726edf78ed..d6c914c917f 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -259,13 +259,13 @@ status = "okay"; no-1-8-v; disable-wp; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; &sdhci1 { status = "okay"; bus-width = <0x4>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; non-removable; disable-wp; cap-power-off-card; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index d250681600a..ed036e68f5e 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -660,7 +660,7 @@ * removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index a4bd6b800a1..cb8ffdff977 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -249,7 +249,7 @@ &sdhci1 { status = "okay"; no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; disable-wp; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index d4b3769a27c..e203280f0ec 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -262,7 +262,7 @@ &sdhci1 { status = "okay"; no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; disable-wp; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 221685fd23b..1dff845ceeb 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -657,7 +657,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 63e285fe9a9..82e6c8d3cdf 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -568,7 +568,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index 430fc5adb42..b612215f40e 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -80,5 +80,5 @@ * removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index d8b9cb1a9e1..f041df83dab 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -245,5 +245,5 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 118a2de96b3..124219314b8 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -565,7 +565,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index e454bfcba79..511727fa955 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -569,7 +569,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 43b9f215229..6505527616d 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -276,7 +276,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) return PTR_ERR(priv->host->ioaddr); priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); - priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1); + priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", -1); return 0; } -- cgit v1.3.1 From e8deb2218509ffe686601b7e51091407fda58fbf Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jul 2020 17:46:31 +0200 Subject: mmc: zynq: Fix default value for xlnx,mio-bank DT binding is saying that default value is 0 not -1 that's why fix it. Signed-off-by: Michal Simek Acked-by: Peng Fan --- drivers/mmc/zynq_sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 6505527616d..e9381b94930 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -276,7 +276,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) return PTR_ERR(priv->host->ioaddr); priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); - priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", -1); + priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", 0); return 0; } -- cgit v1.3.1 From f6cccbb5f24ff7a19be84fb755d8566aee647244 Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:26 +0100 Subject: xilinx: zynqmp: synchronize firmware call return payload Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the firmware driver. Additionally fixes payload buffer declarations without macro usage Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- arch/arm/mach-versal/include/mach/sys_proto.h | 2 -- arch/arm/mach-zynqmp/include/mach/sys_proto.h | 2 -- board/xilinx/versal/cmds.c | 2 +- drivers/fpga/versalpl.c | 2 +- include/zynqmp_firmware.h | 9 +++++++++ 5 files changed, 11 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h index cfd480bec17..05934c28d67 100644 --- a/arch/arm/mach-versal/include/mach/sys_proto.h +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -8,7 +8,5 @@ enum { TCM_SPLIT, }; -#define PAYLOAD_ARG_CNT 5U - void tcm_init(u8 mode); void mem_map_fill(void); diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h b/arch/arm/mach-zynqmp/include/mach/sys_proto.h index 2974ffbc2f5..4078f958fc6 100644 --- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h +++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h @@ -7,8 +7,6 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H -#define PAYLOAD_ARG_CNT 5 - #define ZYNQMP_CSU_SILICON_VER_MASK 0xF #define KEY_PTR_LEN 32 diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c index 981c80ee474..f5735d0c62c 100644 --- a/board/xilinx/versal/cmds.c +++ b/board/xilinx/versal/cmds.c @@ -16,7 +16,7 @@ static int do_versal_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) { u32 buf_lo, buf_hi; - u32 ret_payload[5]; + u32 ret_payload[PAYLOAD_ARG_CNT]; ulong addr, *pdi_buf; size_t len; int ret; diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c index 8e2ef4f0da9..c44a7d34557 100644 --- a/drivers/fpga/versalpl.c +++ b/drivers/fpga/versalpl.c @@ -32,7 +32,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize, ulong bin_buf; int ret; u32 buf_lo, buf_hi; - u32 ret_payload[5]; + u32 ret_payload[PAYLOAD_ARG_CNT]; bin_buf = versal_align_dma_buffer((ulong *)buf, bsize); diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 93d771ece26..2c44951f861 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -77,6 +77,15 @@ enum pm_api_id { #define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0) +/* + * Return payload size + * Not every firmware call expects the same amount of return bytes, however the + * firmware driver always copies 5 bytes from RX buffer to the ret_payload + * buffer. Therefore allocating with this defined value is recommended to avoid + * overflows. + */ +#define PAYLOAD_ARG_CNT 5U + unsigned int zynqmp_firmware_version(void); void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size); int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, -- cgit v1.3.1 From 2eabb6bfeac791e44b1900fbe86977fd8638e16e Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:27 +0100 Subject: xilinx: zynqmp: merge firmware calls for EL2 and EL3 This patch merges ZynqMP firmware calls under xilinx_pm_request in order to make trainsparent the EL. Calls at EL3 are send through IPI messages and EL2 through SMC calls. The EL2 call uses fixed payload and arg size as the EL3 call. The firmware is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the firmware API is limited by the SMC call size. Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- drivers/firmware/firmware-zynqmp.c | 84 +++++++++++++++++++------------------- 1 file changed, 43 insertions(+), 41 deletions(-) (limited to 'drivers') diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 66edc169301..903a8f58782 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -37,6 +37,7 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) if (!(zynqmp_power.tx_chan.dev) || !(&zynqmp_power.rx_chan.dev)) return -EINVAL; + debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]); msg.buf = (u32 *)req; msg.len = req_len; ret = mbox_send(&zynqmp_power.tx_chan, &msg); @@ -54,14 +55,6 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) return ret; } -static int send_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) -{ - if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) - return ipi_req(req, req_len, res, res_maxlen); - - return xilinx_pm_request(req[0], 0, 0, 0, 0, res); -} - unsigned int zynqmp_firmware_version(void) { int ret; @@ -74,9 +67,9 @@ unsigned int zynqmp_firmware_version(void) * asking PMUFW again. **/ if (pm_api_version == ZYNQMP_PM_VERSION_INVALID) { - const u32 request[] = { PM_GET_API_VERSION }; - ret = send_req(request, ARRAY_SIZE(request), ret_payload, 2); + ret = xilinx_pm_request(PM_GET_API_VERSION, 0, 0, 0, 0, + ret_payload); if (ret) panic("PMUFW is not found - Please load it!\n"); @@ -97,16 +90,13 @@ unsigned int zynqmp_firmware_version(void) */ void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size) { - const u32 request[] = { - PM_SET_CONFIGURATION, - (u32)((u64)cfg_obj) - }; - u32 response = 0; int err; + u32 ret_payload[PAYLOAD_ARG_CNT]; printf("Loading new PMUFW cfg obj (%ld bytes)\n", size); - err = send_req(request, ARRAY_SIZE(request), &response, 1); + err = xilinx_pm_request(PM_SET_CONFIGURATION, (u32)(u64)cfg_obj, 0, 0, + 0, ret_payload); if (err == XST_PM_NO_ACCESS) { printf("PMUFW no permission to change config object\n"); return; @@ -115,10 +105,10 @@ void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size) if (err) printf("Cannot load PMUFW configuration object (%d)\n", err); - if (response) - printf("PMUFW returned 0x%08x status!\n", response); + if (ret_payload[0]) + printf("PMUFW returned 0x%08x status!\n", ret_payload[0]); - if ((err || response) && IS_ENABLED(CONFIG_SPL_BUILD)) + if ((err || ret_payload[0]) && IS_ENABLED(CONFIG_SPL_BUILD)) panic("PMUFW config object loading failed in EL3\n"); } @@ -164,32 +154,44 @@ U_BOOT_DRIVER(zynqmp_power) = { int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload) { - /* - * Added SIP service call Function Identifier - * Make sure to stay in x0 register - */ - struct pt_regs regs; + debug("%s at EL%d, API ID: 0x%0x\n", __func__, current_el(), api_id); - if (current_el() == 3) { - printf("%s: Can't call SMC from EL3 context\n", __func__); + if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { +#if defined(CONFIG_ZYNQMP_IPI) + /* + * Use fixed payload and arg size as the EL2 call. The firmware + * is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the + * firmware API is limited by the SMC call size + */ + u32 regs[] = {api_id, arg0, arg1, arg2, arg3}; + + ipi_req(regs, PAYLOAD_ARG_CNT, ret_payload, PAYLOAD_ARG_CNT); +#else return -EPERM; - } - - regs.regs[0] = PM_SIP_SVC | api_id; - regs.regs[1] = ((u64)arg1 << 32) | arg0; - regs.regs[2] = ((u64)arg3 << 32) | arg2; - - smc_call(®s); +#endif + } else { + /* + * Added SIP service call Function Identifier + * Make sure to stay in x0 register + */ + struct pt_regs regs; + + regs.regs[0] = PM_SIP_SVC | api_id; + regs.regs[1] = ((u64)arg1 << 32) | arg0; + regs.regs[2] = ((u64)arg3 << 32) | arg2; + + smc_call(®s); + + if (ret_payload) { + ret_payload[0] = (u32)regs.regs[0]; + ret_payload[1] = upper_32_bits(regs.regs[0]); + ret_payload[2] = (u32)regs.regs[1]; + ret_payload[3] = upper_32_bits(regs.regs[1]); + ret_payload[4] = (u32)regs.regs[2]; + } - if (ret_payload) { - ret_payload[0] = (u32)regs.regs[0]; - ret_payload[1] = upper_32_bits(regs.regs[0]); - ret_payload[2] = (u32)regs.regs[1]; - ret_payload[3] = upper_32_bits(regs.regs[1]); - ret_payload[4] = (u32)regs.regs[2]; } - - return regs.regs[0]; + return (ret_payload) ? ret_payload[0] : 0; } static const struct udevice_id zynqmp_firmware_ids[] = { -- cgit v1.3.1 From de4f748ef5b834b3e7cea24449b7e74341a9111a Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:32 +0100 Subject: xilinx: zynqmp: fix incorrect map not align with IPI HW Current IPI module register description is not align with IPI HW. The registers with the wrong offset are not used so it does not cause real issues. This patch aligns the register description. Additionally comments added to explain why recv function does not check any flag prior copying rx data. Fixes: 660b0c77d816 ("mailbox: zynqmp: ipi mailbox driver") Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- drivers/mailbox/zynqmp-ipi.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c index f206a27a79e..746377e557c 100644 --- a/drivers/mailbox/zynqmp-ipi.c +++ b/drivers/mailbox/zynqmp-ipi.c @@ -24,10 +24,12 @@ struct ipi_int_regs { u32 trig; /* 0x0 */ u32 obs; /* 0x4 */ - u32 ist; /* 0x8 */ - u32 imr; /* 0xC */ - u32 ier; /* 0x10 */ - u32 idr; /* 0x14 */ + u32 dummy0; + u32 dummy1; + u32 isr; /* 0x10 */ + u32 imr; /* 0x14 */ + u32 ier; /* 0x18 */ + u32 idr; /* 0x1C */ }; #define ipi_int_apu ((struct ipi_int_regs *)IPI_INT_REG_BASE_APU) @@ -66,6 +68,10 @@ static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data) struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev); u32 *mbx = (u32 *)zynqmp->local_res_regs; + /* + * PMU Firmware does not trigger IPI interrupt for API call responses so + * there is no need to check ISR flags + */ for (size_t i = 0; i < msg->len; i++) msg->buf[i] = readl(&mbx[i]); -- cgit v1.3.1 From 620bb46eaddd8f8ee361b47e56d57fd50a29b005 Mon Sep 17 00:00:00 2001 From: Faiz Abbas Date: Thu, 23 Jul 2020 09:42:19 +0530 Subject: mmc: sdhci: Enable high speed conditional on the corresponding bit The capabilities register has a field to indicate whether the host supports high speed mode or not. Add high speed host_caps based on this bit instead of enabling it by default. Signed-off-by: Faiz Abbas Reviewed-by: Michal Simek Tested-by: Michal Simek (zcu104 with sdhci-caps-mask = <0 0x200000>;) --- drivers/mmc/sdhci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index ff871f82523..fe3d677bcfa 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -843,7 +843,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) cfg->voltages |= host->voltages; - cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; + if (caps & SDHCI_CAN_DO_HISPD) + cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz; + + cfg->host_caps |= MMC_MODE_4BIT; /* Since Host Controller Version3.0 */ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { -- cgit v1.3.1 From b5a3387dc163dbb958c362d95ddc7415bebdca61 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 29 Jul 2020 15:42:26 +0200 Subject: mmc: sdhci: Use upper/lower_32_bits macros Instead of recasting and shifting use macros which are designed for taking upper/lower 32bit value from 64bit variable. Signed-off-by: Michal Simek --- drivers/mmc/sdhci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index fe3d677bcfa..7673219fb33 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -748,9 +748,9 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, "sdhci-caps-mask", 0); dt_caps = dev_read_u64_default(host->mmc->dev, "sdhci-caps", 0); - caps = ~(u32)dt_caps_mask & + caps = ~lower_32_bits(dt_caps_mask) & sdhci_readl(host, SDHCI_CAPABILITIES); - caps |= (u32)dt_caps; + caps |= lower_32_bits(dt_caps); #else caps = sdhci_readl(host, SDHCI_CAPABILITIES); #endif @@ -793,9 +793,9 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, /* Check whether the clock multiplier is supported or not */ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { #if CONFIG_IS_ENABLED(DM_MMC) - caps_1 = ~(u32)(dt_caps_mask >> 32) & + caps_1 = ~upper_32_bits(dt_caps_mask) & sdhci_readl(host, SDHCI_CAPABILITIES_1); - caps_1 |= (u32)(dt_caps >> 32); + caps_1 |= upper_32_bits(dt_caps); #else caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); #endif -- cgit v1.3.1 From 29af2ac48c8f910cc2efc8099323f9d619fb2bd5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Jul 2020 09:24:06 +0200 Subject: clk: versal: Move pm_query_id out of clock driver There is no reason to have firmware specific structure in clock driver. Move it to generic location and also initialize enum values which is based on https://lore.kernel.org/linux-arm-kernel/20200318125003.GA2727094@kroah.com/ recommended way to go to make sure that values guaranteed by compiler. Signed-off-by: Michal Simek --- drivers/clk/clk_versal.c | 17 ----------------- include/zynqmp_firmware.h | 17 +++++++++++++++++ 2 files changed, 17 insertions(+), 17 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 6f82b60f04d..d93b860aed3 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -68,23 +68,6 @@ #define CLOCK_NODE_TYPE_DIV 4 #define CLOCK_NODE_TYPE_GATE 6 -enum pm_query_id { - PM_QID_INVALID, - PM_QID_CLOCK_GET_NAME, - PM_QID_CLOCK_GET_TOPOLOGY, - PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, - PM_QID_CLOCK_GET_PARENTS, - PM_QID_CLOCK_GET_ATTRIBUTES, - PM_QID_PINCTRL_GET_NUM_PINS, - PM_QID_PINCTRL_GET_NUM_FUNCTIONS, - PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS, - PM_QID_PINCTRL_GET_FUNCTION_NAME, - PM_QID_PINCTRL_GET_FUNCTION_GROUPS, - PM_QID_PINCTRL_GET_PIN_GROUPS, - PM_QID_CLOCK_GET_NUM_CLOCKS, - PM_QID_CLOCK_GET_MAX_DIVISOR, -}; - enum clk_type { CLK_TYPE_OUTPUT, CLK_TYPE_EXTERNAL, diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 2c44951f861..f6f82bf8828 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -62,6 +62,23 @@ enum pm_api_id { PM_API_MAX, }; +enum pm_query_id { + PM_QID_INVALID = 0, + PM_QID_CLOCK_GET_NAME = 1, + PM_QID_CLOCK_GET_TOPOLOGY = 2, + PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS = 3, + PM_QID_CLOCK_GET_PARENTS = 4, + PM_QID_CLOCK_GET_ATTRIBUTES = 5, + PM_QID_PINCTRL_GET_NUM_PINS = 6, + PM_QID_PINCTRL_GET_NUM_FUNCTIONS = 7, + PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS = 8, + PM_QID_PINCTRL_GET_FUNCTION_NAME = 9, + PM_QID_PINCTRL_GET_FUNCTION_GROUPS = 10, + PM_QID_PINCTRL_GET_PIN_GROUPS = 11, + PM_QID_CLOCK_GET_NUM_CLOCKS = 12, + PM_QID_CLOCK_GET_MAX_DIVISOR = 13, +}; + #define PM_SIP_SVC 0xc2000000 #define ZYNQMP_PM_VERSION_MAJOR 1 -- cgit v1.3.1