From 6e0ca0658ee318e143ceae143f19550745ad5c5a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 23 Jan 2023 17:53:19 +0100 Subject: ddr: imx: Handle both 3733 and 3732 MTps rates The DDR calibration tool for i.MX8M currently produces 3732 MTps rate in lpddr4_timing.c , while the PHY code expects 3733 MTps rate. Support both variants to avoid surprises where the system fails to boot. Signed-off-by: Marek Vasut --- drivers/ddr/imx/phy/ddrphy_utils.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c index b852c870f90..6a8b6be42b2 100644 --- a/drivers/ddr/imx/phy/ddrphy_utils.c +++ b/drivers/ddr/imx/phy/ddrphy_utils.c @@ -112,6 +112,7 @@ void ddrphy_init_set_dfi_clk(unsigned int drate) dram_disable_bypass(); break; case 3733: + case 3732: dram_pll_init(MHZ(933)); dram_disable_bypass(); break; -- cgit v1.3.1 From 910c7a881f5b64dc92d3ba9232ce59ae54fd6486 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 9 Dec 2022 20:35:46 +0100 Subject: pmic: pca9450: Make warm reset on WDOG_B assertion The default configuration of the PMIC behavior makes the PMIC power cycle most regulators on WDOG_B assertion. This power cycling causes the memory contents of OCRAM to be lost. Some systems neeeds some memory that survives reset and reboot, therefore this patch is created. The implementation is taken almost verbatim from Linux commit 2364a64d0673f ("regulator: pca9450: Make warm reset on WDOG_B assertion") Signed-off-by: Marek Vasut Reviewed-by: Fabio Estevam Reviewed-by: Peng Fan --- drivers/power/pmic/pca9450.c | 11 ++++++++++- include/power/pca9450.h | 4 ++++ 2 files changed, 14 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index a186edc08da..2427abfb7a5 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -86,6 +86,7 @@ static int pca9450_bind(struct udevice *dev) static int pca9450_probe(struct udevice *dev) { struct pca9450_priv *priv = dev_get_priv(dev); + unsigned int reset_ctrl; int ret = 0; if (CONFIG_IS_ENABLED(DM_GPIO) && CONFIG_IS_ENABLED(DM_REGULATOR_PCA9450)) { @@ -95,10 +96,18 @@ static int pca9450_probe(struct udevice *dev) if (IS_ERR(priv->sd_vsel_gpio)) { ret = PTR_ERR(priv->sd_vsel_gpio); dev_err(dev, "Failed to request SD_VSEL GPIO: %d\n", ret); + if (ret) + return ret; } } - return ret; + if (ofnode_read_bool(dev_ofnode(dev), "nxp,wdog_b-warm-reset")) + reset_ctrl = PCA9450_PMIC_RESET_WDOG_B_CFG_WARM; + else + reset_ctrl = PCA9450_PMIC_RESET_WDOG_B_CFG_COLD_LDO12; + + return pmic_clrsetbits(dev, PCA9450_RESET_CTRL, + PCA9450_PMIC_RESET_WDOG_B_CFG_MASK, reset_ctrl); } static struct dm_pmic_ops pca9450_ops = { diff --git a/include/power/pca9450.h b/include/power/pca9450.h index fa0405fcb87..6efecee96c8 100644 --- a/include/power/pca9450.h +++ b/include/power/pca9450.h @@ -67,4 +67,8 @@ enum { #define PCA9450_LDO34_MASK 0x1f #define PCA9450_LDO5_MASK 0x0f +#define PCA9450_PMIC_RESET_WDOG_B_CFG_MASK 0xc0 +#define PCA9450_PMIC_RESET_WDOG_B_CFG_WARM 0x40 +#define PCA9450_PMIC_RESET_WDOG_B_CFG_COLD_LDO12 0x80 + #endif -- cgit v1.3.1 From 7150f56a85fd8d3b8ad162621026b0ba7bb6a367 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Thu, 12 Jan 2023 18:19:50 +0100 Subject: serial: mxc: Wait for TX completion before reset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The u-boot console may show some corrupted characters when printing in board_init() due to reset or baudrate change of the UART (probe) before the TX FIFO has been completely drained. To fix this issue, and in case UART is still running, we now try to flush the FIFO before proceeding to UART reinitialization. For this we're waiting for Transmitter Complete bit, indicating that the FIFO and the shift register are empty. flushing has a 4ms timeout guard, which is normally more than enough to consume the FIFO @ low baudrate (9600bps). Signed-off-by: Loic Poulain Tested-by: Lothar Waßmann Acked-by: Pali Rohár Reviewed-by: Fabio Estevam --- drivers/serial/serial_mxc.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 8bcbbf2bbfc..e4ffa9c3f6b 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -13,6 +13,7 @@ #include #include #include +#include /* UART Control Register Bit Fields.*/ #define URXD_CHARRDY (1<<15) @@ -144,8 +145,22 @@ struct mxc_uart { u32 ts; }; +static void _mxc_serial_flush(struct mxc_uart *base) +{ + unsigned int timeout = 4000; + + if (!(readl(&base->cr1) & UCR1_UARTEN) || + !(readl(&base->cr2) & UCR2_TXEN)) + return; + + while (!(readl(&base->sr2) & USR2_TXDC) && --timeout) + udelay(1); +} + static void _mxc_serial_init(struct mxc_uart *base, int use_dte) { + _mxc_serial_flush(base); + writel(0, &base->cr1); writel(0, &base->cr2); @@ -169,6 +184,8 @@ static void _mxc_serial_setbrg(struct mxc_uart *base, unsigned long clk, { u32 tmp; + _mxc_serial_flush(base); + tmp = RFDIV << UFCR_RFDIV_SHF; if (use_dte) tmp |= UFCR_DCEDTE; @@ -252,10 +269,17 @@ static int mxc_serial_init(void) return 0; } +static int mxc_serial_stop(void) +{ + _mxc_serial_flush(mxc_base); + + return 0; +} + static struct serial_device mxc_serial_drv = { .name = "mxc_serial", .start = mxc_serial_init, - .stop = NULL, + .stop = mxc_serial_stop, .setbrg = mxc_serial_setbrg, .putc = mxc_serial_putc, .puts = default_serial_puts, -- cgit v1.3.1 From ad725073d1666d94a96fbf9cba03777c3d58de24 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Thu, 12 Jan 2023 18:19:51 +0100 Subject: serial: mxc: Speed-up character transmission MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of waiting for empty FIFO condition before writing a character, wait for non-full FIFO condition. This helps in saving several tens of milliseconds during boot (depending verbosity). Signed-off-by: Loic Poulain Tested-by: Lothar Waßmann Acked-by: Pali Rohár Reviewed-by: Fabio Estevam Tested-by: Fabio Estevam --- drivers/serial/serial_mxc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index e4ffa9c3f6b..cc85a502726 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -240,11 +240,11 @@ static void mxc_serial_putc(const char c) if (c == '\n') serial_putc('\r'); - writel(c, &mxc_base->txd); - /* wait for transmitter to be ready */ - while (!(readl(&mxc_base->ts) & UTS_TXEMPTY)) + while (readl(&mxc_base->ts) & UTS_TXFULL) schedule(); + + writel(c, &mxc_base->txd); } /* Test whether a character is in the RX buffer */ @@ -335,7 +335,7 @@ static int mxc_serial_putc(struct udevice *dev, const char ch) struct mxc_serial_plat *plat = dev_get_plat(dev); struct mxc_uart *const uart = plat->reg; - if (!(readl(&uart->ts) & UTS_TXEMPTY)) + if (readl(&uart->ts) & UTS_TXFULL) return -EAGAIN; writel(ch, &uart->txd); -- cgit v1.3.1 From 7246ec19345a07befaabcde1cbf38ad78d0c1c8d Mon Sep 17 00:00:00 2001 From: Ye Li Date: Tue, 13 Dec 2022 05:08:02 +0100 Subject: imx8: scu_api: sync sc_rm_is_pad_owned api change SCFW has fixed a overflow issue in sc_rm_is_pad_owned API. This requires u-boot to update API implementation, since it will cause compatible issue. Otherwise all pad checking will have problem and cause pad setting not continue. Due to the compatible issue, the new u-boot only works with new SCFW (API version: 1.21 and later). old scfw + old u-boot: API overflow issue old scfw + new u-boot, or new scfw + old u-boot: API compatible issue new scfw + new u-boot: Working Signed-off-by: Ye Li Reviewed-by : Jason Liu Signed-off-by: Marcel Ziswiler --- arch/arm/include/asm/arch-imx8/sci/rpc.h | 2 +- drivers/misc/imx8/scu_api.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/arch/arm/include/asm/arch-imx8/sci/rpc.h b/arch/arm/include/asm/arch-imx8/sci/rpc.h index 9f55904f442..39de7f0e3e0 100644 --- a/arch/arm/include/asm/arch-imx8/sci/rpc.h +++ b/arch/arm/include/asm/arch-imx8/sci/rpc.h @@ -11,7 +11,7 @@ /* Defines */ #define SCFW_API_VERSION_MAJOR 1U -#define SCFW_API_VERSION_MINOR 15U +#define SCFW_API_VERSION_MINOR 21U #define SC_RPC_VERSION 1U diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c index 27ecce710fc..8f546e9b3fc 100644 --- a/drivers/misc/imx8/scu_api.c +++ b/drivers/misc/imx8/scu_api.c @@ -788,7 +788,7 @@ sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad) RPC_VER(&msg) = SC_RPC_VERSION; RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; RPC_FUNC(&msg) = (u8)RM_FUNC_IS_PAD_OWNED; - RPC_U8(&msg, 0U) = (u8)pad; + RPC_U16(&msg, 0U) = (u16)pad; RPC_SIZE(&msg) = 2U; ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); -- cgit v1.3.1