From 1a367adfd66c28d8d2fdb2957dfba5434b987de1 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 2 May 2025 08:51:45 +0200 Subject: net: mdio: mux-meson-gxl: set reversed bit when using internal phy This bit is necessary to receive packets from the internal PHY. Without this bit set, no activity occurs on the interface. Normally u-boot sets this bit, but if u-boot is compiled without net support, the interface will be up but without any activity. The vendor SDK sets this bit along with the PHY_ID bits. Ported from the Linux change at [1] from Da Xu merged in commit [2]. [1] https://lore.kernel.org/all/20250425192009.1439508-1-da@libre.computer/ [2] b23285e93bef ("net: mdio: mux-meson-gxl: set reversed bit when using internal phy") Suggested-by: Da Xue Link: https://lore.kernel.org/r/20250502-u-boot-topic-mdio-mux-gxl-bit28-v1-1-399f6c3db154@linaro.org Signed-off-by: Neil Armstrong --- drivers/net/mdio_mux_meson_gxl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/mdio_mux_meson_gxl.c b/drivers/net/mdio_mux_meson_gxl.c index 8ef3ae598b7..31898ed437e 100644 --- a/drivers/net/mdio_mux_meson_gxl.c +++ b/drivers/net/mdio_mux_meson_gxl.c @@ -19,6 +19,7 @@ #define REG2_LEDACT GENMASK(23, 22) #define REG2_LEDLINK GENMASK(25, 24) #define REG2_DIV4SEL BIT(27) +#define REG2_REVERSED BIT(28) #define REG2_ADCBYPASS BIT(30) #define REG2_CLKINSEL BIT(31) #define ETH_REG3 0x4 @@ -66,7 +67,7 @@ static int meson_gxl_enable_internal_mdio(struct mdio_mux_meson_gxl_priv *priv) * The only constraint is that it must match the one in * drivers/net/phy/meson-gxl.c to properly match the PHY. */ - writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID), + writel(REG2_REVERSED | FIELD_PREP(REG2_PHYID, EPHY_GXL_ID), priv->regs + ETH_REG2); /* Enable the internal phy */ -- cgit v1.3.1 From 033dbc7f9ec969168a2f48766cb16aa26fa381d8 Mon Sep 17 00:00:00 2001 From: Yang Xiwen Date: Tue, 17 Jun 2025 01:01:17 +0800 Subject: pinctrl: meson: support gpio toggle command meson_gpio_get() always assumes gpio is configured to input mode. This is incorrect and breaks `gpio toggle` command: gpio: pin aobus-banks2 (gpio 2) value is 0 Warning: value of pin is still 1 Fix it by adding the logic to handle both input and output mode. Fixes: 2009a8d03fe5 ("pinctrl: meson: add GPIO support") Signed-off-by: Yang Xiwen Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250617-meson_ppinctrl-v3-1-218d9321a8d2@outlook.com Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index babf1bccc96..7dbaf966f93 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -117,8 +117,26 @@ int meson_gpio_get(struct udevice *dev, unsigned int offset) struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; int ret; + enum gpio_func_t direction; + enum meson_reg_type reg_type; - ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_IN, ®, + direction = meson_gpio_get_direction(dev, offset); + + switch (direction) { + case GPIOF_INPUT: + reg_type = REG_IN; + break; + + case GPIOF_OUTPUT: + reg_type = REG_OUT; + break; + + default: + dev_warn(dev, "Failed to get current direction of Pin %u\n", offset); + return -EINVAL; + } + + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, reg_type, ®, &bit); if (ret) return ret; -- cgit v1.3.1 From b332723882f82f6feff027fb733c4b7e43bdef80 Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Tue, 22 Jul 2025 15:06:14 +0100 Subject: adc: meson-saradc: uint cannot be less than zero timeout is declared as a uint but then tested for being less than zero which must always fail. Change the while loop for a pre-decrement on timeout and test timeout for being zero. This issue was found by Smatch. Signed-off-by: Andrew Goodbody Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250722-meson_saradc-v1-1-1ab45d53da9d@linaro.org Signed-off-by: Neil Armstrong --- drivers/adc/meson-saradc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c index 60e348968fb..0144ff828c5 100644 --- a/drivers/adc/meson-saradc.c +++ b/drivers/adc/meson-saradc.c @@ -205,9 +205,9 @@ static int meson_saradc_lock(struct meson_saradc_priv *priv) do { udelay(1); regmap_read(priv->regmap, MESON_SAR_ADC_DELAY, &val); - } while (val & MESON_SAR_ADC_DELAY_BL30_BUSY && timeout--); + } while (val & MESON_SAR_ADC_DELAY_BL30_BUSY && --timeout); - if (timeout < 0) { + if (!timeout) { printf("Timeout while waiting for BL30 unlock\n"); return -ETIMEDOUT; } @@ -256,9 +256,9 @@ static int meson_saradc_wait_busy_clear(struct meson_saradc_priv *priv) do { udelay(1); regmap_read(priv->regmap, MESON_SAR_ADC_REG0, ®val); - } while (FIELD_GET(MESON_SAR_ADC_REG0_BUSY_MASK, regval) && timeout--); + } while (FIELD_GET(MESON_SAR_ADC_REG0_BUSY_MASK, regval) && --timeout); - if (timeout < 0) + if (!timeout) return -ETIMEDOUT; return 0; -- cgit v1.3.1 From bb2d7ea6f2a8b9539f9daf526b5f87c29ce413b4 Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Wed, 23 Jul 2025 17:37:24 +0100 Subject: clk: meson: Remove unreachable code A second return following the first return is unreachable code so remove it. This issue was found by Smatch. Signed-off-by: Andrew Goodbody Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250723-clk_meson-v1-1-8cd6e73145a4@linaro.org Signed-off-by: Neil Armstrong --- drivers/clk/meson/g12a.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 5d7faaa3eab..a7a42b2edb6 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -916,8 +916,6 @@ static ulong meson_clk_set_rate_by_id(struct clk *clk, unsigned long id, return -EINVAL; case CLKID_PCIE_PLL: return meson_pcie_pll_set_rate(clk, rate); - - return 0; case CLKID_VPU: return meson_clk_set_rate_by_id(clk, meson_mux_get_parent(clk, CLKID_VPU), rate, -- cgit v1.3.1 From b1e2cbd65cdfbc32c222eccedac11f53390694cf Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Fri, 8 Aug 2025 10:34:43 +0100 Subject: pwm: meson: Stop premature exit from for loop In meson_pwm_probe the for loop attempts to get the name of a clock but the following if..else statements only perform useful work if -ENODATA is returned from clk_get_by_name. If clk_get_by_name simply succeeds then this results in a premature exit from the for loop and the following code can never be reached. Make the else clause only apply for an error return from clk_get_by_name. This issue was found by Smatch. Signed-off-by: Andrew Goodbody Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250808-pwm_meson-v1-1-cddb7e5f76bd@linaro.org Signed-off-by: Neil Armstrong --- drivers/pwm/pwm-meson.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index c2597d8b669..caa7af085fa 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -359,8 +359,9 @@ static int meson_pwm_probe(struct udevice *dev) /* We have our source clock, do not alter HW clock mux */ continue; - } else + } else if (err) { return err; + } /* Get id in list */ for (p = 0 ; p < data->num_parents ; ++p) { -- cgit v1.3.1