From ac458dc823de95e05e433d7645b960f8c6088f55 Mon Sep 17 00:00:00 2001 From: Jason Wessel Date: Fri, 17 Jul 2020 06:31:59 -0700 Subject: bcmgenet: fix DMA buffer management MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit fixes a serious issue occurring when several network commands are run on a raspberry pi 4 board: for instance a "dhcp" command and then one or several "tftp" commands. In this case, packet recv callbacks were called several times on the same packets, and send function was failing most of the time. note: if the boot procedure is made of a single network command, the issue is not visible. The issue is related to management of the packet ring buffers (producer / consumer) and DMA. Each time a packet is received, the ethernet device stores it in the buffer and increments an index called RDMA_PROD_INDEX. Each time the driver outputs a received packet, it increments another index called RDMA_CONS_INDEX. Between each pair of network commands, as part of the driver 'start' function, previous code tried to reset both RDMA_CONS_INDEX and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from driver side, thus its value was actually not updated, and only RDMA_CONS_INDEX was reset to 0. This was resulting in a major synchronization issue between the driver and the device. Most visible behavior was that the driver seemed to receive again the packets from the previous commands (e.g. DHCP response packets "received" again when performing the first TFTP command). This fix consists in setting RDMA_CONS_INDEX to the same value as RDMA_PROD_INDEX, when resetting the driver. The same kind of fix was needed on the TX side, and a few variables had to be reset accordingly (c_index, tx_index, rx_index). The rx_index and tx_index have only 256 entries so the bottom 8 bits must be masked off. Originated-by: Etienne Dublé Signed-off-by: Jason Wessel Tested-by: Petr Tesarik Signed-off-by: Matthias Brugger --- drivers/net/bcmgenet.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c index 11b6148ab63..1b7e7ba2bff 100644 --- a/drivers/net/bcmgenet.c +++ b/drivers/net/bcmgenet.c @@ -378,8 +378,6 @@ static void rx_descs_init(struct bcmgenet_eth_priv *priv) u32 len_stat, i; void *desc_base = priv->rx_desc_base; - priv->c_index = 0; - len_stat = (RX_BUF_LENGTH << DMA_BUFLENGTH_SHIFT) | DMA_OWN; for (i = 0; i < RX_DESCS; i++) { @@ -403,8 +401,11 @@ static void rx_ring_init(struct bcmgenet_eth_priv *priv) writel(RX_DESCS * DMA_DESC_SIZE / 4 - 1, priv->mac_reg + RDMA_RING_REG_BASE + DMA_END_ADDR); - writel(0x0, priv->mac_reg + RDMA_PROD_INDEX); - writel(0x0, priv->mac_reg + RDMA_CONS_INDEX); + /* cannot init RDMA_PROD_INDEX to 0, so align RDMA_CONS_INDEX on it instead */ + priv->c_index = readl(priv->mac_reg + RDMA_PROD_INDEX); + writel(priv->c_index, priv->mac_reg + RDMA_CONS_INDEX); + priv->rx_index = priv->c_index; + priv->rx_index &= 0xFF; writel((RX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH, priv->mac_reg + RDMA_RING_REG_BASE + DMA_RING_BUF_SIZE); writel(DMA_FC_THRESH_VALUE, priv->mac_reg + RDMA_XON_XOFF_THRESH); @@ -421,8 +422,10 @@ static void tx_ring_init(struct bcmgenet_eth_priv *priv) writel(0x0, priv->mac_reg + TDMA_WRITE_PTR); writel(TX_DESCS * DMA_DESC_SIZE / 4 - 1, priv->mac_reg + TDMA_RING_REG_BASE + DMA_END_ADDR); - writel(0x0, priv->mac_reg + TDMA_PROD_INDEX); - writel(0x0, priv->mac_reg + TDMA_CONS_INDEX); + /* cannot init TDMA_CONS_INDEX to 0, so align TDMA_PROD_INDEX on it instead */ + priv->tx_index = readl(priv->mac_reg + TDMA_CONS_INDEX); + writel(priv->tx_index, priv->mac_reg + TDMA_PROD_INDEX); + priv->tx_index &= 0xFF; writel(0x1, priv->mac_reg + TDMA_RING_REG_BASE + DMA_MBUF_DONE_THRESH); writel(0x0, priv->mac_reg + TDMA_FLOW_PERIOD); writel((TX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH, @@ -469,8 +472,6 @@ static int bcmgenet_gmac_eth_start(struct udevice *dev) priv->tx_desc_base = priv->mac_reg + GENET_TX_OFF; priv->rx_desc_base = priv->mac_reg + GENET_RX_OFF; - priv->tx_index = 0x0; - priv->rx_index = 0x0; bcmgenet_umac_reset(priv); -- cgit v1.2.3 From 34873f46bacb039a1f7f8d8147664150bfec2a2d Mon Sep 17 00:00:00 2001 From: Jason Wessel Date: Fri, 17 Jul 2020 06:32:00 -0700 Subject: bcmgenet: Add support for rgmii-rxid The commit 57805f2270c4 ("net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII") needed to be extended for the case of using the rgmii-rxid. The latest version of the Rasbperry Pi4 dtb files for the 5.4 now specify the rgmii-rxid. Signed-off-by: Jason Wessel Tested-by: Petr Tesarik Signed-off-by: Matthias Brugger --- drivers/net/bcmgenet.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c index 1b7e7ba2bff..ace13313621 100644 --- a/drivers/net/bcmgenet.c +++ b/drivers/net/bcmgenet.c @@ -457,7 +457,8 @@ static int bcmgenet_adjust_link(struct bcmgenet_eth_priv *priv) clrsetbits_32(priv->mac_reg + EXT_RGMII_OOB_CTRL, OOB_DISABLE, RGMII_LINK | RGMII_MODE_EN); - if (phy_dev->interface == PHY_INTERFACE_MODE_RGMII) + if (phy_dev->interface == PHY_INTERFACE_MODE_RGMII || + phy_dev->interface == PHY_INTERFACE_MODE_RGMII_RXID) setbits_32(priv->mac_reg + EXT_RGMII_OOB_CTRL, ID_MODE_DIS); writel(speed << CMD_SPEED_SHIFT, (priv->mac_reg + UMAC_CMD)); -- cgit v1.2.3 From 9250d0bad5637233a24a0c4b583100ad1be63316 Mon Sep 17 00:00:00 2001 From: Chuanjia Liu Date: Mon, 31 Aug 2020 15:53:12 +0800 Subject: PCI: mediatek: Release the resource when PCIe enable port fail On the mt7623 platform, if one port enable fail and other port enable succeed. It will hang on when using pci enum because the resource was not released correctly. Signed-off-by: Chuanjia Liu Tested-by: Frank Wunderlich --- drivers/pci/pcie_mediatek.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c index ad34f7c597e..55b6a40f254 100644 --- a/drivers/pci/pcie_mediatek.c +++ b/drivers/pci/pcie_mediatek.c @@ -443,29 +443,36 @@ static void mtk_pcie_enable_port(struct mtk_pcie_port *port) err = clk_enable(&port->sys_ck); if (err) - goto exit; + goto err_sys_clk; err = reset_assert(&port->reset); if (err) - goto exit; + goto err_reset; err = reset_deassert(&port->reset); if (err) - goto exit; + goto err_reset; err = generic_phy_init(&port->phy); if (err) - goto exit; + goto err_phy_init; err = generic_phy_power_on(&port->phy); if (err) - goto exit; + goto err_phy_on; if (!mtk_pcie_startup_port(port)) return; pr_err("Port%d link down\n", port->slot); -exit: + + generic_phy_power_off(&port->phy); +err_phy_on: + generic_phy_exit(&port->phy); +err_phy_init: +err_reset: + clk_disable(&port->sys_ck); +err_sys_clk: mtk_pcie_port_free(port); } -- cgit v1.2.3 From 1e2c5bb9e7f9fdad05a5b1f36c44da5cc430b8a9 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Mon, 31 Aug 2020 14:27:37 +0200 Subject: mtd: nand: Fix nand write error with bad block addresses above 32-bit Nand writes should skip the bad blocks with "nand write" command. In case of bad blocks with above 32-bit address, nand_block_isbad() returns false due to truncated bad block address. In below code segment, if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is happening. Cast 'mtd->erasesize' with loff_t to fix this issue. Signed-off-by: T Karthik Reddy Signed-off-by: Michal Simek --- drivers/mtd/nand/raw/nand_util.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c index 5b74ef0dfdb..00c3c6c4122 100644 --- a/drivers/mtd/nand/raw/nand_util.c +++ b/drivers/mtd/nand/raw/nand_util.c @@ -635,14 +635,14 @@ int nand_write_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length, } while (left_to_write > 0) { + loff_t block_start = offset & ~(loff_t)(mtd->erasesize - 1); size_t block_offset = offset & (mtd->erasesize - 1); size_t write_size, truncated_write_size; WATCHDOG_RESET(); - if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) { - printf("Skip bad block 0x%08llx\n", - offset & ~(mtd->erasesize - 1)); + if (nand_block_isbad(mtd, block_start)) { + printf("Skip bad block 0x%08llx\n", block_start); offset += mtd->erasesize - block_offset; continue; } -- cgit v1.2.3 From 8505147403584f322bf1cb66b1c796bc11f29ad4 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 16 Jul 2020 14:37:26 +0530 Subject: mmc: msm_sdhci: Use mmc_of_parse for setting host_caps MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since the introduction of 'get_cd' callback in sdhci core, dragonboard410c's MMC interface is broken. It turns out that 'get_cd' callback checks for the host_caps for validating the chip select. And since the msm_sdhci driver is not parsing the host_caps from DT, not all of the cababilities are parsed properly. This results in the MMC interfaces to be broken. Hence, fix this by adding a call to 'mmc_of_parse' during driver probe. Signed-off-by: Manivannan Sadhasivam Tested-by: Aníbal Limón Reviewed-By: Ramon Fried Reviewed-by: Jaehoon Chung --- drivers/mmc/msm_sdhci.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 56c3e35c9e9..2a1f412278e 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -142,6 +142,10 @@ static int msm_sdc_probe(struct udevice *dev) writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); } + ret = mmc_of_parse(dev, &plat->cfg); + if (ret) + return ret; + host->mmc = &plat->mmc; host->mmc->dev = dev; ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0); -- cgit v1.2.3 From e79c59c0e293c49d52704fdc5ca1b6896eced2d9 Mon Sep 17 00:00:00 2001 From: Andre Heider Date: Thu, 10 Sep 2020 19:53:40 +0200 Subject: mmc: xenon_sdhci: Add missing common host capabilities MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use mmc_of_parse() to set the common host properties. That includes "bus-width", so parsing it can be removed from the driver. But more importantly, "non-removable" is now respected, which fixes the usage of eMMC. Signed-off-by: Andre Heider Reviewed-by: Konstantin Porotchkin Tested-by: Marek Behún --- drivers/mmc/xenon_sdhci.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c index 7f9a579c838..6ce9d00d0ae 100644 --- a/drivers/mmc/xenon_sdhci.c +++ b/drivers/mmc/xenon_sdhci.c @@ -485,20 +485,10 @@ static int xenon_sdhci_probe(struct udevice *dev) armada_3700_soc_pad_voltage_set(host); host->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_DDR_52MHz; - switch (fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "bus-width", - 1)) { - case 8: - host->host_caps |= MMC_MODE_8BIT; - break; - case 4: - host->host_caps |= MMC_MODE_4BIT; - break; - case 1: - break; - default: - printf("Invalid \"bus-width\" value\n"); - return -EINVAL; - } + + ret = mmc_of_parse(dev, &plat->cfg); + if (ret) + return ret; host->ops = &xenon_sdhci_ops; -- cgit v1.2.3 From f9c3a816c0de61565a0afd1608de20ecb54e9243 Mon Sep 17 00:00:00 2001 From: Haibo Chen Date: Tue, 1 Sep 2020 15:34:06 +0800 Subject: mmc: fsl_esdhc_imx: check the clock stable status after config the clock rate. Currently, after config the clock rate, delay 10ms, this is quite a rough method. Check the clock stable status in the present status register is enough. Tested-by: Ji Luo Signed-off-by: Haibo Chen --- drivers/mmc/fsl_esdhc_imx.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 788677984bf..0c866b168f9 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -36,6 +36,7 @@ #include #include #include +#include #if !CONFIG_IS_ENABLED(BLK) #include "mmc_private.h" @@ -631,6 +632,8 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; + u32 tmp; + int ret; #ifdef ARCH_MXC #ifdef CONFIG_MX53 /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */ @@ -664,7 +667,9 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk); - udelay(10000); + ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDSTB, 100); + if (ret) + pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n"); #ifdef CONFIG_FSL_USDHC esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); -- cgit v1.2.3 From cf0bf89227594cf3fdcae8242f023685cdd11cb7 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 17 Sep 2020 16:49:02 +0200 Subject: rng: stm32mp1: use log() instead of printf() The logging system provides flexible filtering and enhanced output. Signed-off-by: Heinrich Schuchardt Reviewed-by: Sughosh Ganu --- drivers/rng/stm32mp1_rng.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c index 7ef7ff9756d..c1bae180f77 100644 --- a/drivers/rng/stm32mp1_rng.c +++ b/drivers/rng/stm32mp1_rng.c @@ -3,6 +3,8 @@ * Copyright (c) 2019, Linaro Limited */ +#define LOG_CATEGORY UCLASS_RNG + #include #include #include @@ -53,7 +55,7 @@ static int stm32_rng_read(struct udevice *dev, void *data, size_t len) for (i = 0; i < 12; i++) readl(pdata->base + RNG_DR); if (readl(pdata->base + RNG_SR) & RNG_SR_SEIS) { - printf("RNG Noise"); + log_err("RNG Noise"); return -EIO; } /* start again */ -- cgit v1.2.3