From 6846a5b23d880aa41861f1466534d8e12a04235d Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 16 Oct 2024 15:50:29 +0800 Subject: clk: imx8: Add dummy clk There is a dummy clk entry for i.MX8QM/QXP, so add the dummy clk enable and get rate. Otherwise "__imx8_clk_enable(Invalid clk ID #0)". Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API") Reviewed-by: Heiko Schocher Signed-off-by: Peng Fan Tested-by: Heiko Schocher --- drivers/clk/imx/clk-imx8qm.c | 4 ++++ drivers/clk/imx/clk-imx8qxp.c | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'drivers') diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c index 62fed7e3e32..466d71786cf 100644 --- a/drivers/clk/imx/clk-imx8qm.c +++ b/drivers/clk/imx/clk-imx8qm.c @@ -48,6 +48,8 @@ ulong imx8_clk_get_rate(struct clk *clk) debug("%s(#%lu)\n", __func__, clk->id); switch (clk->id) { + case IMX8QM_CLK_DUMMY: + return 0; case IMX8QM_A53_DIV: resource = SC_R_A53; pm_clk = SC_PM_CLK_CPU; @@ -264,6 +266,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable) debug("%s(#%lu)\n", __func__, clk->id); switch (clk->id) { + case IMX8QM_CLK_DUMMY: + return 0; case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: case IMX8QM_I2C0_DIV: diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index 18bdc08971b..79098623bc8 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -51,6 +51,8 @@ ulong imx8_clk_get_rate(struct clk *clk) debug("%s(#%lu)\n", __func__, clk->id); switch (clk->id) { + case IMX8QXP_CLK_DUMMY: + return 0; case IMX8QXP_A35_DIV: resource = SC_R_A35; pm_clk = SC_PM_CLK_CPU; @@ -248,6 +250,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable) debug("%s(#%lu)\n", __func__, clk->id); switch (clk->id) { + case IMX8QXP_CLK_DUMMY: + return 0; case IMX8QXP_I2C0_CLK: case IMX8QXP_I2C0_IPG_CLK: resource = SC_R_I2C_0; -- cgit v1.2.3 From 9b1cecdd9b6eaf22c4fa268430669ceff0c48786 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Fri, 18 Oct 2024 15:34:32 +0800 Subject: cpu: imx8_cpu: Avoid revision to corrupt device tree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit U-Boot device tree is padded just after U-Boot proper. After the whole stuff loaded to DRAM space, the device tree area is conflict with BSS region before U-Boot relocation. So any write to BSS area before reloc_fdt will corrupt the device tree. Without the fix, there is issue that “binman_init failed:-2” on i.MX8MP-EVK board. Drop 'revision' and use malloc area in cpu_imx_plat->rev. Signed-off-by: Peng Fan --- drivers/cpu/imx8_cpu.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 6c0a8c0cbe4..51262befaff 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -20,10 +20,11 @@ DECLARE_GLOBAL_DATA_PTR; +#define IMX_REV_LEN 4 struct cpu_imx_plat { const char *name; - const char *rev; const char *type; + char rev[IMX_REV_LEN]; u32 cpu_rsrc; u32 cpurev; u32 freq_mhz; @@ -69,28 +70,29 @@ static const char *get_imx_type_str(u32 imxtype) } } -static const char *get_imx_rev_str(u32 rev) +static void get_imx_rev_str(struct cpu_imx_plat *plat, u32 rev) { - static char revision[4]; - if (IS_ENABLED(CONFIG_IMX8)) { switch (rev) { case CHIP_REV_A: - return "A"; + plat->rev[0] = 'A'; + break; case CHIP_REV_B: - return "B"; + plat->rev[0] = 'B'; + break; case CHIP_REV_C: - return "C"; + plat->rev[0] = 'C'; + break; default: - return "?"; + plat->rev[0] = '?'; + break; } + plat->rev[1] = '\0'; } else { - revision[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4); - revision[1] = '.'; - revision[2] = '0' + (rev & 0xf); - revision[3] = '\0'; - - return revision; + plat->rev[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4); + plat->rev[1] = '.'; + plat->rev[2] = '0' + (rev & 0xf); + plat->rev[3] = '\0'; } } @@ -318,7 +320,7 @@ static int imx_cpu_probe(struct udevice *dev) set_core_data(dev); cpurev = get_cpu_rev(); plat->cpurev = cpurev; - plat->rev = get_imx_rev_str(cpurev & 0xFFF); + get_imx_rev_str(plat, cpurev & 0xFFF); plat->type = get_imx_type_str((cpurev & 0x1FF000) >> 12); plat->freq_mhz = imx_get_cpu_rate(dev) / 1000000; plat->mpidr = dev_read_addr(dev); -- cgit v1.2.3