From d87080b721e4f8dca977af7571c5338ae7bb8db7 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 31 Mar 2006 18:32:53 +0200 Subject: GCC-4.x fixes: clean up global data pointer initialization for all boards. --- drivers/netconsole.c | 4 ++-- drivers/ns9750_serial.c | 6 ++---- drivers/ps2ser.c | 4 ++-- drivers/s3c4510b_uart.c | 4 ++-- drivers/serial.c | 3 ++- drivers/serial_max3100.c | 3 ++- drivers/tsec.c | 3 ++- 7 files changed, 14 insertions(+), 13 deletions(-) (limited to 'drivers') diff --git a/drivers/netconsole.c b/drivers/netconsole.c index 9a0a24f3ac4..69089f92cec 100644 --- a/drivers/netconsole.c +++ b/drivers/netconsole.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + static char input_buffer[512]; static int input_size = 0; /* char count in input buffer */ static int input_offset = 0; /* offset to valid chars in input buffer */ @@ -105,8 +107,6 @@ int nc_input_packet (uchar * pkt, unsigned dest, unsigned src, unsigned len) static void nc_send_packet (const char *buf, int len) { - DECLARE_GLOBAL_DATA_PTR; - struct eth_device *eth; int inited = 0; uchar *pkt; diff --git a/drivers/ns9750_serial.c b/drivers/ns9750_serial.c index aced3dae8e2..8dff3677450 100644 --- a/drivers/ns9750_serial.c +++ b/drivers/ns9750_serial.c @@ -33,6 +33,8 @@ #include "ns9750_bbus.h" /* for GPIOs */ #include "ns9750_ser.h" /* for serial configuration */ +DECLARE_GLOBAL_DATA_PTR; + #define CONSOLE CONFIG_CONS_INDEX static unsigned int calcBitrateRegister( void ); @@ -183,8 +185,6 @@ void serial_setbrg( void ) static unsigned int calcBitrateRegister( void ) { - DECLARE_GLOBAL_DATA_PTR; - return ( NS9750_SER_BITRATE_EBIT | NS9750_SER_BITRATE_CLKMUX_BCLK | NS9750_SER_BITRATE_TMODE | @@ -204,8 +204,6 @@ static unsigned int calcBitrateRegister( void ) static unsigned int calcRxCharGapRegister( void ) { - DECLARE_GLOBAL_DATA_PTR; - return NS9750_SER_RX_CHAR_TIMER_TRUN; } diff --git a/drivers/ps2ser.c b/drivers/ps2ser.c index e2a38dc3dcc..724fa405827 100644 --- a/drivers/ps2ser.c +++ b/drivers/ps2ser.c @@ -21,6 +21,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* #define DEBUG */ #define PS2SER_BAUD 57600 @@ -61,8 +63,6 @@ static int ps2buf_out_idx; #ifdef CONFIG_MPC5xxx int ps2ser_init(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; unsigned long baseclk; int div; diff --git a/drivers/s3c4510b_uart.c b/drivers/s3c4510b_uart.c index 44b96a9c5e7..ddcd591f84a 100644 --- a/drivers/s3c4510b_uart.c +++ b/drivers/s3c4510b_uart.c @@ -50,6 +50,8 @@ #include #include "s3c4510b_uart.h" +DECLARE_GLOBAL_DATA_PTR; + static UART *uart; /* flush serial input queue. returns 0 on success or negative error @@ -82,8 +84,6 @@ static int serial_flush_output(void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - UART_LINE_CTRL ulctrl; UART_CTRL uctrl; UART_BAUD_DIV ubd; diff --git a/drivers/serial.c b/drivers/serial.c index 057a1ab0174..228781b46a6 100644 --- a/drivers/serial.c +++ b/drivers/serial.c @@ -30,6 +30,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #if !defined(CONFIG_CONS_INDEX) #error "No console index specified." #elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 4) @@ -77,7 +79,6 @@ static NS16550_t serial_ports[4] = { static int calc_divisor (NS16550_t port) { - DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_OMAP1510 /* If can't cleanly clock 115200 set div to 1 */ if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { diff --git a/drivers/serial_max3100.c b/drivers/serial_max3100.c index bbe212b81f7..35c5596985b 100644 --- a/drivers/serial_max3100.c +++ b/drivers/serial_max3100.c @@ -28,6 +28,8 @@ #ifdef CONFIG_MAX3100_SERIAL +DECLARE_GLOBAL_DATA_PTR; + /**************************************************************/ /* convienient macros */ @@ -217,7 +219,6 @@ int serial_init(void) { unsigned int wconf, rconf; int i; - DECLARE_GLOBAL_DATA_PTR; wconf = 0; diff --git a/drivers/tsec.c b/drivers/tsec.c index 4c5e1b5d3a1..7ec565ca67b 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -23,6 +23,8 @@ #include "tsec.h" #include "miiphy.h" +DECLARE_GLOBAL_DATA_PTR; + #define TX_BUF_CNT 2 static uint rxIdx; /* index of the current RX buffer */ @@ -1082,7 +1084,6 @@ static void relocate_cmds(void) struct phy_cmd **cmdlistptr; struct phy_cmd *cmd; int i,j,k; - DECLARE_GLOBAL_DATA_PTR; for(i=0; phy_info[i]; i++) { /* First thing's first: relocate the pointers to the -- cgit v1.3.1 From 2662b40cace272da5759040622561d821c878d56 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 1 Apr 2006 13:41:03 +0200 Subject: * Changes/fixes for drivers/cfi_flash.c: - Add Intel legacy lock/unlock support to common CFI driver On some Intel flash's (e.g. Intel J3) legacy unlocking is supported, meaning that unlocking of one sector will unlock all sectors of this bank. Using this feature, unlocking of all sectors upon startup (via env var "unlock=yes") will get much faster. - Fixed problem with multiple reads of envronment variable "unlock" as pointed out by Reinhard Arlt & Anders Larsen. - Removed unwanted linefeeds from "protect" command when CFG_FLASH_PROTECTION is enabled. - Changed p3p400 board to use CFG_FLASH_PROTECTION Patch by Stefan Roese, 01 Apr 2006 * Changes/fixes for drivers/cfi_flash.c: - Correctly handle the cases where CFG_HZ != 1000 (several XScale-based boards) - Fix the timeout calculation of buffered writes (off by a factor of 1000) Patch by Anders Larsen, 31 Mar 2006 --- CHANGELOG | 27 ++++++++++++++++++ common/cmd_flash.c | 5 ++-- drivers/cfi_flash.c | 71 ++++++++++++++++++++++++++++++++++++++++-------- include/configs/p3p440.h | 4 +++ include/flash.h | 1 + 5 files changed, 95 insertions(+), 13 deletions(-) (limited to 'drivers') diff --git a/CHANGELOG b/CHANGELOG index 34b8d20ebb6..4c5b62c0689 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,33 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Changes/fixes for drivers/cfi_flash.c: + + - Add Intel legacy lock/unlock support to common CFI driver + + On some Intel flash's (e.g. Intel J3) legacy unlocking is + supported, meaning that unlocking of one sector will unlock + all sectors of this bank. Using this feature, unlocking + of all sectors upon startup (via env var "unlock=yes") will + get much faster. + + - Fixed problem with multiple reads of envronment variable + "unlock" as pointed out by Reinhard Arlt & Anders Larsen. + + - Removed unwanted linefeeds from "protect" command when + CFG_FLASH_PROTECTION is enabled. + + - Changed p3p400 board to use CFG_FLASH_PROTECTION + + Patch by Stefan Roese, 01 Apr 2006 + +* Changes/fixes for drivers/cfi_flash.c: + - Correctly handle the cases where CFG_HZ != 1000 (several + XScale-based boards) + - Fix the timeout calculation of buffered writes (off by a + factor of 1000) + Patch by Anders Larsen, 31 Mar 2006 + * Enable Quad UART om MCC200 board. * Cleanup MCC200 board configuration; omit non-existent stuff. diff --git a/common/cmd_flash.c b/common/cmd_flash.c index 0aa478306b8..201f4e33d44 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -455,6 +455,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #ifdef CONFIG_HAS_DATAFLASH int status; #endif + if (argc < 3) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; @@ -655,10 +656,10 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last) #endif /* CFG_FLASH_PROTECTION */ } } + } #if defined(CFG_FLASH_PROTECTION) - if (!rcode) putc ('\n'); + puts (" done\n"); #endif /* CFG_FLASH_PROTECTION */ - } printf ("%sProtected %d sectors\n", p ? "" : "Un-", protected); diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index a989d346629..2e3748081e3 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -117,6 +117,7 @@ #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */ #define FLASH_OFFSET_WTOUT 0x1F #define FLASH_OFFSET_WBTOUT 0x20 #define FLASH_OFFSET_ETOUT 0x21 @@ -346,6 +347,10 @@ unsigned long flash_init (void) unsigned long size = 0; int i; +#ifdef CFG_FLASH_PROTECTION + char *s = getenv("unlock"); +#endif + /* Init: no FLASHes known */ for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; @@ -357,15 +362,39 @@ unsigned long flash_init (void) #endif /* CFG_FLASH_QUIET_TEST */ } #ifdef CFG_FLASH_PROTECTION - else { - char *s = getenv("unlock"); + else if ((s != NULL) && (strcmp(s, "yes") == 0)) { + /* + * Only the U-Boot image and it's environment is protected, + * all other sectors are unprotected (unlocked) if flash + * hardware protection is used (CFG_FLASH_PROTECTION) and + * the environment variable "unlock" is set to "yes". + */ + if (flash_info[i].legacy_unlock) { + int k; + + /* + * Disable legacy_unlock temporarily, since + * flash_real_protect would relock all other sectors + * again otherwise. + */ + flash_info[i].legacy_unlock = 0; - if (((s = getenv("unlock")) != NULL) && (strcmp(s, "yes") == 0)) { /* - * Only the U-Boot image and it's environment is protected, - * all other sectors are unprotected (unlocked) if flash - * hardware protection is used (CFG_FLASH_PROTECTION) and - * the environment variable "unlock" is set to "yes". + * Legacy unlocking (e.g. Intel J3) -> unlock only one + * sector. This will unlock all sectors. + */ + flash_real_protect (&flash_info[i], 0, 0); + + flash_info[i].legacy_unlock = 1; + + /* + * Manually mark other sectors as unlocked (unprotected) + */ + for (k = 1; k < flash_info[i].sector_count; k++) + flash_info[i].protect[k] = 0; + } else { + /* + * No legancy unlocking -> unlock all sectors */ flash_protect (FLAG_PROTECT_CLEAR, flash_info[i].start[0], @@ -668,8 +697,12 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) prot ? "protect" : "unprotect")) == 0) { info->protect[sector] = prot; - /* Intel's unprotect unprotects all locking */ - if (prot == 0) { + + /* + * On some of Intel's flash chips (marked via legacy_unlock) + * unprotect unprotects all locking. + */ + if ((prot == 0) && (info->legacy_unlock)) { flash_sect_t i; for (i = 0; i < info->sector_count; i++) { @@ -746,6 +779,10 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; +#if CFG_HZ != 1000 + tout *= CFG_HZ/1000; +#endif + /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { @@ -1082,6 +1119,10 @@ ulong flash_get_size (ulong base, int banknum) uchar num_erase_regions; int erase_region_size; int erase_region_count; +#ifdef CFG_FLASH_PROTECTION + int ext_addr; + info->legacy_unlock = 0; +#endif info->start[0] = base; @@ -1095,6 +1136,13 @@ ulong flash_get_size (ulong base, int banknum) case CFI_CMDSET_INTEL_EXTENDED: default: info->cmd_reset = FLASH_CMD_RESET; +#ifdef CFG_FLASH_PROTECTION + /* read legacy lock/unlock bit from intel flash */ + ext_addr = flash_read_ushort (info, 0, + FLASH_OFFSET_EXT_QUERY_T_P_ADDR); + info->legacy_unlock = + flash_read_uchar (info, ext_addr + 5) & 0x08; +#endif break; case CFI_CMDSET_AMD_STANDARD: case CFI_CMDSET_AMD_EXTENDED: @@ -1160,8 +1208,9 @@ ulong flash_get_size (ulong base, int banknum) info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE)); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT); info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); - info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)); + info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 831d018e2d4..19656fc22af 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -146,6 +146,7 @@ "cp.b 100000 fffc0000 40000;" \ "setenv filesize;saveenv\0" \ "upd=run load;run update\0" \ + "unlock=yes\0" \ "" #define CONFIG_BOOTCOMMAND "run net_nfs" @@ -275,6 +276,9 @@ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CFG_FLASH_PROTECTION 1 /* use hardware protection */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ + #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ diff --git a/include/flash.h b/include/flash.h index 4c68c6832f7..a84dc6872e1 100644 --- a/include/flash.h +++ b/include/flash.h @@ -45,6 +45,7 @@ typedef struct { ushort vendor; /* the primary vendor id */ ushort cmd_reset; /* Vendor specific reset command */ ushort interface; /* used for x8/x16 adjustments */ + ushort legacy_unlock; /* support Intel legacy (un)locking */ #endif } flash_info_t; -- cgit v1.3.1 From 6db39708117d6391a72f3fc3ea7860231b630270 Mon Sep 17 00:00:00 2001 From: Marian Balakowicz Date: Sat, 8 Apr 2006 19:08:06 +0200 Subject: Fix JFFS2 support for legacy NAND driver. Some more NAND cleanup and small fixes. --- Makefile | 2 ++ board/amcc/bamboo/config.mk | 3 --- board/dave/PPChameleonEVB/config.mk | 6 ------ board/delta/config.mk | 3 --- board/delta/nand.c | 2 +- board/esd/ash405/config.mk | 3 --- board/esd/cms700/config.mk | 3 --- board/esd/common/auto_update.c | 16 ++++++++-------- board/esd/cpci405/config.mk | 3 --- board/esd/hh405/config.mk | 3 --- board/esd/hub405/config.mk | 3 --- board/esd/plu405/config.mk | 3 --- board/esd/voh405/config.mk | 3 --- board/esd/wuh405/config.mk | 3 --- board/netphone/config.mk | 3 --- board/netstar/config.mk | 3 --- board/netta/netta.c | 4 ++-- board/netta2/config.mk | 3 --- board/netvia/config.mk | 3 --- board/sixnet/config.mk | 3 --- drivers/nand/diskonchip.c | 5 ++--- drivers/nand/nand.c | 6 +----- drivers/nand/nand_base.c | 6 +----- drivers/nand/nand_bbt.c | 6 +----- drivers/nand/nand_ecc.c | 6 +----- drivers/nand/nand_ids.c | 6 +----- drivers/nand_legacy/nand_legacy.c | 18 +++++++++++------- fs/jffs2/jffs2_1pass.c | 34 ++++++++++++++++++++++++++++------ include/configs/CATcenter.h | 19 ++++++++++--------- include/configs/CPU86.h | 2 -- include/configs/IDS8247.h | 1 + include/configs/NC650.h | 2 ++ include/configs/NETTA.h | 1 + include/configs/RBC823.h | 2 -- include/configs/VCMA9.h | 1 + include/configs/delta.h | 3 ++- include/configs/omap2420h4.h | 1 + include/configs/stxxtc.h | 1 + 38 files changed, 78 insertions(+), 117 deletions(-) (limited to 'drivers') diff --git a/Makefile b/Makefile index af0c25af4c5..9b93463000f 100644 --- a/Makefile +++ b/Makefile @@ -133,6 +133,8 @@ LIBS += disk/libdisk.a LIBS += rtc/librtc.a LIBS += dtt/libdtt.a LIBS += drivers/libdrivers.a +LIBS += drivers/nand/libnand.a +LIBS += drivers/nand_legacy/libnand_legacy.a LIBS += drivers/sk98lin/libsk98lin.a LIBS += post/libpost.a post/cpu/libcpu.a LIBS += common/libcommon.a diff --git a/board/amcc/bamboo/config.mk b/board/amcc/bamboo/config.mk index 433429bea71..35cb65584a1 100644 --- a/board/amcc/bamboo/config.mk +++ b/board/amcc/bamboo/config.mk @@ -32,6 +32,3 @@ endif ifeq ($(dbcr),1) PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000 endif - -# legacy nand support -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk index 1dc635fbf08..9083aacfabf 100644 --- a/board/dave/PPChameleonEVB/config.mk +++ b/board/dave/PPChameleonEVB/config.mk @@ -26,9 +26,3 @@ # Reserve 320 kB for Monitor TEXT_BASE = 0xFFFB0000 - -# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined) -BOARDLIBS = drivers/nand/libnand.a - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/delta/config.mk b/board/delta/config.mk index 9564625478e..61828bba996 100644 --- a/board/delta/config.mk +++ b/board/delta/config.mk @@ -3,6 +3,3 @@ #TEXT_BASE = 0xa3080000 #TEXT_BASE = 0x9ffe0000 TEXT_BASE = 0xa3008000 - -# Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE) -BOARDLIBS = drivers/nand/libnand.a diff --git a/board/delta/nand.c b/board/delta/nand.c index c4df6e57eb7..7982548861e 100644 --- a/board/delta/nand.c +++ b/board/delta/nand.c @@ -23,7 +23,7 @@ #include #if (CONFIG_COMMANDS & CFG_CMD_NAND) -#ifdef CONFIG_NEW_NAND_CODE +#if !defined(CFG_NAND_LEGACY) #include #include diff --git a/board/esd/ash405/config.mk b/board/esd/ash405/config.mk index 3cf5dd85bf2..1d743a9f873 100644 --- a/board/esd/ash405/config.mk +++ b/board/esd/ash405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk index 0c56c40b9f1..5c3c01cf874 100644 --- a/board/esd/cms700/config.mk +++ b/board/esd/cms700/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c index cad82115cc6..5cd342332f5 100644 --- a/board/esd/common/auto_update.c +++ b/board/esd/common/auto_update.c @@ -24,8 +24,8 @@ #include -#ifndef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support! +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) +#warning CFG_NAND_LEGACY not defined in a file using the legacy NAND support! #endif #include @@ -74,7 +74,7 @@ extern int flash_write (char *, ulong, ulong); /* change char* to void* to shutup the compiler */ extern block_dev_desc_t *get_dev (char*, int); -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) /* references to names in cmd_nand.c */ #define NANDRW_READ 0x01 #define NANDRW_WRITE 0x00 @@ -84,7 +84,7 @@ extern struct nand_chip nand_dev_desc[]; extern int nand_legacy_rw(struct nand_chip* nand, int cmd, size_t start, size_t len, size_t * retlen, u_char * buf); extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean); -#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */ extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE]; @@ -188,7 +188,7 @@ int au_do_update(int i, long sz) int off, rc; uint nbytes; int k; -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) int total; #endif @@ -262,7 +262,7 @@ int au_do_update(int i, long sz) debug ("flash_sect_erase(%lx, %lx);\n", start, end); flash_sect_erase(start, end); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) printf("Updating NAND FLASH with image %s\n", au_image[i].name); debug ("nand_legacy_erase(%lx, %lx);\n", start, end); rc = nand_legacy_erase (nand_dev_desc, start, end - start + 1, 0); @@ -290,7 +290,7 @@ int au_do_update(int i, long sz) debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes); rc = flash_write((char *)addr, start, nbytes); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) debug ("nand_legacy_rw(%p, %lx %x)\n", addr, start, nbytes); rc = nand_legacy_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2, start, nbytes, (size_t *)&total, (uchar *)addr); @@ -308,7 +308,7 @@ int au_do_update(int i, long sz) if (au_image[i].type != AU_NAND) { rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size)); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) rc = nand_legacy_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP, start, nbytes, (size_t *)&total, (uchar *)addr); rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size)); diff --git a/board/esd/cpci405/config.mk b/board/esd/cpci405/config.mk index ceff4c4d1e7..0be45c70d7a 100644 --- a/board/esd/cpci405/config.mk +++ b/board/esd/cpci405/config.mk @@ -38,6 +38,3 @@ TEXT_BASE = 0xFFFD0000 endif endif endif - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/hh405/config.mk b/board/esd/hh405/config.mk index 798a3fa4139..7129ad568bc 100644 --- a/board/esd/hh405/config.mk +++ b/board/esd/hh405/config.mk @@ -29,6 +29,3 @@ TEXT_BASE = 0xFFF80000 #TEXT_BASE = 0xFFFC0000 #TEXT_BASE = 0x00FC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/hub405/config.mk b/board/esd/hub405/config.mk index 4c60c3566d5..a6d31aad2ba 100644 --- a/board/esd/hub405/config.mk +++ b/board/esd/hub405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/plu405/config.mk b/board/esd/plu405/config.mk index 916b285261e..25b21057998 100644 --- a/board/esd/plu405/config.mk +++ b/board/esd/plu405/config.mk @@ -27,6 +27,3 @@ TEXT_BASE = 0xFFFC0000 #TEXT_BASE = 0x00FC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/voh405/config.mk b/board/esd/voh405/config.mk index 72e81030abd..219a4eba15c 100644 --- a/board/esd/voh405/config.mk +++ b/board/esd/voh405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFF80000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/wuh405/config.mk b/board/esd/wuh405/config.mk index 3cf5dd85bf2..1d743a9f873 100644 --- a/board/esd/wuh405/config.mk +++ b/board/esd/wuh405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netphone/config.mk b/board/netphone/config.mk index de179c2d657..8497ebc812b 100644 --- a/board/netphone/config.mk +++ b/board/netphone/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netstar/config.mk b/board/netstar/config.mk index 50d647add0e..8b73e975981 100644 --- a/board/netstar/config.mk +++ b/board/netstar/config.mk @@ -9,6 +9,3 @@ # XXX TEXT_BASE = 0x20012000 TEXT_BASE = 0x13FC0000 - -# Compile the new NAND code -BOARDLIBS = drivers/nand/libnand.a diff --git a/board/netta/netta.c b/board/netta/netta.c index 9194bfb9de3..4923e3addaf 100644 --- a/board/netta/netta.c +++ b/board/netta/netta.c @@ -555,9 +555,9 @@ int board_early_init_f(void) return 0; } -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) -#include +#include extern ulong nand_probe(ulong physadr); extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; diff --git a/board/netta2/config.mk b/board/netta2/config.mk index de179c2d657..8497ebc812b 100644 --- a/board/netta2/config.mk +++ b/board/netta2/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netvia/config.mk b/board/netvia/config.mk index 583174a4895..9dddaad54b4 100644 --- a/board/netvia/config.mk +++ b/board/netvia/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/sixnet/config.mk b/board/sixnet/config.mk index 8e73d2f3693..0cd8f441480 100644 --- a/board/sixnet/config.mk +++ b/board/sixnet/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xF8000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/drivers/nand/diskonchip.c b/drivers/nand/diskonchip.c index afaae834f1c..e17af70d07f 100644 --- a/drivers/nand/diskonchip.c +++ b/drivers/nand/diskonchip.c @@ -21,9 +21,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif +#if !defined(CFG_NAND_LEGACY) #include #include @@ -1786,3 +1784,4 @@ module_exit(cleanup_nanddoc); MODULE_LICENSE("GPL"); MODULE_AUTHOR("David Woodhouse "); MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n"); +#endif diff --git a/drivers/nand/nand.c b/drivers/nand/nand.c index dd80026fe02..e1781fcbbf8 100644 --- a/drivers/nand/nand.c +++ b/drivers/nand/nand.c @@ -23,11 +23,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c index e0b406041fb..b7a5d32fb3f 100644 --- a/drivers/nand/nand_base.c +++ b/drivers/nand/nand_base.c @@ -72,11 +72,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include #include diff --git a/drivers/nand/nand_bbt.c b/drivers/nand/nand_bbt.c index ac168723e22..aaa9400e54d 100644 --- a/drivers/nand/nand_bbt.c +++ b/drivers/nand/nand_bbt.c @@ -54,11 +54,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include #include diff --git a/drivers/nand/nand_ecc.c b/drivers/nand/nand_ecc.c index e0d0e8bcc40..f33be9655d3 100644 --- a/drivers/nand/nand_ecc.c +++ b/drivers/nand/nand_ecc.c @@ -37,11 +37,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include /* diff --git a/drivers/nand/nand_ids.c b/drivers/nand/nand_ids.c index 3d4d372f17f..8b58736bc10 100644 --- a/drivers/nand/nand_ids.c +++ b/drivers/nand/nand_ids.c @@ -13,11 +13,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include diff --git a/drivers/nand_legacy/nand_legacy.c b/drivers/nand_legacy/nand_legacy.c index 3989ca2a2d7..458046d41c3 100644 --- a/drivers/nand_legacy/nand_legacy.c +++ b/drivers/nand_legacy/nand_legacy.c @@ -10,11 +10,6 @@ */ #include - -#ifndef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support! -#endif - #include #include #include @@ -27,7 +22,7 @@ # define SHOW_BOOT_PROGRESS(arg) #endif -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) #include #include @@ -1612,4 +1607,13 @@ static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc) #endif -#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ +#ifdef CONFIG_JFFS2_NAND +int read_jffs2_nand(size_t start, size_t len, + size_t * retlen, u_char * buf, int nanddev) +{ + return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2, + start, len, retlen, buf); +} +#endif /* CONFIG_JFFS2_NAND */ + +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */ diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 49c86524c76..41ff4c1fbbd 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -144,7 +144,11 @@ static struct part_info *current_part; #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) +#if defined(CFG_NAND_LEGACY) +#include +#else #include +#endif /* * Support for jffs2 on top of NAND-flash * @@ -155,8 +159,14 @@ static struct part_info *current_part; * */ +#if defined(CFG_NAND_LEGACY) +/* this one defined in nand_legacy.c */ +int read_jffs2_nand(size_t start, size_t len, + size_t * retlen, u_char * buf, int nanddev); +#else /* info for NAND chips, defined in drivers/nand/nand.c */ extern nand_info_t nand_info[]; +#endif #define NAND_PAGE_SIZE 512 #define NAND_PAGE_SHIFT 9 @@ -167,7 +177,6 @@ extern nand_info_t nand_info[]; #endif #define NAND_CACHE_SIZE (NAND_CACHE_PAGES*NAND_PAGE_SIZE) -#ifdef CFG_NAND_LEGACY static u8* nand_cache = NULL; static u32 nand_cache_off = (u32)-1; @@ -175,7 +184,11 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf) { struct mtdids *id = current_part->dev->id; u32 bytes_read = 0; +#if defined(CFG_NAND_LEGACY) + size_t retlen; +#else ulong retlen; +#endif int cpy_bytes; while (bytes_read < size) { @@ -193,14 +206,24 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf) } } +#if defined(CFG_NAND_LEGACY) + if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE, + &retlen, nand_cache, id->num) < 0 || + retlen != NAND_CACHE_SIZE) { + printf("read_nand_cached: error reading nand off %#x size %d bytes\n", + nand_cache_off, NAND_CACHE_SIZE); + return -1; + } +#else retlen = NAND_CACHE_SIZE; if (nand_read(&nand_info[id->num], nand_cache_off, - &retlen, nand_cache) != 0 || + &retlen, nand_cache) != 0 || retlen != NAND_CACHE_SIZE) { printf("read_nand_cached: error reading nand off %#x size %d bytes\n", nand_cache_off, NAND_CACHE_SIZE); return -1; } +#endif } cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read); if (cpy_bytes > size - bytes_read) @@ -251,7 +274,6 @@ static void put_fl_mem_nand(void *buf) { free(buf); } -#endif /* CFG_NAND_LEGACY */ #endif /* #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) */ @@ -294,7 +316,7 @@ static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf) return get_fl_mem_nor(off); #endif -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) if (id->type == MTD_DEV_TYPE_NAND) return get_fl_mem_nand(off, size, ext_buf); #endif @@ -312,7 +334,7 @@ static inline void *get_node_mem(u32 off) return get_node_mem_nor(off); #endif -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) if (id->type == MTD_DEV_TYPE_NAND) return get_node_mem_nand(off); #endif @@ -323,7 +345,7 @@ static inline void *get_node_mem(u32 off) static inline void put_fl_mem(void *buf) { -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) struct mtdids *id = current_part->dev->id; if (id->type == MTD_DEV_TYPE_NAND) diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index ffe89cb78fc..7ec4599ebb5 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -193,6 +193,8 @@ */ #define CFG_NAND0_BASE 0xFF400000 #define CFG_NAND1_BASE 0xFF000000 +#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE } +#define NAND_BIG_DELAY_US 25 /* For CATcenter there is only NAND on the module */ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ @@ -218,9 +220,9 @@ #define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */ -#define NAND_DISABLE_CE(nand) do \ +#define MACRO_NAND_DISABLE_CE(nandptr) do \ { \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ + switch((unsigned long)nandptr) \ { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CE); \ @@ -231,9 +233,9 @@ } \ } while(0) -#define NAND_ENABLE_CE(nand) do \ +#define MACRO_NAND_ENABLE_CE(nandptr) do \ { \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ + switch((unsigned long)nandptr) \ { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CE); \ @@ -244,8 +246,7 @@ } \ } while(0) - -#define NAND_CTL_CLRALE(nandptr) do \ +#define MACRO_NAND_CTL_CLRALE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -258,7 +259,7 @@ } \ } while(0) -#define NAND_CTL_SETALE(nandptr) do \ +#define MACRO_NAND_CTL_SETALE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -271,7 +272,7 @@ } \ } while(0) -#define NAND_CTL_CLRCLE(nandptr) do \ +#define MACRO_NAND_CTL_CLRCLE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -284,7 +285,7 @@ } \ } while(0) -#define NAND_CTL_SETCLE(nandptr) do { \ +#define MACRO_NAND_CTL_SETCLE(nandptr) do { \ switch((unsigned long)nandptr) { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CLE); \ diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index 1e9a99eed33..16a9ea5dd71 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -178,8 +178,6 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include -#define CFG_NAND_LEGACY - /* * Miscellaneous configurable options */ diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index aaa44c53989..29eb874dbf0 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -236,6 +236,7 @@ */ #if (CONFIG_COMMANDS & CFG_CMD_NAND) +#define CFG_NAND_LEGACY #define CFG_NAND0_BASE 0xE1000000 #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 371ea17edd2..3c59df4f45f 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -217,6 +217,8 @@ /* * NAND flash support */ +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 #define NAND_ChipID_UNKNOWN 0x00 #define SECTORSIZE 512 diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 1bcd88d208a..25b63457c74 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -609,6 +609,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_MTD_NAND_UNSAFE diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 21945a343cd..242c837a3b8 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -326,8 +326,6 @@ /************************************************************ * Disk-On-Chip configuration ************************************************************/ -#define CFG_NAND_LEGACY - #define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ #define CFG_DOC_SHORT_TIMEOUT #define CFG_DOC_SUPPORT_2000 diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 3f29190e432..5f48a709381 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -248,6 +248,7 @@ */ #if (CONFIG_COMMANDS & CFG_CMD_NAND) +#define CFG_NAND_LEGACY #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/delta.h b/include/configs/delta.h index b42a7e2c1ae..31feaa35bfa 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -162,7 +162,8 @@ * NAND Flash */ /* Use the new NAND code. (BOARDLIBS = drivers/nand/libnand.a required) */ -#define CONFIG_NEW_NAND_CODE +#undef CFG_NAND_LEGACY + #define CFG_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */ #undef CFG_NAND1_BASE diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 12252ac129e..58374616a14 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -132,6 +132,7 @@ /* * Board NAND Info. */ +#define CFG_NAND_LEGACY #define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index be6c36cac9d..614a046105c 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -436,6 +436,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_ECC_JFFS2 #define CONFIG_MTD_NAND_VERIFY_WRITE -- cgit v1.3.1