From 97fca6a146390e1c4a5fe4c29b68f7730229db56 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Mon, 3 Dec 2018 16:11:58 +0530 Subject: mtd: nand: arasan_nfc: Add support for nand multi chip select This patch adds support for nand multi chip select. Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number of nand chips. Signed-off-by: Tummala Karthik Reddy Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- drivers/mtd/nand/raw/Kconfig | 7 +++++++ drivers/mtd/nand/raw/arasan_nfc.c | 27 +++++++++++++-------------- 2 files changed, 20 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 6d466603d81..7f76e5ecef4 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -299,6 +299,13 @@ config SYS_NAND_BUSWIDTH_16BIT not available while configuring controller. So a static CONFIG_NAND_xx is needed to know the device's bus-width in advance. +config SYS_NAND_MAX_CHIPS + int "NAND max chips" + default 1 + depends on NAND_ARASAN + help + The maximum number of NAND chips per device to be supported. + if SPL config SYS_NAND_U_BOOT_LOCATIONS diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c index dc531ccb682..2cd3f64dc63 100644 --- a/drivers/mtd/nand/raw/arasan_nfc.c +++ b/drivers/mtd/nand/raw/arasan_nfc.c @@ -90,6 +90,8 @@ struct arasan_nand_command_format { #define ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT 16 #define ARASAN_NAND_MEM_ADDR2_PAGE_MASK 0xFF #define ARASAN_NAND_MEM_ADDR2_CS_MASK 0xC0000000 +#define ARASAN_NAND_MEM_ADDR2_CS0_MASK (0x3 << 30) +#define ARASAN_NAND_MEM_ADDR2_CS1_MASK (0x1 << 30) #define ARASAN_NAND_MEM_ADDR2_BCH_MASK 0xE000000 #define ARASAN_NAND_MEM_ADDR2_BCH_SHIFT 25 @@ -261,6 +263,16 @@ static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; static void arasan_nand_select_chip(struct mtd_info *mtd, int chip) { + u32 reg_val; + + reg_val = readl(&arasan_nand_base->memadr_reg2); + if (chip == 0) { + reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS0_MASK; + writel(reg_val, &arasan_nand_base->memadr_reg2); + } else if (chip == 1) { + reg_val |= ARASAN_NAND_MEM_ADDR2_CS1_MASK; + writel(reg_val, &arasan_nand_base->memadr_reg2); + } } static void arasan_nand_enable_ecc(void) @@ -713,9 +725,6 @@ static int arasan_nand_send_wrcmd(struct arasan_nand_command_format *curr_cmd, reg_val &= ~ARASAN_NAND_MEM_ADDR2_PAGE_MASK; reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT); writel(reg_val, &arasan_nand_base->memadr_reg2); - reg_val = readl(&arasan_nand_base->memadr_reg2); - reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK; - writel(reg_val, &arasan_nand_base->memadr_reg2); return 0; } @@ -804,9 +813,6 @@ static int arasan_nand_erase(struct arasan_nand_command_format *curr_cmd, reg_val &= ~ARASAN_NAND_MEM_ADDR2_PAGE_MASK; reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT); writel(reg_val, &arasan_nand_base->memadr_reg2); - reg_val = readl(&arasan_nand_base->memadr_reg2); - reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK; - writel(reg_val, &arasan_nand_base->memadr_reg2); writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg); while (!(readl(&arasan_nand_base->intsts_reg) & @@ -859,10 +865,6 @@ static int arasan_nand_read_status(struct arasan_nand_command_format *curr_cmd, reg_val |= (1 << ARASAN_NAND_PKT_REG_PKT_CNT_SHFT) | 1; writel(reg_val, &arasan_nand_base->pkt_reg); - reg_val = readl(&arasan_nand_base->memadr_reg2); - reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK; - writel(reg_val, &arasan_nand_base->memadr_reg2); - writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg); while (!(readl(&arasan_nand_base->intsts_reg) & ARASAN_NAND_INT_STS_XFR_CMPLT_MASK) && timeout) { @@ -932,9 +934,6 @@ static int arasan_nand_send_rdcmd(struct arasan_nand_command_format *curr_cmd, reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT); writel(reg_val, &arasan_nand_base->memadr_reg2); - reg_val = readl(&arasan_nand_base->memadr_reg2); - reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK; - writel(reg_val, &arasan_nand_base->memadr_reg2); buf_index = 0; return 0; @@ -1219,7 +1218,7 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum) writel(0x0, &arasan_nand_base->pgm_reg); /* first scan to find the device and get the page size */ - if (nand_scan_ident(mtd, 1, NULL)) { + if (nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL)) { printf("%s: nand_scan_ident failed\n", __func__); goto fail; } -- cgit v1.2.3 From 25aed77f5188fef0ff5141569962e2919dd48020 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 5 Dec 2018 12:40:55 +0100 Subject: mmc: zynq: Remove unused pwrseq variable This variable was incorrectly added by: "mmc: zynq_sdhci: Add support for SD3.0" (sha1: d1f4e39d58db32a4fd1a1b4085e0ede498bd773f) which had nothing to do with MMC power sequence provider. Signed-off-by: Michal Simek --- drivers/mmc/zynq_sdhci.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index b05334dfc8d..08023783de4 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -28,7 +28,6 @@ struct arasan_sdhci_priv { u8 deviceid; u8 bank; u8 no_1p8; - bool pwrseq; }; #if defined(CONFIG_ARCH_ZYNQMP) -- cgit v1.2.3 From 10598580612cbaee2298bddd77e9a51df5a2943d Mon Sep 17 00:00:00 2001 From: Stefan Theil Date: Mon, 17 Dec 2018 09:12:30 +0100 Subject: zynq-gem: Use appropriate cache flush/invalidate for RX and TX The cache was only flushed before *transmitting* packets, but not when receiving them, leading to an issue where new packets were handed to the receive handler with old contents in cache. This only happens when a lot of packets are received without sending packages every now and then. Also flushing the receive buffers in the transmit function makes no sense and can be removed. Signed-off-by: Stefan Theil Reviewed-by: Bin Meng Signed-off-by: Michal Simek --- drivers/net/zynq_gem.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 9bd79b198a2..3bd0093b7ab 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -570,11 +570,6 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, int len) addr &= ~(ARCH_DMA_MINALIGN - 1); size = roundup(len, ARCH_DMA_MINALIGN); flush_dcache_range(addr, addr + size); - - addr = (ulong)priv->rxbuffers; - addr &= ~(ARCH_DMA_MINALIGN - 1); - size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN); - flush_dcache_range(addr, addr + size); barrier(); /* Start transmit */ @@ -621,6 +616,9 @@ static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp) *packetp = (uchar *)(uintptr_t)addr; + invalidate_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN, ARCH_DMA_MINALIGN)); + barrier(); + return frame_len; } @@ -706,6 +704,9 @@ static int zynq_gem_probe(struct udevice *dev) return -ENOMEM; memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN); + u32 addr = (ulong)priv->rxbuffers; + flush_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, ARCH_DMA_MINALIGN)); + barrier(); /* Align bd_space to MMU_SECTION_SHIFT */ bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE); -- cgit v1.2.3 From c256d3f7c591d6dbde0dedd9dfac696bd9c8376e Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 27 Nov 2018 11:49:10 +0530 Subject: net: phy: Move fixed link code to separate routine This patch moves fixed-link functionality code to a separate routine inorder to make it more modular and cleaner. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek Acked-by: Joe Hershberger --- drivers/net/phy/phy.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index cda4caa8034..236913a1544 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -876,18 +876,18 @@ void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) debug("%s connected to %s\n", dev->name, phydev->drv->name); } +#ifdef CONFIG_PHY_FIXED #ifdef CONFIG_DM_ETH -struct phy_device *phy_connect(struct mii_dev *bus, int addr, - struct udevice *dev, - phy_interface_t interface) +static struct phy_device *phy_connect_fixed(struct mii_dev *bus, + struct udevice *dev, + phy_interface_t interface) #else -struct phy_device *phy_connect(struct mii_dev *bus, int addr, - struct eth_device *dev, - phy_interface_t interface) +static struct phy_device *phy_connect_fixed(struct mii_dev *bus, + struct eth_device *dev, + phy_interface_t interface) #endif { struct phy_device *phydev = NULL; -#ifdef CONFIG_PHY_FIXED int sn; const char *name; @@ -901,7 +901,27 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, } sn = fdt_next_subnode(gd->fdt_blob, sn); } + + return phydev; +} #endif + +#ifdef CONFIG_DM_ETH +struct phy_device *phy_connect(struct mii_dev *bus, int addr, + struct udevice *dev, + phy_interface_t interface) +#else +struct phy_device *phy_connect(struct mii_dev *bus, int addr, + struct eth_device *dev, + phy_interface_t interface) +#endif +{ + struct phy_device *phydev = NULL; + +#ifdef CONFIG_PHY_FIXED + phydev = phy_connect_fixed(bus, dev, interface); +#endif + if (!phydev) phydev = phy_find_by_mask(bus, 1 << addr, interface); -- cgit v1.2.3 From 8df324a20b45f3a15a166797a2d5a5d447337891 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Fri, 11 Jan 2019 17:09:45 +0100 Subject: fpga: zynqmp: show an error message when FPGA programming fails When FPGA programming fails, it does so silently, unless debugging code is enabled. This makes it hard to detect problems in production environments. Print the error message unconditionally so the error doesn't go unnoticed. Signed-off-by: Luca Ceresoli Signed-off-by: Michal Simek --- drivers/fpga/zynqmppl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index c095d5ecaa8..22bfdd8dce6 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -233,7 +233,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, (u32)bsize, 0, ret_payload); if (ret) - debug("PL FPGA LOAD fail\n"); + puts("PL FPGA LOAD fail\n"); return ret; } -- cgit v1.2.3 From 84de0f918844257013cb1f851bed3a10fc9a545d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 18 Jan 2019 10:43:39 +0100 Subject: i2c: cdns: Convert to livetree function Update cadence i2c driver to support livetree Similar changes were done by: "net: zynq_gem: convert to use livetree" (sha1: 26026e695afa794ac018a09e79a48120d322b60d) Signed-off-by: Michal Simek --- drivers/i2c/i2c-cdns.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index f2c4b2073c4..4330d28c2b0 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -419,7 +419,7 @@ static int cdns_i2c_ofdata_to_platdata(struct udevice *dev) struct clk clk; int ret; - i2c_bus->regs = (struct cdns_i2c_regs *)devfdt_get_addr(dev); + i2c_bus->regs = (struct cdns_i2c_regs *)dev_read_addr(dev); if (!i2c_bus->regs) return -ENOMEM; -- cgit v1.2.3