From 9def12cae33d2d3ea2dd56b197fd3dfb3ad60bf4 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 27 Nov 2008 14:05:15 +0100 Subject: MTD: Fix problem based on non-working relocation (list head mtd_partitions) Don't use LIST_HEAD() but initialize the struct via INIT_LIST_HEAD() upon first call of add_mtd_partitions(). Otherwise this won't work on platforms where the relocation is broken (like MIPS or PPC). Signed-off-by: Stefan Roese --- drivers/mtd/mtdpart.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index 9a3bf6f39d2..f010f5e3ac5 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -20,7 +20,7 @@ #include /* Our partition linked list */ -static LIST_HEAD(mtd_partitions); +struct list_head mtd_partitions; /* Our partition node structure */ struct mtd_part { @@ -349,6 +349,14 @@ int add_mtd_partitions(struct mtd_info *master, u_int32_t cur_offset = 0; int i; + /* + * Need to init the list here, since LIST_INIT() does not + * work on platforms where relocation has problems (like MIPS + * & PPC). + */ + if (mtd_partitions.next == NULL) + INIT_LIST_HEAD(&mtd_partitions); + printk (KERN_NOTICE "Creating %d MTD partitions on \"%s\":\n", nbparts, master->name); for (i = 0; i < nbparts; i++) { -- cgit v1.3.1 From 2ee951ba2ac9874d2a93d52e7a187d3184be937e Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 27 Nov 2008 14:07:09 +0100 Subject: UBI: Enable re-initializing of the "ubi part" command With this patch now, the user can call "ubi part" multiple times to re-connect the UBI device to another MTD partition. Signed-off-by: Stefan Roese --- common/cmd_ubi.c | 11 +++++++++++ drivers/mtd/ubi/build.c | 1 + include/ubi_uboot.h | 1 + 3 files changed, 13 insertions(+) (limited to 'drivers') diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c index 84467658783..495d71ec0a1 100644 --- a/common/cmd_ubi.c +++ b/common/cmd_ubi.c @@ -31,6 +31,7 @@ /* Private own data */ static struct ubi_device *ubi; static char buffer[80]; +static int ubi_initialized; struct selected_dev { char dev_name[32]; /* NAND/OneNAND etc */ @@ -428,6 +429,8 @@ static int ubi_dev_scan(struct mtd_info *info, char *ubidev) return err; } + ubi_initialized = 1; + return 0; } @@ -463,6 +466,14 @@ static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* todo: get dev number for NAND... */ ubi_dev.nr = 0; + /* + * Call ubi_exit() before re-initializing the UBI subsystem + */ + if (ubi_initialized) { + ubi_exit(); + del_mtd_partitions(ubi_dev.mtd_info); + } + /* * Check for nand|onenand selection */ diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index 17cabb2ae99..bdf75c98a16 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -1059,6 +1059,7 @@ void __exit ubi_exit(void) misc_deregister(&ubi_ctrl_cdev); class_remove_file(ubi_class, &ubi_version); class_destroy(ubi_class); + mtd_devs = 0; } module_exit(ubi_exit); diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 295f2c0ffc8..095dfc1b206 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -211,6 +211,7 @@ static inline long IS_ERR(const void *ptr) /* functions */ extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp); extern int ubi_init(void); +extern void ubi_exit(void); extern struct ubi_device *ubi_devices[]; -- cgit v1.3.1 From 817329351639a8895cd9b87b33aeff043f3d5a44 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 10 Dec 2008 10:28:33 +0100 Subject: UBI: Return -ENOMEM upon failing malloc Return with correct error code (-ENOMEM) from ubi_attach_mtd_dev() upon failing malloc(). Signed-off-by: Stefan Roese --- drivers/mtd/ubi/build.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index bdf75c98a16..f4b01a9ded2 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -784,19 +784,20 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num, int vid_hdr_offset) if (err) goto out_free; + err = -ENOMEM; ubi->peb_buf1 = vmalloc(ubi->peb_size); if (!ubi->peb_buf1) goto out_free; ubi->peb_buf2 = vmalloc(ubi->peb_size); if (!ubi->peb_buf2) - goto out_free; + goto out_free; #ifdef CONFIG_MTD_UBI_DEBUG mutex_init(&ubi->dbg_buf_mutex); ubi->dbg_peb_buf = vmalloc(ubi->peb_size); if (!ubi->dbg_peb_buf) - goto out_free; + goto out_free; #endif err = attach_by_scanning(ubi); -- cgit v1.3.1 From 15e2697c9f7fb2ba672a1a70f07cd6d9d4e92b51 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 17 Nov 2008 16:53:09 +0900 Subject: sh: Update SuperH serial driver The address of SCFSR register is wrong at SH7720/SH7721. This patch fix this. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- drivers/serial/serial_sh.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index f30532b5aba..1d76a194a5f 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -94,7 +94,7 @@ # define LSR_ORER 1 # define FIFOLEVEL_MASK 0x1F #elif defined(CONFIG_CPU_SH7720) -# define SCLSR (vu_short *)(SCIF_BASE + 0x24) +# define SCLSR SCFSR # define LSR_ORER 0x0200 # define FIFOLEVEL_MASK 0x1F #elif defined(CONFIG_CPU_SH7710) || \ -- cgit v1.3.1 From a319f1496210117b73198e3d889ffffaf6825d00 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Fri, 5 Dec 2008 07:27:37 +0100 Subject: sh: r2dplus fix register access Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/r2dplus/lowlevel_init.S | 2 +- drivers/pci/pci_sh7751.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/board/renesas/r2dplus/lowlevel_init.S b/board/renesas/r2dplus/lowlevel_init.S index 87e30c5cf7a..28d2b3769a2 100644 --- a/board/renesas/r2dplus/lowlevel_init.S +++ b/board/renesas/r2dplus/lowlevel_init.S @@ -21,7 +21,7 @@ lowlevel_init: mov.l MMUCR_A,r1 mov.l MMUCR_D,r0 - mov.w r0,@r1 + mov.l r0,@r1 mov.l BCR1_A,r1 mov.l BCR1_D,r0 diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c index e3a0ea0047b..df6d76f7f17 100644 --- a/drivers/pci/pci_sh7751.c +++ b/drivers/pci/pci_sh7751.c @@ -187,8 +187,8 @@ int pci_sh7751_init(struct pci_controller *hose) /* Copy BSC registers into PCI BSC */ p4_out(inl(SH7751_BCR1), SH7751_PCIBCR1); - p4_out(inl(SH7751_BCR2), SH7751_PCIBCR2); - p4_out(inl(SH7751_BCR3), SH7751_PCIBCR3); + p4_out(inw(SH7751_BCR2), SH7751_PCIBCR2); + p4_out(inw(SH7751_BCR3), SH7751_PCIBCR3); p4_out(inl(SH7751_WCR1), SH7751_PCIWCR1); p4_out(inl(SH7751_WCR2), SH7751_PCIWCR2); p4_out(inl(SH7751_WCR3), SH7751_PCIWCR3); -- cgit v1.3.1 From ecf5f077c8e77454f532eaac3e3afb7cfc48c62d Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Wed, 3 Dec 2008 11:28:30 -0600 Subject: i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions All implementations of the functions i2c_reg_read() and i2c_reg_write() are identical. We can save space and simplify the code by converting these functions into inlines and putting them in i2c.h. Signed-off-by: Timur Tabi Acked-By: Jean-Christophe PLAGNIOL-VILLARD --- cpu/arm920t/at91rm9200/i2c.c | 14 ---------- cpu/arm926ejs/davinci/i2c.c | 17 ------------ cpu/blackfin/i2c.c | 16 ----------- cpu/mpc512x/i2c.c | 17 ------------ cpu/mpc5xxx/i2c.c | 16 ----------- cpu/mpc8220/i2c.c | 16 ----------- cpu/mpc824x/drivers/i2c/i2c.c | 14 ---------- cpu/mpc8260/i2c.c | 16 ----------- cpu/mpc8xx/i2c.c | 33 ----------------------- cpu/ppc4xx/i2c.c | 20 -------------- cpu/pxa/i2c.c | 15 ----------- drivers/i2c/fsl_i2c.c | 16 ----------- drivers/i2c/soft_i2c.c | 19 ------------- include/i2c.h | 62 +++++++++++++++++++++++++++++++++++++++++-- 14 files changed, 60 insertions(+), 231 deletions(-) (limited to 'drivers') diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c index b68c5dd8263..9fd72d3977b 100644 --- a/cpu/arm920t/at91rm9200/i2c.c +++ b/cpu/arm920t/at91rm9200/i2c.c @@ -189,20 +189,6 @@ i2c_init(int speed, int slaveaddr) return; } -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - unsigned char buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return(buf); -} - -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - int i2c_set_bus_speed(unsigned int speed) { return -1; diff --git a/cpu/arm926ejs/davinci/i2c.c b/cpu/arm926ejs/davinci/i2c.c index d220a4c728e..3ba20ef1869 100644 --- a/cpu/arm926ejs/davinci/i2c.c +++ b/cpu/arm926ejs/davinci/i2c.c @@ -331,21 +331,4 @@ int i2c_write(u_int8_t chip, u_int32_t addr, int alen, u_int8_t *buf, int len) return(0); } - -u_int8_t i2c_reg_read(u_int8_t chip, u_int8_t reg) -{ - u_int8_t tmp; - - i2c_read(chip, reg, 1, &tmp, 1); - return(tmp); -} - - -void i2c_reg_write(u_int8_t chip, u_int8_t reg, u_int8_t val) -{ - u_int8_t tmp; - - i2c_write(chip, reg, 1, &tmp, 1); -} - #endif /* CONFIG_DRIVER_DAVINCI_I2C */ diff --git a/cpu/blackfin/i2c.c b/cpu/blackfin/i2c.c index 60f03d47a15..2a3e2238c36 100644 --- a/cpu/blackfin/i2c.c +++ b/cpu/blackfin/i2c.c @@ -425,20 +425,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) } -uchar i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - PRINTD("i2c_reg_read: chip=0x%02x, reg=0x%02x\n", chip, reg); - i2c_read(chip, reg, 0, &buf, 1); - return (buf); -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - PRINTD("i2c_reg_write: chip=0x%02x, reg=0x%02x, val=0x%02x\n", chip, - reg, val); - i2c_write(chip, reg, 0, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c index 77a6f0dc48f..4f6bc864048 100644 --- a/cpu/mpc512x/i2c.c +++ b/cpu/mpc512x/i2c.c @@ -382,23 +382,6 @@ Done: return ret; } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - i2c_read (chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write (uchar chip, uchar reg, uchar val) -{ - i2c_write (chip, reg, 1, &val, 1); - - return; -} - - int i2c_set_bus_num (unsigned int bus) { if (bus >= I2C_BUS_CNT) { diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c index 4d16bbe7741..7d76274ad33 100644 --- a/cpu/mpc5xxx/i2c.c +++ b/cpu/mpc5xxx/i2c.c @@ -380,20 +380,4 @@ Done: return ret; } -uchar i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - i2c_read(chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - i2c_write(chip, reg, 1, &val, 1); - - return; -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc8220/i2c.c b/cpu/mpc8220/i2c.c index d67936dc31c..76ecdf11e21 100644 --- a/cpu/mpc8220/i2c.c +++ b/cpu/mpc8220/i2c.c @@ -387,20 +387,4 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buf, int len) return ret; } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - i2c_read (chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write (uchar chip, uchar reg, uchar val) -{ - i2c_write (chip, reg, 1, &val, 1); - - return; -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc824x/drivers/i2c/i2c.c b/cpu/mpc824x/drivers/i2c/i2c.c index 854345e146e..637ae4c1b10 100644 --- a/cpu/mpc824x/drivers/i2c/i2c.c +++ b/cpu/mpc824x/drivers/i2c/i2c.c @@ -267,18 +267,4 @@ int i2c_probe (uchar chip) return i2c_read (chip, 0, 1, (uchar *) &tmp, 1); } -uchar i2c_reg_read (uchar i2c_addr, uchar reg) -{ - uchar buf[1]; - - i2c_read (i2c_addr, reg, 1, buf, 1); - - return (buf[0]); -} - -void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write (i2c_addr, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c index c12463994fd..35cf8f14346 100644 --- a/cpu/mpc8260/i2c.c +++ b/cpu/mpc8260/i2c.c @@ -753,22 +753,6 @@ i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -uchar -i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - i2c_read(chip, reg, 1, &buf, 1); - - return (buf); -} - -void -i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - i2c_write(chip, reg, 1, &val, 1); -} - #if defined(CONFIG_I2C_MULTI_BUS) /* * Functions for multiple I2C bus handling diff --git a/cpu/mpc8xx/i2c.c b/cpu/mpc8xx/i2c.c index 29c7c71bbc4..338cababe89 100644 --- a/cpu/mpc8xx/i2c.c +++ b/cpu/mpc8xx/i2c.c @@ -42,19 +42,6 @@ DECLARE_GLOBAL_DATA_PTR; /* define to enable debug messages */ #undef DEBUG_I2C -/*----------------------------------------------------------------------- - * Set default values - */ -#ifndef CONFIG_SYS_I2C_SPEED -#define CONFIG_SYS_I2C_SPEED 50000 -#endif - -#ifndef CONFIG_SYS_I2C_SLAVE -#define CONFIG_SYS_I2C_SLAVE 0xFE -#endif -/*----------------------------------------------------------------------- - */ - /* tx/rx timeout (we need the i2c early, so we don't use get_timer()) */ #define TOUT_LOOP 1000000 @@ -717,24 +704,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -uchar -i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return (buf); -} - -void -i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - i2c_write(i2c_addr, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c index 9073ee240bb..9d416ca5e8f 100644 --- a/cpu/ppc4xx/i2c.c +++ b/cpu/ppc4xx/i2c.c @@ -419,26 +419,6 @@ int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) return (i2c_transfer(0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); } -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return (buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - #if defined(CONFIG_I2C_MULTI_BUS) /* * Functions for multiple I2C bus handling diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c index 08042be1c11..6b72ba13a09 100644 --- a/cpu/pxa/i2c.c +++ b/cpu/pxa/i2c.c @@ -455,19 +455,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg)); - i2c_read(chip, reg, 1, &buf, 1); - return (buf); -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - PRINTD(("i2c_reg_write(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",chip,reg,val)); - i2c_write(chip, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 3b5c06ba65f..ce646fd7ed1 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -367,22 +367,6 @@ i2c_probe(uchar chip) return i2c_read(chip, 0, 0, NULL, 0); } -uchar -i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf[1]; - - i2c_read(i2c_addr, reg, 1, buf, 1); - - return buf[0]; -} - -void -i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - int i2c_set_bus_num(unsigned int bus) { #ifdef CONFIG_SYS_I2C2_OFFSET diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index d2a51426e99..f12dedf89a9 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -435,22 +435,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return(failures); } -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return(buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} diff --git a/include/i2c.h b/include/i2c.h index 8d6f867422c..fad2d571616 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -76,6 +76,20 @@ # define I2C_SOFT_DECLARATIONS # endif #endif + +#ifdef CONFIG_8xx +/* Set default values for the I2C bus speed and slave address on 8xx. In the + * future, we'll define these in all 8xx board config files. + */ +#ifndef CONFIG_SYS_I2C_SPEED +#define CONFIG_SYS_I2C_SPEED 50000 +#endif + +#ifndef CONFIG_SYS_I2C_SLAVE +#define CONFIG_SYS_I2C_SLAVE 0xFE +#endif +#endif + /* * Initialization, must be called once on start up, may be called * repeatedly to change the speed and slave addresses. @@ -132,8 +146,52 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); /* * Utility routines to read/write registers. */ -uchar i2c_reg_read (uchar chip, uchar reg); -void i2c_reg_write(uchar chip, uchar reg, uchar val); +static inline u8 i2c_reg_read(u8 addr, u8 reg) +{ + u8 buf; + +#ifdef CONFIG_8xx + /* MPC8xx needs this. Maybe one day we can get rid of it. */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + +#ifdef DEBUG + printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); +#endif + +#ifdef CONFIG_BLACKFIN + /* This ifdef will become unneccessary in a future version of the + * blackfin I2C driver. + */ + i2c_read(addr, reg, 0, &buf, 1); +#else + i2c_read(addr, reg, 1, &buf, 1); +#endif + + return buf; +} + +static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) +{ +#ifdef CONFIG_8xx + /* MPC8xx needs this. Maybe one day we can get rid of it. */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + +#ifdef DEBUG + printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", + __func__, addr, reg, val); +#endif + +#ifdef CONFIG_BLACKFIN + /* This ifdef will become unneccessary in a future version of the + * blackfin I2C driver. + */ + i2c_write(addr, reg, 0, &val, 1); +#else + i2c_write(addr, reg, 1, &val, 1); +#endif +} /* * Functions for setting the current I2C bus and its speed -- cgit v1.3.1 From 84bc72d90c505fec3ef4b693995407a0bd4064e5 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 11 Dec 2008 18:39:08 -0500 Subject: spi/stmicro: fix debug() display of cmd The stmicro_wait_ready() func tries to show the actual opcode that was sent to the device, but instead it displays the array pointer. Fix it to pull out the opcode from the start of the array. Signed-off-by: Mike Frysinger --- drivers/mtd/spi/stmicro.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c index b8b835a3ffe..86324e4e1da 100644 --- a/drivers/mtd/spi/stmicro.c +++ b/drivers/mtd/spi/stmicro.c @@ -137,7 +137,7 @@ static int stmicro_wait_ready(struct spi_flash *flash, unsigned long timeout) ret = spi_xfer(spi, 32, &cmd[0], NULL, SPI_XFER_BEGIN); if (ret) { - debug("SF: Failed to send command %02x: %d\n", cmd, ret); + debug("SF: Failed to send command %02x: %d\n", cmd[0], ret); return ret; } -- cgit v1.3.1 From 455ae7e87f67c44e6aea68865c83acadd3fcd36c Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 16 Dec 2008 01:02:17 +0100 Subject: Coding style cleanup, update CHANGELOG. Signed-off-by: Wolfgang Denk --- CHANGELOG | 2668 ++++++++++++++++++++++++++++++++++++++++ board/afeb9260/partition.c | 1 - common/cmd_ubi.c | 2 +- cpu/mcf52x2/cpu_init.c | 2 +- cpu/mpc86xx/start.S | 2 - cpu/ppc4xx/cpu.c | 1 - cpu/ppc4xx/start.S | 2 +- drivers/i2c/soft_i2c.c | 1 - drivers/mtd/ubi/crc32.c | 2 +- drivers/mtd/ubi/io.c | 2 +- drivers/mtd/ubi/vmt.c | 2 +- include/configs/PMC440.h | 2 +- include/configs/afeb9260.h | 1 - include/linux/crc32.h | 8 +- include/linux/mtd/partitions.h | 6 +- include/linux/mtd/ubi.h | 2 +- include/ubi_uboot.h | 2 +- 17 files changed, 2684 insertions(+), 22 deletions(-) (limited to 'drivers') diff --git a/CHANGELOG b/CHANGELOG index 59269788741..0c9c0479c83 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,2671 @@ +commit 84bc72d90c505fec3ef4b693995407a0bd4064e5 +Author: Mike Frysinger +Date: Thu Dec 11 18:39:08 2008 -0500 + + spi/stmicro: fix debug() display of cmd + + The stmicro_wait_ready() func tries to show the actual opcode that was sent + to the device, but instead it displays the array pointer. Fix it to pull + out the opcode from the start of the array. + + Signed-off-by: Mike Frysinger + +commit 5b3375ac8c36c29c87abb132fede0509eb21e5c9 +Author: Mike Frysinger +Date: Thu Dec 11 06:23:37 2008 -0500 + + env_sf: support embedded environments + + If both CONFIG_ENV_SECT_SIZE and CONFIG_ENV_SIZE are defined, and the sect + size is larger than the env size, then it means the env is embedded in a + block. So we have to save/restore the part of the sector which is not the + environment. Previously, saving the environment in SPI flash in this + setup would probably brick the board as the rest of the sector tends to + contain actual U-Boot data/code. + + Signed-off-by: Mike Frysinger + Acked-by: Haavard Skinnemoen + +commit ecf5f077c8e77454f532eaac3e3afb7cfc48c62d +Author: Timur Tabi +Date: Wed Dec 3 11:28:30 2008 -0600 + + i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions + + All implementations of the functions i2c_reg_read() and + i2c_reg_write() are identical. We can save space and simplify the + code by converting these functions into inlines and putting them in + i2c.h. + + Signed-off-by: Timur Tabi + Acked-By: Jean-Christophe PLAGNIOL-VILLARD + +commit e39cd81c44740d7355d277ed3d38536cbe1e003d +Author: Dave Liu +Date: Fri Dec 5 15:36:14 2008 +0800 + + lib_ppc: rework the flush_cache + + - It is possible to miss flush/invalidate the last + cache line, we fix it at here. + - add the volatile and memory clobber. + + They are pointed by Scott Wood. + + Signed-off-by: Dave Liu + +commit 63240ba88cd6a220057a0f28e5bf97f5b17ac84b +Author: Kumar Gala +Date: Sat Dec 13 17:20:28 2008 -0600 + + Introduce addr_map library + + Add a library that helps in translating between virtual and physical + addresses. This library can be useful as a simple means to implement + map_physmem() and virt_to_phys() for platforms that need functionality + beyond the simple 1:1 mapping. + + Signed-off-by: Kumar Gala + +commit 65e43a10631537dcb92c302d36301a12308216c3 +Author: Kumar Gala +Date: Sat Dec 13 17:20:27 2008 -0600 + + Introduce virt_to_phys() + + virt_to_phys() returns the physical address given a virtual. In most + cases this will be just the input value as the vast majority of + systems run in a 1:1 mode. + + However in systems that are not running this way it should report the + physical address or ~0 if no mapping exists for the given virtual + address. + + Signed-off-by: Kumar Gala + +commit 45845301af3de8675c1f7bbc815c6de35452605a +Author: Yuri Tikhonov +Date: Sun Dec 7 22:12:50 2008 +0100 + + POST Make: fix the sub-dir dependencies missing. + + Signed-off-by: Yuri Tikhonov + +commit 22525779cb51f1bbe4e96fea7b778de1935a5a69 +Author: Martin Michlmayr +Date: Wed Aug 6 14:44:05 2008 +0300 + + Fix a typo in fw_env.config + + Reported-by: Martin Michlmayr + Signed-off-by: Wolfgang Denk + +commit ba490b7761c62b549c222a9723e532dc801a3899 +Author: Peter Tyser +Date: Mon Dec 1 16:22:45 2008 -0600 + + Remove unused CONFIG_ADDR_STREAMING defines + + Signed-off-by: Peter Tyser + +commit d16da93430520d3e46c1ab52eedacf36ab7a2311 +Author: Peter Tyser +Date: Mon Nov 24 11:54:47 2008 -0600 + + cmd_mem: Remove unused variable + + Signed-off-by: Peter Tyser + +commit 3aed3aa2c128ce9fb39ca3f4e9385a7499e93dbf +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Dec 14 10:29:39 2008 +0100 + + Fix new found CFG_ + + Also fix some minor typos. + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Wolfgang Denk + +commit 0e0c862efe7279e9609db74d758cd1b84c6c7209 +Author: Sergei Poselenov +Date: Fri Sep 19 12:07:34 2008 +0200 + + Remove compiler warning: target CPU does not support interworking + + This warning is issued by modern ARM-EABI GCC on non-thumb targets. + + Signed-off-by: Vladimir Panfilov + Signed-off-by: Sergei Poselenov + +commit cd6734510a9ff0f41c4a73567d4080ea0033d2c1 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Mon Nov 24 13:33:51 2008 +0100 + + Fix FIT and FDT support to have CONFIG_OF_LIBFDT and CONFIG_FIT independent + + FDT support is used for both FIT style images and for architectures + that can pass a fdt blob to an OS (ppc, m68k, sparc). + + For other architectures and boards which do not pass a fdt blob to an + OS but want to use the new uImage format, we just need FIT support. + + Now we can have the 4 following configurations : + + 1) FIT only CONFIG_FIT + 2) fdt blob only CONFIG_OF_LIBFDT + 3) both CONFIG_OF_LIBFDT & CONFIG_FIT + 4) none none + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 19ef4f7a6ef3b725aa9fe4b4f5fb676a84160172 +Author: Matthias Fuchs +Date: Wed Dec 10 15:13:32 2008 +0100 + + ppc4xx: Disable EEPROM write access on PMC440 boards + + This patch disables EEPROM wrtie access by default on PMC440 board. + + Signed-off-by: Matthias Fuchs + +commit 5b67a1439a73ba6c34007d9ff60a2c6aa90265df +Author: Matthias Fuchs +Date: Wed Dec 10 15:12:56 2008 +0100 + + ppc4xx: Fix Ethernet PHY LED configuration on PMC440 boards + + Signed-off-by: Matthias Fuchs + +commit 71fa0714fe5134bc8718c38d5261d267e88582ba +Author: Stefan Roese +Date: Tue Nov 18 16:36:12 2008 +0100 + + MIPS: Flush data cache upon relocation + + This patch now adds a flush to the data cache upon relocation. The + current implementation is missing this. Only a comment states that it + should be done. So let's really do it now. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit 44174343688dba32571a34550dba08971c65fef1 +Author: Stefan Roese +Date: Tue Nov 18 16:36:22 2008 +0100 + + MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT + + This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This + enables support for boards where the lowlevel initialization is + already done when U-Boot runs (e.g. via OnChip ROM). + + This will be used in the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit db08ecaa6eb8176904b3bae103a85ee8f735dc40 +Author: Stefan Roese +Date: Wed Nov 12 13:18:02 2008 +0100 + + MIPS: Add board_early_init_f() to init_sequence + + This patch adds the board_early_init_f() call to the MIPS init + sequence. A weak dummy implementation is also added which can be + overridden by a board specific version. + + This will be used by the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit 9d23fc584c4b7b8bb9ecbee48920b1b04b08fa1b +Author: Stefan Roese +Date: Wed Nov 12 13:18:19 2008 +0100 + + MIPS: Add onenand_init() to board.c and move nand_init() + + This patch adds a call to onenand_init() for OneNAND support and moves + the nand_init() call to an earlier place, so that the environment can + be used from NAND and OneNAND. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit d8bbc51c7ba9b737a20984333d19fe28a3526431 +Author: Nobuhiro Iwamatsu +Date: Tue Dec 9 11:32:46 2008 +0900 + + sh: Update sh2/sh2a timer + + Renesas SH2/SH2A timer broken. + This patch fix timer function. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit a319f1496210117b73198e3d889ffffaf6825d00 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Dec 5 07:27:37 2008 +0100 + + sh: r2dplus fix register access + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 4d4a96055f6917335a89dbdf2e5556fa5ac329f6 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 2 07:40:03 2008 +0100 + + sh: r2dplus/lowlevel_init: coding style fix + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit c54b9a42d8f5ab5b2a039b3a2e6fde8b427745e5 +Author: Nobuhiro Iwamatsu +Date: Tue Nov 25 11:05:19 2008 +0900 + + sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT + + SH4 is different a value of CACHE_OC_NUM_ENTRIES and + CACHE_OC_WAY_SHIFT every CPU. + This patch corrects these values. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit e9d5f35497885b3c65d494d09a525d443dcccd3b +Author: Nobuhiro Iwamatsu +Date: Thu Nov 20 16:44:42 2008 +0900 + + sh: Update sh timer function + + Change to write/readX function and fix timer problem. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit b81786cff476c41e332eaeb679158f6527cd67d4 +Author: Nobuhiro Iwamatsu +Date: Tue Nov 4 11:58:58 2008 +0900 + + sh: Migo-R: Update BSC value + + A value of BSC CS4 was wrong, Fixed it. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 5783758fd260a02f44566ad8f29f899565cd0403 +Author: Nobuhiro Iwamatsu +Date: Mon Nov 17 16:52:09 2008 +0900 + + sh: Update ms7722se board config + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 15e2697c9f7fb2ba672a1a70f07cd6d9d4e92b51 +Author: Nobuhiro Iwamatsu +Date: Mon Nov 17 16:53:09 2008 +0900 + + sh: Update SuperH serial driver + + The address of SCFSR register is wrong at SH7720/SH7721. + This patch fix this. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 9a1d3557dcd47365c12eeab584b822e57d994352 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Nov 11 22:20:15 2008 +0100 + + sh: fix rsk7203 and MigoR out of tree build + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 1951f847f0a851853871b613ad7cf21a5242226c +Author: Matthias Fuchs +Date: Wed Dec 10 14:41:25 2008 +0100 + + ppc4xx: Update TEXT_BASE for CPCI405 boards + + This patch fixes building U-Boot for CPCI405 boards. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 8c92af7b2fbd60ae87379477f93c7ec9441b7452 +Author: Stefan Roese +Date: Tue Dec 9 20:08:01 2008 +0100 + + ppc4xx: Remove some features from ALPR to fit into 256k again + + Signed-off-by: Stefan Roese + +commit 3b089e4f889a2902449d55e081c886ae607cae89 +Author: Stefan Roese +Date: Wed Dec 10 10:32:59 2008 +0100 + + UBI: Set ubi_dev.type back to DEV_TYPE_NONE upon failing initialization + + With this patch we set the type back to NONE upon failing UBI partition + initialization. Otherwise further calls to the UBI subsystem would try + to really access the non-existing UBI partition. + + Thanks to Michael Lawnick for pointing this out. + + Signed-off-by: Stefan Roese + +commit 817329351639a8895cd9b87b33aeff043f3d5a44 +Author: Stefan Roese +Date: Wed Dec 10 10:28:33 2008 +0100 + + UBI: Return -ENOMEM upon failing malloc + + Return with correct error code (-ENOMEM) from ubi_attach_mtd_dev() upon + failing malloc(). + + Signed-off-by: Stefan Roese + +commit 2145188bea2df8f2b47a87ec3071b55027e8d0ae +Author: Ben Warren +Date: Tue Dec 9 23:34:15 2008 -0800 + + Fix compile error in building MBX860T. + + Signed-off-by: Ben Warren + +commit 8fab49ea911fe925392fa5afcc9bc7373a3d0cee +Author: Michal Simek +Date: Tue Nov 25 11:42:20 2008 +0100 + + microblaze: Remove XUPV2P board + + --- + + Microblaze platforms use generic settings and to have + many platforms is confusing that's why I decided to remove this + platform from U-BOOT. ml401 tree is sufficient for covering + all Microblaze platforms. + + This change will go through microblaze custodian tree. + +commit 99ba6f353582720defff6e6e6761dc455a207d31 +Author: Michal Simek +Date: Mon Nov 24 18:25:41 2008 +0100 + + microblaze: Remove CONFIG_LIBFDT due to error in common files + +commit e7d591e823a991513833af7030468409e25a3b13 +Author: Michal Simek +Date: Mon Nov 24 11:43:00 2008 +0100 + + microblaze: Fix ml401 uart16550 setting + + Signed-off-by: Michal Simek + +commit c85ff0553a8cfbcca51c15b947e1ed55d3810a39 +Author: Michal Simek +Date: Mon Nov 24 11:38:22 2008 +0100 + + microblaze: Set up relocation is done + +commit bcb6dd9187d4b23c748704767bd12d20c829e996 +Author: Mike Frysinger +Date: Tue Dec 9 23:20:31 2008 -0500 + + tools/netconsole: new script for working with netconsole over UDP + + While the doc/README.NetConsole does have a snippet for people to + create their own netcat script, it's a lot easier to make a simple + dedicated script and tell people to use it. + + Also spruce it up a bit to make it user friendly. + + Signed-off-by: Mike Frysinger + +commit 8c5170a7d088601d5f30d85093388dab1f1e8ec0 +Author: Sonic Zhang +Date: Tue Dec 9 23:20:18 2008 -0500 + + fs/fat: handle FAT on SATA + + The FAT file system driver should also handle FAT on SATA devices. + + Signed-off-by: Sonic Zhang + Signed-off-by: Mike Frysinger + +commit 97a24a78ee6f34b89b821cb70eda1cf34aa11d97 +Author: Jerry Van Baren +Date: Mon Nov 24 08:15:02 2008 -0500 + + libfdt: Fix redefined uintptr_t warning for USE_HOSTCC + + Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the + following warnings from FDT: + + include/libfdt_env.h:50: warning: redefinition of 'uintptr_t' + /usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here + + Fix: Protect the definition of uintptr_t when compiling on the host + system. + + Signed-off-by: Gerald Van Baren + +commit 1fc2b165c51d6f40c8d505f1b3eaefdb6599b17b +Author: Graeme Russ +Date: Sat Nov 22 08:43:29 2008 +1100 + + Moved sc520 PCI definitions to stand-alone file + + Signed Off By: Graeme Russ + +commit 1f5070c0c18fa5684bfce09c8abdf10c04ed48fa +Author: Graeme Russ +Date: Sat Nov 22 08:43:21 2008 +1100 + + Fixed path to sc520 SSI include file + + Signed Off By: Graeme Russ + +commit d4f70da544c33db3e4fce6473dea4ecca4322545 +Author: Graeme Russ +Date: Fri Nov 21 06:28:05 2008 +1100 + + Fixed build error due to #define of _LINUX_STRING_H_ in 82559_eeprom.c + + Signed-off-by: Graeme Russ + +commit c034075a713b60e654c64e88e87da29440f31bb4 +Author: Stefan Roese +Date: Wed Nov 12 13:30:10 2008 +0100 + + serial: Add vcth UART driver + + This patch adds the UART driver for the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + +commit 142a80ffc3b537a9c45acd2444a42a77f147c602 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:36 2008 +0300 + + jffs2: cache data_crc results + + As we moved data_crc() invocation from jffs2_1pass_build_lists() to + jffs2_1pass_read_inode() data_crc is going to be calculated on each + inode access. This patch adds caching of data_crc() results. There + is no significant improvement in speed (because of flash access + caching added in previous patch I think, crc in RAM is really fast) + but this patch impacts memory usage -- every b_node structure uses + 12 bytes instead of 8. + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 9b7076229ec6a958bd835ab70745f7676297ce82 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:35 2008 +0300 + + jffs2: summary support + + This patch adds support for reading fs information from summary + node instead of scanning full eraseblock. + + Signed-off-by: Ilya Yanok + +commit 70741004dc28946cd82c7af6789c4ddb3fc94526 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:34 2008 +0300 + + jffs2: add buffer to cache flash accesses + + With this patch JFFS2 code allocates memory buffer of max_totlen size + (size of the largest node, calculated during scan time) and uses it to + store entire node. Speeds up loading. If malloc fails we use old ways + to do things. + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 8a36d31f72411144ac0412ee7e1880e801acd754 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:33 2008 +0300 + + jffs2: rewrite jffs2 scanning code based on Linux one + + Rewrites jffs2_1pass_build_lists() function in style of Linux's + jffs2_scan_medium() and jffs2_scan_eraseblock(). + This includes: + - Caching flash acceses + - Smart dealing with free space + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit e0b5532579eda8b4629f1b4f6e49c3cc60f52237 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:32 2008 +0300 + + jffs2: add sector_size field to part_info structure + + This patch adds sector_size field to part_info structure (used + by new JFFS2 code). + + Signed-off-by: Ilya Yanok + +commit f73846956778a7dfee83403ef9747aff77198848 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:31 2008 +0300 + + jffs2: fix searching for latest version in jffs2_1pass_list_inodes() + + We need to update i_version inside cycle to find really latest version + inside jffs2_1pass_list_inodes(). With that fixed we can use isize inside + dump_inode() instead of calling expensive jffs2_1pass_read_inode(). + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 1113cb764b3da256ef8a1f9539f4efbe221ff3c4 +Author: Wolfgang Denk +Date: Tue Dec 9 23:13:51 2008 +0100 + + evb64260: fix "cast to pointer from integer of different size" warnings + + Signed-off-by: Wolfgang Denk + +commit d2776827315c3d469b8cb4cec14d58877798daa2 +Author: Stefan Althoefer +Date: Sun Dec 7 19:39:11 2008 +0100 + + USB: descriptor handling + + Hi, + + I found a bug when working with the u-boot USB subsystem on IXP425 processor + (big endian Xscale aka ARMv5). + I recognized that the second usb_endpoint_descriptor of the attached memory + stick was corrupted. + + The reason for this are the packed structures below (either u-boot and + u-boot-usb): + + -------------- + /* Endpoint descriptor */ + struct usb_endpoint_descriptor { + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bEndpointAddress; + unsigned char bmAttributes; + unsigned short wMaxPacketSize; + unsigned char bInterval; + unsigned char bRefresh; + unsigned char bSynchAddress; + + } __attribute__ ((packed)); + /* Interface descriptor */ + struct usb_interface_descriptor { + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bInterfaceNumber; + unsigned char bAlternateSetting; + unsigned char bNumEndpoints; + unsigned char bInterfaceClass; + unsigned char bInterfaceSubClass; + unsigned char bInterfaceProtocol; + unsigned char iInterface; + + unsigned char no_of_ep; + unsigned char num_altsetting; + unsigned char act_altsetting; + struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; + } __attribute__ ((packed)); + ------------ + + As usb_endpoint_descriptor is only 7byte in length, the start of all + odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize + of these structures also not word aligned. + + ARMv5 Architecture however does not support non-aligned multibyte + data type (see A2.8 of ARM Architecture Reference Manual). + + Signed-off-by: Stefan Althoefer + Signed-off-by: Remy Böhmer + +commit 4c253fdb2a175ea3472c38a1455a16faa58e81f0 +Author: Kumar Gala +Date: Tue Dec 9 10:27:33 2008 -0600 + + drivers/fsl_pci_init: Fix compile warning + + fsl_pci_init.c: In function 'fsl_pci_setup_inbound_windows': + fsl_pci_init.c:122: warning: comparison is always true due to limited range of data type + + The check only makes sense if we are CONFIG_PHYS_64BIT + + Signed-off-by: Kumar Gala + +commit dedacc18a8c2b3951581eb721fa055a4e0ac4845 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Dec 7 09:45:35 2008 +0100 + + usbtty/omap: update to current API + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit ee2e9ba917a62cc2e3a484bb79c8da0e01cb93ed +Author: Anatolij Gustschin +Date: Tue Dec 9 17:52:05 2008 +0100 + + video: fix FADS823 and RRvision compiling issues + + Since commit 561858ee building for FADS823 and RRvision + doesn't work. Let's include version.h and timestamp.h + unconditionally to fix the problem. + + Signed-off-by: Anatolij Gustschin + +commit 2d2e05727fe4013f807ffa814dff0e75259a1db4 +Author: Stefan Roese +Date: Tue Dec 2 10:53:47 2008 +0100 + + UBI: Fix size parsing in "ubi create" + + Signed-off-by: Stefan Roese + +commit 2ee951ba2ac9874d2a93d52e7a187d3184be937e +Author: Stefan Roese +Date: Thu Nov 27 14:07:09 2008 +0100 + + UBI: Enable re-initializing of the "ubi part" command + + With this patch now, the user can call "ubi part" multiple times to + re-connect the UBI device to another MTD partition. + + Signed-off-by: Stefan Roese + +commit 9def12cae33d2d3ea2dd56b197fd3dfb3ad60bf4 +Author: Stefan Roese +Date: Thu Nov 27 14:05:15 2008 +0100 + + MTD: Fix problem based on non-working relocation (list head mtd_partitions) + + Don't use LIST_HEAD() but initialize the struct via INIT_LIST_HEAD() upon + first call of add_mtd_partitions(). Otherwise this won't work on platforms + where the relocation is broken (like MIPS or PPC). + + Signed-off-by: Stefan Roese + +commit 5e3ab68e9acf9edf304b8aa32ad7e005483a2c47 +Author: Trent Piepho +Date: Wed Nov 12 17:29:48 2008 -0800 + + Section name should be ".data", not "data" + + Signed-off-by: Trent Piepho + Signed-off-by: Wolfgang Denk + +commit 7fa6a2f3b66579dea8bc1a9177646e1141731b15 +Author: Wolfgang Denk +Date: Tue Dec 9 00:39:08 2008 +0100 + + MAKEALL: Automatically use parallel builds + + Add logic to the MAKEALL script to determine the number of CPU cores + on the system, and run a parallel build if there is more than one. + Usually this significantrly accelerates builds. + + Allow to manually adjust the number of parallel make jobs by using + the "BUILD_NCPUS" environment variable. + + Signed-off-by: Wolfgang Denk + +commit 268405fa7c44156c5192a70779920c70906af8d6 +Author: Wolfgang Denk +Date: Tue Dec 9 00:24:30 2008 +0100 + + vxworks.h: Fix build problem introduced by commits 29a4c24d/e9084b23 + + Signed-off-by: Wolfgang Denk + +commit 153176a9414120ca1736f3cc4951623d6e14e6af +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Nov 11 06:08:59 2008 +0100 + + avr32/bootm: remove unused variable 'ret' + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Acked-by: Haavard Skinnemoen + +commit 434c51a5e62f608a2a78ed5398ac43a1c77cc183 +Author: Peter Tyser +Date: Wed Nov 12 13:06:48 2008 -0600 + + Remove unneeded CONFIG_SHELL references + + Make should be using the bash shell by default which makes + CONFIG_SHELL unnecessary + + Signed-off-by: Peter Tyser + +commit cf7a7b99794bac936899819b95539be1dbd71708 +Author: Peter Tyser +Date: Wed Nov 12 12:33:20 2008 -0600 + + Use bash for default GNU Make shell application + + Some Make script commands rely on bash-specific features like brace + expansion, so default to bash for the SHELL variable with a fallback + to the standard sh shell + + Signed-off-by: Peter Tyser + +commit 4b530018764934ad5689196e9aa5714a6f4d1a6c +Author: Heiko Schocher +Date: Wed Nov 12 09:50:45 2008 +0100 + + jffs2: rename devices_init () in common/jffs2.c + + rename devices_init () in common/jffs2.c to + jffs2_devices_init (), because there is also a + devices_init () in common/devices.c. + + Signed-off-by: Heiko Schocher + +commit af5eb847a10f1037590001355d88bab3fe7be48b +Author: Daniel Hellstrom +Date: Mon Nov 10 12:46:20 2008 +0000 + + SPARC: Fixed compiler error introduced by commit c160a9544743 + + This patch fixes a build error for the SPARC platform. It was + introduced by commit c160a9544743e80e8889edb2275538e7764ce334. + + Signed-off-by: Daniel Hellstrom + +commit 4c60259899aa00f59db0d936b8807f9a26411c0f +Author: Gary Jennejohn +Date: Sun Nov 9 12:50:59 2008 +0100 + + mgsuvd add the board-specific part of the HDLC driver + + Signed-off-by: Gary Jennejohn + +commit 534a4359666af48bd69a3743d8a8c2bdb1d3ec70 +Author: Gary Jennejohn +Date: Sun Nov 9 12:45:03 2008 +0100 + + mgcoge add the board-specific part of the HDLC driver + + Signed-off-by: Gary Jennejohn + +commit 135f5534538bb8ea4f38a7030da12187d22ef7e0 +Author: Gary Jennejohn +Date: Sun Nov 9 12:36:15 2008 +0100 + + keymile add the common parts of the HDLC driver + + This implements the ICN protocol used across the backplane and is + needed by all the keymile boards. + + Signed-off-by: Gary Jennejohn + +commit 1cb82a9207a550557399eabc7fe47f21bbd9ddf8 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Nov 7 22:46:22 2008 +0100 + + drivers/bios_emulator: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit bcdf1d2cf6b24fb905fd7da80da4b3c65a7995b5 +Author: Richard Retanubun +Date: Thu Nov 6 14:01:51 2008 -0500 + + common/cmd_ide.c: Corrected endian order printing for compact flash serial number. + + Corrected endian order printing for compact flash serial number. + + Signed-off-by: Richard Retanubun + +commit 16a28ef219c27423a1ef502f19070c4d375079b8 +Author: Gary Jennejohn +Date: Thu Nov 6 15:04:23 2008 +0100 + + IOMUX: Add console multiplexing support. + + Modifications to support console multiplexing. This is controlled using + CONFIG_SYS_CONSOLE_MUX in the board configuration file. + + This allows a user to specify multiple console devices in the environment + with a command like this: setenv stdin serial,nc. As a result, the user can + enter text on both the serial and netconsole interfaces. + + All devices - stdin, stdout and stderr - can be set in this manner. + + 1) common/iomux.c and include/iomux.h contain the environment setting + implementation. + 2) doc/README.iomux contains a somewhat more detailed description. + 3) The implementation in (1) is called from common/cmd_nvedit.c to + handle setenv and from common/console.c to handle initialization of + input/output devices at boot time. + 4) common/console.c also contains the code needed to poll multiple console + devices for input and send output to all devices registered for output. + 5) include/common.h includes iomux.h and common/Makefile generates iomux.o + when CONFIG_SYS_CONSOLE_MUX is set. + + Signed-off-by: Gary Jennejohn + +commit 774ce72026f74ac9641bcbbc588b20f2e13f7ab8 +Author: Mike Frysinger +Date: Tue Nov 4 16:03:46 2008 -0500 + + strings: use puts() rather than printf() + + When running `strings` on really long strings, the stack tends to get + smashed due to printf(). Switch to puts() instead since we're only passing + the data through. + + Signed-off-by: Mike Frysinger + +commit b03150b52e3c491a86a3cc0945274f0e8f9872e7 +Author: Niklaus Giger +Date: Mon Nov 3 22:16:18 2008 +0100 + + Use new CONFIG_SYS_VXWORKS parameters for Netstal boards + + Signed-off-by: Niklaus Giger + +commit 29a4c24de99d8cb4ac32991c04cab87ed94ca1f9 +Author: Niklaus Giger +Date: Mon Nov 3 22:15:34 2008 +0100 + + cmd_elf.c: Cleanup bootvx and handle new CONFIG_SYS_VXWORKS parameters + + - fix size too small by one in sprintf + - changed old (pre 2004) device name ibmEmac to emac + - boot device may be overriden in board config + - servername may be defined in board config + - additional parameters may be defined in board config + - fixed some line wrappings + - replaced redundant MAX define by max + + Signed-off-by: Niklaus Giger + +commit e9084b23d16102f44ace24379a1c0c352497ef80 +Author: Niklaus Giger +Date: Mon Nov 3 22:14:36 2008 +0100 + + Add vxworks.h to handle CONFIG_SYS_VXWORKS parameters + + Signed-off-by: Niklaus Giger + +commit 0b2f4ecad473d785959c7976f20d2a00bd0ee01f +Author: Niklaus Giger +Date: Mon Nov 3 22:13:47 2008 +0100 + + README: Document CONFIG_SYS parameters for vxworks + + Signed-off-by: Niklaus Giger + +commit ace514837cac656e29c37a19569cb8ea83071126 +Author: Peter Tyser +Date: Fri Oct 31 11:12:38 2008 -0500 + + lcd: Let the board code show board-specific info cleanup + + remove unneeded version.h from lcd.c + + Signed-off-by: Peter Tyser + Signed-off-by: Wolfgang Denk + +commit 561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9 +Author: Peter Tyser +Date: Mon Nov 3 09:30:59 2008 -0600 + + Update U-Boot's build timestamp on every compile + + Use the GNU 'date' command to auto-generate a new U-Boot + timestamp on every compile. + + Signed-off-by: Peter Tyser + +commit 83ad179e2f0f625b88adb8ef5696709e46fb9077 +Author: Remy Bohmer +Date: Thu Dec 4 22:25:57 2008 +0100 + + Remove redundant armv4 flag from arm926ejs compile flags + + Currently the arm926ejs tree has the armv4 option set during compilation. + This flag does not belong here because a arm926 CPU is always a armv5 CPU. + + Signed-off-by: Remy Bohmer + +commit 89a7a87f084c657f8e32b513a77b50eca07e17ec +Author: Nicolas Ferre +Date: Sat Dec 6 13:11:14 2008 +0100 + + at91: Choose environment variables location within make config target + + This patch adds the possiblity to choose the media where the environment will + be located. This allow to choose this fundamental configuration without editing + config files. + + Documentation file added. + + Signed-off-by: Nicolas Ferre + Acked-by: Stelian Pop + Acked-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1450c4a6682378567030414a9f1198c39b7730c7 +Author: Anatolij Gustschin +Date: Mon Nov 3 15:30:34 2008 +0100 + + lwmon, tqm8xx: Fix build errors + + Commit 6b59e03e0237a40a2305ea385defdfd92000978b + lcd: Let the board code show board-specific info + + introduced some bugs which prevent U-Boot building + for lwmon board if CONFIG_LCD_INFO_BELOW_LOGO will + be defined in the board configuration. + + Also "LCD enabled" building for TQM823L doesn't work + since this commit. + + This patch fixes above-mentioned issues. + + Signed-off-by: Anatolij Gustschin + +commit bfa0af6b22ff25b0719a8910f9b6d1f975aa6fb0 +Author: Mike Frysinger +Date: Sun Nov 2 01:18:18 2008 -0400 + + ignore .gdb_history files + + When using gdb, history files will often get generated. So ignore them. + + Signed-off-by: Mike Frysinger + +commit c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 31 12:26:55 2008 +0100 + + FPGA: move fpga drivers to drivers/fpga + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 6a86bb6c25376f0358478219fa28d7c84dd01ed0 +Author: Peter Tyser +Date: Mon Dec 1 16:29:38 2008 -0600 + + net: Fix TftpStart() ip:filename bug + + The TftpStart() function modifies the 'BootFile' + string when 'BootFile' contains both an IP address + and filename (eg 1.2.3.4:/path/file). This causes + subsequent calls to TftpStart to incorrectly parse + the TFTP filename and server IP address to use. + For example: + + => tftp 0x100000 10.52.0.62:/home/ptyser/non_existant + Speed: 100, half duplex + Using eTSEC1 device + TFTP from server 10.52.0.62; our IP address is 10.52.253.79 + ^^^^^^^^^^ CORRECT + Filename '/home/ptyser/non_existant'. + ^^^^^^^^^^^^^^^^^^^^^^^^^ CORRECT + Load address: 0x100000 + Loading: * + TFTP error: 'File not found' (1) + Starting again + + eTSEC2: No link. + Speed: 100, half duplex + Using eTSEC1 device + TFTP from server 10.52.0.33; our IP address is 10.52.253.79 + ^^^^^^^^^^ WRONG + Filename '10.52.0.62'. + ^^^^^^^^^^ WRONG + Load address: 0x100000 + Loading: * + TFTP error: 'File not found' (1) + Starting again + + TftpStart() was modified to not modify the 'BootFile' string. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit d32c5be50bf0600bfdc54223ef341ee9c63db445 +Author: Peter Tyser +Date: Mon Dec 1 16:26:21 2008 -0600 + + net: Add additional IP fragmentation check + + Ignore IP packets which have the "more fragments" flag bit + set. This flag indicates the IP packet is fragmented and + must be ignored by U-Boot. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit e0c07b868cab405ab4b5335a0247899bfc5ea0b6 +Author: Peter Tyser +Date: Mon Dec 1 16:26:20 2008 -0600 + + net: Define IP flag field values + + These defines were pulled from the "Add simple + IP/UDP fragmentation support" patch from Frank + Haverkamp . + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit 23afaba65ec5206757e589ef334a8b38168c045f +Author: Anatolij Gustschin +Date: Tue Dec 2 10:31:04 2008 +0100 + + net: tsec: Fix Marvell 88E1121R phy init + + This patch tries to ensure that phy interrupt pin + won't be asserted after booting. We experienced + following issues with current 88E1121R phy init: + + Marvell 88E1121R phy can be hardware-configured + to share MDC/MDIO and interrupt pins for both ports + P0 and P1 (e.g. as configured on socrates board). + Port 0 interrupt pin will be shared by both ports + in such configuration. After booting Linux and + configuring eth0 interface, port 0 phy interrupts + are enabled. After rebooting without proper eth0 + interface shutdown port 0 phy interrupts remain + enabled so any change on port 0 (link status, etc.) + cause assertion of the interrupt. Now booting Linux + and configuring eth1 interface will cause permanent + phy interrupt storm as the registered phy 1 interrupt + handler doesn't acknowledge phy 0 interrupts. This + of course should be fixed in Linux driver too. + + Signed-off-by: Anatolij Gustschin + Acked-by: Andy Fleming + Signed-off-by: Ben Warren + +commit 2e4970d8109d690adcf615d9e3cac7b5b2e8eaed +Author: Peter Tyser +Date: Tue Dec 2 12:59:51 2008 -0600 + + net: Fix download command parsing + + When CONFIG_SYS_HUSH_PARSER is defined network download + commands with 1 argument in the format 'tftp "/path/file"' + do not work as expected. The hush command parser strips + the quotes from "/path/file" which causes the network + commands to interpret "/path/file" as an address + instead of the intended filename. + + The previous check for a leading quote in netboot_common() + was replaced with a check which ensures only valid + numbers are treated as addresses. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit 3c2c2f427905040c1513d0c51d637689cba48346 +Author: Remy Bohmer +Date: Thu Nov 27 22:30:27 2008 +0100 + + Remove non-ascii characters from fat code + + This code contains some non-ascii characters in comment lines and code. + Most editors do not display those characters properly and editing those + files results always in diffs at these places which are usually not required + to be changed at all. This is error prone. + + So, remove those weird characters and replace them by normal C-style + equivalents for which the proper defines were already in the header. + + Signed-off-by: Remy Bohmer + +commit dc889e865356497d3e495570118c2245ebce2631 +Author: Dave Liu +Date: Fri Nov 28 20:16:58 2008 +0800 + + 85xx: fix the wrong DDR settings for MPC8572DS + + The default DDR freq is 400MHz or 800M data rate, + the old settings is pure wrong for the default case. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 9df59533f77de2829b4b66e5b7620e04edaa391c +Author: Kumar Gala +Date: Mon Nov 24 10:29:26 2008 -0600 + + 85xx: init gd as early as possible + + Moved up the initialization of GD so C code like set_tlb() can use + gd->flags to determine if we've relocated or not in the future. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit aed461af81012a398a205e9be67ab37667491838 +Author: Kumar Gala +Date: Mon Nov 24 10:29:25 2008 -0600 + + 85xx: Fix relocation of CCSRBAR + + If the virtual address for CCSRBAR is the same after relocation but + the physical address is changing we'd end up having two TLB entries with + the same VA. Instead we new us the new CCSRBAR virt address + 4k as a + temp virt address to access the old CCSRBAR to relocate it. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit ea154a1781135d822eedee7567cc156089eae93c +Author: Kumar Gala +Date: Mon Nov 24 10:25:14 2008 -0600 + + FSL: Moved BR_PHYS_ADDR for localbus to common header + + The BR_PHYS_ADDR macro is useful on all machines that have local bus + which is pretty much all 83xx/85xx/86xx chips. + + Additionally most 85xx & 86xx will need it if they want to support + 36-bit physical addresses. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 9427ccde0355a2ebf47454e8e1be59f5b9864e08 +Author: Peter Tyser +Date: Mon Dec 1 13:47:12 2008 -0600 + + 85xx: Add PORDEVSR_PCI1 define + + Add define used to determine if PCI1 interface is in PCI or PCIX mode. + + Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 + + Signed-off-by: Peter Tyser + Signed-off-by: Andy Fleming + +commit 35db1c6d34b57ae15e99cf03c8e8f8a6148d74f3 +Author: Becky Bruce +Date: Fri Nov 21 19:24:22 2008 -0600 + + drivers/fsl_pci_init: Fix inbound window mapping bug + + The current code will cause the creation of a 4GB window + starting at 0 if we have more than 4GB of RAM installed, + which overlaps with PCI_MEM space and causes pci_bus_to_phys() + to return erroneous information. Limit the size to 4GB - 1; + which causes the code to create one 2GB and one 1GB window + instead. + + Signed-off-by: Becky Bruce + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 5a105a333dab6a23e92d763ce76d6f31d57f45df +Author: Jon Loeliger +Date: Thu Nov 20 15:36:48 2008 -0600 + + Removed unused CONFIG_L1_INIT_RAM symbol. + + Prevent further viral propogation of the unused + symbol CONFIG_L1_INIT_RAM by just removing it. + + Signed-off-by: Jon Loeliger + Acked-by: Andy Fleming + +commit 7008d26a40a76f90cae5824c812cfed449fb97b8 +Author: Ed Swarthout +Date: Wed Oct 29 09:21:44 2008 -0500 + + fsl ddr skip interleaving if not supported. + + Removed while(1) hang if memctl_intlv_ctl is set wrong. + Remove embedded tabs from strings. + + Signed-off-by: Ed Swarthout + Acked-by: Kumar Gala + Acked-by: Andy Fleming + +commit dd332e18d082de75eca3fc2c7c778f5d4571a096 +Author: Anatolij Gustschin +Date: Thu Nov 13 18:08:57 2008 +0100 + + 85xx: socrates: fix DDR SDRAM tlb entry configuration + + since commit be0bd8234b9777ecd63c4c686f72af070d886517 + tlb entry for socrates DDR SDRAM will be reconfigured + by setup_ddr_tlbs() from initdram() causing an + inconsistency with previously configured DDR SDRAM tlb + entry from tlb_table: + + socrates>l2cam 7 9 + IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS + 7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX + 8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX + 9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX + + This patch makes the presence of the DDR SDRAM tlb entry in + the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this + inconsistency. + + Signed-off-by: Anatolij Gustschin + Acked-by: Andy Fleming + +commit a2cd50ed6ef0ac6b127b3d6db756979a8336718d +Author: Peter Tyser +Date: Tue Nov 11 10:17:10 2008 -0600 + + 85xx: Add CPU 2 errata workaround to all 8548 boards + + All mpc8548-based boards should implement the suggested workaround + to CPU 2 errata. Without the workaround, its possible for the + 8548's core to hang while executing a msync or mbar 0 instruction + and a snoopable transaction from an I/O master tagged to make + quick forward progress is present. + + Signed-off-by: Peter Tyser + Acked-by: Andy Fleming + +commit e57f0fa1333cdf3ca36110aac2900712a5f82976 +Author: Dave Liu +Date: Tue Oct 28 17:53:45 2008 +0800 + + 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case + + we need TLB entry for DDR at !SPD case. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 +Author: Dave Liu +Date: Tue Oct 28 17:53:38 2008 +0800 + + 85xx: remove the unused ddr_enable_ecc in the board file + + The DDR controller of 8548/8544/8568/8572/8536 processors + have the ECC data init feature, and the new DDR code is + using the feature, and we don't need the way with DMA to + init memory any more. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 4a129a57d923f7c15aa1f567028a80a32d66a100 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Nov 30 19:36:53 2008 +0100 + + at91rm9200dk: Fix typo + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit ed3b18e05c9a8ffa5fb643da9bcec7452e5d5e01 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Nov 30 19:36:50 2008 +0100 + + AT91: remove non supported board AT91RM9200DF macro + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit bd876772ee04095e5dd943d97515a1f14bad4b1c +Author: Ilko Iliev +Date: Tue Dec 2 17:27:54 2008 +0100 + + mtd/dataflash.c: fix a problem with the last partition + + This patch fix the problem that only the [NB_DATAFLASH_AREA - 1] dataflash + partition can be defined to use the area to the end of dataflash size. + Now it is possible to have only one dataflash partition from 0 to the end + of of dataflash size. + + Signed-off-by: Ilko Iliev + +commit 03f797793b124dccaae145b977d15d6cb9e74504 +Author: Ilko Iliev +Date: Tue Dec 2 17:20:17 2008 +0100 + + fix some coding style violations. + + This patch fix some coding style violations. + + Signed-off-by: Ilko Iliev + +commit 5e46b1e54112f4b7fd5185665e571510132c12a7 +Author: Stefan Roese +Date: Thu Nov 27 14:11:37 2008 +0100 + + OneNAND: Add missing mtd info struct before calling onenand_erase() + + Without this patch "saveenv" crashes when MTD partitions are enabled (e.g. + for use in UBI) via CONFIG_MTD_PARTITIONS. + + Signed-off-by: Stefan Roese + Signed-off-by: Scott Wood + +commit 29382d4064fbaff5daacff4c3209370fa5713966 +Author: Becky Bruce +Date: Thu Nov 20 16:43:52 2008 -0600 + + mpc8641: Fix error in README + + I made some updates to the code that didn't make it into the + README - fix this + + Signed-off-by: Becky Bruce + +commit 801a194616d95e6fc426a176d9615ccbf9876c7f +Author: Jon Loeliger +Date: Thu Nov 20 12:01:02 2008 -0600 + + Removed unused CONFIG_L1_INIT_RAM symbol. + + Prevent further viral propogation of the unused + symbol CONFIG_L1_INIT_RAM by just removing it. + + Signed-off-by: Jon Loeliger + +commit f698738e46cb461e28c2d58228bb34a2fcf5a475 +Author: Jon Loeliger +Date: Thu Nov 20 14:02:56 2008 -0600 + + 86xx: Fix non-64-bit compilation problems. + + Introducing 64-bit (36-bit) support for the MPC8641HPCN + failed to accomodate the other two 86xx boards. + Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH} + CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L} + with nominal 32-bit values. + + Signed-off-by: Jon Loeliger + Acked-by: Becky Bruce + +commit bebfc6ef3ec994c8e18783269b1d8d41f8e38afd +Author: Michael Trimarchi +Date: Wed Nov 26 17:40:37 2008 +0100 + + Remove obsolete command (apply afte USB style patch, 80 chars strict) + + Remove USB obsolete commmand + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit de39f8c19d7c12017248c49d432dcb81db68f724 +Author: Michael Trimarchi +Date: Wed Nov 26 17:41:34 2008 +0100 + + USB style patch, 80 chars strict + + USB Code style patch + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit d10c5a87cb8affbb4d35a311370316d4383d598e +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Nov 7 22:46:21 2008 +0100 + + drivers/usb: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit 2077e348c2a84901022ad95311b47b70361e6daa +Author: Scott Wood +Date: Tue Nov 25 10:47:02 2008 -0600 + + NAND: Fix misplaced return statement in nand_{read,write}_skip_bad(). + + This caused the operation to be needlessly repeated if there were + no bad blocks and no errors. + + Signed-off-by: Valeriy Glushkov + Signed-off-by: Scott Wood + +commit 89295028e7d8f7a524f485328279d72fdb102385 +Author: Michal Simek +Date: Mon Nov 24 12:09:50 2008 +0100 + + ppc4xx: ml300 remove Xilinx BSP from ml300 folder + + This BSP should be outside u-boot source tree. + The second reason is that xilinx ppc405 was moved to generic platform. + + Signed-off-by: Michal Simek + Signed-off-by: Stefan Roese + +commit 24eea623d4974a169026a975ba12fb23d48154b1 +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:10 2008 +0100 + + ppc4xx: Remove unused features + + This patch disables some unused features from the PCI405 configuration + to keep U-Boot image size below 192k. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 0c2385c3bb51f5d3911fce1ec4720db86b534c2b +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:09 2008 +0100 + + ppc4xx: Use correct io accessors for PCI405 + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 348c849d86a6f0785752b9bc497a34658713d1d1 +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:08 2008 +0100 + + ppc4xx: Remove unused code from PCI405 code + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 58c696eed839af894e0265064669c402dc28b371 +Author: Wolfgang Denk +Date: Mon Nov 24 21:50:59 2008 +0100 + + AT91RM9200DK: fix broken boot from NOR flash + + Signed-off-by: Wolfgang Denk + +commit 8052352f20b33bef8f9872fc983eac73d4693c38 +Author: Jens Scharsig +Date: Tue Nov 18 10:48:46 2008 +0100 + + at91rm9200: fix broken boot from nor flash + + This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if + CONFIG_AT91RM9200 is defined and nor preloader is used. + + Signed-off-by: Jens Scharsig + +commit 25ea652e907516a283b38237e83712a918f125d7 +Author: Piotr Ziecik +Date: Mon Nov 17 15:58:00 2008 +0100 + + UBI: Add proof-of-concept CFI flash support + + With this patch UBI can be used on CFI flash chips. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit e6a7edbc1778d27431ac663b40a71dafa5d20578 +Author: Piotr Ziecik +Date: Mon Nov 17 15:57:59 2008 +0100 + + mtd: Remove a printf() from add_mtd_device(). + + Remove a printf() from add_mtd_device(), which produces spurious output. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 91809ed51d8327a8dbbf29aa98a091154c282171 +Author: Piotr Ziecik +Date: Mon Nov 17 15:57:58 2008 +0100 + + cfi-mtd: Add cfi-mtd driver. + + Add cfi-mtd driver, which exports CFI flash to MTD layer. + This allows CFI flash devices to be used from MTD layer. + + Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD + option. Initialization is done by calling cfi_mtd_init() from + flash_init(). + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 6ea808efdf9aa5d9067fbfac32acde8539129ed2 +Author: Piotr Ziecik +Date: Mon Nov 17 15:49:32 2008 +0100 + + cfi_flash: Add interface for flash verbosity control + + Add interface for flash verbosity control. It allows + to disable output from low-level flash API. It is useful + when calling these low-level functions from context other + than flash commands (for example the MTD/CFI interface + implmentation). + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit ebc9784ce6528385bb8d2558e783622d4bbf20f8 +Author: Piotr Ziecik +Date: Thu Nov 20 15:17:38 2008 +0100 + + cfi_flash: Export flash_sector_size() function. + + Export flash_sector_size() function from drivers/mtd/cfi_flash.c, + so that it can be used in the upcoming cfi-mtd driver. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 45aa5a7f4d5bcb79927ddfc896c1d7c4326e235d +Author: Stefan Roese +Date: Mon Nov 17 14:45:22 2008 +0100 + + cfi_flash: Make all flash access functions weak + + This patch defines all flash access functions as weak so that + they can be overridden by board specific versions. + + This will be used by the upcoming VCTH board support where the NOR + FLASH unfortunately can't be accessed memory-mapped. Special + accessor functions are needed here. + + To enable this weak functions you need to define + CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS in your board config header. + Otherwise the "old" default functions will be used resulting + in smaller code. + + Signed-off-by: Stefan Roese + Acked-by: Haavard Skinnemoen + +commit a5c4067017631d903e1afa6ad615f0ce19fea517 +Author: Stefan Roese +Date: Mon Nov 24 08:31:16 2008 +0100 + + UBI: Change parsing of size in commands to default to hex + + Currently the size parameters of the UBI commands (e.g. "ubi write") are + decoded as decimal instead of hex as default. This patch now interprets + all these values consistantly as hex, as all other standard U-Boot commands + do. + + Signed-off-by: Stefan Roese + +commit de01c76c3ccc4e6c5989228eed58e955a3a1a968 +Author: Stefan Roese +Date: Fri Nov 21 13:06:06 2008 +0100 + + ppc4xx: ML2 shouldn't include the 4xx EMAC driver + + Signed-off-by: Stefan Roese + +commit 1a6a00dcc5bdfc6e9b4b00f39c1f583a7f96fc7f +Author: Yuri Tikhonov +Date: Fri Nov 14 16:19:19 2008 +0300 + + ppc4xx: katmai: Change default config + + This patch enables support for EXT2, and increases the + CONFIG_SYS_BOOTMAPSZ size for the default configuration + of the katmai boards to use them as the RAID-reference + AMCC setups. + + EXT2 enabling allows one to boot kernels from the EXT2 + formatted Compact Flash cards. + + CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the + Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, + the memory area with DTB file (which is placed at the + end of the bootmap area) will turn out to be overlapped + with the BSS segment of the 256KB kernel, and zeroed + in early_init() of Linux. + + Actually, increasing of the bootmap size could be done + via setting of the bootm_size U-Boot variable, but it looks + like the current U-Boot implementation have some bootm_size- + related functionality lost. In many places through the U-Boot + code the CONFIG_SYS_BOOTMAPSZ definition is used directly + (instead of trying to read the corresponding value from the + environment). The same is truth for the boot_jump_linux() + function in lib_ppc/bootm.c, where U-Boot transfers control + to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) + value to the booting kernel. + + Signed-off-by: Yuri Tikhonov + Signed-off-by: Ilya Yanok + Signed-off-by: Stefan Roese + +commit ddf45cc758d394591fb9bcdcbe96530f733f2bce +Author: Dave Mitchell +Date: Thu Nov 20 14:09:50 2008 -0600 + + ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization + + Expanded OCM TLB to allow access to 64K OCM as well as 256K of + internal SRAM. + + Adjusted internal SRAM initialization to match updated user + manual recommendation. + + OCM & ISRAM are now mapped as follows: + physical virtual size + ISRAM 0x4_0000_0000 0xE300_0000 256k + OCM 0x4_0004_0000 0xE304_0000 64k + + A single TLB was used for this mapping. + + Signed-off-by: Dave Mitchell + Signed-off-by: Stefan Roese + +commit b14ca4b61a681f75f3125676e09d7ce6af66e927 +Author: Dave Mitchell +Date: Thu Nov 20 14:00:49 2008 -0600 + + ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs + + Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and + L2 cache DCRs from ppc440.h to this new header. + + Also converted these DCR defines from lowercase to uppercase and + modified referencing modules to use them. + + Signed-off-by: Dave Mitchell + Signed-off-by: Stefan Roese + +commit 711e2b2af820d21d9931d4cf8057d3894600fd54 +Author: Steven A. Falco +Date: Thu Nov 20 14:37:57 2008 -0500 + + ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h + + The definitions of bits in SDR_CFG are incorrect, and not used within + U-Boot. Therefore, they can be removed. + + The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, + and are unused, so they can be removed too. + + A definition for SDR0_DDRCFG is added. + + Signed-off-by: Steven A. Falco + Signed-off-by: Stefan Roese + +commit e23c7c95a96eb0f068efe5c532215a10a1512a95 +Author: Dirk Behme +Date: Mon Nov 10 20:15:25 2008 +0100 + + ARM: OMAP: Convert IO macros + + Convert IO macros to readx/writex. + + Signed-off-by: Dirk Behme + +commit 263b749e2e25473a48776d317bd2a7e2ddcdd212 +Author: Ilko Iliev +Date: Sun Nov 9 15:53:14 2008 +0100 + + lib_arm: do_bootm_linux() - correct a small mistake + + This patch corrects a small bug in the "if" condition: + the parameter "flag" is 0 and the "if" condition is always true. + The result is - the boom command doesn't start the kernel. + Affected targets: all arm based. + + Signed-off-by: Ilko Iliev + +commit 3e0cda071a67cb5709e3fa4faf6b31a731859acc +Author: Stelian Pop +Date: Sun Nov 9 00:14:46 2008 +0100 + + AT91: Enable PLLB for USB + + At least some (old ?) versions of the AT91Bootstrap do not set up the + PLLB correctly to 48 MHz in order to make USB host function correctly. + + This patch sets up the PLLB to the same values Linux uses, and makes USB + work ok on the following CPUs: + - AT91CAP9 + - AT91SAM9260 + - AT91SAM9263 + + This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all + the relevant AT91CAP9/AT91SAM9 atmel boards. + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit ad229a44e162af0f65e57e4e3dc133d5f0364ecb +Author: Stelian Pop +Date: Fri Nov 7 13:55:14 2008 +0100 + + AT91: Use AT91_CPU_CLOCK in displays + + Introduce AT91_CPU_CLOCK and use it for displaying the CPU + speed in the LCD driver. + + Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the + corresponding board clocks. + + Signed-off-by: Stelian Pop + +commit 25fb4eaaeab3f8866020818f4729d990dcc91cf0 +Author: Stefan Roese +Date: Thu Nov 20 11:46:20 2008 +0100 + + ppc4xx: Clear all potentially pending exceptions in MCSR + + This is needed on Canyonlands which still has an exception pending + while running relocate_code(). This leads to a failure after trap_init() + is moved to the top of board_init_r(). + + Signed-off-by: Stefan Roese + +commit facdad5f2602e899a01746916beddbf9e856b5ee +Author: Heiko Schocher +Date: Wed Nov 19 10:10:30 2008 +0100 + + powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines + + Signed-off-by: Heiko Schocher + Signed-off-by: Kim Phillips + +commit 2f2a5c3714d17f4ead18b713128b7226e0e822f4 +Author: Howard Gregory +Date: Tue Nov 4 14:55:33 2008 +0800 + + mpc83xx: Improve the performance of DDR memory + + modify the CAS timings. my understanding is that these + settings decrease various wait times in the DDR interface. + Because these wait times are in clock cycles, and the DDR + clock on the 8315 RDB runs slower than on some other 83xx + platforms, we can dial down these values without a problem, + thereby decreasing the latency of memory a little. + + Signed-off-by: Howard Gregory + Signed-off-by: Dave Liu + Signed-off-by: Kim Phillips + +commit 8000b086b33a5a81f3f390f37e178db7956dc08b +Author: Kyungmin Park +Date: Fri Oct 24 14:55:33 2008 +0200 + + ARM: Add Apollon UBI support + + To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI + macro. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 694a0b3f1c0accd0de94b89555155d69f8022824 +Author: Kyungmin Park +Date: Wed Nov 19 11:47:05 2008 +0100 + + UBI: Add UBI command support + + This patch adds these UBI commands: + + ubi part [nand|onenand] [part] - Show or set current partition + ubi info [l[ayout]] -Display volume and UBI layout information + ubi create[vol] volume [size] [type] - Create volume name with size + ubi write[vol] address volume size - Write volume from address with size + ubi read[vol] address volume [size] - Read volume to address with size + ubi remove[vol] volume - Remove volume + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 58be3a1056d88c6d05f3e914389282807e69923a +Author: Kyungmin Park +Date: Wed Nov 19 16:38:24 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 8/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 47ae6693f54f80455ae32c2e0d995e0e4bdc15b9 +Author: Kyungmin Park +Date: Wed Nov 19 16:36:36 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 7/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 7e6ee7ad27de5216db1baef76f38c3429c8f4a2a +Author: Kyungmin Park +Date: Wed Nov 19 16:32:36 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 6/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit c91a719daa331b5856109313371e4ece5ec06d96 +Author: Kyungmin Park +Date: Wed Nov 19 16:28:06 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 5/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit f412fefa079c6aa9a9763f6869bf787ea6bf6e1b +Author: Kyungmin Park +Date: Wed Nov 19 16:27:23 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 4/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 2d262c4853cb5b6ddce1a28a9641f2de3688d7ea +Author: Kyungmin Park +Date: Wed Nov 19 16:26:54 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 3/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 961df83361aff9a14f226214224eb8a06e05ba24 +Author: Kyungmin Park +Date: Wed Nov 19 16:25:44 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 2/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit f399d4a281713d5ef2d764f05d545fe61e3bd569 +Author: Kyungmin Park +Date: Wed Nov 19 16:23:06 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 1/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit e29c22f5abe6e0f4baa6251efed6074cdfc3db79 +Author: Kyungmin Park +Date: Wed Nov 19 16:20:36 2008 +0100 + + MTD: Add MTD paritioning infrastructure + + This MTD part infrastructure will be used by the upcoming + UBI support. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 9b827cf1720acda2473afa516956eab6f7cca9a1 +Author: Selvamuthukumar +Date: Thu Oct 16 22:54:03 2008 +0530 + + Align end of bss by 4 bytes + + Most of the bss initialization loop increments 4 bytes + at a time. And the loop end is checked for an 'equal' + condition. Make the bss end address aligned by 4, so + that the loop will end as expected. + + Signed-off-by: Selvamuthukumar + Signed-off-by: Wolfgang Denk + +commit 3f510db522d160179dff3ddcce9b18f6241c2c24 +Author: Becky Bruce +Date: Mon Nov 10 19:45:35 2008 -0600 + + mpc8641: fix address-cells default in old .dts detection + + address-cells defaults to 2, not 1; so in the unlikely + event that it isn't specified, this patch is required + for correct operation. + + Signed-off-by: Becky Bruce + +commit d025aa4b20a0618a2bada0132a9a0a4afb717f1a +Author: Becky Bruce +Date: Fri Oct 31 17:14:39 2008 -0500 + + lib_ppc: Move trap_init to occur earlier + + Doing trap_init immediately once we're running from RAM + means we're no longer dependent on the physical location of + the flash on non-BookE platforms. Before trap_init, those + platforms switch to real mode and go to 0xfff00100 on exception. + After the switch, they go to 0x00000100 This makes it easier to + move the flash location. + + Signed-off-by: Becky Bruce + +commit d52082b12c6e545705a19433a2f4142526536189 +Author: Becky Bruce +Date: Fri Nov 7 13:46:19 2008 -0600 + + mpc8641: Try to detect old .dts files + + Since we've changed the memory map of the board, be nice and + add some checking to try to catch out-of-date .dts files. We do + this by checking the CCSRBAR location in the .dts and comparing + it to the CCSRBAR location in u-boot. If they don't match, a + warning msg is printed. This isn't foolproof, but it's simple and + will catch most of the cases where an out-of-date .dts is present, + including all of the cases where a new u-boot is used with an old + standard MPC8641 .dts file as supplied with Linux. + + Signed-off-by: Becky Bruce + +commit 8db0400a27839f91c047dcb83f4a0f09e054a180 +Author: Becky Bruce +Date: Thu Nov 6 13:04:09 2008 -0600 + + toplevel Makefile: Add MPC8641HPCN_36BIT target + + This will enable CONFIG_PHYS_36BIT for MPC8641HPCN. + + Signed-off-by: Becky Bruce + +commit 3111d32c494e8251b90917447796a7206b757e1e +Author: Becky Bruce +Date: Thu Nov 6 17:37:35 2008 -0600 + + mpc8641: Support 36-bit physical addressing + + This patch creates a memory map with all the devices + in 36-bit physical space, in addition to the 32-bit map. + The CCSR relocation is moved (again, sorry) to + allow for the physical address to be 36 bits - this + requires translation to be enabled. With 36-bit physical + addressing enabled, we are no longer running with VA=PA + translations. This means we have to distinguish between + the two in the config file. The existing region name is + used to indicate the virtual address, and a _PHYS variety + is created to represent the physical address. + + Large physical addressing is not enabled by default. + Set CONFIG_PHYS_64BIT in the config file to turn this on. + + Signed-off-by: Becky Bruce + +commit c759a01a0022de9378a3a761f49786f87684c916 +Author: Becky Bruce +Date: Thu Nov 6 17:36:04 2008 -0600 + + mpc8641: Change 32-bit memory map + + The memory map on the 8641hpcn is modified to look more like + the 85xx boards; this is a step towards a more standardized + layout going forward. As part of this change, we now relocate + the flash. + + The regions for some of the mappings were far larger than they + needed to be. I have reduced the mappings to match the + actual sizes supported by the hardware. + + In addition I have removed the comments at the head + of the BAT blocks in the config file, rather than updating + them. These get horribly out of date, and it's a simple + matter to look at the defines to see what they are set to + since everything is right here in the same file. + + Documentation has been changed to reflect the new map, as this + change is user visible, and affects the OS which runs post-uboot. + + Signed-off-by: Becky Bruce + +commit bf9a8c34309ed9276258295db9e9212aabb2531a +Author: Becky Bruce +Date: Wed Nov 5 14:55:35 2008 -0600 + + mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLY + + We define CONFIG_MONITOR_BASE_EARLY to define the initial location + of the bootpage in flash. Use this to create an early mapping + definition for the FLASH, and change the early_bats code to use this. + + This change facilitates the relocation of the flash since the early + mappings are no longer tied to the final location of the flash. + + Signed-off-by: Becky Bruce + +commit c1e1cf69547b138173f87a7f81c42a5d8dbfde3d +Author: Becky Bruce +Date: Wed Nov 5 14:55:34 2008 -0600 + + mpc86xx: Use SRR0/1/rfi to enable address translation, not blr + + Using a mtmsr/blr means that you have to be executing at the + same virtual address once you enable translation. This is + unnecessarily restrictive, and is not really how this is + usually done. Change it to use the more common mtspr SRR0/SRR1 + and rfi method. + + Signed-off-by: Becky Bruce + +commit 6bf98b1362f0cb237620355ed3e6762fff82388d +Author: Becky Bruce +Date: Wed Nov 5 14:55:33 2008 -0600 + + mpc8641: make DIAG_ADDR == FLASH_BASE + + Currently, that's what it is, but it's hardcoded. + + Signed-off-by: Becky Bruce + +commit 170deacb1ddc39164bdb68f3963e0c0456a5369b +Author: Becky Bruce +Date: Wed Nov 5 14:55:32 2008 -0600 + + mpc8641: Drop imaginary second flash bank, map 8MB + + There's a lot of setup and foo for the second flash + bank. The problem is, this board doesn't actually have one. + Clean this up. Also, the flash is 8M in size. Get rid + of the confusing aliased overmapping, and just map 8M. + + Signed-off-by: Becky Bruce + +commit 0f2d66027bfc60dc7eea2f096af8891988c5abe4 +Author: Becky Bruce +Date: Wed Nov 5 14:55:31 2008 -0600 + + mpc8641: only define CONFIG_ENV_SIZE once + + It's currently defined twice inside in an if/else block, but + both halves set the same value. Move the define outside + the if. + + Signed-off-by: Becky Bruce + +commit 24bfb48c35fed6ad1f047e3e4a27df302482cd93 +Author: Becky Bruce +Date: Wed Nov 5 14:55:30 2008 -0600 + + mpc86xx: Move setup_bats into cpu_init_f + + In order to later allow for a physical relocation of the + flash, setup_bats, which sets up the final BAT mapping + for the board, needs to happen *after* init_laws(). + Otherwise, there will be no window programmed for the flash + at the new physical location at the point when we change + the mmu translation. + + Signed-off-by: Becky Bruce + +commit 05df3e5a638be8c5b0899eae1766bbe8e4b92c17 +Author: Becky Bruce +Date: Wed Nov 5 14:55:29 2008 -0600 + + mpc8641: Remove extra "0" from BR2 define + + Signed-off-by: Becky Bruce + +commit edf3fe7d39a1ee07353128af5221422ce9ccfad6 +Author: Richard Retanubun +Date: Thu Oct 23 09:08:18 2008 -0400 + + drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver. + + Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c. + This adds support for PHY-less MAC connections to the UEC. + + Signed-off-by: Richard Retanubun + Signed-off-by: Ben Warren + +commit 54bdcc9fb6670afde9c26dcf364f582879bf21d6 +Author: TsiChung Liew +Date: Thu Oct 23 16:27:24 2008 +0000 + + ColdFire: Add mii driver in drivers/net + + All CF platforms' mii.c are consolidated into one + + Signed-off-by: TsiChung Liew + Signed-off-by: Ben Warren + +commit 25a859066b3af1070eb69f12022113c0a91bd813 +Author: Ben Warren +Date: Mon Oct 27 23:53:17 2008 -0700 + + Moved initialization of PPC4xx EMAC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 4d03a4e20e58552cb96d61a0e8b56cdb6cc60126 +Author: Ben Warren +Date: Sun Nov 9 21:29:23 2008 -0800 + + Moved PPC4xx EMAC driver to drivers/net + + Also changed path in all linker scripts that reference this driver + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 96e21f86e8266ed40759e5495ee461265d7f6d28 +Author: Ben Warren +Date: Mon Oct 27 23:50:15 2008 -0700 + + Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMAC + + All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 9eb79bd8856bcab896ed5e1f1bca159807a124dd +Author: Ben Warren +Date: Thu Oct 23 22:02:49 2008 -0700 + + Moved initialization of MPC8XX SCC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit a9bec96d6359ac9f90a852962bf3040cad9e0256 +Author: Ben Warren +Date: Wed Oct 22 23:47:51 2008 -0700 + + Moved initialization of MPC8220 FEC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 0e8454e990385a58f708c2fc26d31ac041c7a6c5 +Author: Ben Warren +Date: Wed Oct 22 23:32:48 2008 -0700 + + Moved initialization of QE Ethernet controller to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 3456a148276d5494b53ee40242efb6462d163504 +Author: Ben Warren +Date: Wed Oct 22 23:20:29 2008 -0700 + + Moved initialization of FCC Ethernet controller to cpu_eth_init + + Affected boards: + Several MPC8xx boards + Several MPC8260/MPC8272 boards + Several MPC85xx boards + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 62e15b497f5c6334c059512678c8db7940ae4c61 +Author: Ben Warren +Date: Thu Oct 30 22:15:35 2008 -0700 + + Fix typo in cpu/mpc85xx/cpu.c + + CONFIG_MPC85xx_FEC -> CONFIG_MPC85XX_FEC + + Signed-off-by: Ben Warren + +commit 5dfb3ee3f54e2382a08d72906f0e79ecf944f6e3 +Author: Shinya Kuribayashi +Date: Sun Oct 19 12:08:50 2008 +0900 + + net: Move initialization of Au1x00 SoC ethernet MAC to cpu_eth_init + + This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init + as a part of ongoing eth_initialize cleanup work. The function ret value + is also fixed as it should be negative on fail. + + Signed-off-by: Shinya Kuribayashi + Signed-off-by: Ben Warren + +commit cc94074ecac1885d18ddb683eb934b3c0268aa5b +Author: Ben Warren +Date: Fri Sep 5 01:55:22 2008 -0400 + + Moved initialization of IXP4XX_NPE Ethernet controller to cpu_eth_init() + + Also, removed the driver initialization from net/eth.c + + Signed-off-by: Ben Warren + +commit f2a7806fc23e82d30c8548911369e0c530607354 +Author: Clive Stubbings +Date: Mon Oct 27 15:05:00 2008 +0000 + + xilinx_emaclite buffer overrun + + Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and + PKTSIZE_ALIGN bytes long. + + Acked-by: Michal Simek + + Signed-off-by: Ben Warren + +commit 0115b1953718a2969f6469d3d5da51ba11e12d42 +Author: richardretanubun +Date: Fri Sep 26 08:59:12 2008 -0400 + + NET: QE: UEC: Make uec_miiphy_read() and uec_miiphy_write() use the devname arg. + + The current uec_miiphy_read and uec_miiphy_write hardcode access devlist[0] + This patch makes these function use the devname argument that is passed in to + allow access to the phy registers of other devices in devlist[]. + + Signed-of-by: Richard Retanubun + + Signed-off-by: Ben Warren + +commit 44dcb7332033db8de2810f2fffcae3084f15c8d4 +Author: richardretanubun +Date: Mon Oct 6 15:31:43 2008 -0400 + + Adds two more ethernet interface to 83xx + + Fixed compiler warning "declared but unused" eth5_uec_info and eth6_uec_info. + Signed-off-by: Richard Retanubun + Signed-off-by: Ben Warren + +commit d8003fa03733901b73d6c4667b4d80fc8eb1ddd3 +Author: Stelian Pop +Date: Fri Nov 7 13:54:31 2008 +0100 + + AT91: Replace AT91_BASE_EMAC by the board specific values. + + AT91_BASE_EMAC is never used outside the board specific files, + so replace its usage by the board specific AT91xxx_BASE_EMAC. + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit c91e17affa175ce06afa89b04752301eb4a61666 +Author: Stelian Pop +Date: Fri Nov 7 12:09:21 2008 +0100 + + AT91: Replace (undefined) AT91_ID_US* by the board specific values. + + AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined. + Since they are never used outside the board specific files, they can + be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 / + AT91xxx_ID_US2. + + Bug spotted by Jesus Alvarez . + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 28962f5a2de81bc0eed1c0b08c6bfaa1cc134ea2 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Nov 1 10:47:59 2008 +0100 + + Makefile/at91sam9: move some at91sam9 to the correct subsection for arm926ejs + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1079432e04ccf71aa3684181186182cd63512f19 +Author: Sergey Lapin +Date: Fri Oct 31 12:28:43 2008 +0100 + + Custom AFEB9260 board support + + This patch provides support for AFEB9260 board, a product of + OpenSource hardware and software. Some commertial projects + are made with this design. A board is basically AT91SAM9260-EK + with some modifications and different peripherals and different + parts used. Main purpose of this project is to gain experience in + hardware design. + More info: http://groups.google.com/group/arm9fpga-evolution-board + (In Russian only, sorry). + Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb + + Signed-off-by: Sergey Lapin + +commit 26eecd24f97130e56e9c2c2af0e714e05bce6e00 +Author: Tomohiro Masubuchi +Date: Tue Oct 21 13:17:16 2008 +0900 + + Change to use "do_div" macro + + Signed-off-by: Tomohiro Masubuchi + +commit e352495318d8056a00faa21b633b3e4374bfbf52 +Author: Roman Mashak +Date: Wed Oct 22 16:00:26 2008 -0400 + + ARM926EJ-S: relocate OMAP specific 'cpuinfo.c' into OMAP directory + + OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory. + It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap + + Signed-off-by: Roman Mashak + +commit 248b2c367210c06dbd5fbdecf27e97fbe9d05fdb +Author: Roman Mashak +Date: Tue Oct 21 03:01:41 2008 -0700 + + ARM/Versatile port: Removed unused functions + + Removal of never used functions. + + Signed-off-by: Roman Mashak + +commit 1266df887781c779deaf6d05eea2ef90a470cb34 +Author: Becky Bruce +Date: Mon Nov 3 15:44:01 2008 -0600 + + powerpc: change 86xx SMP boot method + + We put the bootpg for the secondary cpus into memory and use + BPTR to get to it. This is a step towards converting to the + ePAPR boot methodology. Also, the code is written to + deal properly with more than 4GB of RAM. + + Signed-off-by: Becky Bruce + +commit b5431560682d8f318fbc49db87cfe13ab41d2ee4 +Author: Becky Bruce +Date: Fri Oct 31 17:13:49 2008 -0500 + + 8641HPCN: Config file cleanup + + There are several items in the config file that were hardcoded + but that should really be based on other config options, since + the regions are contiguous and depend on being so. This cleans + that up a bit. Also, add BR_PHYS_ADDR() macro to convert + addresses into the proper format for BR registers. + + Signed-off-by: Becky Bruce + +commit 4c77de3f144ca088c3867bd6240718c10f5a9d69 +Author: Becky Bruce +Date: Fri Oct 31 17:13:32 2008 -0500 + + 86xx: Make dram_size a phys_size_t + + It's currently a long and should be phys_size_t. + + Signed-off-by: Becky Bruce + +commit 104992fc541302a6bac74448e01e7fdad20abca0 +Author: Becky Bruce +Date: Sun Nov 2 18:19:32 2008 -0600 + + powerpc 86xx: Handle CCSR relocation earlier + + Currently, the CCSR gets relocated while translation is + enabled, meaning we need 2 BAT translations to get to both the + old location and the new location. Also, the DEFAULT + CCSR location has a dependency on the BAT that maps the + FLASH region. Moving the relocation removes this unnecessary + dependency. This makes it easier and more intutive to + modify the board's memory map. + + Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same + BAT for CCSR space. + + Signed-off-by: Becky Bruce + +commit af5d100e8d5cd49d69d52d20f1181eb06ddb4ddf +Author: Becky Bruce +Date: Fri Oct 31 17:14:14 2008 -0500 + + mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build + + You can't actually have both, and with some coming changes to + change the memory map for the board and support 36-bit physical, + we need the extra BAT that is being consumed by having both. + + I also make non-PCI configs build cleanly, for the sake of sanity. + + Signed-off-by: Becky Bruce + +commit 98693b85d42ff438375dc6d6dcadc70eb7b050bb +Author: Becky Bruce +Date: Fri Oct 31 17:14:00 2008 -0500 + + mpc8641: Stop supporting non-PCI_PNP configs + + We don't actually ever do this, remove the code so we + can stop maintaining it. + + Signed-off-by: Becky Bruce + +commit e4f69d1bd21a12049744989d2dd6b5199c9b8f23 +Author: TsiChung Liew +Date: Fri Oct 24 12:59:12 2008 +0000 + + ColdFire: Fix M5329EVB and M5373EVB nand issue + + Fix compilation issue caused by a few mismatches. + Provide proper nand chip select enable/disable in + nand_hwcontrol() rather than in board_nand_init() + just enable once. Remove redundant local nand driver + functions - nand_read_byte(), nand_write_byte() and + nand_dev_ready() to use common nand driver. + + Signed-off-by: TsiChung Liew + +commit 1b2708442224a551a0b865b52710306333888932 +Author: TsiChung Liew +Date: Wed Oct 22 11:55:30 2008 +0000 + + ColdFire: Fix compilation error + + The error was caused by the change for strmhz() in cpu.c. + A few of them were one extra close parenthesis. + + Signed-off-by: TsiChung Liew + +commit 536e7dac16769954915a484e682a2efb28699133 +Author: TsiChung Liew +Date: Wed Oct 22 11:38:21 2008 +0000 + + ColdFire: Add MCF5301x CPU and M53017EVB support + + Signed-off-by: TsiChung Liew + +commit a21d0c2cc9add8894d971ab791f4032f077db817 +Author: TsiChung Liew +Date: Tue Oct 21 15:37:02 2008 +0000 + + ColdFire: Add SBF support for M52277EVB + + Add serial boot support + + Signed-off-by: TsiChung Liew + +commit b202816c61042c183fe67d097a5893b0f2dafba0 +Author: TsiChung Liew +Date: Tue Oct 21 14:19:26 2008 +0000 + + ColdFire: Use CFI driver for M5272C3 + + Signed-off-by: TsiChung Liew + +commit f3962d3f574e5a1cffacd4e9bc48713060a2a314 +Author: TsiChung Liew +Date: Tue Oct 21 13:47:54 2008 +0000 + + ColdFire: Relocate FEC's GPIO and mii functions protocols + + Place FEC pin assignments in cpu_init.c from platform's + mii.c + + Signed-off-by: TsiChung Liew + +commit 6e80f5aa09f8d41bac50b38dc7488ecd22107802 +Author: TsiChung Liew +Date: Tue Oct 21 12:15:44 2008 +0000 + + ColdFire: Remove platforms mii.c file + + Will use mcfmii.c driver in drivers/net rather than + keep creating new mii.c for each future platform. + Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB, + M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB, + M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's + mii.c + + Signed-off-by: TsiChung Liew + +commit 012522fef3b382469125beb46a315ab4dee02fb0 +Author: TsiChung Liew +Date: Tue Oct 21 10:03:07 2008 +0000 + + ColdFire: Modules header files cleanup + + Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG, + MDHA, SKHA, INTC, and FlexBus structures and + definitions in immap_5xxx.h to more unify modules + header files. Append DSPI support for m547x_8x. + SSI cleanup. Remove USB Host structure from immap_539.h. + Apply changes to use FlexBus structures in mcf52x2's + cpu_init.c and platform configuration files. + + Signed-off-by: TsiChung Liew + +commit ac2331aee99ad36be0fcfed8c49922e3c61b576d +Author: TsiChung Liew +Date: Tue Oct 21 08:52:36 2008 +0000 + + ColdFire: Remove linker file + + Each different build for M54455EVB and M5235EVB will + create a u-boot.lds linker file. It is redundant to + keep the u-boot.lds + + Signed-off-by: TsiChung Liew + +commit 0829323073c505556ed5f5073f91adb504584d45 +Author: Peter Tyser +Date: Fri Oct 31 11:26:44 2008 -0500 + + ppc: Fix compile warnings when !CONFIG_OF_LIBFDT + + Signed-off-by: Peter Tyser + +commit a80b21d5127583171d6e9bc7f722947641898012 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 31 12:12:12 2008 +0100 + + common/Makefile: create others group for non core, environment and command files + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 60c68d9c1c6d18ce02c862a05718fd94f97c13d0 +Author: Wolfgang Denk +Date: Fri Oct 31 01:13:37 2008 +0100 + + TQM8260: use CFI flash driver instead of custom driver. + + Signed-off-by: Wolfgang Denk + +commit 20d04774f4ef3f6e38974636e0e36ae0f0b5501f +Author: Andy Fleming +Date: Thu Oct 30 17:35:30 2008 -0500 + + Consolidate MAX/MIN definitions + + There were several, now there is one (two if you count the lower-case + versions). + + Signed-off-by: Andy Fleming + +commit 298e476c66fd88d0bc4f0371118652d2b5de4e8a +Author: Heiko Schocher +Date: Thu Oct 30 09:23:09 2008 +0100 + + mgsuvd: remove unused defines in config file. + + Signed-off-by: Heiko Schocher + +commit 3cbd823116ea8b7c654e275a8c2fca87cd1f5dc5 +Author: Wolfgang Denk +Date: Sun Nov 2 16:14:22 2008 +0100 + + Coding Style cleanup, update CHANGELOG + + Signed-off-by: Wolfgang Denk + commit a47f957ab523019992fdef857af01bd71c58a4da Author: Alessandro Rubini Date: Fri Oct 31 22:33:21 2008 +0100 diff --git a/board/afeb9260/partition.c b/board/afeb9260/partition.c index 0b5dc5e06f6..be08f295f6f 100644 --- a/board/afeb9260/partition.c +++ b/board/afeb9260/partition.c @@ -34,4 +34,3 @@ dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, {0x00008400, 0x00041FFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"}, }; - diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c index 4c358924e44..5c31f7b49f0 100644 --- a/common/cmd_ubi.c +++ b/common/cmd_ubi.c @@ -601,7 +601,7 @@ static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) U_BOOT_CMD(ubi, 6, 1, do_ubi, "ubi - ubi commands\n", - "part [nand|nor|onenand] [part]" + "part [nand|nor|onenand] [part]" " - Show or set current partition\n" "ubi info [l[ayout]]" " - Display volume and ubi layout information\n" diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 18308c8a7ab..66f9164d562 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -131,7 +131,7 @@ void cpu_init_f(void) mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */ mbar2_writeByte(MCFSIM_SPURVEC, 0x00); - /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */ + /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */ /* FlexBus Chipselect */ init_fbcs(); diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 6645cb8825a..63cc8dbcda9 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -982,5 +982,3 @@ unlock_ram_in_cache: blr #endif #endif - - diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 1f0b56cb76a..d09c4c21538 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -706,4 +706,3 @@ int cpu_eth_init(bd_t *bis) #endif return 0; } - diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 4b5349eadd0..f2b8908b90b 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -727,7 +727,7 @@ _start: ori r2,r2,0xffff mfdcr r1,ISRAM1_DPC and r1,r1,r2 /* Disable parity check */ - mtdcr ISRAM1_DPC,r1 + mtdcr ISRAM1_DPC,r1 mfdcr r1,ISRAM1_PMEG and r1,r1,r2 /* Disable pwr mgmt */ mtdcr ISRAM1_PMEG,r1 diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index f12dedf89a9..a27de5a7ec7 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -434,4 +434,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) send_stop(); return(failures); } - diff --git a/drivers/mtd/ubi/crc32.c b/drivers/mtd/ubi/crc32.c index 5273ca3e051..a7e26b04560 100644 --- a/drivers/mtd/ubi/crc32.c +++ b/drivers/mtd/ubi/crc32.c @@ -97,7 +97,7 @@ u32 crc32_le(u32 crc, unsigned char const *p, size_t len) # else # define DO_CRC(x) crc = tab[ ((crc >> 24) ^ (x)) & 255] ^ (crc<<8) # endif - //printf("Crc32_le crc=%x\n",crc); + /* printf("Crc32_le crc=%x\n",crc); */ crc = __cpu_to_le32(crc); /* Align it */ if((((long)b)&3 && len)){ diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c index 2d44f232a53..8423894000b 100644 --- a/drivers/mtd/ubi/io.c +++ b/drivers/mtd/ubi/io.c @@ -186,7 +186,7 @@ retry: if (read != len && err == -EBADMSG) { ubi_assert(0); printk("%s[%d] not here\n", __func__, __LINE__); -// err = -EIO; +/* err = -EIO; */ } } else { ubi_assert(len == read); diff --git a/drivers/mtd/ubi/vmt.c b/drivers/mtd/ubi/vmt.c index a87a2f3673a..061da649e13 100644 --- a/drivers/mtd/ubi/vmt.c +++ b/drivers/mtd/ubi/vmt.c @@ -260,7 +260,7 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req) goto out_unlock; } - /* Calculate how many eraseblocks are requested */ + /* Calculate how many eraseblocks are requested */ vol->usable_leb_size = ubi->leb_size - ubi->leb_size % req->alignment; bytes = req->bytes; if (do_div(bytes, vol->usable_leb_size)) diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index d0e3cda6c18..f9f10021bc2 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -490,7 +490,7 @@ #endif /* Memory Bank 1 (RESET) initialization */ -#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200 +#define CONFIG_SYS_EBC_PB1AP 0x7f817200 /* 0x03017200 */ #define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000) /* Memory Bank 4 (FPGA / 32Bit) initialization */ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 90e553d74e3..d63a1a07fb1 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -167,4 +167,3 @@ #endif #endif - diff --git a/include/linux/crc32.h b/include/linux/crc32.h index e1331571e1c..ac4aed1c77a 100644 --- a/include/linux/crc32.h +++ b/include/linux/crc32.h @@ -6,10 +6,10 @@ #define _LINUX_CRC32_H #include -//#include +/* #include */ extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); -//extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); +/* extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); */ #define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length) @@ -21,7 +21,7 @@ extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); * is in bit nr 0], thus it must be reversed before use. Except for * nics that bit swap the result internally... */ -//#define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) -//#define ether_crc_le(length, data) crc32_le(~0, data, length) +/* #define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) */ +/* #define ether_crc_le(length, data) crc32_le(~0, data, length) */ #endif /* _LINUX_CRC32_H */ diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h index b41e5f564cb..10166757bc1 100644 --- a/include/linux/mtd/partitions.h +++ b/include/linux/mtd/partitions.h @@ -76,9 +76,9 @@ struct device; struct device_node; int __devinit of_mtd_parse_partitions(struct device *dev, - struct mtd_info *mtd, - struct device_node *node, - struct mtd_partition **pparts); + struct mtd_info *mtd, + struct device_node *node, + struct mtd_partition **pparts); #endif #endif diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h index a017891acf8..4b3e06ce5e1 100644 --- a/include/linux/mtd/ubi.h +++ b/include/linux/mtd/ubi.h @@ -21,7 +21,7 @@ #ifndef __LINUX_UBI_H__ #define __LINUX_UBI_H__ -//#include +/* #include */ #include #include diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 095dfc1b206..b4152192a2d 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -56,7 +56,7 @@ do { \ #define ubi_sysfs_close(...) do { } while (0) static inline int is_power_of_2(unsigned long n) { - return (n != 0 && ((n & (n - 1)) == 0)); + return (n != 0 && ((n & (n - 1)) == 0)); } /* FIXME */ -- cgit v1.3.1 From ff49ea8977b56916edd5b1766d9939010e30b181 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Tue, 16 Dec 2008 14:24:16 -0600 Subject: NAND: Mark the BBT as scanned prior to calling scan_bbt. Otherwise, recursion can occur if scan_bbt does not find a bad block table, and tries to write one, and the attempt to erase the BBT area causes a bad block check. Signed-off-by: Scott Wood --- drivers/mtd/nand/nand_base.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ba05b762ed2..94a65d4e72b 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -460,8 +460,8 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, struct nand_chip *chip = mtd->priv; if (!(chip->options & NAND_BBT_SCANNED)) { - chip->scan_bbt(mtd); chip->options |= NAND_BBT_SCANNED; + chip->scan_bbt(mtd); } if (!chip->bbt) -- cgit v1.3.1 From 7a8979591171676417ab36852d8811a8c46accd8 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 29 Oct 2008 12:39:26 -0500 Subject: pci/fsl_pci_init: Enable inbound PCI config cycles Add fsl_pci_config_unlock() function to enable a PCI/PCIe interface configured in agent/endpoint mode to respond to inbound PCI configuration cycles. Signed-off-by: Peter Tyser --- drivers/pci/fsl_pci_init.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'drivers') diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 1db42fd8d3a..db68f26009e 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -37,6 +37,11 @@ DECLARE_GLOBAL_DATA_PTR; #include #include +/* Freescale-specific PCI config registers */ +#define FSL_PCI_PBFR 0x44 +#define FSL_PCIE_CAP_ID 0x4c +#define FSL_PCIE_CFG_RDY 0x4b0 + void pciauto_prescan_setup_bridge(struct pci_controller *hose, pci_dev_t dev, int sub_bus); void pciauto_postscan_setup_bridge(struct pci_controller *hose, @@ -306,6 +311,30 @@ void fsl_pci_init(struct pci_controller *hose) } } +/* Enable inbound PCI config cycles for agent/endpoint interface */ +void fsl_pci_config_unlock(struct pci_controller *hose) +{ + pci_dev_t dev = PCI_BDF(hose->first_busno,0,0); + u8 agent; + u8 pcie_cap; + u16 pbfr; + + pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &agent); + if (!agent) + return; + + pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap); + if (pcie_cap != 0x0) { + /* PCIe - set CFG_READY bit of Configuration Ready Register */ + pci_hose_write_config_byte(hose, dev, FSL_PCIE_CFG_RDY, 0x1); + } else { + /* PCI - clear ACL bit of PBFR */ + pci_hose_read_config_word(hose, dev, FSL_PCI_PBFR, &pbfr); + pbfr &= ~0x20; + pci_hose_write_config_word(hose, dev, FSL_PCI_PBFR, pbfr); + } +} + #ifdef CONFIG_OF_BOARD_SETUP #include #include -- cgit v1.3.1 From e92739d34e2d6b6aca93b2598248210710897ce8 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 17 Dec 2008 16:36:21 -0600 Subject: Add support for PCA953x I2C gpio devices Initial support for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc). The CONFIG_PCA953X define enables support for the devices while the CONFIG_CMD_PCA953X define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO define enables an 'info' sub-command which provides summary information for the given pca953x device. Signed-off-by: Peter Tyser --- Makefile | 2 + README | 9 ++ drivers/gpio/Makefile | 47 ++++++++++ drivers/gpio/pca953x.c | 227 +++++++++++++++++++++++++++++++++++++++++++++++++ include/pca953x.h | 39 +++++++++ 5 files changed, 324 insertions(+) create mode 100644 drivers/gpio/Makefile create mode 100644 drivers/gpio/pca953x.c create mode 100644 include/pca953x.h (limited to 'drivers') diff --git a/Makefile b/Makefile index 4df48129b8c..0fc64902f1c 100644 --- a/Makefile +++ b/Makefile @@ -228,6 +228,7 @@ LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/block/libblock.a LIBS += drivers/dma/libdma.a LIBS += drivers/fpga/libfpga.a +LIBS += drivers/gpio/libgpio.a LIBS += drivers/hwmon/libhwmon.a LIBS += drivers/i2c/libi2c.a LIBS += drivers/input/libinput.a @@ -407,6 +408,7 @@ TAG_SUBDIRS += disk TAG_SUBDIRS += common TAG_SUBDIRS += drivers/bios_emulator TAG_SUBDIRS += drivers/block +TAG_SUBDIRS += drivers/gpio TAG_SUBDIRS += drivers/hwmon TAG_SUBDIRS += drivers/i2c TAG_SUBDIRS += drivers/input diff --git a/README b/README index 2a553c274c3..eb86ebaf110 100644 --- a/README +++ b/README @@ -621,6 +621,8 @@ The following options need to be configured: CONFIG_CMD_MII * MII utility commands CONFIG_CMD_NAND * NAND support CONFIG_CMD_NET bootp, tftpboot, rarpboot + CONFIG_CMD_PCA953X * PCA953x I2C gpio commands + CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command CONFIG_CMD_PCI * pciinfo CONFIG_CMD_PCMCIA * PCMCIA support CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network @@ -698,6 +700,13 @@ The following options need to be configured: Note that if the RTC uses I2C, then the I2C interface must also be configured. See I2C Support, below. +- GPIO Support: + CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO + CONFIG_PCA953X_INFO - enable pca953x info command + + Note that if the GPIO device uses I2C, then the I2C interface + must also be configured. See I2C Support, below. + - Timestamp Support: When CONFIG_TIMESTAMP is selected, the timestamp diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile new file mode 100644 index 00000000000..dd618ed71c7 --- /dev/null +++ b/drivers/gpio/Makefile @@ -0,0 +1,47 @@ +# +# Copyright 2000-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libgpio.a + +COBJS-$(CONFIG_PCA953X) += pca953x.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################## diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c new file mode 100644 index 00000000000..390d99ad3d6 --- /dev/null +++ b/drivers/gpio/pca953x.c @@ -0,0 +1,227 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Driver for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc) + * TODO: support additional devices with more than 8-bits GPIO + */ + +#include +#include +#include + +/* Default to an address that hopefully won't corrupt other i2c devices */ +#ifndef CONFIG_SYS_I2C_PCA953X_ADDR +#define CONFIG_SYS_I2C_PCA953X_ADDR (~0) +#endif + +enum { + PCA953X_CMD_INFO, + PCA953X_CMD_DEVICE, + PCA953X_CMD_OUTPUT, + PCA953X_CMD_INPUT, + PCA953X_CMD_INVERT, +}; + +/* + * Modify masked bits in register + */ +static int pca953x_reg_write(uint8_t chip, uint addr, uint mask, uint data) +{ + uint8_t val; + + if (i2c_read(chip, addr, 1, &val, 1)) + return -1; + + val &= ~mask; + val |= data; + + return i2c_write(chip, addr, 1, &val, 1); +} + +/* + * Set output value of IO pins in 'mask' to corresponding value in 'data' + * 0 = low, 1 = high + */ +int pca953x_set_val(uint8_t chip, uint mask, uint data) +{ + return pca953x_reg_write(chip, PCA953X_OUT, mask, data); +} + +/* + * Set read polarity of IO pins in 'mask' to corresponding value in 'data' + * 0 = read pin value, 1 = read inverted pin value + */ +int pca953x_set_pol(uint8_t chip, uint mask, uint data) +{ + return pca953x_reg_write(chip, PCA953X_POL, mask, data); +} + +/* + * Set direction of IO pins in 'mask' to corresponding value in 'data' + * 0 = output, 1 = input + */ +int pca953x_set_dir(uint8_t chip, uint mask, uint data) +{ + return pca953x_reg_write(chip, PCA953X_CONF, mask, data); +} + +/* + * Read current logic level of all IO pins + */ +int pca953x_get_val(uint8_t chip) +{ + uint8_t val; + + if (i2c_read(chip, 0, 1, &val, 1)) + return -1; + + return (int)val; +} + +#ifdef CONFIG_CMD_PCA953X +#ifdef CONFIG_CMD_PCA953X_INFO +/* + * Display pca953x information + */ +static int pca953x_info(uint8_t chip) +{ + int i; + uint8_t data; + + printf("pca953x@ 0x%x:\n\n", chip); + printf("gpio pins: 76543210\n"); + printf("-------------------\n"); + + if (i2c_read(chip, PCA953X_CONF, 1, &data, 1)) + return -1; + printf("conf: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? 'i' : 'o'); + printf("\n"); + + if (i2c_read(chip, PCA953X_POL, 1, &data, 1)) + return -1; + printf("invert: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? '1' : '0'); + printf("\n"); + + if (i2c_read(chip, PCA953X_IN, 1, &data, 1)) + return -1; + printf("input: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? '1' : '0'); + printf("\n"); + + if (i2c_read(chip, PCA953X_OUT, 1, &data, 1)) + return -1; + printf("output: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? '1' : '0'); + printf("\n"); + + return 0; +} +#endif /* CONFIG_CMD_PCA953X_INFO */ + +cmd_tbl_t cmd_pca953x[] = { + U_BOOT_CMD_MKENT(device, 3, 0, (void *)PCA953X_CMD_DEVICE, "", ""), + U_BOOT_CMD_MKENT(output, 4, 0, (void *)PCA953X_CMD_OUTPUT, "", ""), + U_BOOT_CMD_MKENT(input, 3, 0, (void *)PCA953X_CMD_INPUT, "", ""), + U_BOOT_CMD_MKENT(invert, 4, 0, (void *)PCA953X_CMD_INVERT, "", ""), +#ifdef CONFIG_CMD_PCA953X_INFO + U_BOOT_CMD_MKENT(info, 2, 0, (void *)PCA953X_CMD_INFO, "", ""), +#endif +}; + +int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + static uint8_t chip = CONFIG_SYS_I2C_PCA953X_ADDR; + int val; + ulong ul_arg2 = 0; + ulong ul_arg3 = 0; + cmd_tbl_t *c; + + c = find_cmd_tbl(argv[1], cmd_pca953x, ARRAY_SIZE(cmd_pca953x)); + + /* All commands but "device" require 'maxargs' arguments */ + if (!c || !((argc == (c->maxargs)) || + (((int)c->cmd == PCA953X_CMD_DEVICE) && + (argc == (c->maxargs - 1))))) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + /* arg2 used as chip number or pin number */ + if (argc > 2) + ul_arg2 = simple_strtoul(argv[2], NULL, 16); + + /* arg3 used as pin or invert value */ + if (argc > 3) + ul_arg3 = simple_strtoul(argv[3], NULL, 16) & 0x1; + + switch ((int)c->cmd) { +#ifdef CONFIG_CMD_PCA953X_INFO + case PCA953X_CMD_INFO: + return pca953x_info(chip); +#endif + case PCA953X_CMD_DEVICE: + if (argc == 3) + chip = (uint8_t)ul_arg2; + printf("Current device address: 0x%x\n", chip); + return 0; + case PCA953X_CMD_INPUT: + pca953x_set_dir(chip, (1 << ul_arg2), + PCA953X_DIR_IN << ul_arg2); + val = (pca953x_get_val(chip) & (1 << ul_arg2)) != 0; + + printf("chip 0x%02x, pin 0x%lx = %d\n", chip, ul_arg2, val); + return val; + case PCA953X_CMD_OUTPUT: + pca953x_set_dir(chip, (1 << ul_arg2), + (PCA953X_DIR_OUT << ul_arg2)); + return pca953x_set_val(chip, (1 << ul_arg2), + (ul_arg3 << ul_arg2)); + case PCA953X_CMD_INVERT: + return pca953x_set_pol(chip, (1 << ul_arg2), + (ul_arg3 << ul_arg2)); + default: + /* We should never get here */ + return 1; + } +} + +U_BOOT_CMD( + pca953x, 5, 1, do_pca953x, + "pca953x - pca953x gpio access\n", + "device [dev]\n" + " - show or set current device address\n" +#ifdef CONFIG_CMD_PCA953X_INFO + "pca953x info\n" + " - display info for current chip\n" +#endif + "pca953x output pin 0|1\n" + " - set pin as output and drive low or high\n" + "pca953x invert pin 0|1\n" + " - disable/enable polarity inversion for reads\n" + "pca953x intput pin\n" + " - set pin as input and read value\n" +); + +#endif /* CONFIG_CMD_PCA953X */ diff --git a/include/pca953x.h b/include/pca953x.h new file mode 100644 index 00000000000..6c2b58c563d --- /dev/null +++ b/include/pca953x.h @@ -0,0 +1,39 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __PCA953X_H_ +#define __PCA953X_H_ + +#define PCA953X_IN 0x00 +#define PCA953X_OUT 0x01 +#define PCA953X_POL 0x02 +#define PCA953X_CONF 0x03 + +#define PCA953X_OUT_LOW 0 +#define PCA953X_OUT_HIGH 1 +#define PCA953X_POL_NORMAL 0 +#define PCA953X_POL_INVERT 1 +#define PCA953X_DIR_OUT 0 +#define PCA953X_DIR_IN 1 + +int pca953x_set_val(u8 chip, uint mask, uint data); +int pca953x_set_pol(u8 chip, uint mask, uint data); +int pca953x_set_dir(u8 chip, uint mask, uint data); +int pca953x_get_val(u8 chip); + +#endif /* __PCA953X_H_ */ -- cgit v1.3.1 From 9d94aff699eed38b286814fcbb335f3eb8516a0e Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 16 Dec 2008 14:59:22 -0600 Subject: NAND FSL elbc: Use virt_to_phys to determine which bank is in use The current code that determines which bank/chipselect is used for a given NAND instance only worked for 32-bit addresses and assumed a 1:1 mapping. This breaks in 36-bit physical configs. The proper way to handle this is to use the virt_to_phys() and BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address with the the virtual address the NAND code uses. Signed-off-by: Kumar Gala Acked-by: Scott Wood --- drivers/mtd/nand/fsl_elbc_nand.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 367c7d7fcd2..3f318e02e2b 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -718,7 +718,7 @@ static void fsl_elbc_ctrl_init(void) int board_nand_init(struct nand_chip *nand) { struct fsl_elbc_mtd *priv; - uint32_t br, or; + uint32_t br = 0, or = 0; if (!elbc_ctrl) { fsl_elbc_ctrl_init(); @@ -737,11 +737,13 @@ int board_nand_init(struct nand_chip *nand) * if we could pass more than one datum to the NAND driver... */ for (priv->bank = 0; priv->bank < MAX_BANKS; priv->bank++) { + phys_addr_t base_addr = virt_to_phys(nand->IO_ADDR_R); + br = in_be32(&elbc_ctrl->regs->bank[priv->bank].br); or = in_be32(&elbc_ctrl->regs->bank[priv->bank].or); if ((br & BR_V) && (br & BR_MSEL) == BR_MS_FCM && - (br & or & BR_BA) == (phys_addr_t)nand->IO_ADDR_R) + (br & or & BR_BA) == BR_PHYS_ADDR(base_addr)) break; } -- cgit v1.3.1 From 9e1fa628bdb64745811cdd26c4f953846c076180 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 11 Jan 2009 16:35:15 +0100 Subject: sh: serial: coding style cleanup Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Nobuhiro Iwamatsu --- drivers/serial/serial_sh.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 1d76a194a5f..e47ec2e27a2 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -49,7 +49,7 @@ # define SCFRDR (vu_char *)(SCIF_BASE + 0x24) #else # define SCFTDR (vu_char *)(SCIF_BASE + 0xC) -# define SCFSR (vu_short *)(SCIF_BASE + 0x10) +# define SCFSR (vu_short *)(SCIF_BASE + 0x10) # define SCFRDR (vu_char *)(SCIF_BASE + 0x14) #endif @@ -64,7 +64,7 @@ #elif defined(CONFIG_CPU_SH7763) # if defined(CONFIG_CONS_SCIF2) # define SCSPTR (vu_short *)(SCIF_BASE + 0x20) -# define SCLSR (vu_short *)(SCIF_BASE + 0x24) +# define SCLSR (vu_short *)(SCIF_BASE + 0x24) # define LSR_ORER 1 # define FIFOLEVEL_MASK 0x1F # else @@ -90,7 +90,7 @@ defined(CONFIG_CPU_SH7722) || \ defined(CONFIG_CPU_SH7203) # define SCSPTR (vu_short *)(SCIF_BASE + 0x20) -# define SCLSR (vu_short *)(SCIF_BASE + 0x24) +# define SCLSR (vu_short *)(SCIF_BASE + 0x24) # define LSR_ORER 1 # define FIFOLEVEL_MASK 0x1F #elif defined(CONFIG_CPU_SH7720) @@ -106,31 +106,32 @@ /* SCBRR register value setting */ #if defined(CONFIG_CPU_SH7720) -# define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) +# define SCBRR_VALUE(bps, clk) (((clk * 2) + 16 * bps) / (32 * bps) - 1) #elif defined(CONFIG_CPU_SH7723) && defined(CONFIG_SCIF_A) /* SH7723 SCIFA use bus clock. So clock *2 */ -# define SCBRR_VALUE(bps, clk) (((clk*2*2)+16*bps)/(32*bps)-1) +# define SCBRR_VALUE(bps, clk) (((clk * 2 * 2) + 16 * bps) / (32 * bps) - 1) #else /* Generic SuperH */ -# define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) +# define SCBRR_VALUE(bps, clk) ((clk + 16 * bps) / (32 * bps) - 1) #endif -#define SCR_RE (1 << 4) -#define SCR_TE (1 << 5) +#define SCR_RE (1 << 4) +#define SCR_TE (1 << 5) #define FCR_RFRST (1 << 1) /* RFCL */ #define FCR_TFRST (1 << 2) /* TFCL */ -#define FSR_DR (1 << 0) -#define FSR_RDF (1 << 1) -#define FSR_FER (1 << 3) -#define FSR_BRK (1 << 4) -#define FSR_FER (1 << 3) -#define FSR_TEND (1 << 6) -#define FSR_ER (1 << 7) +#define FSR_DR (1 << 0) +#define FSR_RDF (1 << 1) +#define FSR_FER (1 << 3) +#define FSR_BRK (1 << 4) +#define FSR_FER (1 << 3) +#define FSR_TEND (1 << 6) +#define FSR_ER (1 << 7) /*----------------------------------------------------------------------*/ void serial_setbrg(void) { DECLARE_GLOBAL_DATA_PTR; + *SCBRR = SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ); } @@ -191,8 +192,8 @@ int serial_tstc(void) return serial_rx_fifo_level() ? 1 : 0; } -#define FSR_ERR_CLEAR 0x0063 -#define RDRF_CLEAR 0x00fc +#define FSR_ERR_CLEAR 0x0063 +#define RDRF_CLEAR 0x00fc void handle_error(void) { -- cgit v1.3.1 From fc83c9273cec6e6e542f4a0ea3b653b7d0513ffa Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 11 Jan 2009 16:35:16 +0100 Subject: sh: serial: use readx/writex accessors Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Nobuhiro Iwamatsu --- drivers/serial/serial_sh.c | 46 +++++++++++++++++++++++----------------------- 1 file changed, 23 insertions(+), 23 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index e47ec2e27a2..bfdb2ce77a3 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -18,6 +18,7 @@ */ #include +#include #include #if defined(CONFIG_CONS_SCIF0) @@ -132,17 +133,17 @@ void serial_setbrg(void) { DECLARE_GLOBAL_DATA_PTR; - *SCBRR = SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ); + writeb(SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ), SCBRR); } int serial_init(void) { - *SCSCR = (SCR_RE | SCR_TE); - *SCSMR = 0; - *SCSMR = 0; - *SCFCR = (FCR_RFRST | FCR_TFRST); - *SCFCR; - *SCFCR = 0; + writew((SCR_RE | SCR_TE), SCSCR); + writew(0, SCSMR); + writew(0, SCSMR); + writew((FCR_RFRST | FCR_TFRST), SCFCR); + readw(SCFCR); + writew(0, SCFCR); serial_setbrg(); return 0; @@ -151,9 +152,9 @@ int serial_init(void) static int serial_rx_fifo_level(void) { #if defined(SCRFDR) - return (*SCRFDR >> 0) & FIFOLEVEL_MASK; + return (readw(SCRFDR) >> 0) & FIFOLEVEL_MASK; #else - return (*SCFDR >> 0) & FIFOLEVEL_MASK; + return (readw(SCFDR) >> 0) & FIFOLEVEL_MASK; #endif } @@ -162,15 +163,15 @@ void serial_raw_putc(const char c) unsigned int fsr_bits_to_clear; while (1) { - if (*SCFSR & FSR_TEND) { /* Tx fifo is empty */ + if (readw(SCFSR) & FSR_TEND) { /* Tx fifo is empty */ fsr_bits_to_clear = FSR_TEND; break; } } - *SCFTDR = c; + writeb(c, SCFTDR); if (fsr_bits_to_clear != 0) - *SCFSR &= ~fsr_bits_to_clear; + writew(readw(SCFSR) & ~fsr_bits_to_clear, SCFSR); } void serial_putc(const char c) @@ -196,22 +197,21 @@ int serial_tstc(void) #define RDRF_CLEAR 0x00fc void handle_error(void) { - - (void)*SCFSR; - *SCFSR = FSR_ERR_CLEAR; - (void)*SCLSR; - *SCLSR = 0x00; + readw(SCFSR); + writew(FSR_ERR_CLEAR, SCFSR); + readw(SCLSR); + writew(0x00, SCLSR); } int serial_getc_check(void) { unsigned short status; - status = *SCFSR; + status = readw(SCFSR); if (status & (FSR_FER | FSR_ER | FSR_BRK)) handle_error(); - if (*SCLSR & LSR_ORER) + if (readw(SCLSR) & LSR_ORER) handle_error(); return status & (FSR_DR | FSR_RDF); } @@ -224,15 +224,15 @@ int serial_getc(void) while (!serial_getc_check()) ; - ch = *SCFRDR; - status = *SCFSR; + ch = readb(SCFRDR); + status = readw(SCFSR); - *SCFSR = RDRF_CLEAR; + writew(RDRF_CLEAR, SCFSR); if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK)) handle_error(); - if (*SCLSR & LSR_ORER) + if (readw(SCLSR) & LSR_ORER) handle_error(); return ch; -- cgit v1.3.1 From ef0921d6b05aeb9034158f9bef5323d6da9c925e Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Tue, 4 Nov 2008 09:24:07 +0900 Subject: Sync with 2.6.27 Sync with OneNAND kernel codes Signed-off-by: Kyungmin Park --- drivers/mtd/onenand/onenand_base.c | 508 +++++++++++++++++++++++++----------- drivers/mtd/onenand/onenand_bbt.c | 8 +- drivers/mtd/onenand/onenand_uboot.c | 10 +- include/linux/mtd/onenand.h | 44 ++-- include/linux/mtd/onenand_regs.h | 1 + include/onenand_uboot.h | 14 +- 6 files changed, 406 insertions(+), 179 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 9b7bf3aa3b6..66214e86d3c 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -78,20 +78,11 @@ static void onenand_writew(unsigned short value, void __iomem * addr) * * Setup Start Address 1 Register (F100h) */ -static int onenand_block_address(int device, int block) +static int onenand_block_address(struct onenand_chip *this, int block) { - if (device & ONENAND_DEVICE_IS_DDP) { - /* Device Flash Core select, NAND Flash Block Address */ - int dfs = 0, density, mask; - - density = device >> ONENAND_DEVICE_DENSITY_SHIFT; - mask = (1 << (density + 6)); - - if (block & mask) - dfs = 1; - - return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1)); - } + /* Device Flash Core select, NAND Flash Block Address */ + if (block & this->density_mask) + return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); return block; } @@ -104,22 +95,13 @@ static int onenand_block_address(int device, int block) * * Setup Start Address 2 Register (F101h) for DDP */ -static int onenand_bufferram_address(int device, int block) +static int onenand_bufferram_address(struct onenand_chip *this, int block) { - if (device & ONENAND_DEVICE_IS_DDP) { - /* Device BufferRAM Select */ - int dbs = 0, density, mask; - - density = device >> ONENAND_DEVICE_DENSITY_SHIFT; - mask = (1 << (density + 6)); - - if (block & mask) - dbs = 1; + /* Device BufferRAM Select */ + if (block & this->density_mask) + return ONENAND_DDP_CHIP1; - return (dbs << ONENAND_DDP_SHIFT); - } - - return 0; + return ONENAND_DDP_CHIP0; } /** @@ -168,6 +150,18 @@ static int onenand_buffer_address(int dataram1, int sectors, int count) return ((bsa << ONENAND_BSA_SHIFT) | bsc); } +/** + * onenand_get_density - [DEFAULT] Get OneNAND density + * @param dev_id OneNAND device ID + * + * Get OneNAND density from device ID + */ +static inline int onenand_get_density(int dev_id) +{ + int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; + return (density & ONENAND_DEVICE_DENSITY_MASK); +} + /** * onenand_command - [DEFAULT] Send command to OneNAND device * @param mtd MTD device structure @@ -192,6 +186,7 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, case ONENAND_CMD_UNLOCK: case ONENAND_CMD_LOCK: case ONENAND_CMD_LOCK_TIGHT: + case ONENAND_CMD_UNLOCK_ALL: block = -1; page = -1; break; @@ -212,7 +207,7 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, /* NOTE: The setting order of the registers is very important! */ if (cmd == ONENAND_CMD_BUFFERRAM) { /* Select DataRAM for DDP */ - value = onenand_bufferram_address(this->device_id, block); + value = onenand_bufferram_address(this, block); this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); @@ -224,9 +219,14 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, if (block != -1) { /* Write 'DFS, FBA' of Flash */ - value = onenand_block_address(this->device_id, block); + value = onenand_block_address(this, block); this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); + + /* Write 'DFS, FBA' of Flash */ + value = onenand_bufferram_address(this, block); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS2); } if (page != -1) { @@ -252,15 +252,6 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, /* Write 'BSA, BSC' of DataRAM */ value = onenand_buffer_address(dataram, sectors, count); this->write_word(value, this->base + ONENAND_REG_START_BUFFER); - - if (readcmd) { - /* Select DataRAM for DDP */ - value = - onenand_bufferram_address(this->device_id, block); - this->write_word(value, - this->base + - ONENAND_REG_START_ADDRESS2); - } } /* Interrupt clear */ @@ -296,14 +287,11 @@ static int onenand_wait(struct mtd_info *mtd, int state) ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); if (ctrl & ONENAND_CTRL_ERROR) { - MTDDEBUG (MTD_DEBUG_LEVEL0, - "onenand_wait: controller error = 0x%04x\n", ctrl); - return -EAGAIN; - } + printk("onenand_wait: controller error = 0x%04x\n", ctrl); + if (ctrl & ONENAND_CTRL_LOCK) + printk("onenand_wait: it's locked error = 0x%04x\n", + ctrl); - if (ctrl & ONENAND_CTRL_LOCK) { - MTDDEBUG (MTD_DEBUG_LEVEL0, - "onenand_wait: it's locked error = 0x%04x\n", ctrl); return -EIO; } @@ -351,7 +339,7 @@ static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) * * Read the BufferRAM area */ -static int onenand_read_bufferram(struct mtd_info *mtd, int area, +static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area, unsigned char *buffer, int offset, size_t count) { @@ -376,7 +364,7 @@ static int onenand_read_bufferram(struct mtd_info *mtd, int area, * * Read the BufferRAM area with Sync. Burst Mode */ -static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, +static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area, unsigned char *buffer, int offset, size_t count) { @@ -405,7 +393,7 @@ static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, * * Write the BufferRAM area */ -static int onenand_write_bufferram(struct mtd_info *mtd, int area, +static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area, const unsigned char *buffer, int offset, size_t count) { @@ -431,21 +419,39 @@ static int onenand_write_bufferram(struct mtd_info *mtd, int area, static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) { struct onenand_chip *this = mtd->priv; - int block, page; - int i; + int blockpage, found = 0; + unsigned int i; - block = (int)(addr >> this->erase_shift); - page = (int)(addr >> this->page_shift); - page &= this->page_mask; +#ifdef CONFIG_S3C64XX + return 0; +#endif - i = ONENAND_CURRENT_BUFFERRAM(this); + if (ONENAND_IS_2PLANE(this)) + blockpage = onenand_get_2x_blockpage(mtd, addr); + else + blockpage = (int) (addr >> this->page_shift); /* Is there valid data? */ - if (this->bufferram[i].block == block && - this->bufferram[i].page == page && this->bufferram[i].valid) - return 1; + i = ONENAND_CURRENT_BUFFERRAM(this); + if (this->bufferram[i].blockpage == blockpage) + found = 1; + else { + /* Check another BufferRAM */ + i = ONENAND_NEXT_BUFFERRAM(this); + if (this->bufferram[i].blockpage == blockpage) { + ONENAND_SET_NEXT_BUFFERRAM(this); + found = 1; + } + } - return 0; + if (found && ONENAND_IS_DDP(this)) { + /* Select DataRAM for DDP */ + int block = (int) (addr >> this->erase_shift); + int value = onenand_bufferram_address(this, block); + this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); + } + + return found; } /** @@ -460,25 +466,25 @@ static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, int valid) { struct onenand_chip *this = mtd->priv; - int block, page; - int i; + int blockpage; + unsigned int i; - block = (int)(addr >> this->erase_shift); - page = (int)(addr >> this->page_shift); - page &= this->page_mask; + if (ONENAND_IS_2PLANE(this)) + blockpage = onenand_get_2x_blockpage(mtd, addr); + else + blockpage = (int)(addr >> this->page_shift); - /* Invalidate BufferRAM */ - for (i = 0; i < MAX_BUFFERRAM; i++) { - if (this->bufferram[i].block == block && - this->bufferram[i].page == page) - this->bufferram[i].valid = 0; - } + /* Invalidate another BufferRAM */ + i = ONENAND_NEXT_BUFFERRAM(this); + if (this->bufferram[i].blockpage == blockpage) + this->bufferram[i].blockpage = -1; /* Update BufferRAM */ i = ONENAND_CURRENT_BUFFERRAM(this); - this->bufferram[i].block = block; - this->bufferram[i].page = page; - this->bufferram[i].valid = valid; + if (valid) + this->bufferram[i].blockpage = blockpage; + else + this->bufferram[i].blockpage = -1; return 0; } @@ -500,10 +506,10 @@ static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, /* Invalidate BufferRAM */ for (i = 0; i < MAX_BUFFERRAM; i++) { - loff_t buf_addr = this->bufferram[i].block << this->erase_shift; + loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; if (buf_addr >= addr && buf_addr < end_addr) - this->bufferram[i].valid = 0; + this->bufferram[i].blockpage = -1; } } @@ -556,7 +562,7 @@ static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, readend += free->offset - lastgap; lastgap = free->offset + free->length; } - this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); + this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); free = this->ecclayout->oobfree; for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { int free_end = free->offset + free->length; @@ -594,9 +600,7 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, int ret = 0, boundary = 0; int writesize = this->writesize; - MTDDEBUG(MTD_DEBUG_LEVEL3, - "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", - (unsigned int) from, (int) len); + MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); if (ops->mode == MTD_OOB_AUTO) oobsize = this->ecclayout->oobavail; @@ -620,6 +624,7 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, /* Do first load to bufferRAM */ if (read < len) { if (!onenand_check_bufferram(mtd, from)) { + this->main_buf = buf; this->command(mtd, ONENAND_CMD_READ, from, writesize); ret = this->wait(mtd, FL_READING); onenand_update_bufferram(mtd, from, !ret); @@ -637,6 +642,7 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, /* If there is more to load then start next load */ from += thislen; if (read + thislen < len) { + this->main_buf = buf + thislen; this->command(mtd, ONENAND_CMD_READ, from, writesize); /* * Chip boundary handling in DDP @@ -653,7 +659,7 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, } /* While load is going, read from last bufferRAM */ - this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); + this->read_bufferram(mtd, from - thislen, ONENAND_DATARAM, buf, column, thislen); /* Read oob area if needed */ if (oobbuf) { @@ -663,7 +669,7 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, if (ops->mode == MTD_OOB_AUTO) onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); else - this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); + this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); oobread += thisooblen; oobbuf += thisooblen; oobcolumn = 0; @@ -726,9 +732,7 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, from += ops->ooboffs; - MTDDEBUG(MTD_DEBUG_LEVEL3, - "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", - (unsigned int) from, (int) len); + MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); /* Initialize return length value */ ops->oobretlen = 0; @@ -759,6 +763,7 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, thislen = oobsize - column; thislen = min_t(int, thislen, len); + this->spare_buf = buf; this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); onenand_update_bufferram(mtd, from, 0); @@ -772,7 +777,7 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, if (mode == MTD_OOB_AUTO) onenand_transfer_auto_oob(mtd, buf, column, thislen); else - this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); + this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen); read += thislen; @@ -886,12 +891,6 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state) interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); - /* Initial bad block case: 0x2400 or 0x0400 */ - if (ctrl & ONENAND_CTRL_ERROR) { - printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl); - return ONENAND_BBT_READ_ERROR; - } - if (interrupt & ONENAND_INT_READ) { int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); if (ecc & ONENAND_ECC_2BIT_ALL) @@ -902,6 +901,12 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state) return ONENAND_BBT_READ_FATAL_ERROR; } + /* Initial bad block case: 0x2400 or 0x0400 */ + if (ctrl & ONENAND_CTRL_ERROR) { + printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl); + return ONENAND_BBT_READ_ERROR; + } + return 0; } @@ -922,9 +927,7 @@ int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, size_t len = ops->ooblen; u_char *buf = ops->oobbuf; - MTDDEBUG(MTD_DEBUG_LEVEL3, - "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", - (unsigned int) from, len); + MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len); /* Initialize return value */ ops->oobretlen = 0; @@ -945,15 +948,16 @@ int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, thislen = mtd->oobsize - column; thislen = min_t(int, thislen, len); + this->spare_buf = buf; this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); onenand_update_bufferram(mtd, from, 0); - ret = onenand_bbt_wait(mtd, FL_READING); + ret = this->bbt_wait(mtd, FL_READING); if (ret) break; - this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); + this->read_spareram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen); read += thislen; if (read == len) break; @@ -995,7 +999,7 @@ static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to if (status) return status; - this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); + this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); for (i = 0; i < mtd->oobsize; i++) if (buf[i] != 0xFF && buf[i] != oob_buf[i]) return -EBADMSG; @@ -1115,9 +1119,7 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, u_char *oobbuf; int ret = 0; - MTDDEBUG(MTD_DEBUG_LEVEL3, - "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", - (unsigned int) to, (int) len); + MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); /* Initialize retlen, in case of early exit */ ops->retlen = 0; @@ -1161,7 +1163,7 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, wbuf = this->page_buf; } - this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); + this->write_bufferram(mtd, to, ONENAND_DATARAM, wbuf, 0, mtd->writesize); if (oob) { oobbuf = this->oob_buf; @@ -1180,7 +1182,7 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, } else oobbuf = (u_char *) ffchars; - this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); + this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); @@ -1244,9 +1246,7 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, to += ops->ooboffs; - MTDDEBUG(MTD_DEBUG_LEVEL3, - "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", - (unsigned int) to, (int) len); + MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); /* Initialize retlen, in case of early exit */ ops->oobretlen = 0; @@ -1293,7 +1293,7 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); else memcpy(oobbuf + column, buf, thislen); - this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); + this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); @@ -1466,7 +1466,14 @@ int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) while (len) { - /* TODO Check badblock */ + /* Check if we have a bad block, we do not erase bad blocks */ + if (instr->priv == 0 && onenand_block_isbad_nolock(mtd, addr, 0)) { + printk(KERN_WARNING "onenand_erase: attempt to erase" + " a bad block at addr 0x%08x\n", + (unsigned int) addr); + instr->state = MTD_ERASE_FAILED; + goto erase_exit; + } this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); @@ -1482,8 +1489,16 @@ int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: " "Failed erase, block %d\n", (unsigned)(addr >> this->erase_shift)); + if (ret == -EPERM) + printk("onenand_erase: " + "Device is write protected!!!\n"); + else + printk("onenand_erase: " + "Failed erase, block %d\n", + (unsigned)(addr >> this->erase_shift)); instr->state = MTD_ERASE_FAILED; instr->fail_addr = addr; + goto erase_exit; } @@ -1493,7 +1508,7 @@ int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) instr->state = MTD_ERASE_DONE; - erase_exit: +erase_exit: ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; /* Do call back function */ @@ -1569,23 +1584,30 @@ int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) } /** - * onenand_unlock - [MTD Interface] Unlock block(s) - * @param mtd MTD device structure - * @param ofs offset relative to mtd start - * @param len number of bytes to unlock + * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + * @param len number of bytes to lock or unlock + * @param cmd lock or unlock command * - * Unlock one or more blocks + * Lock or unlock one or more blocks */ -int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) +static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) { struct onenand_chip *this = mtd->priv; int start, end, block, value, status; + int wp_status_mask; start = ofs >> this->erase_shift; end = len >> this->erase_shift; + if (cmd == ONENAND_CMD_LOCK) + wp_status_mask = ONENAND_WP_LS; + else + wp_status_mask = ONENAND_WP_US; + /* Continuous lock scheme */ - if (this->options & ONENAND_CONT_LOCK) { + if (this->options & ONENAND_HAS_CONT_LOCK) { /* Set start block address */ this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); @@ -1593,7 +1615,7 @@ int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS); /* Write unlock command */ - this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); + this->command(mtd, cmd, 0, 0); /* There's no return value */ this->wait(mtd, FL_UNLOCKING); @@ -1612,7 +1634,14 @@ int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) } /* Block lock scheme */ - for (block = start; block < end; block++) { + for (block = start; block < start + end; block++) { + /* Set block address */ + value = onenand_block_address(this, block); + this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); + /* Select DataRAM for DDP */ + value = onenand_bufferram_address(this, block); + this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); + /* Set start block address */ this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); @@ -1627,11 +1656,6 @@ int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) & ONENAND_CTRL_ONGO) continue; - /* Set block address for read block status */ - value = onenand_block_address(this->device_id, block); - this->write_word(value, - this->base + ONENAND_REG_START_ADDRESS1); - /* Check lock status */ status = this->read_word(this->base + ONENAND_REG_WP_STATUS); if (!(status & ONENAND_WP_US)) @@ -1642,32 +1666,197 @@ int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) return 0; } +/** + * onenand_lock - [MTD Interface] Lock block(s) + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + * @param len number of bytes to unlock + * + * Lock one or more blocks + */ +static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len) +{ + int ret; + + onenand_get_device(mtd, FL_LOCKING); + ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); + onenand_release_device(mtd); + return ret; +} + +/** + * onenand_unlock - [MTD Interface] Unlock block(s) + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + * @param len number of bytes to unlock + * + * Unlock one or more blocks + */ +static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) +{ + int ret; + + onenand_get_device(mtd, FL_LOCKING); + ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); + onenand_release_device(mtd); + return ret; +} + +/** + * onenand_check_lock_status - [OneNAND Interface] Check lock status + * @param this onenand chip data structure + * + * Check lock status + */ +static int onenand_check_lock_status(struct onenand_chip *this) +{ + unsigned int value, block, status; + unsigned int end; + + end = this->chipsize >> this->erase_shift; + for (block = 0; block < end; block++) { + /* Set block address */ + value = onenand_block_address(this, block); + this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); + /* Select DataRAM for DDP */ + value = onenand_bufferram_address(this, block); + this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); + /* Set start block address */ + this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); + + /* Check lock status */ + status = this->read_word(this->base + ONENAND_REG_WP_STATUS); + if (!(status & ONENAND_WP_US)) { + printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); + return 0; + } + } + + return 1; +} + +/** + * onenand_unlock_all - [OneNAND Interface] unlock all blocks + * @param mtd MTD device structure + * + * Unlock all blocks + */ +static void onenand_unlock_all(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + loff_t ofs = 0; + size_t len = this->chipsize; + + if (this->options & ONENAND_HAS_UNLOCK_ALL) { + /* Set start block address */ + this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); + /* Write unlock command */ + this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); + + /* There's no return value */ + this->wait(mtd, FL_LOCKING); + + /* Sanity check */ + while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) + & ONENAND_CTRL_ONGO) + continue; + + return; + + /* Check lock status */ + if (onenand_check_lock_status(this)) + return; + + /* Workaround for all block unlock in DDP */ + if (ONENAND_IS_DDP(this)) { + /* All blocks on another chip */ + ofs = this->chipsize >> 1; + len = this->chipsize >> 1; + } + } + + onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); +} + + +/** + * onenand_check_features - Check and set OneNAND features + * @param mtd MTD data structure + * + * Check and set OneNAND features + * - lock scheme + * - two plane + */ +static void onenand_check_features(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + unsigned int density, process; + + /* Lock scheme depends on density and process */ + density = onenand_get_density(this->device_id); + process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; + + /* Lock scheme */ + switch (density) { + case ONENAND_DEVICE_DENSITY_4Gb: + this->options |= ONENAND_HAS_2PLANE; + + case ONENAND_DEVICE_DENSITY_2Gb: + /* 2Gb DDP don't have 2 plane */ + if (!ONENAND_IS_DDP(this)) + this->options |= ONENAND_HAS_2PLANE; + this->options |= ONENAND_HAS_UNLOCK_ALL; + + case ONENAND_DEVICE_DENSITY_1Gb: + /* A-Die has all block unlock */ + if (process) + this->options |= ONENAND_HAS_UNLOCK_ALL; + break; + + default: + /* Some OneNAND has continuous lock scheme */ + if (!process) + this->options |= ONENAND_HAS_CONT_LOCK; + break; + } + + if (this->options & ONENAND_HAS_CONT_LOCK) + printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); + if (this->options & ONENAND_HAS_UNLOCK_ALL) + printk(KERN_DEBUG "Chip support all block unlock\n"); + if (this->options & ONENAND_HAS_2PLANE) + printk(KERN_DEBUG "Chip has 2 plane\n"); +} + /** * onenand_print_device_info - Print device ID * @param device device ID * * Print device ID */ -char * onenand_print_device_info(int device) +char *onenand_print_device_info(int device, int version) { int vcc, demuxed, ddp, density; char *dev_info = malloc(80); + char *p = dev_info; vcc = device & ONENAND_DEVICE_VCC_MASK; demuxed = device & ONENAND_DEVICE_IS_DEMUX; ddp = device & ONENAND_DEVICE_IS_DDP; density = device >> ONENAND_DEVICE_DENSITY_SHIFT; - sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)", + p += sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)", demuxed ? "" : "Muxed ", ddp ? "(DDP)" : "", (16 << density), vcc ? "2.65/3.3" : "1.8", device); + sprintf(p, "\nOneNAND version = 0x%04x", version); + printk("%s\n", dev_info); + return dev_info; } static const struct onenand_manufacturers onenand_manuf_ids[] = { {ONENAND_MFR_SAMSUNG, "Samsung"}, - {ONENAND_MFR_UNKNOWN, "Unknown"} }; /** @@ -1678,19 +1867,24 @@ static const struct onenand_manufacturers onenand_manuf_ids[] = { */ static int onenand_check_maf(int manuf) { + int size = ARRAY_SIZE(onenand_manuf_ids); + char *name; int i; - for (i = 0; onenand_manuf_ids[i].id; i++) { + for (i = 0; size; i++) if (manuf == onenand_manuf_ids[i].id) break; - } + + if (i < size) + name = onenand_manuf_ids[i].name; + else + name = "Unknown"; #ifdef ONENAND_DEBUG - printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", - onenand_manuf_ids[i].name, manuf); + printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); #endif - return (i != ONENAND_MFR_UNKNOWN); + return i == size; } /** @@ -1703,9 +1897,14 @@ static int onenand_check_maf(int manuf) static int onenand_probe(struct mtd_info *mtd) { struct onenand_chip *this = mtd->priv; - int bram_maf_id, bram_dev_id, maf_id, dev_id; - int version_id; + int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id; int density; + int syscfg; + + /* Save system configuration 1 */ + syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); + /* Clear Sync. Burst Read mode to read BootRAM */ + this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1); /* Send the command for reading device ID from BootRAM */ this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); @@ -1714,19 +1913,23 @@ static int onenand_probe(struct mtd_info *mtd) bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); - /* Check manufacturer ID */ - if (onenand_check_maf(bram_maf_id)) - return -ENXIO; - /* Reset OneNAND to read default register values */ this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); /* Wait reset */ this->wait(mtd, FL_RESETING); + /* Restore system configuration 1 */ + this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); + + /* Check manufacturer ID */ + if (onenand_check_maf(bram_maf_id)) + return -ENXIO; + /* Read manufacturer and device IDs from Register */ maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); + ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); /* Check OneNAND device */ if (maf_id != bram_maf_id || dev_id != bram_dev_id) @@ -1739,11 +1942,16 @@ static int onenand_probe(struct mtd_info *mtd) } /* Flash device information */ - mtd->name = onenand_print_device_info(dev_id); + mtd->name = onenand_print_device_info(dev_id, ver_id); this->device_id = dev_id; - density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; + density = onenand_get_density(dev_id); this->chipsize = (16 << density) << 20; + /* Set density mask. it is used for DDP */ + if (ONENAND_IS_DDP(this)) + this->density_mask = (1 << (density + 6)); + else + this->density_mask = 0; /* OneNAND page size & block size */ /* The data buffer size is equal to page size */ @@ -1764,18 +1972,8 @@ static int onenand_probe(struct mtd_info *mtd) mtd->size = this->chipsize; - /* Version ID */ - version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); -#ifdef ONENAND_DEBUG - printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id); -#endif - - /* Lock scheme */ - if (density <= ONENAND_DEVICE_DENSITY_512Mb && - !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) { - printk(KERN_INFO "Lock scheme is Continues Lock\n"); - this->options |= ONENAND_CONT_LOCK; - } + /* Check OneNAND features */ + onenand_check_features(mtd); mtd->flags = MTD_CAP_NANDFLASH; mtd->erase = onenand_erase; @@ -1813,12 +2011,19 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) this->command = onenand_command; if (!this->wait) this->wait = onenand_wait; + if (!this->bbt_wait) + this->bbt_wait = onenand_bbt_wait; if (!this->read_bufferram) this->read_bufferram = onenand_read_bufferram; + if (!this->read_spareram) + this->read_spareram = onenand_read_bufferram; if (!this->write_bufferram) this->write_bufferram = onenand_write_bufferram; + if (!this->scan_bbt) + this->scan_bbt = onenand_default_bbt; + if (onenand_probe(mtd)) return -ENXIO; @@ -1850,9 +2055,10 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) this->options |= ONENAND_OOBBUF_ALLOC; } - onenand_unlock(mtd, 0, mtd->size); + /* Unlock whole block */ + onenand_unlock_all(mtd); - return onenand_default_bbt(mtd); + return this->scan_bbt(mtd); } /** diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c index f6092b9be98..d538f95828f 100644 --- a/drivers/mtd/onenand/onenand_bbt.c +++ b/drivers/mtd/onenand/onenand_bbt.c @@ -3,7 +3,7 @@ * * Bad Block Table support for the OneNAND driver * - * Copyright(c) 2005-2007 Samsung Electronics + * Copyright(c) 2005-2008 Samsung Electronics * Kyungmin Park * * TODO: @@ -54,7 +54,7 @@ static int check_short_pattern(uint8_t * buf, int len, int paglen, * @param buf temporary buffer * @param bd descriptor for the good/bad block search pattern * @param chip create the table for a specific chip, -1 read all chips. - * Applies only if NAND_BBT_PERCHIP option is set + * Applies only if NAND_BBT_PERCHIP option is set * * Create a bad block table by scanning the device * for the given good/bad block identify pattern @@ -156,8 +156,8 @@ static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) res = (bbm->bbt[block >> 3] >> (block & 0x06)) & 0x03; MTDDEBUG (MTD_DEBUG_LEVEL2, - "onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n", - (unsigned int)offs, block >> 1, res); + "onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n", + (unsigned int)offs, block >> 1, res); switch ((int)res) { case 0x00: diff --git a/drivers/mtd/onenand/onenand_uboot.c b/drivers/mtd/onenand/onenand_uboot.c index 08082f3edef..4541b221772 100644 --- a/drivers/mtd/onenand/onenand_uboot.c +++ b/drivers/mtd/onenand/onenand_uboot.c @@ -26,9 +26,17 @@ void onenand_init(void) memset(&onenand_mtd, 0, sizeof(struct mtd_info)); memset(&onenand_chip, 0, sizeof(struct onenand_chip)); - onenand_chip.base = (void *) CONFIG_SYS_ONENAND_BASE; onenand_mtd.priv = &onenand_chip; +#ifdef CONFIG_USE_ONENAND_BOARD_INIT + /* + * It's used for some board init required + */ + onenand_board_init(&onenand_mtd); +#else + onenand_chip.base = (void *) CONFIG_SYS_ONENAND_BASE; +#endif + onenand_scan(&onenand_mtd, 1); puts("OneNAND: "); diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index 4467c2bb2d9..7547e96e77f 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -30,14 +30,10 @@ extern void onenand_release (struct mtd_info *mtd); /** * struct onenand_bufferram - OneNAND BufferRAM Data - * @param block block address in BufferRAM - * @param page page address in BufferRAM - * @param valid valid flag + * @param blockpage block & page address in BufferRAM */ struct onenand_bufferram { - int block; - int page; - int valid; + int blockpage; }; /** @@ -70,6 +66,8 @@ struct onenand_chip { void __iomem *base; unsigned int chipsize; unsigned int device_id; + unsigned int version_id; + unsigned int density_mask; unsigned int options; unsigned int erase_shift; @@ -81,26 +79,35 @@ struct onenand_chip { unsigned int bufferram_index; struct onenand_bufferram bufferram[MAX_BUFFERRAM]; - int (*command) (struct mtd_info * mtd, int cmd, loff_t address, + int (*command) (struct mtd_info *mtd, int cmd, loff_t address, size_t len); - int (*wait) (struct mtd_info * mtd, int state); - int (*read_bufferram) (struct mtd_info * mtd, int area, + int (*wait) (struct mtd_info *mtd, int state); + int (*bbt_wait) (struct mtd_info *mtd, int state); + int (*read_bufferram) (struct mtd_info *mtd, loff_t addr, int area, unsigned char *buffer, int offset, size_t count); - int (*write_bufferram) (struct mtd_info * mtd, int area, + int (*read_spareram) (struct mtd_info *mtd, loff_t addr, int area, + unsigned char *buffer, int offset, size_t count); + int (*write_bufferram) (struct mtd_info *mtd, loff_t addr, int area, const unsigned char *buffer, int offset, size_t count); - unsigned short (*read_word) (void __iomem * addr); - void (*write_word) (unsigned short value, void __iomem * addr); - void (*mmcontrol) (struct mtd_info * mtd, int sync_read); + unsigned short (*read_word) (void __iomem *addr); + void (*write_word) (unsigned short value, void __iomem *addr); + void (*mmcontrol) (struct mtd_info *mtd, int sync_read); int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); int (*scan_bbt)(struct mtd_info *mtd); + unsigned char *main_buf; + unsigned char *spare_buf; +#ifdef DONT_USE_UBOOT + spinlock_t chip_lock; + wait_queue_head_t wq; +#endif int state; - unsigned char *page_buf; - unsigned char *oob_buf; + unsigned char *page_buf; + unsigned char *oob_buf; struct nand_oobinfo *autooob; - struct nand_ecclayout *ecclayout; + struct nand_ecclayout *ecclayout; void *bbm; @@ -125,7 +132,9 @@ struct onenand_chip { /* * Options bits */ -#define ONENAND_CONT_LOCK (0x0001) +#define ONENAND_HAS_CONT_LOCK (0x0001) +#define ONENAND_HAS_UNLOCK_ALL (0x0002) +#define ONENAND_HAS_2PLANE (0x0004) #define ONENAND_PAGEBUF_ALLOC (0x1000) #define ONENAND_OOBBUF_ALLOC (0x2000) @@ -133,7 +142,6 @@ struct onenand_chip { * OneNAND Flash Manufacturer ID Codes */ #define ONENAND_MFR_SAMSUNG 0xec -#define ONENAND_MFR_UNKNOWN 0x00 /** * struct nand_manufacturers - NAND Flash Manufacturer ID Structure diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h index a245e14bf9a..fc63380d927 100644 --- a/include/linux/mtd/onenand_regs.h +++ b/include/linux/mtd/onenand_regs.h @@ -119,6 +119,7 @@ #define ONENAND_CMD_UNLOCK (0x23) #define ONENAND_CMD_LOCK (0x2A) #define ONENAND_CMD_LOCK_TIGHT (0x2C) +#define ONENAND_CMD_UNLOCK_ALL (0x27) #define ONENAND_CMD_ERASE (0x94) #define ONENAND_CMD_RESET (0xF0) #define ONENAND_CMD_READID (0x90) diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h index e9602574b78..5a4fded2705 100644 --- a/include/onenand_uboot.h +++ b/include/onenand_uboot.h @@ -15,25 +15,29 @@ #define __UBOOT_ONENAND_H #include -#include struct mtd_info; struct erase_info; +struct onenand_chip; extern struct mtd_info onenand_mtd; +/* board */ +extern void onenand_board_init(struct mtd_info *); + /* Functions */ extern void onenand_init(void); extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf); -extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, - struct mtd_oob_ops *ops); +extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, const u_char * buf); extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr); -extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len); +extern char *onenand_print_device_info(int device, int version); -extern char *onenand_print_device_info(int device); +/* S3C64xx */ +extern void s3c64xx_onenand_init(struct mtd_info *); +extern void s3c64xx_set_width_regs(struct onenand_chip *); #endif /* __UBOOT_ONENAND_H */ -- cgit v1.3.1 From 4fca3310d611cc0f51d7295ef3557afbdbd91dc3 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 11 Nov 2008 10:28:53 +0100 Subject: OneNAND: Fix compiler warnings Signed-off-by: Stefan Roese --- drivers/mtd/onenand/onenand_base.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 66214e86d3c..8d004d383b6 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -408,6 +408,30 @@ static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area, return 0; } +/** + * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode + * @param mtd MTD data structure + * @param addr address to check + * @return blockpage address + * + * Get blockpage address at 2x program mode + */ +static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) +{ + struct onenand_chip *this = mtd->priv; + int blockpage, block, page; + + /* Calculate the even block number */ + block = (int) (addr >> this->erase_shift) & ~1; + /* Is it the odd plane? */ + if (addr & this->writesize) + block++; + page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; + blockpage = (block << 7) | page; + + return blockpage; +} + /** * onenand_check_bufferram - [GENERIC] Check BufferRAM information * @param mtd MTD data structure @@ -1666,6 +1690,7 @@ static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int return 0; } +#ifdef ONENAND_LINUX /** * onenand_lock - [MTD Interface] Lock block(s) * @param mtd MTD device structure @@ -1701,6 +1726,7 @@ static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) onenand_release_device(mtd); return ret; } +#endif /** * onenand_check_lock_status - [OneNAND Interface] Check lock status -- cgit v1.3.1 From 8cf11f3aa78673730e9ecbbe4b75213b53f212c8 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 11 Nov 2008 10:29:09 +0100 Subject: OneNAND: Save version_id in onenand_chip struct The version (ver_id) was not stored in the onenand_chip structure and because of this the continuous locking scheme could be enabled on some chips. Signed-off-by: Stefan Roese --- drivers/mtd/onenand/onenand_base.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 8d004d383b6..f62b1aa25a6 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -1970,6 +1970,7 @@ static int onenand_probe(struct mtd_info *mtd) /* Flash device information */ mtd->name = onenand_print_device_info(dev_id, ver_id); this->device_id = dev_id; + this->version_id = ver_id; density = onenand_get_density(dev_id); this->chipsize = (16 << density) << 20; -- cgit v1.3.1 From 1714f51a2009baaecf3d4f6e3bd8c4e93a8d3f23 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Thu, 13 Nov 2008 15:14:33 +0900 Subject: Add markbad function Add missing markbad function If not, it's hang when it entered the mtd->mark_bad(). Signed-off-by: Kyungmin Park --- drivers/mtd/onenand/onenand_base.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index f62b1aa25a6..dcc969ff730 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -1583,6 +1583,37 @@ int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) return ret; } +/** + * onenand_default_block_markbad - [DEFAULT] mark a block bad + * @param mtd MTD device structure + * @param ofs offset from device start + * + * This is the default implementation, which can be overridden by + * a hardware specific driver. + */ +static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + u_char buf[2] = {0, 0}; + struct mtd_oob_ops ops = { + .mode = MTD_OOB_PLACE, + .ooblen = 2, + .oobbuf = buf, + .ooboffs = 0, + }; + int block; + + /* Get block number */ + block = ((int) ofs) >> bbm->bbt_erase_shift; + if (bbm->bbt) + bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); + + /* We write two bytes, so we dont have to mess with 16 bit access */ + ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); + return onenand_write_oob_nolock(mtd, ofs, &ops); +} + /** * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad * @param mtd MTD device structure @@ -2048,6 +2079,8 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) if (!this->write_bufferram) this->write_bufferram = onenand_write_bufferram; + if (!this->block_markbad) + this->block_markbad = onenand_default_block_markbad; if (!this->scan_bbt) this->scan_bbt = onenand_default_bbt; -- cgit v1.3.1 From 1ae39862044ebb1e682234b51f94421e3f871d6a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 2 Dec 2008 11:06:47 +0100 Subject: OneNAND: Additional sync with 2.6.27 - Add subpage write support - Add onenand_oob_64/32 ecclayout This has been missing and without it UBI has some incompatibilies issues with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is placed differently (2048 instead of 512) without this fix. Signed-off-by: Stefan Roese Signed-off-by: Scott Wood --- drivers/mtd/onenand/onenand_base.c | 72 +++++++++++++++++++++++++++++++++++++- include/linux/mtd/onenand.h | 1 + 2 files changed, 72 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index dcc969ff730..d482437a462 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -36,6 +36,35 @@ static inline void *memcpy_16(void *dst, const void *src, unsigned int len) return ret; } +/** + * onenand_oob_64 - oob info for large (2KB) page + */ +static struct nand_ecclayout onenand_oob_64 = { + .eccbytes = 20, + .eccpos = { + 8, 9, 10, 11, 12, + 24, 25, 26, 27, 28, + 40, 41, 42, 43, 44, + 56, 57, 58, 59, 60, + }, + .oobfree = { + {2, 3}, {14, 2}, {18, 3}, {30, 2}, + {34, 3}, {46, 2}, {50, 3}, {62, 2} + } +}; + +/** + * onenand_oob_32 - oob info for middle (1KB) page + */ +static struct nand_ecclayout onenand_oob_32 = { + .eccbytes = 10, + .eccpos = { + 8, 9, 10, 11, 12, + 24, 25, 26, 27, 28, + }, + .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } +}; + static const unsigned char ffchars[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ @@ -1079,7 +1108,7 @@ static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, #define onenand_verify_oob(...) (0) #endif -#define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0) +#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) /** * onenand_fill_auto_oob - [Internal] oob auto-placement transfer @@ -2058,6 +2087,7 @@ static int onenand_probe(struct mtd_info *mtd) */ int onenand_scan(struct mtd_info *mtd, int maxchips) { + int i; struct onenand_chip *this = mtd->priv; if (!this->read_word) @@ -2115,6 +2145,46 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) this->options |= ONENAND_OOBBUF_ALLOC; } + this->state = FL_READY; + + /* + * Allow subpage writes up to oobsize. + */ + switch (mtd->oobsize) { + case 64: + this->ecclayout = &onenand_oob_64; + mtd->subpage_sft = 2; + break; + + case 32: + this->ecclayout = &onenand_oob_32; + mtd->subpage_sft = 1; + break; + + default: + printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n", + mtd->oobsize); + mtd->subpage_sft = 0; + /* To prevent kernel oops */ + this->ecclayout = &onenand_oob_32; + break; + } + + this->subpagesize = mtd->writesize >> mtd->subpage_sft; + + /* + * The number of bytes available for a client to place data into + * the out of band area + */ + this->ecclayout->oobavail = 0; + for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && + this->ecclayout->oobfree[i].length; i++) + this->ecclayout->oobavail += + this->ecclayout->oobfree[i].length; + mtd->oobavail = this->ecclayout->oobavail; + + mtd->ecclayout = this->ecclayout; + /* Unlock whole block */ onenand_unlock_all(mtd); diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index 7547e96e77f..2597e347b4b 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -107,6 +107,7 @@ struct onenand_chip { unsigned char *oob_buf; struct nand_oobinfo *autooob; + int subpagesize; struct nand_ecclayout *ecclayout; void *bbm; -- cgit v1.3.1 From 69fb8be4fc07162fdf6edf04bdc7233b0e9a920e Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 6 Dec 2008 02:40:55 -0500 Subject: NAND: move board_nand_init to nand.h Rather than putting the function prototype for board_nand_init() in the one place where it gets called, put it into nand.h so that every place that also defines it gets the prototype. Otherwise, errors can go silently unnoticed such as using the wrong return value (void rather than int) when defining the function. Signed-off-by: Mike Frysinger Signed-off-by: Scott Wood --- drivers/mtd/nand/nand.c | 2 -- include/nand.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index eeb19ff1b93..cf9261786d8 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -36,8 +36,6 @@ static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIS static const char default_nand_name[] = "nand"; -extern int board_nand_init(struct nand_chip *nand); - static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand, ulong base_addr) { diff --git a/include/nand.h b/include/nand.h index b4f316f71a3..065a42c3ee0 100644 --- a/include/nand.h +++ b/include/nand.h @@ -31,6 +31,8 @@ extern void nand_init(void); #include #include +extern int board_nand_init(struct nand_chip *nand); + typedef struct mtd_info nand_info_t; extern int nand_curr_device; -- cgit v1.3.1 From 50657c273278f74378e1ac39b41d612b92fdffa0 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Sat, 13 Dec 2008 09:43:06 -0600 Subject: NAND: Enable nand lock, unlock feature Enable nand lock, unlock and status of lock feature. Not every device and platform requires this, hence, it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK Nand unlock and status operate on block boundary instead of page boundary. Details in: http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT Intial solution provided by Vikram Pandita Includes preliminary suggestions from Scott Wood Signed-off-by: Nishanth Menon Signed-off-by: Scott Wood --- common/cmd_nand.c | 96 ++++++++++++++++++++++---------------------- drivers/mtd/nand/nand_util.c | 79 +++++++++++++++++++----------------- 2 files changed, 92 insertions(+), 83 deletions(-) (limited to 'drivers') diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 0a366d32c47..a240c37b76c 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -164,6 +164,47 @@ out: return 0; } +#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK +static void print_status(ulong start, ulong end, ulong erasesize, int status) +{ + printf("%08lx - %08lx: %08lx blocks %s%s%s\n", + start, + end - 1, + (end - start) / erasesize, + ((status & NAND_LOCK_STATUS_TIGHT) ? "TIGHT " : ""), + ((status & NAND_LOCK_STATUS_LOCK) ? "LOCK " : ""), + ((status & NAND_LOCK_STATUS_UNLOCK) ? "UNLOCK " : "")); +} + +static void do_nand_status(nand_info_t *nand) +{ + ulong block_start = 0; + ulong off; + int last_status = -1; + + struct nand_chip *nand_chip = nand->priv; + /* check the WP bit */ + nand_chip->cmdfunc(nand, NAND_CMD_STATUS, -1, -1); + printf("device is %swrite protected\n", + (nand_chip->read_byte(nand) & 0x80 ? + "NOT " : "")); + + for (off = 0; off < nand->size; off += nand->erasesize) { + int s = nand_get_lock_status(nand, off); + + /* print message only if status has changed */ + if (s != last_status && off != 0) { + print_status(block_start, off, nand->erasesize, + last_status); + block_start = off; + } + last_status = s; + } + /* Print the last block info */ + print_status(block_start, off, nand->erasesize, last_status); +} +#endif + int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { int i, dev, ret = 0; @@ -383,8 +424,9 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return 1; } +#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK if (strcmp(cmd, "lock") == 0) { - int tight = 0; + int tight = 0; int status = 0; if (argc == 3) { if (!strcmp("tight", argv[2])) @@ -392,44 +434,8 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) if (!strcmp("status", argv[2])) status = 1; } -/* - * ! BROKEN ! - * - * TODO: must be implemented and tested by someone with HW - */ -#if 0 if (status) { - ulong block_start = 0; - ulong off; - int last_status = -1; - - struct nand_chip *nand_chip = nand->priv; - /* check the WP bit */ - nand_chip->cmdfunc (nand, NAND_CMD_STATUS, -1, -1); - printf("device is %swrite protected\n", - (nand_chip->read_byte(nand) & 0x80 ? - "NOT " : "")); - - for (off = 0; off < nand->size; off += nand->writesize) { - int s = nand_get_lock_status(nand, off); - - /* print message only if status has changed - * or at end of chip - */ - if (off == nand->size - nand->writesize - || (s != last_status && off != 0)) { - - printf("%08lx - %08lx: %8d pages %s%s%s\n", - block_start, - off-1, - (off-block_start)/nand->writesize, - ((last_status & NAND_LOCK_STATUS_TIGHT) ? "TIGHT " : ""), - ((last_status & NAND_LOCK_STATUS_LOCK) ? "LOCK " : ""), - ((last_status & NAND_LOCK_STATUS_UNLOCK) ? "UNLOCK " : "")); - } - - last_status = s; - } + do_nand_status(nand); } else { if (!nand_lock(nand, tight)) { puts("NAND flash successfully locked\n"); @@ -438,7 +444,6 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return 1; } } -#endif return 0; } @@ -446,12 +451,6 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) if (arg_off_size(argc - 2, argv + 2, nand, &off, &size) < 0) return 1; -/* - * ! BROKEN ! - * - * TODO: must be implemented and tested by someone with HW - */ -#if 0 if (!nand_unlock(nand, off, size)) { puts("NAND flash successfully unlocked\n"); } else { @@ -459,9 +458,9 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) "write and erase will probably fail\n"); return 1; } -#endif return 0; } +#endif usage: printf("Usage:\n%s\n", cmdtp->usage); @@ -483,9 +482,12 @@ U_BOOT_CMD(nand, 5, 1, do_nand, "nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n" "nand markbad off - mark bad block at offset (UNSAFE)\n" "nand biterr off - make a bit error at offset (UNSAFE)\n" +#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK "nand lock [tight] [status]\n" " bring nand to lock state or display locked pages\n" - "nand unlock [offset] [size] - unlock section\n"); + "nand unlock [offset] [size] - unlock section\n" +#endif +); static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand, ulong offset, ulong addr, char *cmd) diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index d86c98737fe..77da53e2618 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -238,7 +238,8 @@ static struct nand_ecclayout autoplace_ecclayout = { #endif /* XXX U-BOOT XXX */ -#if 0 +#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK + /****************************************************************************** * Support for locking / unlocking operations of some NAND devices *****************************************************************************/ @@ -253,7 +254,7 @@ static struct nand_ecclayout autoplace_ecclayout = { * nand_lock: Set all pages of NAND flash chip to the LOCK or LOCK-TIGHT * state * - * @param meminfo nand mtd instance + * @param mtd nand mtd instance * @param tight bring device in lock tight mode * * @return 0 on success, -1 in case of error @@ -270,21 +271,21 @@ static struct nand_ecclayout autoplace_ecclayout = { * calls will fail. It is only posible to leave lock-tight state by * an hardware signal (low pulse on _WP pin) or by power down. */ -int nand_lock(nand_info_t *meminfo, int tight) +int nand_lock(struct mtd_info *mtd, int tight) { int ret = 0; int status; - struct nand_chip *this = meminfo->priv; + struct nand_chip *chip = mtd->priv; /* select the NAND device */ - this->select_chip(meminfo, 0); + chip->select_chip(mtd, 0); - this->cmdfunc(meminfo, + chip->cmdfunc(mtd, (tight ? NAND_CMD_LOCK_TIGHT : NAND_CMD_LOCK), -1, -1); /* call wait ready function */ - status = this->waitfunc(meminfo, this, FL_WRITING); + status = chip->waitfunc(mtd, chip); /* see if device thinks it succeeded */ if (status & 0x01) { @@ -292,7 +293,7 @@ int nand_lock(nand_info_t *meminfo, int tight) } /* de-select the NAND device */ - this->select_chip(meminfo, -1); + chip->select_chip(mtd, -1); return ret; } @@ -300,7 +301,7 @@ int nand_lock(nand_info_t *meminfo, int tight) * nand_get_lock_status: - query current lock state from one page of NAND * flash * - * @param meminfo nand mtd instance + * @param mtd nand mtd instance * @param offset page address to query (muss be page aligned!) * * @return -1 in case of error @@ -311,19 +312,19 @@ int nand_lock(nand_info_t *meminfo, int tight) * NAND_LOCK_STATUS_UNLOCK: page unlocked * */ -int nand_get_lock_status(nand_info_t *meminfo, ulong offset) +int nand_get_lock_status(struct mtd_info *mtd, ulong offset) { int ret = 0; int chipnr; int page; - struct nand_chip *this = meminfo->priv; + struct nand_chip *chip = mtd->priv; /* select the NAND device */ - chipnr = (int)(offset >> this->chip_shift); - this->select_chip(meminfo, chipnr); + chipnr = (int)(offset >> chip->chip_shift); + chip->select_chip(mtd, chipnr); - if ((offset & (meminfo->writesize - 1)) != 0) { + if ((offset & (mtd->writesize - 1)) != 0) { printf ("nand_get_lock_status: " "Start address must be beginning of " "nand page!\n"); @@ -332,16 +333,16 @@ int nand_get_lock_status(nand_info_t *meminfo, ulong offset) } /* check the Lock Status */ - page = (int)(offset >> this->page_shift); - this->cmdfunc(meminfo, NAND_CMD_LOCK_STATUS, -1, page & this->pagemask); + page = (int)(offset >> chip->page_shift); + chip->cmdfunc(mtd, NAND_CMD_LOCK_STATUS, -1, page & chip->pagemask); - ret = this->read_byte(meminfo) & (NAND_LOCK_STATUS_TIGHT + ret = chip->read_byte(mtd) & (NAND_LOCK_STATUS_TIGHT | NAND_LOCK_STATUS_LOCK | NAND_LOCK_STATUS_UNLOCK); out: /* de-select the NAND device */ - this->select_chip(meminfo, -1); + chip->select_chip(mtd, -1); return ret; } @@ -349,59 +350,65 @@ int nand_get_lock_status(nand_info_t *meminfo, ulong offset) * nand_unlock: - Unlock area of NAND pages * only one consecutive area can be unlocked at one time! * - * @param meminfo nand mtd instance + * @param mtd nand mtd instance * @param start start byte address * @param length number of bytes to unlock (must be a multiple of * page size nand->writesize) * * @return 0 on success, -1 in case of error */ -int nand_unlock(nand_info_t *meminfo, ulong start, ulong length) +int nand_unlock(struct mtd_info *mtd, ulong start, ulong length) { int ret = 0; int chipnr; int status; int page; - struct nand_chip *this = meminfo->priv; + struct nand_chip *chip = mtd->priv; printf ("nand_unlock: start: %08x, length: %d!\n", (int)start, (int)length); /* select the NAND device */ - chipnr = (int)(start >> this->chip_shift); - this->select_chip(meminfo, chipnr); + chipnr = (int)(start >> chip->chip_shift); + chip->select_chip(mtd, chipnr); /* check the WP bit */ - this->cmdfunc(meminfo, NAND_CMD_STATUS, -1, -1); - if ((this->read_byte(meminfo) & 0x80) == 0) { + chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); + if (!(chip->read_byte(mtd) & NAND_STATUS_WP)) { printf ("nand_unlock: Device is write protected!\n"); ret = -1; goto out; } - if ((start & (meminfo->writesize - 1)) != 0) { + if ((start & (mtd->erasesize - 1)) != 0) { printf ("nand_unlock: Start address must be beginning of " - "nand page!\n"); + "nand block!\n"); ret = -1; goto out; } - if (length == 0 || (length & (meminfo->writesize - 1)) != 0) { - printf ("nand_unlock: Length must be a multiple of nand page " - "size!\n"); + if (length == 0 || (length & (mtd->erasesize - 1)) != 0) { + printf ("nand_unlock: Length must be a multiple of nand block " + "size %08x!\n", mtd->erasesize); ret = -1; goto out; } + /* + * Set length so that the last address is set to the + * starting address of the last block + */ + length -= mtd->erasesize; + /* submit address of first page to unlock */ - page = (int)(start >> this->page_shift); - this->cmdfunc(meminfo, NAND_CMD_UNLOCK1, -1, page & this->pagemask); + page = (int)(start >> chip->page_shift); + chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask); /* submit ADDRESS of LAST page to unlock */ - page += (int)(length >> this->page_shift) - 1; - this->cmdfunc(meminfo, NAND_CMD_UNLOCK2, -1, page & this->pagemask); + page += (int)(length >> chip->page_shift); + chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, page & chip->pagemask); /* call wait ready function */ - status = this->waitfunc(meminfo, this, FL_WRITING); + status = chip->waitfunc(mtd, chip); /* see if device thinks it succeeded */ if (status & 0x01) { /* there was an error */ @@ -411,7 +418,7 @@ int nand_unlock(nand_info_t *meminfo, ulong start, ulong length) out: /* de-select the NAND device */ - this->select_chip(meminfo, -1); + chip->select_chip(mtd, -1); return ret; } #endif -- cgit v1.3.1 From 6c869637fef31e66380f0ea1d49690a2e26ec0d7 Mon Sep 17 00:00:00 2001 From: Wolfgang Grandegger Date: Fri, 16 Jan 2009 18:55:54 +0100 Subject: NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger Signed-off-by: Scott Wood --- doc/README.nand | 2 +- drivers/mtd/nand/nand_base.c | 2 +- drivers/mtd/nand_legacy/nand_legacy.c | 2 +- include/configs/ASH405.h | 1 - include/configs/CATcenter.h | 1 - include/configs/CMS700.h | 1 - include/configs/DU440.h | 1 - include/configs/G2000.h | 1 - include/configs/HH405.h | 1 - include/configs/HUB405.h | 1 - include/configs/IDS8247.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 1 - include/configs/MPC8360ERDK.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/NC650.h | 1 - include/configs/NETPHONE.h | 1 - include/configs/NETTA.h | 1 - include/configs/NETTA2.h | 1 - include/configs/NETVIA.h | 1 - include/configs/PLU405.h | 1 - include/configs/PMC440.h | 1 - include/configs/PPChameleonEVB.h | 2 -- include/configs/SXNI855T.h | 1 - include/configs/TQM8272.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/VCMA9.h | 1 - include/configs/VOH405.h | 1 - include/configs/WUH405.h | 1 - include/configs/acadia.h | 1 - include/configs/afeb9260.h | 1 - include/configs/alpr.h | 1 - include/configs/at91cap9adk.h | 1 - include/configs/at91rm9200dk.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/bamboo.h | 1 - include/configs/bf537-stamp.h | 1 - include/configs/canyonlands.h | 1 - include/configs/csb637.h | 1 - include/configs/davinci_dvevm.h | 1 - include/configs/davinci_schmoogie.h | 1 - include/configs/davinci_sffsdr.h | 1 - include/configs/davinci_sonata.h | 1 - include/configs/delta.h | 1 - include/configs/kilauea.h | 1 - include/configs/netstar.h | 1 - include/configs/omap2420h4.h | 1 - include/configs/pdnb3.h | 1 - include/configs/quad100hd.h | 1 - include/configs/sbc2410x.h | 1 - include/configs/sc3.h | 1 - include/configs/sequoia.h | 1 - include/configs/smdk6400.h | 1 - include/configs/socrates.h | 1 - include/configs/stxxtc.h | 1 - include/configs/zylonite.h | 1 - include/linux/mtd/bbm.h | 8 ++++---- include/linux/mtd/nand.h | 9 --------- include/linux/mtd/nand_legacy.h | 5 +++++ 66 files changed, 12 insertions(+), 77 deletions(-) (limited to 'drivers') diff --git a/doc/README.nand b/doc/README.nand index bf80bc0a585..fc62f92e085 100644 --- a/doc/README.nand +++ b/doc/README.nand @@ -172,7 +172,7 @@ More Definitions: #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 - #define NAND_MAX_CHIPS 1 + #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_DAVINCI_BROKEN_ECC Versions of U-Boot <= 1.3.3 and Montavista Linux kernels diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 94a65d4e72b..ef37f97b339 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2144,7 +2144,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, { int page, len, status, pages_per_block, ret, chipnr; struct nand_chip *chip = mtd->priv; - int rewrite_bbt[NAND_MAX_CHIPS]={0}; + int rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS]={0}; unsigned int bbt_masked_page = 0xffffffff; MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", diff --git a/drivers/mtd/nand_legacy/nand_legacy.c b/drivers/mtd/nand_legacy/nand_legacy.c index 407e901a37d..441780ac21e 100644 --- a/drivers/mtd/nand_legacy/nand_legacy.c +++ b/drivers/mtd/nand_legacy/nand_legacy.c @@ -457,7 +457,7 @@ static void NanD_ScanChips(struct nand_chip *nand) { int floor, chip; int numchips[NAND_MAX_FLOORS]; - int maxchips = NAND_MAX_CHIPS; + int maxchips = CONFIG_SYS_NAND_MAX_CHIPS; int ret = 1; nand->numchips = 0; diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index a694083d5fb..a11a9b8dbaf 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -150,7 +150,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index a44f3e16cc4..1e36660771c 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -219,7 +219,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index d0e246409d1..eebce38e706 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -157,7 +157,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 729153c2efb..85c0e612b27 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -411,7 +411,6 @@ int du440_phy_addr(int devnum); * NAND FLASH */ #define CONFIG_SYS_MAX_NAND_DEVICE 2 -#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \ CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS} diff --git a/include/configs/G2000.h b/include/configs/G2000.h index d299044cb24..b445faecba2 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -205,7 +205,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 80e59bb2667..e5de8ef01dc 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -209,7 +209,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index b3c7046fc39..1106b0dcf0b 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -149,7 +149,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index a610ac9c236..fbcbddb408d 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -275,7 +275,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_DISABLE_CE(nand) do \ { \ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index c207947ff61..1f1586a215c 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -215,7 +215,6 @@ # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -# define NAND_MAX_CHIPS 1 # define NAND_ALLOW_ERASE_ALL 1 # define CONFIG_JFFS2_NAND 1 # define CONFIG_JFFS2_DEV "nand0" diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index a1bc32a6d85..19916876d38 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -215,7 +215,6 @@ # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -# define NAND_MAX_CHIPS 1 # define NAND_ALLOW_ERASE_ALL 1 # define CONFIG_JFFS2_NAND 1 # define CONFIG_JFFS2_DEV "nand0" diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index fc3fa13c7a3..58a26e117e3 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -232,7 +232,6 @@ #endif #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 48043c493fe..e4ada652b59 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -223,7 +223,6 @@ */ #define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE 1 #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index a4f2862c4dd..c20f86aa235 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -211,7 +211,6 @@ #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_UPM 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index d49155fce09..dbffb7121a5 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -271,7 +271,6 @@ #define CONFIG_CMD_NAND 1 #define CONFIG_MTD_NAND_VERIFY_WRITE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 532c3df7730..505c48be2ba 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -248,7 +248,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); CONFIG_SYS_NAND_BASE + 0x80000, \ CONFIG_SYS_NAND_BASE + 0xC0000} #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 6c7a364545c..f84cc7e9c13 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -267,7 +267,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); CONFIG_SYS_NAND_BASE + 0x80000,\ CONFIG_SYS_NAND_BASE + 0xC0000} #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 423ca71c814..0b97f0ce666 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -250,7 +250,6 @@ * NAND flash support */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 /*----------------------------------------------------------------------- * SYPCR - System Protection Control 11-9 diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 34de94797c1..2d04d89251c 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -514,7 +514,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ #define NAND_DISABLE_CE(nand) \ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 004b3c8a415..34fdba59c0a 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -633,7 +633,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */ #define NAND_DISABLE_CE(nand) \ diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index 70995faed17..4a270279128 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -515,7 +515,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ #define NAND_DISABLE_CE(nand) \ diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index 87c920f421a..f97bdcb72dd 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -411,7 +411,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_DISABLE_CE(nand) \ do { \ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 11ce0080f93..e9f16461ef8 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -173,7 +173,6 @@ * NAND-FLASH stuff */ #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index f9f10021bc2..fc48bc1db65 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -505,7 +505,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ #define CONFIG_SYS_NAND_QUIET_TEST 1 diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index 09a96417f51..d4322b6bafb 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -224,8 +224,6 @@ #define NAND_BIG_DELAY_US 25 #define CONFIG_SYS_MAX_NAND_DEVICE 2 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 - #define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND0_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */ #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index 7fc455b8c91..9857bf605ce 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -206,7 +206,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* DFBUSY is available on Port C, bit 12; 0 if busy */ #define NAND_WAIT_READY(nand) \ diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index 1915a73a609..9cac696b981 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -424,7 +424,6 @@ #define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST) #define CONFIG_SYS_MAX_NAND_DEVICE 4 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \ CONFIG_SYS_NAND1_BASE, \ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 6d205a7a142..f5831ebaffe 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -363,7 +363,6 @@ #define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST) #define CONFIG_SYS_MAX_NAND_DEVICE 2 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #if (CONFIG_SYS_MAX_NAND_DEVICE == 1) #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE } diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 0bc2f688995..83d0d56c1ef 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -264,7 +264,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_WAIT_READY(nand) NF_WaitRB() diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index 10ef620d822..f173bcc9be7 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -159,7 +159,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 01cdf3a6f3b..de6e12f5105 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -147,7 +147,6 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 diff --git a/include/configs/acadia.h b/include/configs/acadia.h index 52ccdb5b9d3..9ffd86b1ac6 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -262,7 +262,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index d63a1a07fb1..e996bbd327e 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -97,7 +97,6 @@ #define DATAFLASH_TCHS (0x1 << 24) /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 7ce820518e1..e6248e9df7c 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -335,7 +335,6 @@ * NAND-FLASH stuff *-----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_BASE 0xF0000000 /* NAND FLASH Base Address */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE + 0, CONFIG_SYS_NAND_BASE + 2, \ CONFIG_SYS_NAND_BASE + 4, CONFIG_SYS_NAND_BASE + 6 } diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index b2baf1b3489..f1c5526d673 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -118,7 +118,6 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index c7e83ccfc14..5a980d353e8 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -129,7 +129,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 15389296f25..4501cae3c84 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -100,7 +100,6 @@ #define DATAFLASH_TCHS (0x1 << 24) /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 0016b4fbfb7..668fe3b08ba 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -111,7 +111,6 @@ #define DATAFLASH_TCHS (0x1 << 24) /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index d9ebc87aeac..c6603ff1f80 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -123,7 +123,6 @@ #endif /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 35fefc42131..5bef1fe975a 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -104,7 +104,6 @@ #define CONFIG_SYS_NO_FLASH 1 /* NAND flash */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index f3ffe1ccac4..8c4127da085 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -197,7 +197,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 2 -#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_ADDR + 2 } #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 1b54d3b881d..ac5aaa59aed 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -278,7 +278,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define BFIN_NAND_READY PF3 #define NAND_WAIT_READY(nand) \ diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index faf630496db..d814012c415 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -234,7 +234,6 @@ * NAND-FLASH related *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 2df77cfa7dd..761c0dca397 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -131,7 +131,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 6885b2cbde0..a727f5625e8 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -127,7 +127,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define DEF_BOOTM "" #elif defined(CONFIG_SYS_USE_NOR) diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 8d7bcf57cc9..22d3808a3d1 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ /*=====================*/ /* Board related stuff */ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index e9cd5a66210..875bab6f7dd 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -85,7 +85,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ /* I2C switch definitions for PCA9543 chip */ #define CONFIG_SYS_I2C_PCA9543_ADDR 0x70 diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 381eeb7a1f7..47ab27a8701 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -122,7 +122,6 @@ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define DEF_BOOTM "" #elif defined(CONFIG_SYS_USE_NOR) diff --git a/include/configs/delta.h b/include/configs/delta.h index 08b28ca8ac7..fd97b746f34 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -258,7 +258,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NO_FLASH 1 diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index b943f3153b2..4d3ccf568ba 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -214,7 +214,6 @@ * NAND FLASH *----------------------------------------------------------------------*/ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ diff --git a/include/configs/netstar.h b/include/configs/netstar.h index dda65978442..fab22d16a74 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -120,7 +120,6 @@ * NAND flash */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23) #define NAND_ALLOW_ERASE_ALL 1 diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index d11868e08b7..92df0b4fdc8 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -163,7 +163,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0) #define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0) diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index 8b7890e2c6b..f8aac1aba3d 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -264,7 +264,6 @@ * NAND-FLASH stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x51000000 /* NAND FLASH Base Address */ #endif diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 0f7fca38d51..3ea854becfd 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -224,7 +224,6 @@ #define CONFIG_SYS_NAND_CE 24 /* our CE is GPIO24 */ #define CONFIG_SYS_NAND_CLE 31 /* our CLE is GPIO31 */ #define CONFIG_SYS_NAND_ALE 30 /* our ALE is GPIO30 */ -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index d7a6ae46c5b..bf4a14e0048 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -209,7 +209,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_WAIT_READY(nand) NF_WaitRB() #define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) diff --git a/include/configs/sc3.h b/include/configs/sc3.h index d152a9670d0..515b09789e7 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -424,7 +424,6 @@ extern unsigned long offsetOfEnvironment; * NAND-FLASH stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x77D00000 diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 9321bdc07b8..a3e2fcef444 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -373,7 +373,6 @@ * NAND FLASH */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 1784cc622ce..57c82d1a165 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -227,7 +227,6 @@ /* NAND configuration */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x70200010 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_S3C_NAND_HWECC #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index cbf04e3f2d2..becd13eace3 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -186,7 +186,6 @@ #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_CMD_NAND /* LIME GDC */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index bc078cf3762..5a5f7728f58 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -464,7 +464,6 @@ #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 /* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */ #define NAND_DISABLE_CE(nand) \ diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index 53397d807f7..f30eca1d248 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -227,7 +227,6 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NO_FLASH 1 diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index abf8f1a7e86..7db25465df1 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -18,8 +18,8 @@ #define __LINUX_MTD_BBM_H /* The maximum number of NAND chips in an array */ -#ifndef NAND_MAX_CHIPS -#define NAND_MAX_CHIPS 8 +#ifndef CONFIG_SYS_NAND_MAX_CHIPS +#define CONFIG_SYS_NAND_MAX_CHIPS 1 #endif /** @@ -48,10 +48,10 @@ */ struct nand_bbt_descr { int options; - int pages[NAND_MAX_CHIPS]; + int pages[CONFIG_SYS_NAND_MAX_CHIPS]; int offs; int veroffs; - uint8_t version[NAND_MAX_CHIPS]; + uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS]; int len; int maxblocks; int reserved_block_code; diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 24ad2bdaa18..a4ad5711d6c 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -46,11 +46,6 @@ extern void nand_release (struct mtd_info *mtd); /* Internal helper for board drivers which need to override command function */ extern void nand_wait_ready(struct mtd_info *mtd); -/* The maximum number of NAND chips in an array */ -#ifndef NAND_MAX_CHIPS -#define NAND_MAX_CHIPS 8 -#endif - /* This constant declares the max. oobsize / page, which * is supported now. If you add a chip with bigger oobsize/page * adjust this accordingly. @@ -477,10 +472,6 @@ struct nand_manufacturers { extern struct nand_flash_dev nand_flash_ids[]; extern struct nand_manufacturers nand_manuf_ids[]; -#ifndef NAND_MAX_CHIPS -#define NAND_MAX_CHIPS 8 -#endif - extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd); extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs); extern int nand_default_bbt(struct mtd_info *mtd); diff --git a/include/linux/mtd/nand_legacy.h b/include/linux/mtd/nand_legacy.h index 99eafbbcdcc..43344481462 100644 --- a/include/linux/mtd/nand_legacy.h +++ b/include/linux/mtd/nand_legacy.h @@ -40,6 +40,11 @@ #error This module is for the legacy NAND support #endif +/* The maximum number of NAND chips in an array */ +#ifndef CONFIG_SYS_NAND_MAX_CHIPS +#define CONFIG_SYS_NAND_MAX_CHIPS 1 +#endif + /* * Standard NAND flash commands */ -- cgit v1.3.1 From d4bade8d77aa20e2846fa4accff0e7fa7961a134 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 18 Jan 2009 19:46:06 -0500 Subject: nand: fixup printf modifiers to match types used Signed-off-by: Mike Frysinger Signed-off-by: Scott Wood --- common/cmd_nand.c | 4 ++-- drivers/mtd/nand/nand_util.c | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 3d434e8a709..aedf8a624e7 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -160,7 +160,7 @@ out: if (*size == nand->size) puts("whole chip\n"); else - printf("offset 0x%lx, size 0x%x\n", *off, *size); + printf("offset 0x%lx, size 0x%zx\n", *off, *size); return 0; } @@ -398,7 +398,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return 1; } - printf(" %d bytes %s: %s\n", size, + printf(" %zu bytes %s: %s\n", size, read ? "read" : "written", ret ? "ERROR" : "OK"); return ret == 0 ? 0 : 1; diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 77da53e2618..6ba52b30c0a 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -495,7 +495,7 @@ int nand_write_skip_bad(nand_info_t *nand, size_t offset, size_t *length, if (len_incl_bad == *length) { rval = nand_write (nand, offset, length, buffer); if (rval != 0) - printf ("NAND write to offset %x failed %d\n", + printf ("NAND write to offset %zx failed %d\n", offset, rval); return rval; @@ -506,7 +506,7 @@ int nand_write_skip_bad(nand_info_t *nand, size_t offset, size_t *length, size_t write_size; if (nand_block_isbad (nand, offset & ~(nand->erasesize - 1))) { - printf ("Skip bad block 0x%08x\n", + printf ("Skip bad block 0x%08zx\n", offset & ~(nand->erasesize - 1)); offset += nand->erasesize - block_offset; continue; @@ -519,7 +519,7 @@ int nand_write_skip_bad(nand_info_t *nand, size_t offset, size_t *length, rval = nand_write (nand, offset, &write_size, p_buffer); if (rval != 0) { - printf ("NAND write to offset %x failed %d\n", + printf ("NAND write to offset %zx failed %d\n", offset, rval); *length -= left_to_write; return rval; @@ -565,7 +565,7 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length, if (len_incl_bad == *length) { rval = nand_read (nand, offset, length, buffer); if (rval != 0) - printf ("NAND read from offset %x failed %d\n", + printf ("NAND read from offset %zx failed %d\n", offset, rval); return rval; @@ -576,7 +576,7 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length, size_t read_length; if (nand_block_isbad (nand, offset & ~(nand->erasesize - 1))) { - printf ("Skipping bad block 0x%08x\n", + printf ("Skipping bad block 0x%08zx\n", offset & ~(nand->erasesize - 1)); offset += nand->erasesize - block_offset; continue; @@ -589,7 +589,7 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length, rval = nand_read (nand, offset, &read_length, p_buffer); if (rval != 0) { - printf ("NAND read from offset %x failed %d\n", + printf ("NAND read from offset %zx failed %d\n", offset, rval); *length -= left_to_read; return rval; -- cgit v1.3.1 From 94f9279f7bbdc01bbc7cf85aedf9b545943b94c3 Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Mon, 8 Dec 2008 17:24:08 +0100 Subject: Added legacy flash ST Micro M29W040B --- drivers/mtd/jedec_flash.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c index 226e1e418fe..2d99d4d9a3f 100644 --- a/drivers/mtd/jedec_flash.c +++ b/drivers/mtd/jedec_flash.c @@ -215,6 +215,20 @@ static const struct amd_flash_info jedec_table[] = { ERASEINFO(0x01000,128), } }, + { + .mfr_id = STM_MANUFACT, + .dev_id = STM_ID_M29W040B, + .name = "ST Micro M29W040B", + .uaddr = { + [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ + }, + .DevSize = SIZE_512KiB, + .CmdSet = P_ID_AMD_STD, + .NumEraseRegions= 1, + .regions = { + ERASEINFO(0x10000,8), + } + }, #endif #ifdef CONFIG_SYS_FLASH_LEGACY_512Kx16 { -- cgit v1.3.1 From 97cae3a4c68d856374ccc70fd2c5f8714cc94f7d Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 15 Dec 2008 15:40:12 +0100 Subject: serial: Rename driver vcth to vct to support other board variants Moved driver vcth.c to vct.c to better reflect the VCT board series. This driver is now used by the VCT platforms: vct_premium vct_platinum vct_platinumsvc Signed-off-by: Stefan Roese --- drivers/serial/Makefile | 2 +- drivers/serial/vct.c | 125 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/serial/vcth.c | 121 ---------------------------------------------- 3 files changed, 126 insertions(+), 122 deletions(-) create mode 100755 drivers/serial/vct.c delete mode 100755 drivers/serial/vcth.c (limited to 'drivers') diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 17235ff1783..c7a1882ef8e 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -38,7 +38,7 @@ COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o COBJS-$(CONFIG_USB_TTY) += usbtty.o -COBJS-$(CONFIG_VCTH_SERIAL) += vcth.o +COBJS-$(CONFIG_VCT_SERIAL) += vct.o COBJS := $(sort $(COBJS-y)) SRCS := $(COBJS:.o=.c) diff --git a/drivers/serial/vct.c b/drivers/serial/vct.c new file mode 100755 index 00000000000..556c114e057 --- /dev/null +++ b/drivers/serial/vct.c @@ -0,0 +1,125 @@ +/* + * (C) Copyright 2008 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +#ifdef CONFIG_VCT_PLATINUMAVC +#define UART_1_BASE 0xBDC30000 +#else +#define UART_1_BASE 0xBF89C000 +#endif + +#define UART_RBR_OFF 0x00 /* receiver buffer reg */ +#define UART_THR_OFF 0x00 /* transmit holding reg */ +#define UART_DLL_OFF 0x00 /* divisor latch low reg */ +#define UART_IER_OFF 0x04 /* interrupt enable reg */ +#define UART_DLH_OFF 0x04 /* receiver buffer reg */ +#define UART_FCR_OFF 0x08 /* fifo control register */ +#define UART_LCR_OFF 0x0c /* line control register */ +#define UART_MCR_OFF 0x10 /* modem control register */ +#define UART_LSR_OFF 0x14 /* line status register */ +#define UART_MSR_OFF 0x18 /* modem status register */ +#define UART_SCR_OFF 0x1c /* scratch pad register */ + +#define UART_RCV_DATA_RDY 0x01 /* Data Received */ +#define UART_XMT_HOLD_EMPTY 0x20 +#define UART_TRANSMIT_EMPTY 0x40 + +/* 7 bit on line control reg. enalbing rw to dll and dlh */ +#define UART_LCR_DLAB 0x0080 + +#define UART___9600_BDR 0x84 +#define UART__19200_BDR 0x42 +#define UART_115200_BDR 0x08 + +#define UART_DIS_ALL_INTER 0x00 /* disable all interrupts */ + +#define UART_5DATA_BITS 0x0000 /* 5 [bits] 1.5 bits 2 */ +#define UART_6DATA_BITS 0x0001 /* 6 [bits] 1 bits 2 */ +#define UART_7DATA_BITS 0x0002 /* 7 [bits] 1 bits 2 */ +#define UART_8DATA_BITS 0x0003 /* 8 [bits] 1 bits 2 */ + +static void vct_uart_set_baud_rate(u32 address, u32 dh, u32 dl) +{ + u32 val = __raw_readl(UART_1_BASE + UART_LCR_OFF); + + /* set 7 bit on 1 */ + val |= UART_LCR_DLAB; + __raw_writel(val, UART_1_BASE + UART_LCR_OFF); + + __raw_writel(dl, UART_1_BASE + UART_DLL_OFF); + __raw_writel(dh, UART_1_BASE + UART_DLH_OFF); + + /* set 7 bit on 0 */ + val &= ~UART_LCR_DLAB; + __raw_writel(val, UART_1_BASE + UART_LCR_OFF); + + return; +} + +int serial_init(void) +{ + __raw_writel(UART_DIS_ALL_INTER, UART_1_BASE + UART_IER_OFF); + vct_uart_set_baud_rate(UART_1_BASE, 0, UART_115200_BDR); + __raw_writel(UART_8DATA_BITS, UART_1_BASE + UART_LCR_OFF); + + return 0; +} + +void serial_setbrg(void) +{ + /* + * Baudrate change not supported currently, fixed to 115200 baud + */ +} + +void serial_putc(const char c) +{ + if (c == '\n') + serial_putc('\r'); + + while (!(UART_XMT_HOLD_EMPTY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) + ; + + __raw_writel(c, UART_1_BASE + UART_THR_OFF); +} + +void serial_puts(const char *s) +{ + while (*s) + serial_putc(*s++); +} + +int serial_getc(void) +{ + while (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) + ; + + return __raw_readl(UART_1_BASE + UART_RBR_OFF) & 0xff; +} + +int serial_tstc(void) +{ + if (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) + return 0; + + return 1; +} diff --git a/drivers/serial/vcth.c b/drivers/serial/vcth.c deleted file mode 100755 index 2c847d08a46..00000000000 --- a/drivers/serial/vcth.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * (C) Copyright 2008 Stefan Roese , DENX Software Engineering - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -#define UART_1_BASE 0xBF89C000 - -#define UART_RBR_OFF 0x00 /* receiver buffer reg */ -#define UART_THR_OFF 0x00 /* transmit holding reg */ -#define UART_DLL_OFF 0x00 /* divisor latch low reg */ -#define UART_IER_OFF 0x04 /* interrupt enable reg */ -#define UART_DLH_OFF 0x04 /* receiver buffer reg */ -#define UART_FCR_OFF 0x08 /* fifo control register */ -#define UART_LCR_OFF 0x0c /* line control register */ -#define UART_MCR_OFF 0x10 /* modem control register */ -#define UART_LSR_OFF 0x14 /* line status register */ -#define UART_MSR_OFF 0x18 /* modem status register */ -#define UART_SCR_OFF 0x1c /* scratch pad register */ - -#define UART_RCV_DATA_RDY 0x01 /* Data Received */ -#define UART_XMT_HOLD_EMPTY 0x20 -#define UART_TRANSMIT_EMPTY 0x40 - -/* 7 bit on line control reg. enalbing rw to dll and dlh */ -#define UART_LCR_DLAB 0x0080 - -#define UART___9600_BDR 0x84 -#define UART__19200_BDR 0x42 -#define UART_115200_BDR 0x08 - -#define UART_DIS_ALL_INTER 0x00 /* disable all interrupts */ - -#define UART_5DATA_BITS 0x0000 /* 5 [bits] 1.5 bits 2 */ -#define UART_6DATA_BITS 0x0001 /* 6 [bits] 1 bits 2 */ -#define UART_7DATA_BITS 0x0002 /* 7 [bits] 1 bits 2 */ -#define UART_8DATA_BITS 0x0003 /* 8 [bits] 1 bits 2 */ - -static void vcth_uart_set_baud_rate(u32 address, u32 dh, u32 dl) -{ - u32 val = __raw_readl(UART_1_BASE + UART_LCR_OFF); - - /* set 7 bit on 1 */ - val |= UART_LCR_DLAB; - __raw_writel(val, UART_1_BASE + UART_LCR_OFF); - - __raw_writel(dl, UART_1_BASE + UART_DLL_OFF); - __raw_writel(dh, UART_1_BASE + UART_DLH_OFF); - - /* set 7 bit on 0 */ - val &= ~UART_LCR_DLAB; - __raw_writel(val, UART_1_BASE + UART_LCR_OFF); - - return; -} - -int serial_init(void) -{ - __raw_writel(UART_DIS_ALL_INTER, UART_1_BASE + UART_IER_OFF); - vcth_uart_set_baud_rate(UART_1_BASE, 0, UART_115200_BDR); - __raw_writel(UART_8DATA_BITS, UART_1_BASE + UART_LCR_OFF); - - return 0; -} - -void serial_setbrg(void) -{ - /* - * Baudrate change not supported currently, fixed to 115200 baud - */ -} - -void serial_putc(const char c) -{ - if (c == '\n') - serial_putc('\r'); - - while (!(UART_XMT_HOLD_EMPTY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) - ; - - __raw_writel(c, UART_1_BASE + UART_THR_OFF); -} - -void serial_puts(const char *s) -{ - while (*s) - serial_putc(*s++); -} - -int serial_getc(void) -{ - while (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) - ; - - return __raw_readl(UART_1_BASE + UART_RBR_OFF) & 0xff; -} - -int serial_tstc(void) -{ - if (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) - return 0; - - return 1; -} -- cgit v1.3.1 From a7c9310457e85b4598abe5b304108edf11332e2f Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 17 Dec 2008 16:36:22 -0600 Subject: Add support for Maxim's DS4510 I2C device Initial support for the DS4510, a CPU supervisor with integrated EEPROM, SRAM, and 4 programmable non-volatile GPIO pins. The CONFIG_DS4510 define enables support for the device while the CONFIG_CMD_DS4510 define enables the ds4510 command. The additional CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and CONFIG_DS4510_RST defines add additional sub-commands to the ds4510 command when defined. Signed-off-by: Peter Tyser --- README | 4 + drivers/misc/Makefile | 1 + drivers/misc/ds4510.c | 424 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/ds4510.h | 75 +++++++++ 4 files changed, 504 insertions(+) create mode 100644 drivers/misc/ds4510.c create mode 100644 include/ds4510.h (limited to 'drivers') diff --git a/README b/README index 132650ee53e..ad792d394fb 100644 --- a/README +++ b/README @@ -592,6 +592,10 @@ The following options need to be configured: CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics CONFIG_CMD_DOC * Disk-On-Chip Support + CONFIG_CMD_DS4510 * ds4510 I2C gpio commands + CONFIG_CMD_DS4510_INFO * ds4510 I2C info command + CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd + CONFIG_CMD_DS4510_RST * ds4510 I2C rst command CONFIG_CMD_DTT * Digital Therm and Thermostat CONFIG_CMD_ECHO echo arguments CONFIG_CMD_EEPROM * EEPROM read/write support diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 01e0f393d25..ea2bf87ec8e 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libmisc.a COBJS-$(CONFIG_ALI152X) += ali512x.o +COBJS-$(CONFIG_DS4510) += ds4510.o COBJS-$(CONFIG_FSL_LAW) += fsl_law.o COBJS-$(CONFIG_NS87308) += ns87308.o COBJS-$(CONFIG_STATUS_LED) += status_led.o diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c new file mode 100644 index 00000000000..4cd2fc22498 --- /dev/null +++ b/drivers/misc/ds4510.c @@ -0,0 +1,424 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM, + * and 4 programmable non-volatile GPIO pins. + */ + +#include +#include +#include +#include + +/* Default to an address that hopefully won't corrupt other i2c devices */ +#ifndef CONFIG_SYS_I2C_DS4510_ADDR +#define CONFIG_SYS_I2C_DS4510_ADDR (~0) +#endif + +enum { + DS4510_CMD_INFO, + DS4510_CMD_DEVICE, + DS4510_CMD_NV, + DS4510_CMD_RSTDELAY, + DS4510_CMD_OUTPUT, + DS4510_CMD_INPUT, + DS4510_CMD_PULLUP, + DS4510_CMD_EEPROM, + DS4510_CMD_SEEPROM, + DS4510_CMD_SRAM, +}; + +/* + * Write to DS4510, taking page boundaries into account + */ +int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count) +{ + int wrlen; + int i = 0; + + do { + wrlen = DS4510_EEPROM_PAGE_SIZE - + DS4510_EEPROM_PAGE_OFFSET(offset); + if (count < wrlen) + wrlen = count; + if (i2c_write(chip, offset, 1, &buf[i], wrlen)) + return -1; + + /* + * This delay isn't needed for SRAM writes but shouldn't delay + * things too much, so do it unconditionally for simplicity + */ + udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000); + count -= wrlen; + offset += wrlen; + i += wrlen; + } while (count > 0); + + return 0; +} + +/* + * General read from DS4510 + */ +int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count) +{ + return i2c_read(chip, offset, 1, buf, count); +} + +/* + * Write SEE bit in config register. + * nv = 0 - Writes to SEEPROM registers behave like EEPROM + * nv = 1 - Writes to SEEPROM registers behave like SRAM + */ +int ds4510_see_write(uint8_t chip, uint8_t nv) +{ + uint8_t data; + + if (i2c_read(chip, DS4510_CFG, 1, &data, 1)) + return -1; + + if (nv) /* Treat SEEPROM bits as EEPROM */ + data &= ~DS4510_CFG_SEE; + else /* Treat SEEPROM bits as SRAM */ + data |= DS4510_CFG_SEE; + + return ds4510_mem_write(chip, DS4510_CFG, &data, 1); +} + +/* + * Write de-assertion of reset signal delay + */ +int ds4510_rstdelay_write(uint8_t chip, uint8_t delay) +{ + uint8_t data; + + if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1)) + return -1; + + data &= ~DS4510_RSTDELAY_MASK; + data |= delay & DS4510_RSTDELAY_MASK; + + return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1); +} + +/* + * Write pullup characteristics of IO pins + */ +int ds4510_pullup_write(uint8_t chip, uint8_t val) +{ + val &= DS4510_IO_MASK; + + return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1); +} + +/* + * Read pullup characteristics of IO pins + */ +int ds4510_pullup_read(uint8_t chip) +{ + uint8_t val; + + if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1)) + return -1; + + return val & DS4510_IO_MASK; +} + +/* + * Write drive level of IO pins + */ +int ds4510_gpio_write(uint8_t chip, uint8_t val) +{ + uint8_t data; + int i; + + for (i = 0; i < DS4510_NUM_IO; i++) { + if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1)) + return -1; + + if (val & (0x1 << i)) + data |= 0x1; + else + data &= ~0x1; + + if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1)) + return -1; + } + + return 0; +} + +/* + * Read drive level of IO pins + */ +int ds4510_gpio_read(uint8_t chip) +{ + uint8_t data; + int val = 0; + int i; + + for (i = 0; i < DS4510_NUM_IO; i++) { + if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1)) + return -1; + + if (data & 1) + val |= (1 << i); + } + + return val; +} + +/* + * Read physical level of IO pins + */ +int ds4510_gpio_read_val(uint8_t chip) +{ + uint8_t val; + + if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1)) + return -1; + + return val & DS4510_IO_MASK; +} + +#ifdef CONFIG_CMD_DS4510 +#ifdef CONFIG_CMD_DS4510_INFO +/* + * Display DS4510 information + */ +static int ds4510_info(uint8_t chip) +{ + int i; + int tmp; + uint8_t data; + + printf("DS4510 @ 0x%x:\n\n", chip); + + if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1)) + return -1; + printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK); + + if (i2c_read(chip, DS4510_CFG, 1, &data, 1)) + return -1; + printf("config = 0x%x\n", data); + printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0); + printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0); + printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0); + printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0); + printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0); + + printf("gpio pins: 3210\n"); + printf("---------------\n"); + printf("pullup "); + + tmp = ds4510_pullup_read(chip); + if (tmp == -1) + return tmp; + for (i = DS4510_NUM_IO - 1; i >= 0; i--) + printf("%d", (tmp & (1 << i)) ? 1 : 0); + printf("\n"); + + printf("driven "); + tmp = ds4510_gpio_read(chip); + if (tmp == -1) + return -1; + for (i = DS4510_NUM_IO - 1; i >= 0; i--) + printf("%d", (tmp & (1 << i)) ? 1 : 0); + printf("\n"); + + printf("read "); + tmp = ds4510_gpio_read_val(chip); + if (tmp == -1) + return -1; + for (i = DS4510_NUM_IO - 1; i >= 0; i--) + printf("%d", (tmp & (1 << i)) ? 1 : 0); + printf("\n"); + + return 0; +} +#endif /* CONFIG_CMD_DS4510_INFO */ + +cmd_tbl_t cmd_ds4510[] = { + U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""), + U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""), + U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""), + U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""), + U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""), +#ifdef CONFIG_CMD_DS4510_INFO + U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""), +#endif +#ifdef CONFIG_CMD_DS4510_RST + U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""), +#endif +#ifdef CONFIG_CMD_DS4510_MEM + U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""), + U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""), + U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""), +#endif +}; + +int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + static uint8_t chip = CONFIG_SYS_I2C_DS4510_ADDR; + cmd_tbl_t *c; + ulong ul_arg2 = 0; + ulong ul_arg3 = 0; + int tmp; +#ifdef CONFIG_CMD_DS4510_MEM + ulong addr; + ulong off; + ulong cnt; + int end; + int (*rw_func)(uint8_t, int, uint8_t *, int); +#endif + + c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510)); + + /* All commands but "device" require 'maxargs' arguments */ + if (!c || !((argc == (c->maxargs)) || + (((int)c->cmd == DS4510_CMD_DEVICE) && + (argc == (c->maxargs - 1))))) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + /* arg2 used as chip addr and pin number */ + if (argc > 2) + ul_arg2 = simple_strtoul(argv[2], NULL, 16); + + /* arg3 used as output/pullup value */ + if (argc > 3) + ul_arg3 = simple_strtoul(argv[3], NULL, 16); + + switch ((int)c->cmd) { + case DS4510_CMD_DEVICE: + if (argc == 3) + chip = ul_arg2; + printf("Current device address: 0x%x\n", chip); + return 0; + case DS4510_CMD_NV: + return ds4510_see_write(chip, ul_arg2); + case DS4510_CMD_OUTPUT: + tmp = ds4510_gpio_read(chip); + if (tmp == -1) + return -1; + if (ul_arg3) + tmp |= (1 << ul_arg2); + else + tmp &= ~(1 << ul_arg2); + return ds4510_gpio_write(chip, tmp); + case DS4510_CMD_INPUT: + tmp = ds4510_gpio_read_val(chip); + if (tmp == -1) + return -1; + return (tmp & (1 << ul_arg2)) != 0; + case DS4510_CMD_PULLUP: + tmp = ds4510_pullup_read(chip); + if (tmp == -1) + return -1; + if (ul_arg3) + tmp |= (1 << ul_arg2); + else + tmp &= ~(1 << ul_arg2); + return ds4510_pullup_write(chip, tmp); +#ifdef CONFIG_CMD_DS4510_INFO + case DS4510_CMD_INFO: + return ds4510_info(chip); +#endif +#ifdef CONFIG_CMD_DS4510_RST + case DS4510_CMD_RSTDELAY: + return ds4510_rstdelay_write(chip, ul_arg2); +#endif +#ifdef CONFIG_CMD_DS4510_MEM + case DS4510_CMD_EEPROM: + end = DS4510_EEPROM + DS4510_EEPROM_SIZE; + off = DS4510_EEPROM; + break; + case DS4510_CMD_SEEPROM: + end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE; + off = DS4510_SEEPROM; + break; + case DS4510_CMD_SRAM: + end = DS4510_SRAM + DS4510_SRAM_SIZE; + off = DS4510_SRAM; + break; +#endif + default: + /* We should never get here... */ + return 1; + } + +#ifdef CONFIG_CMD_DS4510_MEM + /* Only eeprom, seeprom, and sram commands should make it here */ + if (strcmp(argv[2], "read") == 0) { + rw_func = ds4510_mem_read; + } else if (strcmp(argv[2], "write") == 0) { + rw_func = ds4510_mem_write; + } else { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + addr = simple_strtoul(argv[3], NULL, 16); + off += simple_strtoul(argv[4], NULL, 16); + cnt = simple_strtoul(argv[5], NULL, 16); + + if ((off + cnt) > end) { + printf("ERROR: invalid len\n"); + return -1; + } + + return rw_func(chip, off, (uint8_t *)addr, cnt); +#endif +} + +U_BOOT_CMD( + ds4510, 6, 1, do_ds4510, + "ds4510 - ds4510 eeprom/seeprom/sram/gpio access\n", + "device [dev]\n" + " - show or set current device address\n" +#ifdef CONFIG_CMD_DS4510_INFO + "ds4510 info\n" + " - display ds4510 info\n" +#endif + "ds4510 output pin 0|1\n" + " - set pin low or high-Z\n" + "ds4510 input pin\n" + " - read value of pin\n" + "ds4510 pullup pin 0|1\n" + " - disable/enable pullup on specified pin\n" + "ds4510 nv 0|1\n" + " - make gpio and seeprom writes volatile/non-volatile\n" +#ifdef CONFIG_CMD_DS4510_RST + "ds4510 rstdelay 0-3\n" + " - set reset output delay\n" +#endif +#ifdef CONFIG_CMD_DS4510_MEM + "ds4510 eeprom read addr off cnt\n" + "ds4510 eeprom write addr off cnt\n" + " - read/write 'cnt' bytes at EEPROM offset 'off'\n" + "ds4510 seeprom read addr off cnt\n" + "ds4510 seeprom write addr off cnt\n" + " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n" + "ds4510 sram read addr off cnt\n" + "ds4510 sram write addr off cnt\n" + " - read/write 'cnt' bytes at SRAM offset 'off'\n" +#endif +); +#endif /* CONFIG_CMD_DS4510 */ diff --git a/include/ds4510.h b/include/ds4510.h new file mode 100644 index 00000000000..40480afc965 --- /dev/null +++ b/include/ds4510.h @@ -0,0 +1,75 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __DS4510_H_ +#define __DS4510_H_ + +/* General defines */ +#define DS4510_NUM_IO 0x04 +#define DS4510_IO_MASK ((1 << DS4510_NUM_IO) - 1) +#define DS4510_EEPROM_PAGE_WRITE_DELAY_MS 20 + +/* EEPROM from 0x00 - 0x39 */ +#define DS4510_EEPROM 0x00 +#define DS4510_EEPROM_SIZE 0x40 +#define DS4510_EEPROM_PAGE_SIZE 0x08 +#define DS4510_EEPROM_PAGE_OFFSET(x) ((x) & (DS4510_EEPROM_PAGE_SIZE - 1)) + +/* SEEPROM from 0xf0 - 0xf7 */ +#define DS4510_SEEPROM 0xf0 +#define DS4510_SEEPROM_SIZE 0x08 + +/* Registers overlapping SEEPROM from 0xf0 - 0xf7 */ +#define DS4510_PULLUP 0xF0 +#define DS4510_PULLUP_DIS 0x00 +#define DS4510_PULLUP_EN 0x01 +#define DS4510_RSTDELAY 0xF1 +#define DS4510_RSTDELAY_MASK 0x03 +#define DS4510_RSTDELAY_125 0x00 +#define DS4510_RSTDELAY_250 0x01 +#define DS4510_RSTDELAY_500 0x02 +#define DS4510_RSTDELAY_1000 0x03 +#define DS4510_IO3 0xF4 +#define DS4510_IO2 0xF5 +#define DS4510_IO1 0xF6 +#define DS4510_IO0 0xF7 + +/* Status configuration registers from 0xf8 - 0xf9*/ +#define DS4510_IO_STATUS 0xF8 +#define DS4510_CFG 0xF9 +#define DS4510_CFG_READY 0x80 +#define DS4510_CFG_TRIP_POINT 0x40 +#define DS4510_CFG_RESET 0x20 +#define DS4510_CFG_SEE 0x10 +#define DS4510_CFG_SWRST 0x08 + +/* SRAM from 0xfa - 0xff */ +#define DS4510_SRAM 0xfa +#define DS4510_SRAM_SIZE 0x06 + +int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count); +int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count); +int ds4510_see_write(uint8_t chip, uint8_t nv); +int ds4510_rstdelay_write(uint8_t chip, uint8_t delay); +int ds4510_pullup_write(uint8_t chip, uint8_t val); +int ds4510_pullup_read(uint8_t chip); +int ds4510_gpio_write(uint8_t chip, uint8_t val); +int ds4510_gpio_read(uint8_t chip); +int ds4510_gpio_read_val(uint8_t chip); + +#endif /* __DS4510_H_ */ -- cgit v1.3.1 From 68f8718df2ed4c2f43031407ccf6cfa81125dddc Mon Sep 17 00:00:00 2001 From: Brad Bozarth Date: Thu, 1 Jan 2009 22:45:47 -0500 Subject: spi flash: fix crash due to spi flash miscommunication Higher spi flash layers expect to be given back a pointer that was malloced so that it can free the result, but the lower layers return a pointer that is in the middle of the malloced memory. Reorder the members of the lower spi structures so that things work out. Signed-off-by: Brad Bozarth Signed-off-by: Mike Frysinger Acked-by: Haavard Skinnemoen --- drivers/mtd/spi/atmel.c | 3 ++- drivers/mtd/spi/stmicro.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c index 10fcf0cdde8..a5f51caf460 100644 --- a/drivers/mtd/spi/atmel.c +++ b/drivers/mtd/spi/atmel.c @@ -39,9 +39,10 @@ struct atmel_spi_flash_params { const char *name; }; +/* spi_flash needs to be first so upper layers can free() it */ struct atmel_spi_flash { - const struct atmel_spi_flash_params *params; struct spi_flash flash; + const struct atmel_spi_flash_params *params; }; static inline struct atmel_spi_flash * diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c index 86324e4e1da..e7dda91a407 100644 --- a/drivers/mtd/spi/stmicro.c +++ b/drivers/mtd/spi/stmicro.c @@ -64,9 +64,10 @@ struct stmicro_spi_flash_params { const char *name; }; +/* spi_flash needs to be first so upper layers can free() it */ struct stmicro_spi_flash { - const struct stmicro_spi_flash_params *params; struct spi_flash flash; + const struct stmicro_spi_flash_params *params; }; static inline struct stmicro_spi_flash *to_stmicro_spi_flash(struct spi_flash -- cgit v1.3.1