From 9eeab572113b2978d42cbb32886a1e90434bf07c Mon Sep 17 00:00:00 2001 From: Ross Parker Date: Tue, 2 Aug 2016 08:08:07 +0000 Subject: imx_watchdog: Do not assert WDOG_B on watchdog init Currently the driver asserts WDOG_B by clearing WCR_WDA bit when enabling the watchdog. Do not clear WCR_WDA. Signed-off-by: Ross Parker Cc: Stefano Babic --- drivers/watchdog/imx_watchdog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 2938d9f1fe9..3f826d10eb9 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -34,7 +34,7 @@ void hw_watchdog_init(void) #endif timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1; writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS | - SET_WCR_WT(timeout), &wdog->wcr); + WCR_WDA | SET_WCR_WT(timeout), &wdog->wcr); hw_watchdog_reset(); } #endif -- cgit v1.3.1 From f8b95731ff5a4918a95357819293fd49d77c2718 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 11 Aug 2016 14:02:41 +0800 Subject: imx: ocotp: support i.MX6ULL i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: Peng Fan Cc: Stefano Babic --- drivers/misc/mxc_ocotp.c | 52 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 46 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c index 6b8566c8d02..8a100c19bdc 100644 --- a/drivers/misc/mxc_ocotp.c +++ b/drivers/misc/mxc_ocotp.c @@ -18,6 +18,7 @@ #include #include #include +#include #define BO_CTRL_WR_UNLOCK 16 #define BM_CTRL_WR_UNLOCK 0xffff0000 @@ -61,6 +62,8 @@ #define FUSE_BANK_SIZE 0x80 #ifdef CONFIG_MX6SL #define FUSE_BANKS 8 +#elif defined(CONFIG_MX6ULL) +#define FUSE_BANKS 9 #else #define FUSE_BANKS 16 #endif @@ -72,11 +75,11 @@ #endif #if defined(CONFIG_MX6) -#include /* * There is a hole in shadow registers address map of size 0x100 - * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. + * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX, + * iMX6UL and i.MX6ULL. * Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, * we should account for this hole in address space. * @@ -97,7 +100,10 @@ u32 fuse_bank_physical(int index) if (is_mx6sl()) { phy_index = index; - } else if (is_mx6ul()) { + } else if (is_mx6ul() || is_mx6ull()) { + if (is_mx6ull() && index == 8) + index = 7; + if (index >= 6) phy_index = fuse_bank_physical(5) + (index - 6) + 3; else @@ -112,11 +118,27 @@ u32 fuse_bank_physical(int index) } return phy_index; } + +u32 fuse_word_physical(u32 bank, u32 word_index) +{ + if (is_mx6ull()) { + if (bank == 8) + word_index = word_index + 4; + } + + return word_index; +} #else u32 fuse_bank_physical(int index) { return index; } + +u32 fuse_word_physical(u32 bank, u32 word_index) +{ + return word_index; +} + #endif static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us) @@ -142,6 +164,14 @@ static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, return -EINVAL; } + if (is_mx6ull()) { + if ((bank == 7 || bank == 8) && + word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) { + printf("mxc_ocotp %s(): Invalid argument on 6ULL\n", caller); + return -EINVAL; + } + } + enable_ocotp_clk(1); wait_busy(*regs, 1); @@ -176,14 +206,16 @@ int fuse_read(u32 bank, u32 word, u32 *val) struct ocotp_regs *regs; int ret; u32 phy_bank; + u32 phy_word; ret = prepare_read(®s, bank, word, val, __func__); if (ret) return ret; phy_bank = fuse_bank_physical(bank); + phy_word = fuse_word_physical(bank, word); - *val = readl(®s->bank[phy_bank].fuse_regs[word << 2]); + *val = readl(®s->bank[phy_bank].fuse_regs[phy_word << 2]); return finish_access(regs, __func__); } @@ -237,7 +269,13 @@ static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word, #ifdef CONFIG_MX7 u32 addr = bank; #else - u32 addr = bank << 3 | word; + u32 addr; + /* Bank 7 and Bank 8 only supports 4 words each for i.MX6ULL */ + if ((is_mx6ull()) && (bank > 7)) { + bank = bank - 1; + word += 4; + } + addr = bank << 3 | word; #endif set_timing(regs); @@ -325,14 +363,16 @@ int fuse_override(u32 bank, u32 word, u32 val) struct ocotp_regs *regs; int ret; u32 phy_bank; + u32 phy_word; ret = prepare_write(®s, bank, word, __func__); if (ret) return ret; phy_bank = fuse_bank_physical(bank); + phy_word = fuse_word_physical(bank, word); - writel(val, ®s->bank[phy_bank].fuse_regs[word << 2]); + writel(val, ®s->bank[phy_bank].fuse_regs[phy_word << 2]); return finish_access(regs, __func__); } -- cgit v1.3.1 From ca75159d8abc085b39e3e468ca34ccb2940d2bf5 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 11 Aug 2016 14:02:52 +0800 Subject: pinctrl: imx6: support i.MX6ULL There two iomuxc for i.MX6ULL. one iomuxc is compatible is i.MX6UL, the other iomuxc is for SVNS usage, similar with the one in mx7. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Simon Glass --- drivers/pinctrl/nxp/pinctrl-imx6.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers') diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c index 24f139e95c3..32b47549197 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx6.c +++ b/drivers/pinctrl/nxp/pinctrl-imx6.c @@ -12,6 +12,10 @@ static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info; +static struct imx_pinctrl_soc_info imx6_snvs_pinctrl_soc_info = { + .flags = ZERO_OFFSET_VALID, +}; + static int imx6_pinctrl_probe(struct udevice *dev) { struct imx_pinctrl_soc_info *info = @@ -26,6 +30,7 @@ static const struct udevice_id imx6_pinctrl_match[] = { { .compatible = "fsl,imx6sl-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, { .compatible = "fsl,imx6sx-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, { .compatible = "fsl,imx6ul-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, + { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info }, { /* sentinel */ } }; -- cgit v1.3.1 From 35ae99467dbe9f5674b5cd6fbc9951c0aa8c8269 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 11 Aug 2016 14:02:56 +0800 Subject: dm: mmc: intialize dev when probe Need to initialize mmc->dev when probe, or will met "dev_get_uclass_priv: null device", when `mmc dev 1`. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Simon Glass Cc: Jaehoon Chung Reviewed-by: Simon Glass --- drivers/mmc/fsl_esdhc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 103b32e9cf7..9796d39c65b 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -1010,6 +1010,7 @@ static int fsl_esdhc_probe(struct udevice *dev) } upriv->mmc = priv->mmc; + priv->mmc->dev = dev; return 0; } -- cgit v1.3.1 From a99546ab6294e11b71dfbeee7f2432b1f028f65d Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Wed, 5 Oct 2016 15:27:03 -0700 Subject: dm: imx: serial: support device tree Support instatiation through device tree. Also parse the fsl,dte-mode property to determine whether DTE mode shall be used. Signed-off-by: Stefan Agner Reviewed-by: Simon Glass --- doc/device-tree-bindings/serial/mxc-serial.txt | 8 +++++++ drivers/serial/serial_mxc.c | 32 ++++++++++++++++++++++++-- 2 files changed, 38 insertions(+), 2 deletions(-) create mode 100644 doc/device-tree-bindings/serial/mxc-serial.txt (limited to 'drivers') diff --git a/doc/device-tree-bindings/serial/mxc-serial.txt b/doc/device-tree-bindings/serial/mxc-serial.txt new file mode 100644 index 00000000000..ede92a4854d --- /dev/null +++ b/doc/device-tree-bindings/serial/mxc-serial.txt @@ -0,0 +1,8 @@ +NXP i.MX (MXC) UART + +Required properties: +- compatible: must be "fsl,imx7d-uart" +- reg: start address and size of the registers + +Optional properties: +- fsl,dte-mode: use DTE mode diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 85457144113..4fd2b1dd054 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -108,6 +108,8 @@ #define UTS_RXFULL (1<<3) /* RxFIFO full */ #define UTS_SOFTRST (1<<0) /* Software reset */ +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_DM_SERIAL #ifndef CONFIG_MXC_UART_BASE @@ -135,8 +137,6 @@ #define UBRC 0xac /* Baud Rate Count Register */ #define UTS 0xb4 /* UART Test Register (mx31) */ -DECLARE_GLOBAL_DATA_PTR; - #define TXTL 2 /* reset default */ #define RXTL 1 /* reset default */ #define RFDIV 4 /* divide input clock by 2 */ @@ -347,9 +347,37 @@ static const struct dm_serial_ops mxc_serial_ops = { .setbrg = mxc_serial_setbrg, }; +#if CONFIG_IS_ENABLED(OF_CONTROL) +static int mxc_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct mxc_serial_platdata *plat = dev->platdata; + fdt_addr_t addr; + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->reg = (struct mxc_uart *)addr; + + plat->use_dte = fdtdec_get_bool(gd->fdt_blob, dev->of_offset, + "fsl,dte-mode"); + return 0; +} + +static const struct udevice_id mxc_serial_ids[] = { + { .compatible = "fsl,imx7d-uart" }, + { } +}; +#endif + U_BOOT_DRIVER(serial_mxc) = { .name = "serial_mxc", .id = UCLASS_SERIAL, +#if CONFIG_IS_ENABLED(OF_CONTROL) + .of_match = mxc_serial_ids, + .ofdata_to_platdata = mxc_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct mxc_serial_platdata), +#endif .probe = mxc_serial_probe, .ops = &mxc_serial_ops, .flags = DM_FLAG_PRE_RELOC, -- cgit v1.3.1 From 5a6f8d7b3b2914deaec60ea9986729b8f4cff2fc Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Wed, 5 Oct 2016 15:27:04 -0700 Subject: pinctrl: imx: do not announce driver initialization It is not usual that drivers announce when they have been initialized. use dev_dbg to announce device initialization. Signed-off-by: Stefan Agner Reviewed-by: Simon Glass --- drivers/pinctrl/nxp/pinctrl-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c index 40b0616c0b5..949d0f32d8b 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx.c +++ b/drivers/pinctrl/nxp/pinctrl-imx.c @@ -222,7 +222,7 @@ int imx_pinctrl_probe(struct udevice *dev, return -ENOMEM; } - dev_info(dev, "initialized IMX pinctrl driver\n"); + dev_dbg(dev, "initialized IMX pinctrl driver\n"); return 0; } -- cgit v1.3.1 From c571d6828d980e555ba40baf85aab45b39e118ee Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Wed, 5 Oct 2016 15:27:09 -0700 Subject: power: pmic: add Ricoh RN5T567 PMIC support Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used on Colibri iMX7. Signed-off-by: Stefan Agner Reviewed-by: Simon Glass --- doc/device-tree-bindings/pmic/rn5t567.txt | 17 +++++ drivers/power/pmic/Kconfig | 8 +++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/rn5t567.c | 64 +++++++++++++++++ include/power/rn5t567_pmic.h | 113 ++++++++++++++++++++++++++++++ 5 files changed, 203 insertions(+) create mode 100644 doc/device-tree-bindings/pmic/rn5t567.txt create mode 100644 drivers/power/pmic/rn5t567.c create mode 100644 include/power/rn5t567_pmic.h (limited to 'drivers') diff --git a/doc/device-tree-bindings/pmic/rn5t567.txt b/doc/device-tree-bindings/pmic/rn5t567.txt new file mode 100644 index 00000000000..e9e688537c9 --- /dev/null +++ b/doc/device-tree-bindings/pmic/rn5t567.txt @@ -0,0 +1,17 @@ +Ricoh RN5T567 PMIC + +This file describes the binding info for the PMIC driver. + +Required properties: +- compatible: "ricoh,rn5t567" +- reg: depending on strapping, e.g. 0x33 + +With those two properties, the PMIC device can be used to read/write +registers. + +Example: + +rn5t567@33 { + compatible = "ricoh,rn5t567"; + reg = <0x33>; +}; diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 69f8d51885c..13d293a93d3 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -127,6 +127,14 @@ config PMIC_S5M8767 driver provides basic register access and sets up the attached regulators if regulator support is enabled. +config PMIC_RN5T567 + bool "Enable driver for Ricoh RN5T567 PMIC" + depends on DM_PMIC + ---help--- + The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO + regulators Real-Time Clock and 4 GPIOs. This driver provides + register access only. + config PMIC_TPS65090 bool "Enable driver for Texas Instruments TPS65090 PMIC" depends on DM_PMIC diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 52b4f711fbf..37d9eb55991 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o obj-$(CONFIG_PMIC_ACT8846) += act8846.o obj-$(CONFIG_PMIC_PM8916) += pm8916.o obj-$(CONFIG_PMIC_RK808) += rk808.o +obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o obj-$(CONFIG_PMIC_TPS65090) += tps65090.o obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c new file mode 100644 index 00000000000..001e69553e8 --- /dev/null +++ b/drivers/power/pmic/rn5t567.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2016 Toradex AG + * Stefan Agner + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include + +static int rn5t567_reg_count(struct udevice *dev) +{ + return RN5T567_NUM_OF_REGS; +} + +static int rn5t567_write(struct udevice *dev, uint reg, const uint8_t *buff, + int len) +{ + int ret; + + ret = dm_i2c_write(dev, reg, buff, len); + if (ret) { + debug("write error to device: %p register: %#x!", dev, reg); + return ret; + } + + return 0; +} + +static int rn5t567_read(struct udevice *dev, uint reg, uint8_t *buff, int len) +{ + int ret; + + ret = dm_i2c_read(dev, reg, buff, len); + if (ret) { + debug("read error from device: %p register: %#x!", dev, reg); + return ret; + } + + return 0; +} + +static struct dm_pmic_ops rn5t567_ops = { + .reg_count = rn5t567_reg_count, + .read = rn5t567_read, + .write = rn5t567_write, +}; + +static const struct udevice_id rn5t567_ids[] = { + { .compatible = "ricoh,rn5t567" }, + { } +}; + +U_BOOT_DRIVER(pmic_rn5t567) = { + .name = "rn5t567 pmic", + .id = UCLASS_PMIC, + .of_match = rn5t567_ids, + .ops = &rn5t567_ops, +}; diff --git a/include/power/rn5t567_pmic.h b/include/power/rn5t567_pmic.h new file mode 100644 index 00000000000..9ce601f2ad7 --- /dev/null +++ b/include/power/rn5t567_pmic.h @@ -0,0 +1,113 @@ +/* + * Copyright (C) 2016 Toradex AG + * Stefan Agner + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __RN5T567_PMIC_H_ +#define __RN5T567_PMIC_H_ + +/* RN5T567 registers */ +enum { + RN5T567_LSIVER = 0x00, + RN5T567_OTPVER = 0x01, + RN5T567_IODAC = 0x02, + RN5T567_VINDAC = 0x03, + RN5T567_OUT32KEN = 0x05, + + RN5T567_CPUCNT = 0x06, + + RN5T567_PSWR = 0x07, + RN5T567_PONHIS = 0x09, + RN5T567_POFFHIS = 0x0A, + RN5T567_WATCHDOG = 0x0B, + RN5T567_WATCHDOGCNT = 0x0C, + RN5T567_PWRFUNC = 0x0D, + RN5T567_SLPCNT = 0x0E, + RN5T567_REPCNT = 0x0F, + RN5T567_PWRONTIMSET = 0x10, + RN5T567_NOETIMSETCNT = 0x11, + RN5T567_PWRIREN = 0x12, + RN5T567_PWRIRQ = 0x13, + RN5T567_PWRMON = 0x14, + RN5T567_PWRIRSEL = 0x15, + + RN5T567_DC1_SLOT = 0x16, + RN5T567_DC2_SLOT = 0x17, + RN5T567_DC3_SLOT = 0x18, + RN5T567_DC4_SLOT = 0x19, + + RN5T567_LDO1_SLOT = 0x1B, + RN5T567_LDO2_SLOT = 0x1C, + RN5T567_LDO3_SLOT = 0x1D, + RN5T567_LDO4_SLOT = 0x1E, + RN5T567_LDO5_SLOT = 0x1F, + + RN5T567_PSO0_SLOT = 0x25, + RN5T567_PSO1_SLOT = 0x26, + RN5T567_PSO2_SLOT = 0x27, + RN5T567_PSO3_SLOT = 0x28, + + RN5T567_LDORTC1_SLOT = 0x2A, + + RN5T567_DC1CTL = 0x2C, + RN5T567_DC1CTL2 = 0x2D, + RN5T567_DC2CTL = 0x2E, + RN5T567_DC2CTL2 = 0x2F, + RN5T567_DC3CTL = 0x30, + RN5T567_DC3CTL2 = 0x31, + RN5T567_DC4CTL = 0x32, + RN5T567_DC4CTL2 = 0x33, + + RN5T567_DC1DAC = 0x36, + RN5T567_DC2DAC = 0x37, + RN5T567_DC3DAC = 0x38, + RN5T567_DC4DAC = 0x39, + + RN5T567_DC1DAC_SLP = 0x3B, + RN5T567_DC2DAC_SLP = 0x3C, + RN5T567_DC3DAC_SLP = 0x3D, + RN5T567_DC4DAC_SLP = 0x3E, + + RN5T567_DCIREN = 0x40, + RN5T567_DCIRQ = 0x41, + RN5T567_DCIRMON = 0x42, + + RN5T567_LDOEN1 = 0x44, + RN5T567_LDOEN2 = 0x45, + RN5T567_LDODIS1 = 0x46, + + RN5T567_LDO1DAC = 0x4C, + RN5T567_LDO2DAC = 0x4D, + RN5T567_LDO3DAC = 0x4E, + RN5T567_LDO4DAC = 0x4F, + RN5T567_LDO5DAC = 0x50, + + RN5T567_LDORTC1DAC = 0x56, + RN5T567_LDORTC2DAC = 0x57, + + RN5T567_LDO1DAC_SLP = 0x58, + RN5T567_LDO2DAC_SLP = 0x59, + RN5T567_LDO3DAC_SLP = 0x5A, + RN5T567_LDO4DAC_SLP = 0x5B, + RN5T567_LDO5DAC_SLP = 0x5C, + + RN5T567_IOSEL = 0x90, + RN5T567_IOOUT = 0x91, + RN5T567_GPEDGE1 = 0x92, + RN5T567_EN_GPIR = 0x94, + RN5T567_IR_GPR = 0x95, + RN5T567_IR_GPF = 0x96, + RN5T567_MON_IOIN = 0x97, + RN5T567_GPLED_FUNC = 0x98, + RN5T567_INTPOL = 0x9C, + RN5T567_INTEN = 0x9D, + RN5T567_INTMON = 0x9E, + + RN5T567_PREVINDAC = 0xB0, + RN5T567_OVTEMP = 0xBC, + + RN5T567_NUM_OF_REGS = 0xBF, +}; + +#endif -- cgit v1.3.1