From 4e3d2972d1bb3f891a8c827553524328d6679d14 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Wed, 13 Aug 2025 16:07:39 +0200 Subject: dt-bindings: mfd: rk806: Allow to customize PMIC reset mode The RK806 PMIC allows to configure its reset/restart behavior whenever the PMIC is reset either programmatically or via some external pins (e.g. PWRCTRL or RESETB). The following modes exist: - 0; restart PMU, - 1; reset all power off reset registers and force state to switch to ACTIVE mode, - 2; same as mode 1 and also pull RESETB pin down for 5ms, For example, some hardware may require a full restart (mode 0) in order to function properly as regulators are shortly interrupted in this mode. This is the case for RK3588 Jaguar and RK3588 Tiger which have a companion microcontroller running on an independent power supply and monitoring the PMIC power rail to know the state of the main system. When it detects a restart, it resets its own IPs exposed to the main system as if to simulate its own reset. Failing to perform this fake reset of the microcontroller may break things (e.g. watchdog not automatically disabled, buzzer still running until manually disabled, leftover configuration from previous main system state, etc...). Some other systems may be depending on the power rails to not be interrupted even for a small amount of time[1]. This allows to specify how the PMIC should perform on the hardware level and may differ between hardware designs, so a DT property seems warranted. I unfortunately do not see how this could be made generic enough to make it a non-vendor property. [1] https://lore.kernel.org/linux-rockchip/2577051.irdbgypaU6@workhorse/ Reviewed-by: Krzysztof Kozlowski Signed-off-by: Quentin Schulz Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250627-rk8xx-rst-fun-v4-1-ce05d041b45f@cherry.de Signed-off-by: Lee Jones [ upstream commit: 404005d1083997daec7236620b9ba14bccdce449 ] (cherry picked from commit 8ee72356e9844265334fd344bc05139d1f615c4d) Reviewed-by: Kever Yang --- dts/upstream/Bindings/mfd/rockchip,rk806.yaml | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'dts') diff --git a/dts/upstream/Bindings/mfd/rockchip,rk806.yaml b/dts/upstream/Bindings/mfd/rockchip,rk806.yaml index 3c2b06629b7..eb5bca31948 100644 --- a/dts/upstream/Bindings/mfd/rockchip,rk806.yaml +++ b/dts/upstream/Bindings/mfd/rockchip,rk806.yaml @@ -31,6 +31,27 @@ properties: system-power-controller: true + rockchip,reset-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + description: + Mode to use when a reset of the PMIC is triggered. + + The reset can be triggered either programmatically, via one of + the PWRCTRL pins (provided additional configuration) or + asserting RESETB pin low. + + The following modes are supported + + - 0; restart PMU, + - 1; reset all power off reset registers and force state to + switch to ACTIVE mode, + - 2; same as mode 1 and also pull RESETB pin down for 5ms, + + For example, some hardware may require a full restart (mode 0) + in order to function properly as regulators are shortly + interrupted in this mode. + vcc1-supply: description: The input supply for dcdc-reg1. -- cgit v1.2.3 From 289083811724327844e69f21e6785d8cd3f358fe Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Wed, 13 Aug 2025 16:07:40 +0200 Subject: arm64: dts: rockchip: add header for RK8XX PMIC constants To make it easier to read the device tree, let's add constants for the rockchip,reset-mode property values that are currently only applicable to RK806 PMIC. Signed-off-by: Quentin Schulz [dt-maintainers did not consider this part of the binding, so we're keeping the header in the devicetree directory] Link: https://lore.kernel.org/r/20250627-rk8xx-rst-fun-v4-3-ce05d041b45f@cherry.de Signed-off-by: Heiko Stuebner [ upstream commit: 304be20e65ca08fc2e9cb58eb939a0054d8a8b81 ] (cherry picked from commit 0e417bfcbc385c127c7f5ea01df6289aed8325c2) Reviewed-by: Kever Yang --- dts/upstream/src/arm64/rockchip/rk8xx.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 dts/upstream/src/arm64/rockchip/rk8xx.h (limited to 'dts') diff --git a/dts/upstream/src/arm64/rockchip/rk8xx.h b/dts/upstream/src/arm64/rockchip/rk8xx.h new file mode 100644 index 00000000000..a6fbef71c06 --- /dev/null +++ b/dts/upstream/src/arm64/rockchip/rk8xx.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) */ +/* + * Device Tree defines for Rockchip RK8xx PMICs + * + * Copyright 2025 Cherry Embedded Solutions GmbH + * + * Author: Quentin Schulz + */ + +#ifndef _DT_MFD_ROCKCHIP_RK8XX_H +#define _DT_MFD_ROCKCHIP_RK8XX_H + +/* For use with rockchip,reset-mode property */ +#define RK806_RESTART 0 +#define RK806_RESET 1 +#define RK806_RESET_NOTIFY 2 + +#endif -- cgit v1.2.3 From 8df0eba814f666e92056909f59fd70b8e0af812d Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Wed, 13 Aug 2025 16:07:41 +0200 Subject: arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar The bootloader for RK3588 Jaguar currently forces the PMIC reset behavior (stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC) to 0b1X which is incorrect for our devices. It is required to restart the PMU as otherwise the companion microcontroller cannot detect the PMIC (and by extension the full product and main SoC) being rebooted which is an issue as that is used to reset a few things like the PWM beeper and watchdogs. Let's add the new rockchip,reset-mode property to make sure the PMIC reset behavior is the expected one. Signed-off-by: Quentin Schulz Link: https://lore.kernel.org/r/20250627-rk8xx-rst-fun-v4-4-ce05d041b45f@cherry.de Signed-off-by: Heiko Stuebner [ upstream commit: ee907113430aa02a8202c91bb574c385ecc28aa2 ] (cherry picked from commit 8bd14566b75f9409de703a0d2f9a0704b71a7ebe) Reviewed-by: Kever Yang --- dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'dts') diff --git a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts index ebe77cdd24e..176925d0a1a 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts @@ -10,6 +10,7 @@ #include #include #include +#include "rk8xx.h" #include "rk3588.dtsi" / { @@ -693,6 +694,7 @@ vcc13-supply = <&vcc_1v1_nldo_s3>; vcc14-supply = <&vcc_1v1_nldo_s3>; vcca-supply = <&vcc5v0_sys>; + rockchip,reset-mode = ; rk806_dvs1_null: dvs1-null-pins { pins = "gpio_pwrctrl1"; -- cgit v1.2.3 From 82d832716235f0f04782e66d7b25e711fe6afd6c Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Wed, 13 Aug 2025 16:07:42 +0200 Subject: arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger The bootloader for RK3588 Tiger currently forces the PMIC reset behavior (stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC) to 0b1X which is incorrect for our devices. It is required to restart the PMU as otherwise the companion microcontroller cannot detect the PMIC (and by extension the full product and main SoC) being rebooted which is an issue as that is used to reset a few things like the PWM beeper and watchdogs. Let's add the new rockchip,reset-mode property to make sure the PMIC reset behavior is the expected one. Signed-off-by: Quentin Schulz Link: https://lore.kernel.org/r/20250627-rk8xx-rst-fun-v4-5-ce05d041b45f@cherry.de Signed-off-by: Heiko Stuebner [ upstream commit: e82f642b9821384045915dc30e73df7de8424827 ] (cherry picked from commit d9c568906be166834f4f977bc7f704176bac5b8a) Reviewed-by: Kever Yang --- dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'dts') diff --git a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi index c4933a08dd1..b44e89e1bb1 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include "rk8xx.h" #include "rk3588.dtsi" / { @@ -440,6 +441,7 @@ vcc13-supply = <&vcc_1v1_nldo_s3>; vcc14-supply = <&vcc_1v1_nldo_s3>; vcca-supply = <&vcc5v0_sys>; + rockchip,reset-mode = ; rk806_dvs1_null: dvs1-null-pins { pins = "gpio_pwrctrl1"; -- cgit v1.2.3