From f7e2e0eb0668136305f78bb9c21be79b48a34247 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sat, 5 May 2007 18:27:16 +0200 Subject: new: FSL and MSR support --- include/asm-microblaze/asm.h | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 include/asm-microblaze/asm.h (limited to 'include/asm-microblaze') diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h new file mode 100644 index 00000000000..67475725e27 --- /dev/null +++ b/include/asm-microblaze/asm.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* FSL macros */ +#define NGET(val, fslnum) \ + __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val)); +#define GET(val, fslnum) \ + __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val)); +#define NPUT(val, fslnum) \ + __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val)); +#define PUT(val, fslnum) \ + __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val)); + +/* CPU dependent */ +#define RMSR(val) \ + __asm__ __volatile__ ("mfs %0,rmsr":"=r" (val)); -- cgit v1.3.1 From 48fbd3a4cdabbebc1debd7eed73c00c2caf914f6 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 7 May 2007 17:11:09 +0200 Subject: new: add writing to msr register --- board/xilinx/ml401/xparameters.h | 34 +++++++++++++++++++--------------- common/cmd_mfsl.c | 14 ++++++++++---- include/asm-microblaze/asm.h | 12 +++++++++--- 3 files changed, 38 insertions(+), 22 deletions(-) mode change 100644 => 100755 board/xilinx/ml401/xparameters.h (limited to 'include/asm-microblaze') diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h old mode 100644 new mode 100755 index f63ffed3dcc..2b0c045b9f9 --- a/board/xilinx/ml401/xparameters.h +++ b/board/xilinx/ml401/xparameters.h @@ -21,50 +21,54 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * - * * CAUTION: This file is automatically generated by libgen. - * Version: Xilinx EDK 6.3 EDK_Gmm.12.3 + * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 */ /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 /* Microblaze is microblaze_0 */ -#define XILINX_FSL_NUMBER 2 +#define XILINX_FSL_NUMBER 3 -/* Interrupt controller is intc_0 */ +/* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 4 +#define XILINX_INTC_NUM_INTR_INPUTS 5 -/* Timer pheriphery is opb_timer_0 */ +/* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 #define XILINX_TIMER_IRQ 0 -/* Uart pheriphery is console_uart */ +/* Uart pheriphery is RS232_Uart */ #define XILINX_UART_BASEADDR 0x40600000 #define XILINX_UART_BAUDRATE 115200 -/* GPIO is opb_gpio_0*/ -#define XILINX_GPIO_BASEADDR 0x90000000 +/* IIC pheriphery is IIC_EEPROM */ +#define XILINX_IIC_0_BASEADDR 0x40800000 +#define XILINX_IIC_0_FREQ 100000 +#define XILINX_IIC_0_BIT 0 + +/* GPIO is LEDs_4Bit*/ +#define XILINX_GPIO_BASEADDR 0x40000000 -/* Flash Memory is opb_emc_0 */ +/* Flash Memory is FLASH_2Mx32 */ #define XILINX_FLASH_START 0x2c000000 #define XILINX_FLASH_SIZE 0x00800000 -/* Main Memory is plb_ddr_0 */ +/* Main Memory is DDR_SDRAM_64Mx32 */ #define XILINX_RAM_START 0x28000000 #define XILINX_RAM_SIZE 0x04000000 -/* Sysace Controller is opb_sysace_0 */ +/* Sysace Controller is SysACE_CompactFlash */ #define XILINX_SYSACE_BASEADDR 0x41800000 -#define XILINX_SYSACE_HIGHADDR 0x4180FFFF +#define XILINX_SYSACE_HIGHADDR 0x4180ffff #define XILINX_SYSACE_MEM_WIDTH 16 -/* Ethernet controller is opb_ethernet_0 */ +/* Ethernet controller is Ethernet_MAC */ #define XPAR_XEMAC_NUM_INSTANCES 1 #define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 #define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0fFFF +#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff #define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 #define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 #define XPAR_OPB_ETHERNET_0_MII_EXIST 1 diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 827b75e6ce2..ca8a8897d57 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -238,13 +238,19 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) int do_rmsr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - int val = 0; + unsigned int val = 0; + val = (unsigned int)simple_strtoul (argv[1], NULL, 16); if (argc < 1) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } - RMSR (val); + if (argc > 1) { + MTS (val); + MFS (val); + } else { + MFS (val); + } printf ("rmsr: 0x%08lx\n", val); return 0; } @@ -259,7 +265,7 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, "fwr - write data to FSL\n", "- [fslnum data [0|x]], (0 - non blocking|x - blocking).\n"); -U_BOOT_CMD (rmsr, 1, 1, do_rmsr, +U_BOOT_CMD (rmsr, 3, 1, do_rmsr, "rmsr - read MSR register\n", "- read MSR register.\n"); -#endif /* CONFIG_MICROBLAZE & CFG_CMD_MFSL */ +#endif /* CONFIG_MICROBLAZE & CFG_CMD_MFSL */ diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h index 67475725e27..fcda31f4a89 100644 --- a/include/asm-microblaze/asm.h +++ b/include/asm-microblaze/asm.h @@ -31,7 +31,13 @@ __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val)); #define PUT(val, fslnum) \ __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val)); - + /* CPU dependent */ -#define RMSR(val) \ - __asm__ __volatile__ ("mfs %0,rmsr":"=r" (val)); +#define MFS(val) \ + __asm__ __volatile__ ("mfs %0, rmsr":"=r" (val)); + +#define MTS(val) \ + __asm__ __volatile__ ("mts rmsr, %0"::"r" (val)); + +#define R14(val) \ + __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val)); -- cgit v1.3.1 From 42efed6130c8fcf7da881385b5427065d2801757 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 7 May 2007 17:22:25 +0200 Subject: fix: interrupt handler for multiple sources --- cpu/microblaze/interrupts.c | 19 ++++++++++++------- cpu/microblaze/timer.c | 4 +--- include/asm-microblaze/microblaze_intc.h | 2 ++ 3 files changed, 15 insertions(+), 10 deletions(-) (limited to 'include/asm-microblaze') diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c index 2db847cd02c..115e58d7f08 100644 --- a/cpu/microblaze/interrupts.c +++ b/cpu/microblaze/interrupts.c @@ -27,6 +27,7 @@ #include #include #include +#include #undef DEBUG_INT @@ -106,7 +107,6 @@ void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg) act->count = 0; enable_one_interrupt (irq); } else { /* disable */ - act->handler = (interrupt_handler_t *) def_hdlr; act->arg = (void *)irq; disable_one_interrupt (irq); @@ -147,12 +147,13 @@ int interrupts_init (void) void interrupt_handler (void) { - int irqs; - irqs = (intc->isr & intc->ier); /* find active interrupt */ - + int irqs = (intc->isr & intc->ier); /* find active interrupt */ + int i = 1; #ifdef DEBUG_INT + int value; printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, intc->iar, intc->mer); + R14(value); printf ("Interrupt handler on %x line, r14 %x\n", irqs, value); #endif struct irq_action *act = vecs; @@ -165,15 +166,19 @@ void interrupt_handler (void) #endif act->handler (act->arg); act->count++; + intc->iar = i; + return; } irqs >>= 1; act++; + i <<= 1; } - intc->iar = 0xFFFFFFFF; /* erase all events */ -#ifdef DEBUG + +#ifdef DEBUG_INT printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, intc->iar, intc->mer); - printf ("Interrupt handler on %x line, r14\n", irqs); + R14(value); + printf ("Interrupt handler on %x line, r14 %x\n", irqs, value); #endif } #endif diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c index be4fd57cc49..ab1cb127492 100644 --- a/cpu/microblaze/timer.c +++ b/cpu/microblaze/timer.c @@ -24,6 +24,7 @@ #include #include +#include volatile int timestamp = 0; @@ -44,9 +45,6 @@ void set_timer (ulong t) #ifdef CFG_INTC_0 #ifdef CFG_TIMER_0 -extern void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, - void *arg); - microblaze_timer_t *tmr = (microblaze_timer_t *) (CFG_TIMER_0_ADDR); void timer_isr (void *arg) diff --git a/include/asm-microblaze/microblaze_intc.h b/include/asm-microblaze/microblaze_intc.h index 73f732c5667..4c385aa24f0 100644 --- a/include/asm-microblaze/microblaze_intc.h +++ b/include/asm-microblaze/microblaze_intc.h @@ -39,3 +39,5 @@ struct irq_action { int count; /* number of interrupt */ }; +void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, + void *arg); -- cgit v1.3.1 From fb05f6da35ea1c15c553abe6f23f656bf18dc5db Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 7 May 2007 23:58:31 +0200 Subject: new: USE_MSR_INTR support --- board/xilinx/ml401/xparameters.h | 3 ++- cpu/microblaze/cache.c | 9 +++++---- cpu/microblaze/interrupts.c | 4 ++-- cpu/microblaze/irq.S | 14 ++++++++++++++ include/asm-microblaze/asm.h | 37 +++++++++++++++++++++++++++++++++++++ 5 files changed, 60 insertions(+), 7 deletions(-) mode change 100644 => 100755 cpu/microblaze/cache.c mode change 100644 => 100755 cpu/microblaze/interrupts.c mode change 100644 => 100755 cpu/microblaze/irq.S mode change 100644 => 100755 include/asm-microblaze/asm.h (limited to 'include/asm-microblaze') diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h index 2b0c045b9f9..1a116ead1b7 100755 --- a/board/xilinx/ml401/xparameters.h +++ b/board/xilinx/ml401/xparameters.h @@ -29,11 +29,12 @@ #define XILINX_CLOCK_FREQ 100000000 /* Microblaze is microblaze_0 */ +#define XILINX_USE_MSR_INSTR 1 #define XILINX_FSL_NUMBER 3 /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 5 +#define XILINX_INTC_NUM_INTR_INPUTS 6 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c old mode 100644 new mode 100755 index 683044caeaa..4f36a84ec4b --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -23,6 +23,7 @@ */ #include +#include #if (CONFIG_COMMANDS & CFG_CMD_CACHE) @@ -47,18 +48,18 @@ int icache_status (void) } void icache_enable (void) { - __asm__ __volatile__ ("msrset r0, 0x80"); + MSRSET(0x20); } void icache_disable(void) { - __asm__ __volatile__ ("msrclr r0, 0x80"); + MSRCLR(0x20); } void dcache_enable (void) { - __asm__ __volatile__ ("msrset r0, 0x20"); + MSRSET(0x80); } void dcache_disable(void) { - __asm__ __volatile__ ("msrclr r0, 0x20"); + MSRCLR(0x80); } #endif diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c old mode 100644 new mode 100755 index dd6a0c7776a..b61153f8e6f --- a/cpu/microblaze/interrupts.c +++ b/cpu/microblaze/interrupts.c @@ -36,12 +36,12 @@ extern void microblaze_enable_interrupts (void); void enable_interrupts (void) { - __asm__ __volatile__ ("msrset r0, 0x2"); + MSRSET(0x2); } int disable_interrupts (void) { - __asm__ __volatile__ ("msrclr r0, 0x2"); + MSRCLR(0x2); return 0; } diff --git a/cpu/microblaze/irq.S b/cpu/microblaze/irq.S old mode 100644 new mode 100755 index 393d6e8dd42..e1fc19046c7 --- a/cpu/microblaze/irq.S +++ b/cpu/microblaze/irq.S @@ -23,6 +23,7 @@ */ #include +#include .text .global _interrupt_handler _interrupt_handler: @@ -151,7 +152,20 @@ _interrupt_handler: addi r1, r1, 4 /* enable_interrupt */ +#ifdef XILINX_USE_MSR_INSTR msrset r0, 2 +#else + /* FIXME unstable in stressed mode - two irqs */ + nop + addi r1, r1, -4 + swi r12, r1, 0 + mfs r12, rmsr + ori r12, r12, 2 + mts rmsr, r12 + lwi r12, r1, 0 + addi r1, r1, 4 + nop +#endif bra r14 nop nop diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h old mode 100644 new mode 100755 index fcda31f4a89..c59854a8603 --- a/include/asm-microblaze/asm.h +++ b/include/asm-microblaze/asm.h @@ -39,5 +39,42 @@ #define MTS(val) \ __asm__ __volatile__ ("mts rmsr, %0"::"r" (val)); +/* get return address from interrupt */ #define R14(val) \ __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val)); + +/* use machine status registe USE_MSR_REG */ +#ifdef XILINX_USE_MSR_INSTR +#define MSRSET(val) \ + __asm__ __volatile__ ("msrset r0," #val ); + +#define MSRCLR(val) \ + __asm__ __volatile__ ("msrclr r0," #val ); + +#else +#define MSRSET(val) \ +{ \ + register unsigned tmp; \ + __asm__ __volatile__ (" \ + mfs %0, rmsr; \ + ori %0, %0, "#val"; \ + mts rmsr, %0; \ + nop;" \ + : "=r" (tmp) \ + : "d" (val) \ + : "memory"); \ +} + +#define MSRCLR(val) \ +{ \ + register unsigned tmp; \ + __asm__ __volatile__ (" \ + mfs %0, rmsr; \ + andi %0, %0, ~"#val"; \ + mts rmsr, %0; \ + nop;" \ + : "=r" (tmp) \ + : "d" (val) \ + : "memory"); \ +} +#endif -- cgit v1.3.1 From ab874d5047e5d30dbc1e517ff26083efffa98ecb Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 8 May 2007 14:39:11 +0200 Subject: add: FSL control read and write --- common/cmd_mfsl.c | 267 +++++++++++++++++++++++++++++++------------ include/asm-microblaze/asm.h | 15 +++ 2 files changed, 210 insertions(+), 72 deletions(-) (limited to 'include/asm-microblaze') diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 7aa37afd3fa..3032489f08b 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -55,73 +55,129 @@ int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) switch (fslnum) { #if (XILINX_FSL_NUMBER > 0) case 0: - if (blocking) { - GET (num, 0); - } else { - NGET (num, 0); + switch (blocking) { + case 0: NGET (num, 0); + break; + case 1: NCGET (num, 0); + break; + case 2: GET (num, 0); + break; + case 3: CGET (num, 0); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 1) case 1: - if (blocking) { - GET (num, 1); - } else { - NGET (num, 1); + switch (blocking) { + case 0: NGET (num, 1); + break; + case 1: NCGET (num, 1); + break; + case 2: GET (num, 1); + break; + case 3: CGET (num, 1); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 2) case 2: - if (blocking) { - GET (num, 2); - } else { - NGET (num, 2); + switch (blocking) { + case 0: NGET (num, 2); + break; + case 1: NCGET (num, 2); + break; + case 2: GET (num, 2); + break; + case 3: CGET (num, 2); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 3) case 3: - if (blocking) { - GET (num, 3); - } else { - NGET (num, 3); + switch (blocking) { + case 0: NGET (num, 3); + break; + case 1: NCGET (num, 3); + break; + case 2: GET (num, 3); + break; + case 3: CGET (num, 3); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 4) case 4: - if (blocking) { - GET (num, 4); - } else { - NGET (num, 4); + switch (blocking) { + case 0: NGET (num, 4); + break; + case 1: NCGET (num, 4); + break; + case 2: GET (num, 4); + break; + case 3: CGET (num, 4); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 5) case 5: - if (blocking) { - GET (num, 5); - } else { - NGET (num, 5); + switch (blocking) { + case 0: NGET (num, 5); + break; + case 1: NCGET (num, 5); + break; + case 2: GET (num, 5); + break; + case 3: CGET (num, 5); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 6) case 6: - if (blocking) { - GET (num, 6); - } else { - NGET (num, 6); + switch (blocking) { + case 0: NGET (num, 6); + break; + case 1: NCGET (num, 6); + break; + case 2: GET (num, 6); + break; + case 3: CGET (num, 6); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 7) case 7: - if (blocking) { - GET (num, 7); - } else { - NGET (num, 7); + switch (blocking) { + case 0: NGET (num, 7); + break; + case 1: NCGET (num, 7); + break; + case 2: GET (num, 7); + break; + case 3: CGET (num, 7); + break; + default: + return 2; } break; #endif @@ -129,8 +185,9 @@ int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return 1; } - printf ("%01x: 0x%08lx - %s read\n", fslnum, num, - blocking ? "blocking" : "non blocking"); + printf ("%01x: 0x%08lx - %s %s read\n", fslnum, num, + blocking < 2 ? "non blocking" : "blocking", + ((blocking == 1) || (blocking == 3)) ? "control" : "data" ); return 0; } @@ -156,73 +213,129 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) switch (fslnum) { #if (XILINX_FSL_NUMBER > 0) case 0: - if (blocking) { - PUT (num, 0); - } else { - NPUT (num, 0); + switch (blocking) { + case 0: NPUT (num, 0); + break; + case 1: NCPUT (num, 0); + break; + case 2: PUT (num, 0); + break; + case 3: CPUT (num, 0); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 1) case 1: - if (blocking) { - PUT (num, 1); - } else { - NPUT (num, 1); + switch (blocking) { + case 0: NPUT (num, 1); + break; + case 1: NCPUT (num, 1); + break; + case 2: PUT (num, 1); + break; + case 3: CPUT (num, 1); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 2) case 2: - if (blocking) { - PUT (num, 2); - } else { - NPUT (num, 2); + switch (blocking) { + case 0: NPUT (num, 2); + break; + case 1: NCPUT (num, 2); + break; + case 2: PUT (num, 2); + break; + case 3: CPUT (num, 2); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 3) case 3: - if (blocking) { - PUT (num, 3); - } else { - NPUT (num, 3); + switch (blocking) { + case 0: NPUT (num, 3); + break; + case 1: NCPUT (num, 3); + break; + case 2: PUT (num, 3); + break; + case 3: CPUT (num, 3); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 4) case 4: - if (blocking) { - PUT (num, 4); - } else { - NPUT (num, 4); + switch (blocking) { + case 0: NPUT (num, 4); + break; + case 1: NCPUT (num, 4); + break; + case 2: PUT (num, 4); + break; + case 3: CPUT (num, 4); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 5) case 5: - if (blocking) { - PUT (num, 5); - } else { - NPUT (num, 5); + switch (blocking) { + case 0: NPUT (num, 5); + break; + case 1: NCPUT (num, 5); + break; + case 2: PUT (num, 5); + break; + case 3: CPUT (num, 5); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 6) case 6: - if (blocking) { - PUT (num, 6); - } else { - NPUT (num, 6); + switch (blocking) { + case 0: NPUT (num, 6); + break; + case 1: NCPUT (num, 6); + break; + case 2: PUT (num, 6); + break; + case 3: CPUT (num, 6); + break; + default: + return 2; } break; #endif #if (XILINX_FSL_NUMBER > 7) case 7: - if (blocking) { - PUT (num, 7); - } else { - NPUT (num, 7); + switch (blocking) { + case 0: NPUT (num, 7); + break; + case 1: NCPUT (num, 7); + break; + case 2: PUT (num, 7); + break; + case 3: CPUT (num, 7); + break; + default: + return 2; } break; #endif @@ -230,8 +343,9 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return 1; } - printf ("%01x: 0x%08lx - %s write\n", fslnum, num, - blocking ? "blocking" : "non blocking"); + printf ("%01x: 0x%08lx - %s %s write\n", fslnum, num, + blocking < 2 ? "non blocking" : "blocking", + ((blocking == 1) || (blocking == 3)) ? "control" : "data" ); return 0; } @@ -258,12 +372,21 @@ int do_rmsr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /***************************************************/ U_BOOT_CMD (frd, 3, 1, do_frd, - "frd - read data from FSL\n", - "- [fslnum [0|x]], (0 - non blocking|x - blocking).\n"); + "frd - read data from FSL\n", + "- [fslnum [0|1|2|3]]\n" + " 0 - non blocking data read\n" + " 1 - non blocking control read\n" + " 2 - blocking data read\n" + " 3 - blocking control read\n"); + U_BOOT_CMD (fwr, 4, 1, do_fwr, - "fwr - write data to FSL\n", - "- [fslnum data [0|x]], (0 - non blocking|x - blocking).\n"); + "fwr - write data to FSL\n", + "- [fslnum [0|1|2|3]]\n" + " 0 - non blocking data write\n" + " 1 - non blocking control write\n" + " 2 - blocking data write\n" + " 3 - blocking control write\n"); U_BOOT_CMD (rmsr, 2, 1, do_rmsr, "rmsr - read MSR register\n", "- read MSR register.\n"); diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h index c59854a8603..26e369119e1 100755 --- a/include/asm-microblaze/asm.h +++ b/include/asm-microblaze/asm.h @@ -25,13 +25,28 @@ /* FSL macros */ #define NGET(val, fslnum) \ __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val)); + #define GET(val, fslnum) \ __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val)); + +#define NCGET(val, fslnum) \ + __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val)); + +#define CGET(val, fslnum) \ + __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val)); + #define NPUT(val, fslnum) \ __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val)); + #define PUT(val, fslnum) \ __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val)); +#define NCPUT(val, fslnum) \ + __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val)); + +#define CPUT(val, fslnum) \ + __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val)); + /* CPU dependent */ #define MFS(val) \ __asm__ __volatile__ ("mfs %0, rmsr":"=r" (val)); -- cgit v1.3.1 From 1a50f164beb065f360fbddb76029607d6b099698 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 8 May 2007 14:52:52 +0200 Subject: add: Microblaze V5 exception handling --- cpu/microblaze/exception.c | 10 ++++++++-- include/asm-microblaze/asm.h | 8 ++++++++ include/configs/ml401.h | 1 + 3 files changed, 17 insertions(+), 2 deletions(-) (limited to 'include/asm-microblaze') diff --git a/cpu/microblaze/exception.c b/cpu/microblaze/exception.c index b135acbad9d..87ecbeaa49a 100644 --- a/cpu/microblaze/exception.c +++ b/cpu/microblaze/exception.c @@ -23,15 +23,16 @@ */ #include +#include void _hw_exception_handler (void) { int address = 0; int state = 0; /* loading address of exception EAR */ - __asm__ __volatile ("mfs %0,rear"::"r" (address):"memory"); + MFSEAR(address); /* loading excetpion state register ESR */ - __asm__ __volatile ("mfs %0,resr"::"r" (state):"memory"); + MFSESR(state); printf ("Hardware exception at 0x%x address\n", address); switch (state & 0x1f) { /* mask on exception cause */ case 0x1: @@ -49,6 +50,11 @@ void _hw_exception_handler (void) case 0x5: puts ("Divide by zero exception\n"); break; +#ifdef MICROBLAZE_V5 + case 0x1000: + puts ("Exception in delay slot\n"); + break; +#endif default: puts ("Undefined cause\n"); break; diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h index 26e369119e1..8302ed88507 100755 --- a/include/asm-microblaze/asm.h +++ b/include/asm-microblaze/asm.h @@ -48,12 +48,20 @@ __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val)); /* CPU dependent */ +/* machine status register */ #define MFS(val) \ __asm__ __volatile__ ("mfs %0, rmsr":"=r" (val)); #define MTS(val) \ __asm__ __volatile__ ("mts rmsr, %0"::"r" (val)); +/* exception status register */ +#define MFSEAR(val) \ + __asm__ __volatile ("mfs %0,rear":"=r" (val)); + +#define MFSESR(val) \ + __asm__ __volatile ("mfs %0,resr":"=r" (val)); + /* get return address from interrupt */ #define R14(val) \ __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val)); diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 327d31c103a..4cfe802c36a 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -28,6 +28,7 @@ #include "../board/xilinx/ml401/xparameters.h" #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +#define MICROBLAZE_V5 1 #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -- cgit v1.3.1 From e69f66c6ebe82bbbd1da766bc4eda40ec7ee5af1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 8 May 2007 15:57:43 +0200 Subject: add: reading special purpose registers --- common/cmd_mfsl.c | 43 +++++++++++++++++++++++++++++++++---------- cpu/microblaze/exception.c | 4 ++-- include/asm-microblaze/asm.h | 17 ++++++----------- 3 files changed, 41 insertions(+), 23 deletions(-) (limited to 'include/asm-microblaze') diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 3032489f08b..26786aa8cd7 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -350,22 +350,41 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) } -int do_rmsr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { + unsigned int reg = 0; unsigned int val = 0; - val = (unsigned int)simple_strtoul (argv[1], NULL, 16); + reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); + val = (unsigned int)simple_strtoul (argv[2], NULL, 16); if (argc < 1) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } - if (argc > 1) { - MTS (val); - MFS (val); - } else { - MFS (val); + switch (reg) { + case 0x1: + if (argc > 2) { + MTS (val, rmsr); + NOP; + MFS (val, rmsr); + + } else { + MFS (val, rmsr); + } + puts ("MSR"); + break; + case 0x3: + MFS (val, rear); + puts ("EAR"); + break; + case 0x5: + MFS (val, resr); + puts ("ESR"); + break; + default: + return 1; } - printf ("rmsr: 0x%08lx\n", val); + printf (": 0x%08lx\n", val); return 0; } @@ -388,7 +407,11 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 2 - blocking data write\n" " 3 - blocking control write\n"); -U_BOOT_CMD (rmsr, 2, 1, do_rmsr, - "rmsr - read MSR register\n", "- read MSR register.\n"); +U_BOOT_CMD (rspr, 3, 1, do_rspr, + "rmsr - read/write special purpose register\n", + "- reg_num [write value] read/write special purpose register\n" + " 0 - MSR - Machine status register\n" + " 1 - EAR - Exception address register\n" + " 2 - ESR - Exception status register\n"); #endif /* CONFIG_MICROBLAZE & CFG_CMD_MFSL */ diff --git a/cpu/microblaze/exception.c b/cpu/microblaze/exception.c index 87ecbeaa49a..d76b05a5262 100644 --- a/cpu/microblaze/exception.c +++ b/cpu/microblaze/exception.c @@ -30,9 +30,9 @@ void _hw_exception_handler (void) int address = 0; int state = 0; /* loading address of exception EAR */ - MFSEAR(address); + MFS (address, rear); /* loading excetpion state register ESR */ - MFSESR(state); + MFS (state, resr); printf ("Hardware exception at 0x%x address\n", address); switch (state & 0x1f) { /* mask on exception cause */ case 0x1: diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h index 8302ed88507..f10f89c941a 100755 --- a/include/asm-microblaze/asm.h +++ b/include/asm-microblaze/asm.h @@ -49,23 +49,18 @@ /* CPU dependent */ /* machine status register */ -#define MFS(val) \ - __asm__ __volatile__ ("mfs %0, rmsr":"=r" (val)); +#define MFS(val, reg) \ + __asm__ __volatile__ ("mfs %0," #reg :"=r" (val)); -#define MTS(val) \ - __asm__ __volatile__ ("mts rmsr, %0"::"r" (val)); - -/* exception status register */ -#define MFSEAR(val) \ - __asm__ __volatile ("mfs %0,rear":"=r" (val)); - -#define MFSESR(val) \ - __asm__ __volatile ("mfs %0,resr":"=r" (val)); +#define MTS(val, reg) \ + __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val)); /* get return address from interrupt */ #define R14(val) \ __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val)); +#define NOP __asm__ __volatile__ ("nop"); + /* use machine status registe USE_MSR_REG */ #ifdef XILINX_USE_MSR_INSTR #define MSRSET(val) \ -- cgit v1.3.1