From 81f481ca708ed6a56bf9c410e3191dbad581c565 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Mon, 23 Apr 2007 02:24:28 -0500 Subject: Enable 8544 support * Add support to the Makefile * Add 8544 configuration support to the tsec driver * Add 8544 SVR numbers to processor.h Signed-off-by: Ed Swarthout Signed-off-by: Jon Loeliger --- include/asm-ppc/processor.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'include/asm-ppc/processor.h') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 058596275f4..944cbe90c38 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -232,6 +232,9 @@ #define HID0_BHTE (1<<2) /* Branch History Table Enable */ #define HID0_BTCD (1<<1) /* Branch target cache disable */ #define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ +#define HID1_RFXE (1<<17) /* Read Fault Exception Enable */ +#define HID1_ASTME (1<<13) /* Address bus streaming mode */ +#define HID1_ABE (1<<12) /* Address broadcast enable */ #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ #ifndef CONFIG_BOOKE #define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */ @@ -415,10 +418,12 @@ #define SPRN_IVOR15 0x19f /* Interrupt Vector Offset Register 15 */ /* e500 definitions */ -#define SPRN_L1CSR0 0x3f2 /* L1 Cache Control and Status Register 0 */ +#define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */ +#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ -#define SPRN_L1CSR1 0x3f3 /* L1 Cache Control and Status Register 1 */ +#define SPRN_L1CSR1 0x3f3 /* L1 Instruction Cache Control and Status Register 1 */ +#define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ #define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */ #define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ @@ -840,6 +845,8 @@ #define SVR_8560 0x8070 #define SVR_8555 0x8079 #define SVR_8541 0x807A +#define SVR_8544 0x8034 +#define SVR_8544_E 0x803C #define SVR_8548 0x8031 #define SVR_8548_E 0x8039 #define SVR_8641 0x8090 -- cgit v1.2.3 From 6743105988fc44d5b0d30388c790607835aae7a6 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Mon, 23 Apr 2007 02:54:25 -0500 Subject: Add support for the 8568 MDS board This included some changes to common files: * Add 8568 processor SVR to various places * Add support for setting the qe bus-frequency value in the dts * Add the 8568MDS target to the Makefile Signed-off-by: Andy Fleming --- include/asm-ppc/processor.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/asm-ppc/processor.h') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 944cbe90c38..e9361c5174b 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -850,6 +850,7 @@ #define SVR_8548 0x8031 #define SVR_8548_E 0x8039 #define SVR_8641 0x8090 +#define SVR_8568_E 0x807D /* I am just adding a single entry for 8260 boards. I think we may be -- cgit v1.2.3 From a9d87e2707dcb249f6bb7f7ff7e00acd8cda9fd2 Mon Sep 17 00:00:00 2001 From: Grzegorz Wianecki Date: Sun, 29 Apr 2007 14:01:54 +0200 Subject: [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up message. Use PVR to distinguish between the two variants, and print proper CPU information. Signed-off-by: Grzegorz Wianecki Signed-off-by: Bartlomiej Sieka Signed-off-by: Grant Likely --- include/asm-ppc/processor.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include/asm-ppc/processor.h') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index e9361c5174b..5efc3ee2ca7 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -706,8 +706,6 @@ #define SVR_MJREV(svr) (((svr) >> 4) & 0x0F) /* Major SOC design revision indicator */ #define SVR_MNREV(svr) (((svr) >> 0) & 0x0F) /* Minor SOC design revision indicator */ -/* System-On-Chip Version Numbers (version field only) */ -#define SVR_MPC5200 0x8011 /* Processor Version Register */ @@ -818,6 +816,12 @@ #define PVR_8260_HIP7R1 0x80822013 #define PVR_8260_HIP7RA 0x80822014 +/* + * MPC 52xx + */ +#define PVR_5200 0x80822011 +#define PVR_5200B 0x80822014 + /* * System Version Register -- cgit v1.2.3