From d9b94f28a442b0013caef99de084d7b72e2d4607 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Mon, 25 Jul 2005 14:05:07 -0500 Subject: * Patch by Jon Loeliger, 2005-05-05 Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O --- include/asm-ppc/processor.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/asm-ppc/processor.h') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 71fadbc918b..20949dcc397 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -420,6 +420,7 @@ #define SPRN_MAS4 0x274 /* MMU Assist Register 4 */ #define SPRN_MAS5 0x275 /* MMU Assist Register 5 */ #define SPRN_MAS6 0x276 /* MMU Assist Register 6 */ +#define SPRN_MAS7 0x3B0 /* MMU Assist Register 7 */ #define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */ #define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */ @@ -584,6 +585,7 @@ #define MAS4 SPRN_MAS4 #define MAS5 SPRN_MAS5 #define MAS6 SPRN_MAS6 +#define MAS7 SPRN_MAS7 /* Device Control Registers */ @@ -792,6 +794,8 @@ #define SVR_8560 0x8070 #define SVR_8555 0x8079 #define SVR_8541 0x807A +#define SVR_8548 0x8031 +#define SVR_8548_E 0x8039 /* I am just adding a single entry for 8260 boards. I think we may be -- cgit v1.2.3