From d6cb09d89d52d087881695c1f4e5e1ff26328267 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Thu, 5 May 2022 01:25:43 +0100 Subject: clk: sunxi: add and use dummy gate clocks Some devices enumerate various clocks in their DT, and many drivers just blanketly try to enable all of them. This creates problems since we only model a few gate clocks, and the clock driver outputs a warning when a clock is not described: ========= sunxi_set_gate: (CLK#3) unhandled ========= Some clocks don't have an enable bit, or are already enabled in a different way, so we might want to just ignore them. Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define a GATE_DUMMY macro that can be used in the clock description array. Define a few clocks, used by some pinctrl devices, that way to suppress the runtime warnings. Signed-off-by: Andre Przywara Reviewed-by: Samuel Holland --- include/clk/sunxi.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/clk') diff --git a/include/clk/sunxi.h b/include/clk/sunxi.h index a2239b990b8..c4a9dee5ebf 100644 --- a/include/clk/sunxi.h +++ b/include/clk/sunxi.h @@ -18,6 +18,7 @@ enum ccu_flags { CCU_CLK_F_IS_VALID = BIT(0), CCU_RST_F_IS_VALID = BIT(1), + CCU_CLK_F_DUMMY_GATE = BIT(2), }; /** @@ -38,6 +39,10 @@ struct ccu_clk_gate { .flags = CCU_CLK_F_IS_VALID, \ } +#define GATE_DUMMY { \ + .flags = CCU_CLK_F_DUMMY_GATE, \ +} + /** * struct ccu_reset - ccu reset * @off: reset offset -- cgit v1.2.3