From 5a15ec19c84ebcca0a45870d28c3a3f7f5c085f5 Mon Sep 17 00:00:00 2001 From: Jason Rush Date: Tue, 23 Jan 2018 17:13:11 -0600 Subject: config: cadence_spi: Remove defines read from DT Cleanup unused #define values that are read from the DT. Tested on TI K2G platform: Tested-by: Vignesh R Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt Signed-off-by: Jason Rush Reviewed-by: Jagan Teki Acked-by: Simon Goldschmidt Acked-by: Marek Vasut --- include/configs/k2g_evm.h | 1 - include/configs/socfpga_common.h | 1 - include/configs/stv0991.h | 1 - 3 files changed, 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index df81c09d863..535e7124fc8 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -93,7 +93,6 @@ #ifndef CONFIG_SPL_BUILD #define CONFIG_CADENCE_QSPI #define CONFIG_CQSPI_REF_CLK 384000000 -#define CONFIG_CQSPI_DECODER 0x0 #define CONFIG_BOUNCE_BUFFER #endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 66e7c4fc8b2..ec8bb500504 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -184,7 +184,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() #endif -#define CONFIG_CQSPI_DECODER 0 #define CONFIG_BOUNCE_BUFFER /* diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index c99fb676cbf..fd96979bf89 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -63,7 +63,6 @@ + * QSPI support + */ #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ -#define CONFIG_CQSPI_DECODER 0 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 #define CONFIG_BOUNCE_BUFFER -- cgit v1.2.3 From a743e2ba3837db5e8499b03f0f57c3610d03a570 Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Wed, 24 Jan 2018 10:44:06 +0530 Subject: Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible" This reverts commit 57897c13de03ac0136d64641a3eab526c6810387. Using bounce_buf.c to handle non-DMA alignment problems is bad as bounce_buf.c does cache manipulations which is not required. Therefore revert this patch in favour of local bounce buffer solution in the next patch. Signed-off-by: Vignesh R Acked-by: Marek Vasut Acked-by: Simon Goldschmidt Reviewed-by: Jason Rush Acked-by: Jason Rush Reviewed-by: Jagan Teki --- include/configs/k2g_evm.h | 1 - include/configs/socfpga_common.h | 1 - include/configs/stv0991.h | 1 - 3 files changed, 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 535e7124fc8..0a38922a519 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -93,7 +93,6 @@ #ifndef CONFIG_SPL_BUILD #define CONFIG_CADENCE_QSPI #define CONFIG_CQSPI_REF_CLK 384000000 -#define CONFIG_BOUNCE_BUFFER #endif #define SPI_MTD_PARTS KEYSTONE_SPI1_MTD_PARTS diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index ec8bb500504..f6607b101ec 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -184,7 +184,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() #endif -#define CONFIG_BOUNCE_BUFFER /* * Designware SPI support diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index fd96979bf89..beb8f1ae9a9 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -64,7 +64,6 @@ + */ #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 -#define CONFIG_BOUNCE_BUFFER #endif -- cgit v1.2.3