From 6b9cdb716f64d284046221e05bd10673c287bd05 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 17:54:35 +0100 Subject: arm: socfpga: arria5-socdk: Remove Micrel PHY configuration The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut Cc: Joe Hershberger Cc: Chin Liang See Cc: Dinh Nguyen --- include/configs/socfpga_arria5_socdk.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index ebb6ed50f94..465df54fc3a 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -47,15 +47,8 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) - -/* PHY */ #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9021 -#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" -#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 -#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" -#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0 - #endif #define CONFIG_ENV_IS_IN_MMC -- cgit v1.3.1 From b5aaa03634a171d04824336b42790f3e77203bf2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 17:55:19 +0100 Subject: arm: socfpga: cyclone5-socdk: Remove Micrel PHY configuration The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut Cc: Joe Hershberger Cc: Chin Liang See Cc: Dinh Nguyen --- board/altera/cyclone5-socdk/socfpga.c | 40 -------------------------------- include/configs/socfpga_cyclone5_socdk.h | 7 ------ 2 files changed, 47 deletions(-) (limited to 'include/configs') diff --git a/board/altera/cyclone5-socdk/socfpga.c b/board/altera/cyclone5-socdk/socfpga.c index 0fbbc3456ca..ccb1b4b063e 100644 --- a/board/altera/cyclone5-socdk/socfpga.c +++ b/board/altera/cyclone5-socdk/socfpga.c @@ -12,10 +12,6 @@ #include #include -#include -#include -#include - DECLARE_GLOBAL_DATA_PTR; void s_init(void) {} @@ -31,42 +27,6 @@ int board_init(void) return 0; } -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9021 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf0f0); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif - #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 67bb35fa074..5e4a7098049 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -47,15 +47,8 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) - -/* PHY */ #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9021 -#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" -#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 -#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" -#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0 - #endif #define CONFIG_ENV_IS_IN_MMC -- cgit v1.3.1 From 5df93c556445940a5e96e511d11497db382a409a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:00:00 +0100 Subject: arm: socfpga: de0_nano: Remove Micrel PHY configuration The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut Cc: Joe Hershberger Cc: Chin Liang See Cc: Dinh Nguyen --- board/terasic/de0-nano-soc/socfpga.c | 50 ---------------------------------- include/configs/socfpga_de0_nano_soc.h | 3 -- 2 files changed, 53 deletions(-) (limited to 'include/configs') diff --git a/board/terasic/de0-nano-soc/socfpga.c b/board/terasic/de0-nano-soc/socfpga.c index 85700b05bef..3ccc2a72308 100644 --- a/board/terasic/de0-nano-soc/socfpga.c +++ b/board/terasic/de0-nano-soc/socfpga.c @@ -6,10 +6,6 @@ #include -#include -#include -#include - DECLARE_GLOBAL_DATA_PTR; void s_init(void) {} @@ -24,49 +20,3 @@ int board_init(void) return 0; } - -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9031 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x70); - if (ret) - return ret; - - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x7777); - if (ret) - return ret; - - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0); - if (ret) - return ret; - - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x03FC); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index 16e146ce550..870192d31b1 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -47,11 +47,8 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) - -/* PHY */ #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9031 - #endif #define CONFIG_ENV_IS_IN_MMC -- cgit v1.3.1 From 1f5f18717254d6d0c0758580980ff096a8587b9d Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 17:55:54 +0100 Subject: arm: socfpga: sockit: Remove Micrel PHY configuration The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut Cc: Joe Hershberger Cc: Chin Liang See Cc: Dinh Nguyen --- board/terasic/sockit/socfpga.c | 40 ---------------------------------------- include/configs/socfpga_sockit.h | 7 ------- 2 files changed, 47 deletions(-) (limited to 'include/configs') diff --git a/board/terasic/sockit/socfpga.c b/board/terasic/sockit/socfpga.c index 0fbbc3456ca..ccb1b4b063e 100644 --- a/board/terasic/sockit/socfpga.c +++ b/board/terasic/sockit/socfpga.c @@ -12,10 +12,6 @@ #include #include -#include -#include -#include - DECLARE_GLOBAL_DATA_PTR; void s_init(void) {} @@ -31,42 +27,6 @@ int board_init(void) return 0; } -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9021 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf0f0); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif - #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index 5bcee05c729..c1178acee72 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -47,15 +47,8 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) - -/* PHY */ #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9021 -#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" -#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 -#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" -#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0 - #endif #define CONFIG_ENV_IS_IN_MMC -- cgit v1.3.1 From faed7ac8fa0f94c23cfef20684a268891a1a9fd2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 17:55:36 +0100 Subject: arm: socfpga: socrates: Remove Micrel PHY configuration The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut Cc: Joe Hershberger Cc: Chin Liang See Cc: Dinh Nguyen --- board/ebv/socrates/socfpga.c | 40 -------------------------------------- include/configs/socfpga_socrates.h | 7 ------- 2 files changed, 47 deletions(-) (limited to 'include/configs') diff --git a/board/ebv/socrates/socfpga.c b/board/ebv/socrates/socfpga.c index 0fbbc3456ca..ccb1b4b063e 100644 --- a/board/ebv/socrates/socfpga.c +++ b/board/ebv/socrates/socfpga.c @@ -12,10 +12,6 @@ #include #include -#include -#include -#include - DECLARE_GLOBAL_DATA_PTR; void s_init(void) {} @@ -31,42 +27,6 @@ int board_init(void) return 0; } -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9021 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf0f0); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif - #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index 16a2a8640ce..de8ced6ba1a 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -43,15 +43,8 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) - -/* PHY */ #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9021 -#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" -#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 -#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" -#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0 - #endif #define CONFIG_ENV_IS_IN_MMC -- cgit v1.3.1 From 70311e69fa7f0b7c289eb6552ccc3f9fb7320c69 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_arria5_socdk.dts | 1 + board/altera/arria5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_arria5_defconfig | 2 ++ include/configs/socfpga_arria5_socdk.h | 3 --- 4 files changed, 22 insertions(+), 5 deletions(-) (limited to 'include/configs') diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 7d1836e8be7..5933a406cb0 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; }; regulator_3_3v: 3-3-v-regulator { diff --git a/board/altera/arria5-socdk/socfpga.c b/board/altera/arria5-socdk/socfpga.c index ccb1b4b063e..449f3b5d501 100644 --- a/board/altera/arria5-socdk/socfpga.c +++ b/board/altera/arria5-socdk/socfpga.c @@ -5,12 +5,12 @@ */ #include +#include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -29,12 +29,29 @@ int board_init(void) #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); } diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index f59bc00e61e..10eb91d1b2f 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index 465df54fc3a..d2411e6700c 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Altera" /* Extra Environment */ -- cgit v1.3.1 From c90ada94fba5486d4b4d3773013804982ccadb56 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_socdk.dts | 9 +++++---- board/altera/cyclone5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_cyclone5_defconfig | 2 ++ include/configs/socfpga_cyclone5_socdk.h | 3 --- 4 files changed, 26 insertions(+), 9 deletions(-) (limited to 'include/configs') diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index 9eb5a2209c6..224928f7557 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; }; regulator_3_3v: 3-3-v-regulator { @@ -77,10 +78,6 @@ vqmmc-supply = <®ulator_3_3v>; }; -&usb1 { - status = "okay"; -}; - &qspi { status = "okay"; @@ -100,3 +97,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/altera/cyclone5-socdk/socfpga.c b/board/altera/cyclone5-socdk/socfpga.c index ccb1b4b063e..449f3b5d501 100644 --- a/board/altera/cyclone5-socdk/socfpga.c +++ b/board/altera/cyclone5-socdk/socfpga.c @@ -5,12 +5,12 @@ */ #include +#include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -29,12 +29,29 @@ int board_init(void) #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); } diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index c0d6913425e..864358c9519 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 5e4a7098049..76d29a3f780 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Altera" /* Extra Environment */ -- cgit v1.3.1 From 5b5226a8e68eae394aed7ca2d7691ebd7ef8ba4e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 5 +++++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ include/configs/socfpga_de0_nano_soc.h | 3 --- 3 files changed, 7 insertions(+), 3 deletions(-) (limited to 'include/configs') diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts index b649c9ac089..dc09bed9019 100644 --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts @@ -16,6 +16,7 @@ aliases { ethernet0 = &gmac1; + udc0 = &usb1; }; memory { @@ -59,3 +60,7 @@ status = "okay"; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +}; diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index a4f75e6f01e..65c119717bc 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -19,3 +19,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index 870192d31b1..d27aa9b2c11 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Terasic" /* Extra Environment */ -- cgit v1.3.1 From 9368aa6a680f150755a233be9f97956bba5a915e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 5 +++++ board/denx/mcvevk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_mcvevk_defconfig | 2 ++ include/configs/socfpga_mcvevk.h | 3 --- 4 files changed, 26 insertions(+), 5 deletions(-) (limited to 'include/configs') diff --git a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts index e1e3d738bc4..7d3f9894723 100644 --- a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts +++ b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts @@ -16,6 +16,7 @@ aliases { ethernet0 = &gmac0; + udc0 = &usb1; }; memory { @@ -51,3 +52,7 @@ bus-width = <8>; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/denx/mcvevk/socfpga.c b/board/denx/mcvevk/socfpga.c index 0f93722dfbd..d77d7ad4f7f 100644 --- a/board/denx/mcvevk/socfpga.c +++ b/board/denx/mcvevk/socfpga.c @@ -5,12 +5,12 @@ */ #include +#include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -29,12 +29,29 @@ int board_init(void) #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); } diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 382db6561b4..c98d4a14bca 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -19,3 +19,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index d051eeca664..b2c1f75e99c 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -49,9 +49,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "DENX" /* Extra Environment */ -- cgit v1.3.1 From 225217da2804d1c61725e2974262bd2f27882cd7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_sockit.dts | 9 +++++++-- board/terasic/sockit/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_sockit_defconfig | 2 ++ include/configs/socfpga_sockit.h | 3 --- 4 files changed, 28 insertions(+), 7 deletions(-) (limited to 'include/configs') diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts index d7c41c83533..e45c2abbc2b 100644 --- a/arch/arm/dts/socfpga_cyclone5_sockit.dts +++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts @@ -14,9 +14,10 @@ bootargs = "console=ttyS0,115200"; }; - aliases { + aliases { ethernet0 = &gmac1; - }; + udc0 = &usb1; + }; memory { name = "memory"; @@ -90,3 +91,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/terasic/sockit/socfpga.c b/board/terasic/sockit/socfpga.c index ccb1b4b063e..1fe8c1cbf99 100644 --- a/board/terasic/sockit/socfpga.c +++ b/board/terasic/sockit/socfpga.c @@ -5,12 +5,12 @@ */ #include +#include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -29,12 +29,29 @@ int board_init(void) #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return -EINVAL; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); } diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 03f8effcbaa..b4f41a939d1 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -23,3 +23,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index c1178acee72..eefe01c5c87 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Terasic" /* Extra Environment */ -- cgit v1.3.1 From b5a5d2bd967781818ab1eadcd3ce779d01676e2e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-) (limited to 'include/configs') diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index a18d16856b4..591d96c4120 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -14,6 +14,10 @@ bootargs = "console=ttyS0,115200"; }; + aliases { + udc0 = &usb1; + }; + memory { name = "memory"; device_type = "memory"; @@ -72,3 +76,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/ebv/socrates/socfpga.c b/board/ebv/socrates/socfpga.c index ccb1b4b063e..449f3b5d501 100644 --- a/board/ebv/socrates/socfpga.c +++ b/board/ebv/socrates/socfpga.c @@ -5,12 +5,12 @@ */ #include +#include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -29,12 +29,29 @@ int board_init(void) #ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); } diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 932f0e8c2dd..fe940f967a6 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -22,3 +22,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index de8ced6ba1a..1b0888f36be 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -52,9 +52,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "EBV" /* Extra Environment */ -- cgit v1.3.1 From ac5516dd30bd3ec125ba98e32e2eb656793a9532 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 20:00:52 +0100 Subject: arm: socfpga: de0_nano: Zap VIRTUAL_TARGET There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen --- include/configs/socfpga_de0_nano_soc.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index d27aa9b2c11..600789509a4 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -37,11 +37,7 @@ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "fitImage" #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) -#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET -#define CONFIG_BOOTCOMMAND "run ramboot" -#else #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" -#endif #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- cgit v1.3.1 From 92232747bb99e1f72860dd4ed293402f21667358 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 20:01:40 +0100 Subject: arm: socfpga: sockit: Zap VIRTUAL_TARGET There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen --- include/configs/socfpga_sockit.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index eefe01c5c87..924de3f7abf 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -37,11 +37,7 @@ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "fitImage" #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) -#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET -#define CONFIG_BOOTCOMMAND "run ramboot" -#else #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" -#endif #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- cgit v1.3.1 From a5cad67735a1f098c22ec30941f1bd0422459069 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 20:05:46 +0100 Subject: arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDOR We already have the CONFIG_SYS_VENDOR variable, which defines the manufacturer of the board. The value in CONFIG_G_DNL_MANUFACTURER is just a duplicity, so switch it to reuse CONFIG_SYS_VENDOR . Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen --- include/configs/socfpga_arria5_socdk.h | 3 --- include/configs/socfpga_common.h | 2 +- include/configs/socfpga_cyclone5_socdk.h | 3 --- include/configs/socfpga_de0_nano_soc.h | 3 --- include/configs/socfpga_mcvevk.h | 3 --- include/configs/socfpga_sockit.h | 3 --- include/configs/socfpga_socrates.h | 3 --- 7 files changed, 1 insertion(+), 19 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index d2411e6700c..a036856eee5 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -55,9 +55,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ -/* USB */ -#define CONFIG_G_DNL_MANUFACTURER "Altera" - /* Extra Environment */ #define CONFIG_HOSTNAME socfpga_arria5 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index b0bc68952ce..4b2d246db4d 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -262,7 +262,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM #define CONFIG_G_DNL_UMS_PRODUCT_NUM CONFIG_G_DNL_PRODUCT_NUM #ifndef CONFIG_G_DNL_MANUFACTURER -#define CONFIG_G_DNL_MANUFACTURER "Altera" +#define CONFIG_G_DNL_MANUFACTURER CONFIG_SYS_VENDOR #endif #endif diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 76d29a3f780..4e38d5ebd87 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -55,9 +55,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ -/* USB */ -#define CONFIG_G_DNL_MANUFACTURER "Altera" - /* Extra Environment */ #define CONFIG_HOSTNAME socfpga_cyclone5 diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index 600789509a4..e06ca7be043 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -51,9 +51,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ -/* USB */ -#define CONFIG_G_DNL_MANUFACTURER "Terasic" - /* Extra Environment */ #define CONFIG_HOSTNAME socfpga_de0_nano_soc diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index b2c1f75e99c..5fc4edbb404 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -48,9 +48,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ -/* USB */ -#define CONFIG_G_DNL_MANUFACTURER "DENX" - /* Extra Environment */ #define CONFIG_HOSTNAME mcvevk diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index 924de3f7abf..d5e69fde29e 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -51,9 +51,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ -/* USB */ -#define CONFIG_G_DNL_MANUFACTURER "Terasic" - /* Extra Environment */ #define CONFIG_HOSTNAME socfpga_sockit diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index 1b0888f36be..f11c89c1e8d 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -51,9 +51,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ -/* USB */ -#define CONFIG_G_DNL_MANUFACTURER "EBV" - /* Extra Environment */ #define CONFIG_HOSTNAME socfpga_socrates -- cgit v1.3.1 From ea0823465157decd81bc06c3b6dfe8f604ee4471 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 20:08:21 +0100 Subject: arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARD We already have the CONFIG_SYS_BOARD variable, which defines the name of the board. The value in CONFIG_HOSTNAME is exactly the same and is thus just a duplicity, so switch it to reuse CONFIG_SYS_BOARD . Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen --- include/configs/socfpga_arria5_socdk.h | 2 -- include/configs/socfpga_common.h | 4 ++++ include/configs/socfpga_cyclone5_socdk.h | 2 -- include/configs/socfpga_de0_nano_soc.h | 2 -- include/configs/socfpga_mcvevk.h | 2 -- include/configs/socfpga_sockit.h | 2 -- include/configs/socfpga_socrates.h | 2 -- include/configs/socfpga_sr1500.h | 3 --- 8 files changed, 4 insertions(+), 15 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index a036856eee5..3d5665dbf5c 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -56,8 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* Extra Environment */ -#define CONFIG_HOSTNAME socfpga_arria5 - #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=n\0" \ "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4b2d246db4d..f74c758f5a0 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -69,6 +69,10 @@ #define CONFIG_CMDLINE_EDITING /* Command history etc */ #define CONFIG_SYS_HUSH_PARSER +#ifndef CONFIG_SYS_HOSTNAME +#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD +#endif + /* * Cache */ diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 4e38d5ebd87..d2efdda105c 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -56,8 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* Extra Environment */ -#define CONFIG_HOSTNAME socfpga_cyclone5 - #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=n\0" \ "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index e06ca7be043..959e3afbe04 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -52,8 +52,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* Extra Environment */ -#define CONFIG_HOSTNAME socfpga_de0_nano_soc - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index 5fc4edbb404..cd63faf2fc9 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -49,8 +49,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* Extra Environment */ -#define CONFIG_HOSTNAME mcvevk - #define CONFIG_EXTRA_ENV_SETTINGS \ "consdev=ttyS0\0" \ "baudrate=115200\0" \ diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index d5e69fde29e..6cbe3675e2c 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -52,8 +52,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* Extra Environment */ -#define CONFIG_HOSTNAME socfpga_sockit - #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=n\0" \ "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index f11c89c1e8d..1d88f4f7a13 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -52,8 +52,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ /* Extra Environment */ -#define CONFIG_HOSTNAME socfpga_socrates - #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=n\0" \ "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index bccb235a117..5bd29563b8f 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -53,9 +53,6 @@ #define CONFIG_PHY_MARVELL #define PHY_ANEG_TIMEOUT 8000 -/* Extra Environment */ -#define CONFIG_HOSTNAME sr1500 - #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=n\0" \ "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ -- cgit v1.3.1 From ccf5648e0e3c4a61fe57109b39bf64c1cc1418c9 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 7 Dec 2015 16:48:04 -0600 Subject: arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDR Now that the USB DWC2 probing is done from OF, remove this note to add CONFIG_USB_DWC2_REG_ADDR. Signed-off-by: Dinh Nguyen --- include/configs/socfpga_common.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f74c758f5a0..b57fd4cb6f8 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* - * NOTE: User must define either of the following to select which - * of the two USB controllers available on SoCFPGA to use. - * The DWC2 driver doesn't support multiple USB controllers. - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS - */ #endif /* -- cgit v1.3.1 From 48275c96ff4deaeca10d9e18c78f6a1e3653efa2 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Thu, 3 Dec 2015 16:05:59 -0600 Subject: arm: socfpga: fix trivial header preprocessor for socfpga_common.h Replace__CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ with __CONFIG_SOCFPGA_COMMON_H__ as the file is now called socfpga_common.h Signed-off-by: Dinh Nguyen --- include/configs/socfpga_common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index b57fd4cb6f8..3a4df63ef1f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -3,8 +3,8 @@ * * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ -#define __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ +#ifndef __CONFIG_SOCFPGA_COMMON_H__ +#define __CONFIG_SOCFPGA_COMMON_H__ /* Virtual target or real hardware */ @@ -323,4 +323,4 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#endif /* __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ */ +#endif /* __CONFIG_SOCFPGA_COMMON_H__ */ -- cgit v1.3.1