From 2c808a12ea7e00d5078e57a9640adcb0504c739c Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Sun, 1 Dec 2013 20:07:28 +0200 Subject: kgdb: configs: remove obsolete CONFIG_KGDB_SER_INDEX The last users of CONFIG_KGDB_SER_INDEX were removed more than 3 years ago in commits 550650ddd0 and bf16500f79, either kgdb subsystem should care about this parameter or it should be gone completely. Signed-off-by: Vladimir Zapolskiy --- include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/DU440.h | 1 - include/configs/EXBITGEN.h | 1 - include/configs/JSE.h | 1 - include/configs/KAREF.h | 1 - include/configs/METROBOX.h | 1 - include/configs/MIP405.h | 1 - include/configs/MPC8315ERDB.h | 1 - include/configs/MPC8323ERDB.h | 1 - include/configs/MPC832XEMDS.h | 1 - include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC8360EMDS.h | 1 - include/configs/MPC8360ERDK.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8569MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P1022DS.h | 1 - include/configs/P1023RDS.h | 1 - include/configs/P1_P2_RDB.h | 1 - include/configs/P2020COME.h | 1 - include/configs/P2020DS.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/PIP405.h | 1 - include/configs/PMC440.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T1040RDB.h | 1 - include/configs/T1042RDB_PI.h | 1 - include/configs/TQM834x.h | 1 - include/configs/VCMA9.h | 2 -- include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/ac14xx.h | 1 - include/configs/actux1.h | 2 -- include/configs/actux2.h | 2 -- include/configs/actux3.h | 2 -- include/configs/actux4.h | 2 -- include/configs/alpr.h | 1 - include/configs/amcc-common.h | 1 - include/configs/aria.h | 1 - include/configs/balloon3.h | 1 - include/configs/coreboot.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/csb272.h | 1 - include/configs/csb472.h | 1 - include/configs/dvlhost.h | 2 -- include/configs/km/kmp204x-common.h | 1 - include/configs/korat.h | 1 - include/configs/lp8x4x.h | 1 - include/configs/lubbock.h | 1 - include/configs/lwmon5.h | 1 - include/configs/mecp5123.h | 1 - include/configs/mpc5121ads.h | 1 - include/configs/mpq101.h | 1 - include/configs/mx1ads.h | 2 -- include/configs/omap5912osk.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p3p440.h | 1 - include/configs/palmld.h | 1 - include/configs/palmtc.h | 1 - include/configs/palmtreo680.h | 1 - include/configs/pcs440ep.h | 1 - include/configs/pdm360ng.h | 1 - include/configs/pxa-common.h | 1 - include/configs/pxa255_idp.h | 1 - include/configs/quad100hd.h | 1 - include/configs/rsdproto.h | 1 - include/configs/sbc8349.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8641d.h | 1 - include/configs/smdk2410.h | 2 -- include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - include/configs/t4qds.h | 1 - include/configs/trizepsiv.h | 1 - include/configs/vme8349.h | 1 - include/configs/vpac270.h | 1 - include/configs/xaeniax.h | 1 - include/configs/zeus.h | 1 - include/configs/zipitz2.h | 1 - 95 files changed, 103 deletions(-) (limited to 'include/configs') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index b2a5c19e0ef..3c6cd61342d 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -737,7 +737,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 499d8c2054c..4aed5afa379 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -382,7 +382,6 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #define CONFIG_USB_EHCI diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index a6601fee86b..f025e3197ba 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -625,7 +625,6 @@ combinations. this should be removed later #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 2d7fc59ea20..71be1224f14 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -406,7 +406,6 @@ int du440_phy_addr(int devnum); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #define CONFIG_SOURCE 1 diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index f366308f45d..208b599f6d0 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -186,6 +186,5 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #endif /* __CONFIG_H */ diff --git a/include/configs/JSE.h b/include/configs/JSE.h index 4284d6a3a9b..5738ea97ad7 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -274,6 +274,5 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #endif /* __CONFIG_H */ diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index 71e90d77d7d..39eb2ef1336 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -273,7 +273,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ -#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index 32ec0bf0650..67154353d33 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -338,7 +338,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ -#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index f248a56421c..6042a1e3c41 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -396,7 +396,6 @@ ************************************************************/ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /************************************************************ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 0f9f436e33d..aedb529f861 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -634,7 +634,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index a1e5f3b2b2e..c4c771b502e 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -481,7 +481,6 @@ #if (CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 71fc497e78e..f5b62025d6f 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -574,7 +574,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 037484104fc..7640d06ee77 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -737,7 +737,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index e2ae596323c..ffb9a158aec 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -730,7 +730,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index ed780f17ff2..d4c82cd669e 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -683,7 +683,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index d31be19735c..01e7ac76817 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -544,7 +544,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 98ffb9c29ee..f52e77a3a7c 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -662,7 +662,6 @@ extern int board_pci_host_broken(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index ca28c0eb243..938f7ab3c4f 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -678,7 +678,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 9ab1bc106b6..9b7cc6474cf 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -740,7 +740,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 046b14bddac..2d42b25121d 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -397,7 +397,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index eca3b537b41..b9ad0342256 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -410,7 +410,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 8132ec055b9..90fc2da34b8 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -441,7 +441,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 6acd54db850..5fff1e2cac8 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -535,7 +535,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 5ffdd01629b..23c6b07c359 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -408,7 +408,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index bb9ae2dcb53..44b767919e2 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -438,7 +438,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 7406ac3be82..4f438a80756 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -430,7 +430,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index df5572b3a81..d877e8bbd18 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -566,7 +566,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 63480ecb0de..44d83a236e8 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -682,7 +682,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 41ebe31dd4a..f930fcde34f 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -517,7 +517,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 0e666bac018..65d61c28d1f 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -670,7 +670,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ - #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 1ed5e1df21f..fe5309a227f 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -739,7 +739,6 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 262c3e5f1fa..ba43ccec60f 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -725,7 +725,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index 2aa1f59ea7a..11c74ff5f57 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -469,7 +469,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index b592c1966aa..85cb0767efd 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -606,7 +606,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h index 15d2a43cd0d..ce3c762559b 100644 --- a/include/configs/P2020COME.h +++ b/include/configs/P2020COME.h @@ -432,7 +432,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 9d3d9b33e55..ada6c7b8717 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -670,7 +670,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b238574b5d2..ee71252b00a 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -677,7 +677,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 11807248627..29888b4e1c2 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -353,7 +353,6 @@ ************************************************************/ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /************************************************************ diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 5ab9315b1d0..efe69601f38 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -492,7 +492,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* pass open firmware flat tree */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 43a57780043..d0ebd6aba8b 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -682,7 +682,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 79312311d8b..d721139a1f6 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -609,7 +609,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index eff08e3804f..2c02d9da58f 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -613,7 +613,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index fc254256a0e..15cf2bd793e 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -495,7 +495,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 57b620d4810..d40185e1e2c 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -138,8 +138,6 @@ #if defined(CONFIG_CMD_KGDB) /* speed to run kgdb serial port */ #define CONFIG_KGDB_BAUDRATE 115200 -/* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* Miscellaneous configurable options */ diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 8fda1b1ea5c..00a24ab8460 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -301,7 +301,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index 6836fc7b5f8..8ed2fa2d87a 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -304,7 +304,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h index 1205557d888..d6cef888c6f 100644 --- a/include/configs/ac14xx.h +++ b/include/configs/ac14xx.h @@ -471,7 +471,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/actux1.h b/include/configs/actux1.h index 3315f54f388..9b8bd78943f 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -58,8 +58,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/actux2.h b/include/configs/actux2.h index fb391ecd59f..f0cbff79cae 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -51,8 +51,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/actux3.h b/include/configs/actux3.h index 61d96f5ed07..763910745ce 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -49,8 +49,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/actux4.h b/include/configs/actux4.h index 23872794e3c..12bd98a7e18 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -56,8 +56,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 61fdebac3f6..08bba360954 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -349,7 +349,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* pass open firmware flat tree */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index c9e9a038d4f..0f38c92fa06 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -125,7 +125,6 @@ */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/aria.h b/include/configs/aria.h index 32216cd50e4..b8d955abd0b 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -507,7 +507,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h index 12df45b0fac..8b2a6cf11d6 100644 --- a/include/configs/balloon3.h +++ b/include/configs/balloon3.h @@ -61,7 +61,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 556b42a38b4..d1d732f211f 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -204,7 +204,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 -#define CONFIG_KGDB_SER_INDEX 2 #endif /* diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 665295c1a2f..969b9903fbc 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -672,7 +672,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/csb272.h b/include/configs/csb272.h index ca0bffa72e5..8a848bea8be 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -99,7 +99,6 @@ */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 596095d21f8..5c034175ce8 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -98,7 +98,6 @@ */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/dvlhost.h b/include/configs/dvlhost.h index 87b33148417..1af7f169893 100644 --- a/include/configs/dvlhost.h +++ b/include/configs/dvlhost.h @@ -57,8 +57,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 7700b38c2de..50330ccf6e6 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -385,7 +385,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #define __USB_PHY_TYPE utmi diff --git a/include/configs/korat.h b/include/configs/korat.h index b09af199c8c..811ff995e26 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -542,7 +542,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* Pass open firmware flat tree */ diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h index 68e1a974dd0..379c786bc42 100644 --- a/include/configs/lp8x4x.h +++ b/include/configs/lp8x4x.h @@ -93,7 +93,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index b87df5479d6..4ffe165dec5 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -86,7 +86,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index c348329cb1e..e9c8d8fd554 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -660,7 +660,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index 6501ea40e10..d415ecdb5a2 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -364,7 +364,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 4a8adf6f330..38337b4564e 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -520,7 +520,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mpq101.h b/include/configs/mpq101.h index ec09e15dbf6..4cac8ee46aa 100644 --- a/include/configs/mpq101.h +++ b/include/configs/mpq101.h @@ -345,7 +345,6 @@ #ifdef CONFIG_CMD_KGDB # define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -# define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h index c15d54631a5..12667c57c13 100644 --- a/include/configs/mx1ads.h +++ b/include/configs/mx1ads.h @@ -86,8 +86,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ - /* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ #endif /* diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index c48790d2ae4..376dfdb14cd 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -94,7 +94,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ #endif /* diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 57ed0199523..c6df11b8f1c 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -928,7 +928,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 3fde7ca3a34..1fdd602f5bc 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -303,6 +303,5 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #endif /* __CONFIG_H */ diff --git a/include/configs/palmld.h b/include/configs/palmld.h index 84bc9ed8136..ae4dd754993 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -93,7 +93,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index 661101ccb68..1f94f0c0d60 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -95,7 +95,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h index adf85190d10..36626639d37 100644 --- a/include/configs/palmtreo680.h +++ b/include/configs/palmtreo680.h @@ -94,7 +94,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 400cb3e8261..5a5fe7ff009 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -427,7 +427,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index 266d107e446..2a54e5cea0d 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -441,7 +441,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* POST support */ diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h index 5856ee180ba..f0ecc345870 100644 --- a/include/configs/pxa-common.h +++ b/include/configs/pxa-common.h @@ -16,7 +16,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 -#define CONFIG_KGDB_SER_INDEX 2 #endif /* diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 84ad006acd1..af7c076df07 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -199,7 +199,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 7b04e0c3e30..20d6178dc1a 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -265,7 +265,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* ENVIRONMENT VARS */ diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index f144f843201..92318c33943 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -121,7 +121,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index a258fe83ddb..b7f83e01052 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -643,7 +643,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index bdb8eb529d7..4912d69dcfe 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -575,7 +575,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index dba948a5ce0..78f8219c5f7 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -523,7 +523,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index a87444e0b1b..d4ae19f96ce 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -101,8 +101,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -/* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 0e6b86412d1..fd590e4e122 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -363,7 +363,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index ee1f1f3ed00..2a9c9a349c0 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -341,7 +341,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /*Note: change below for your network setting!!! */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 63dd767047b..d0cb68a0ed5 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -376,7 +376,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /*Note: change below for your network setting!!! */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index d9b0ed07d6c..54a5e3e2609 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -303,7 +303,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index 06151177735..b7804d28724 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -125,7 +125,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 734d13f0056..7ecbafe2e58 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -539,7 +539,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c3ac612a8c8..71a89b6edd1 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -124,7 +124,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 431ed96e29e..2999d1b0f54 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -84,7 +84,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ #endif /* diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 9d58738ce85..d8aeb3794e7 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -283,7 +283,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 52a745e6049..f9ccca75d61 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -117,7 +117,6 @@ unsigned char zipitz2_spi_read(void); */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* -- cgit v1.3.1 From 7b27a685bfc9abb58d6df843263decfe1be2ac35 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 9 Dec 2013 12:19:38 +0800 Subject: blackfin: fix build error by adding CONFIG_BFIN_SERIAL Signed-off-by: Sonic Zhang --- include/configs/blackvme.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/blackvme.h b/include/configs/blackvme.h index cd37f9adb9b..6e5774c6ba5 100644 --- a/include/configs/blackvme.h +++ b/include/configs/blackvme.h @@ -177,6 +177,7 @@ #define CONFIG_BAUDRATE 57600 #define CONFIG_LOADS_ECHO 1 #define CONFIG_UART_CONSOLE 0 +#define CONFIG_BFIN_SERIAL /* * U-Boot environment variables. Use "printenv" to examine. -- cgit v1.3.1 From fa88d88f82cb8e986c07e870c80eba4873ec0cf8 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 9 Dec 2013 12:21:07 +0800 Subject: blackfin: fix building error by adding macro CONFIG_SYS_I2C Signed-off-by: Sonic Zhang --- include/configs/bf561-ezkit.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h index 404039ac230..fb6f94873af 100644 --- a/include/configs/bf561-ezkit.h +++ b/include/configs/bf561-ezkit.h @@ -90,6 +90,7 @@ */ #define CONFIG_SYS_I2C_SOFT #ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ -- cgit v1.3.1 From a2d169087ed5c0e82356445f5f29cdd9b6c3420e Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 9 Dec 2013 12:38:56 +0800 Subject: blackfin: Disable commands to reduce l1 ram requirement Signed-off-by: Sonic Zhang --- include/configs/bf506f-ezkit.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/bf506f-ezkit.h b/include/configs/bf506f-ezkit.h index 5ad3ee70d44..eed2d5bcef7 100644 --- a/include/configs/bf506f-ezkit.h +++ b/include/configs/bf506f-ezkit.h @@ -56,6 +56,7 @@ /* * Flash Settings */ + #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE 0x20000000 #define CONFIG_SYS_FLASH_CFI @@ -63,7 +64,9 @@ #define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_CMD_FLASH #define CONFIG_MONITOR_IS_IN_RAM - +/* +#define CONFIG_SYS_NO_FLASH +*/ /* * SPI Settings @@ -71,11 +74,12 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 +/* #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_CMD_SF #define CONFIG_CMD_SPI - +*/ /* * Env Storage Settings -- cgit v1.3.1 From 6e6b221c4375399625a956ecb8814d176871ef19 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 9 Dec 2013 12:45:29 +0800 Subject: blackfin: fix building error by enlarging the memory size Signed-off-by: Sonic Zhang --- include/configs/bf561-acvilon.h | 2 +- include/configs/cm-bf537e.h | 4 ++-- include/configs/cm-bf537u.h | 3 ++- include/configs/tcm-bf537.h | 3 ++- 4 files changed, 7 insertions(+), 5 deletions(-) (limited to 'include/configs') diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h index ee585c0ffde..15ca1af2305 100644 --- a/include/configs/bf561-acvilon.h +++ b/include/configs/bf561-acvilon.h @@ -53,7 +53,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2 #define CONFIG_EBIU_AMBCTL1_VAL 0x99b35554 -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MONITOR_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 8f10eba4677..2838012e205 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -55,7 +55,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) @@ -145,7 +145,7 @@ #define FLASHBOOT_ENV_SETTINGS \ "flashboot=flread 20040000 1000000 3c0000;" \ "bootm 0x1000000\0" - +#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h index a1c8e8a8560..da4cc6718d8 100644 --- a/include/configs/cm-bf537u.h +++ b/include/configs/cm-bf537u.h @@ -54,7 +54,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) @@ -142,6 +142,7 @@ #define FLASHBOOT_ENV_SETTINGS \ "flashboot=flread 20040000 1000000 300000;" \ "bootm 0x1000000\0" +#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) /* diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h index 627836a7e81..58bcdc8f47c 100644 --- a/include/configs/tcm-bf537.h +++ b/include/configs/tcm-bf537.h @@ -55,7 +55,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) @@ -144,6 +144,7 @@ #define FLASHBOOT_ENV_SETTINGS \ "flashboot=flread 20040000 1000000 300000;" \ "bootm 0x1000000\0" +#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) /* -- cgit v1.3.1 From 320cf350801f30875fe5749eee74aed242573031 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 18 Dec 2013 16:03:44 +0900 Subject: sh: add support for sh7753evb board The SH7753 EVB board has SH7753, 512MB DDR3-SDRAM, SPI ROM, Gigabit Ethernet, and eMMC. This patch support the following functions: - 512MB DDR3-SDRAM, SCIF4, SPI ROM, Gigabit Ethernet, eMMC Signed-off-by: Yoshihiro Shimoda Signed-off-by: Nobuhiro Iwamatsu --- arch/sh/include/asm/cpu_sh4.h | 2 + arch/sh/include/asm/cpu_sh7753.h | 197 +++++++++++++++ board/renesas/sh7753evb/Makefile | 7 + board/renesas/sh7753evb/lowlevel_init.S | 416 ++++++++++++++++++++++++++++++++ board/renesas/sh7753evb/sh7753evb.c | 326 +++++++++++++++++++++++++ board/renesas/sh7753evb/spi-boot.c | 134 ++++++++++ board/renesas/sh7753evb/u-boot.lds | 81 +++++++ boards.cfg | 1 + doc/README.sh7753evb | 67 +++++ include/configs/sh7753evb.h | 137 +++++++++++ 10 files changed, 1368 insertions(+) create mode 100644 arch/sh/include/asm/cpu_sh7753.h create mode 100644 board/renesas/sh7753evb/Makefile create mode 100644 board/renesas/sh7753evb/lowlevel_init.S create mode 100644 board/renesas/sh7753evb/sh7753evb.c create mode 100644 board/renesas/sh7753evb/spi-boot.c create mode 100644 board/renesas/sh7753evb/u-boot.lds create mode 100644 doc/README.sh7753evb create mode 100644 include/configs/sh7753evb.h (limited to 'include/configs') diff --git a/arch/sh/include/asm/cpu_sh4.h b/arch/sh/include/asm/cpu_sh4.h index 9181d59a947..9f48e4fe048 100644 --- a/arch/sh/include/asm/cpu_sh4.h +++ b/arch/sh/include/asm/cpu_sh4.h @@ -37,6 +37,8 @@ # include #elif defined (CONFIG_CPU_SH7752) # include +#elif defined (CONFIG_CPU_SH7753) +# include #elif defined (CONFIG_CPU_SH7757) # include #elif defined (CONFIG_CPU_SH7763) diff --git a/arch/sh/include/asm/cpu_sh7753.h b/arch/sh/include/asm/cpu_sh7753.h new file mode 100644 index 00000000000..cd0e0bba6c2 --- /dev/null +++ b/arch/sh/include/asm/cpu_sh7753.h @@ -0,0 +1,197 @@ +/* + * Copyright (C) 2012 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_CPU_SH7753_H_ +#define _ASM_CPU_SH7753_H_ + +#define CCR 0xFF00001C +#define WTCNT 0xFFCC0000 +#define CCR_CACHE_INIT 0x0000090b +#define CACHE_OC_NUM_WAYS 1 + +#ifndef __ASSEMBLY__ /* put C only stuff in this section */ +/* MMU */ +struct mmu_regs { + unsigned int reserved[4]; + unsigned int mmucr; +}; +#define MMU_BASE ((struct mmu_regs *)0xff000000) + +/* Watchdog */ +#define WTCSR0 0xffcc0002 +#define WRSTCSR_R 0xffcc0003 +#define WRSTCSR_W 0xffcc0002 +#define WTCSR_PREFIX 0xa500 +#define WRSTCSR_PREFIX 0x6900 +#define WRSTCSR_WOVF_PREFIX 0x9600 + +/* SCIF */ +#define SCIF0_BASE 0xfe4b0000 /* The real name is SCIF2 */ +#define SCIF1_BASE 0xfe4c0000 /* The real name is SCIF3 */ +#define SCIF2_BASE 0xfe4d0000 /* The real name is SCIF4 */ + +/* TMU0 */ +#define TMU_BASE 0xFE430000 + +/* ETHER, GETHER MAC address */ +struct ether_mac_regs { + unsigned int reserved[114]; + unsigned int mahr; + unsigned int reserved2; + unsigned int malr; +}; +#define GETHER0_MAC_BASE ((struct ether_mac_regs *)0xfee0400) +#define GETHER1_MAC_BASE ((struct ether_mac_regs *)0xfee0c00) +#define ETHER0_MAC_BASE ((struct ether_mac_regs *)0xfef0000) +#define ETHER1_MAC_BASE ((struct ether_mac_regs *)0xfef0800) + +/* GETHER */ +struct gether_control_regs { + unsigned int gbecont; +}; +#define GETHER_CONTROL_BASE ((struct gether_control_regs *)0xffc10100) +#define GBECONT_RMII1 0x00020000 +#define GBECONT_RMII0 0x00010000 + +/* SerMux */ +struct sermux_regs { + unsigned char smr0; + unsigned char smr1; + unsigned char smr2; + unsigned char smr3; + unsigned char smr4; + unsigned char smr5; +}; +#define SERMUX_BASE ((struct sermux_regs *)0xfe470000) + + +/* USB0/1 */ +struct usb_common_regs { + unsigned short reserved[129]; + unsigned short suspmode; +}; +#define USB0_COMMON_BASE ((struct usb_common_regs *)0xfe450000) +#define USB1_COMMON_BASE ((struct usb_common_regs *)0xfe4f0000) + +struct usb0_phy_regs { + unsigned short reset; + unsigned short reserved[4]; + unsigned short portsel; +}; +#define USB0_PHY_BASE ((struct usb0_phy_regs *)0xfe5f0000) + +struct usb1_port_regs { + unsigned int port1sel; + unsigned int reserved; + unsigned int usb1intsts; +}; +#define USB1_PORT_BASE ((struct usb1_port_regs *)0xfe4f2000) + +struct usb1_alignment_regs { + unsigned int ehcidatac; /* 0xfe4fe018 */ + unsigned int reserved[63]; + unsigned int ohcidatac; +}; +#define USB1_ALIGNMENT_BASE ((struct usb1_alignment_regs *)0xfe4fe018) + +/* GPIO */ +struct gpio_regs { + unsigned short pacr; + unsigned short pbcr; + unsigned short pccr; + unsigned short pdcr; + unsigned short pecr; + unsigned short pfcr; + unsigned short pgcr; + unsigned short phcr; + unsigned short picr; + unsigned short pjcr; + unsigned short pkcr; + unsigned short plcr; + unsigned short pmcr; + unsigned short pncr; + unsigned short pocr; + unsigned short reserved; + unsigned short pqcr; + unsigned short prcr; + unsigned short pscr; + unsigned short ptcr; + unsigned short pucr; + unsigned short pvcr; + unsigned short pwcr; + unsigned short pxcr; + unsigned short pycr; + unsigned short pzcr; + unsigned char padr; + unsigned char reserved_a; + unsigned char pbdr; + unsigned char reserved_b; + unsigned char pcdr; + unsigned char reserved_c; + unsigned char pddr; + unsigned char reserved_d; + unsigned char pedr; + unsigned char reserved_e; + unsigned char pfdr; + unsigned char reserved_f; + unsigned char pgdr; + unsigned char reserved_g; + unsigned char phdr; + unsigned char reserved_h; + unsigned char pidr; + unsigned char reserved_i; + unsigned char pjdr; + unsigned char reserved_j; + unsigned char pkdr; + unsigned char reserved_k; + unsigned char pldr; + unsigned char reserved_l; + unsigned char pmdr; + unsigned char reserved_m; + unsigned char pndr; + unsigned char reserved_n; + unsigned char podr; + unsigned char reserved_o; + unsigned char ppdr; + unsigned char reserved_p; + unsigned char pqdr; + unsigned char reserved_q; + unsigned char prdr; + unsigned char reserved_r; + unsigned char psdr; + unsigned char reserved_s; + unsigned char ptdr; + unsigned char reserved_t; + unsigned char pudr; + unsigned char reserved_u; + unsigned char pvdr; + unsigned char reserved_v; + unsigned char pwdr; + unsigned char reserved_w; + unsigned char pxdr; + unsigned char reserved_x; + unsigned char pydr; + unsigned char reserved_y; + unsigned char pzdr; + unsigned char reserved_z; + unsigned short ncer; + unsigned short ncmcr; + unsigned short nccsr; + unsigned char reserved2[2]; + unsigned short psel0; /* +0x70 */ + unsigned short psel1; + unsigned short psel2; + unsigned short psel3; + unsigned short psel4; + unsigned short psel5; + unsigned short psel6; + unsigned short reserved3[2]; + unsigned short psel7; +}; +#define GPIO_BASE ((struct gpio_regs *)0xffec0000) + +#endif /* ifndef __ASSEMBLY__ */ +#endif /* _ASM_CPU_SH7753_H_ */ diff --git a/board/renesas/sh7753evb/Makefile b/board/renesas/sh7753evb/Makefile new file mode 100644 index 00000000000..f7c8e949f9f --- /dev/null +++ b/board/renesas/sh7753evb/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2012 Yoshihiro Shimoda +# +# SPDX-License-Identifier: GPL-2.0+ + +obj-y := sh7753evb.o spi-boot.o +obj-y += lowlevel_init.o diff --git a/board/renesas/sh7753evb/lowlevel_init.S b/board/renesas/sh7753evb/lowlevel_init.S new file mode 100644 index 00000000000..21987a51e89 --- /dev/null +++ b/board/renesas/sh7753evb/lowlevel_init.S @@ -0,0 +1,416 @@ +/* + * Copyright (C) 2013 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +.macro or32, addr, data + mov.l \addr, r1 + mov.l \data, r0 + mov.l @r1, r2 + or r2, r0 + mov.l r0, @r1 +.endm + +.macro wait_DBCMD + mov.l DBWAIT_A, r0 + mov.l @r0, r1 +.endm + + .global lowlevel_init + .section .spiboot1.text + .align 2 + +lowlevel_init: + mov #0, r14 + mova 2f, r0 + mov.l PC_MASK, r1 + tst r0, r1 + bf 2f + + bra exit_pmb + nop + + .align 2 + +/* If CPU runs on SDRAM (PC=0x5???????) or not. */ +PC_MASK: .long 0x20000000 + +2: + mov #1, r14 + + mov.l EXPEVT_A, r0 + mov.l @r0, r0 + mov.l EXPEVT_POWER_ON_RESET, r1 + cmp/eq r0, r1 + bt 1f + + /* + * If EXPEVT value is manual reset or tlb multipul-hit, + * initialization of DBSC3 is not necessary. + */ + bra exit_ddr + nop + +1: + /*------- Reset -------*/ + write32 MRSTCR0_A, MRSTCR0_D + write32 MRSTCR1_A, MRSTCR1_D + + /* For Core Reset */ + mov.l DBACEN_A, r0 + mov.l @r0, r0 + cmp/eq #0, r0 + bt 3f + + /* + * If DBACEN == 1(DBSC was already enabled), we have to avoid the + * initialization of DDR3-SDRAM. + */ + bra exit_ddr + nop + +3: + /*------- DBSC3 -------*/ + /* oscillation stabilization time */ + wait_timer WAIT_OSC_TIME + + /* step 3 */ + write32 DBKIND_A, DBKIND_D + + /* step 4 */ + write32 DBCONF_A, DBCONF_D + write32 DBTR0_A, DBTR0_D + write32 DBTR1_A, DBTR1_D + write32 DBTR2_A, DBTR2_D + write32 DBTR3_A, DBTR3_D + write32 DBTR4_A, DBTR4_D + write32 DBTR5_A, DBTR5_D + write32 DBTR6_A, DBTR6_D + write32 DBTR7_A, DBTR7_D + write32 DBTR8_A, DBTR8_D + write32 DBTR9_A, DBTR9_D + write32 DBTR10_A, DBTR10_D + write32 DBTR11_A, DBTR11_D + write32 DBTR12_A, DBTR12_D + write32 DBTR13_A, DBTR13_D + write32 DBTR14_A, DBTR14_D + write32 DBTR15_A, DBTR15_D + write32 DBTR16_A, DBTR16_D + write32 DBTR17_A, DBTR17_D + write32 DBTR18_A, DBTR18_D + write32 DBTR19_A, DBTR19_D + write32 DBRNK0_A, DBRNK0_D + write32 DBADJ0_A, DBADJ0_D + write32 DBADJ2_A, DBADJ2_D + + /* step 5 */ + write32 DBCMD_A, DBCMD_RSTL_VAL + wait_timer WAIT_30US + + /* step 6 */ + write32 DBCMD_A, DBCMD_PDEN_VAL + + /* step 7 */ + write32 DBPDCNT3_A, DBPDCNT3_D + + /* step 8 */ + write32 DBPDCNT1_A, DBPDCNT1_D + write32 DBPDCNT2_A, DBPDCNT2_D + write32 DBPDLCK_A, DBPDLCK_D + write32 DBPDRGA_A, DBPDRGA_D + write32 DBPDRGD_A, DBPDRGD_D + + /* step 9 */ + wait_timer WAIT_30US + + /* step 10 */ + write32 DBPDCNT0_A, DBPDCNT0_D + + /* step 11 */ + wait_timer WAIT_30US + wait_timer WAIT_30US + + /* step 12 */ + write32 DBCMD_A, DBCMD_WAIT_VAL + wait_DBCMD + + /* step 13 */ + write32 DBCMD_A, DBCMD_RSTH_VAL + wait_DBCMD + + /* step 14 */ + write32 DBCMD_A, DBCMD_WAIT_VAL + write32 DBCMD_A, DBCMD_WAIT_VAL + write32 DBCMD_A, DBCMD_WAIT_VAL + write32 DBCMD_A, DBCMD_WAIT_VAL + + /* step 15 */ + write32 DBCMD_A, DBCMD_PDXT_VAL + + /* step 16 */ + write32 DBCMD_A, DBCMD_MRS2_VAL + + /* step 17 */ + write32 DBCMD_A, DBCMD_MRS3_VAL + + /* step 18 */ + write32 DBCMD_A, DBCMD_MRS1_VAL + + /* step 19 */ + write32 DBCMD_A, DBCMD_MRS0_VAL + write32 DBPDNCNF_A, DBPDNCNF_D + + /* step 20 */ + write32 DBCMD_A, DBCMD_ZQCL_VAL + + write32 DBCMD_A, DBCMD_REF_VAL + write32 DBCMD_A, DBCMD_REF_VAL + wait_DBCMD + + /* step 21 */ + write32 DBCALTR_A, DBCALTR_D + + /* step 22 */ + write32 DBRFCNF0_A, DBRFCNF0_D + write32 DBRFCNF1_A, DBRFCNF1_D + write32 DBRFCNF2_A, DBRFCNF2_D + + /* step 23 */ + write32 DBCALCNF_A, DBCALCNF_D + + /* step 24 */ + write32 DBRFEN_A, DBRFEN_D + write32 DBCMD_A, DBCMD_SRXT_VAL + + /* step 25 */ + write32 DBACEN_A, DBACEN_D + + /* step 26 */ + wait_DBCMD + + bra exit_ddr + nop + + .align 2 + +EXPEVT_A: .long 0xff000024 +EXPEVT_POWER_ON_RESET: .long 0x00000000 + +/*------- Reset -------*/ +MRSTCR0_A: .long 0xffd50030 +MRSTCR0_D: .long 0xfe1ffe7f +MRSTCR1_A: .long 0xffd50034 +MRSTCR1_D: .long 0xfff3ffff + +/*------- DBSC3 -------*/ +DBCMD_A: .long 0xfe800018 +DBKIND_A: .long 0xfe800020 +DBCONF_A: .long 0xfe800024 +DBTR0_A: .long 0xfe800040 +DBTR1_A: .long 0xfe800044 +DBTR2_A: .long 0xfe800048 +DBTR3_A: .long 0xfe800050 +DBTR4_A: .long 0xfe800054 +DBTR5_A: .long 0xfe800058 +DBTR6_A: .long 0xfe80005c +DBTR7_A: .long 0xfe800060 +DBTR8_A: .long 0xfe800064 +DBTR9_A: .long 0xfe800068 +DBTR10_A: .long 0xfe80006c +DBTR11_A: .long 0xfe800070 +DBTR12_A: .long 0xfe800074 +DBTR13_A: .long 0xfe800078 +DBTR14_A: .long 0xfe80007c +DBTR15_A: .long 0xfe800080 +DBTR16_A: .long 0xfe800084 +DBTR17_A: .long 0xfe800088 +DBTR18_A: .long 0xfe80008c +DBTR19_A: .long 0xfe800090 +DBRNK0_A: .long 0xfe800100 +DBPDCNT0_A: .long 0xfe800200 +DBPDCNT1_A: .long 0xfe800204 +DBPDCNT2_A: .long 0xfe800208 +DBPDCNT3_A: .long 0xfe80020c +DBPDLCK_A: .long 0xfe800280 +DBPDRGA_A: .long 0xfe800290 +DBPDRGD_A: .long 0xfe8002a0 +DBADJ0_A: .long 0xfe8000c0 +DBADJ2_A: .long 0xfe8000c8 +DBRFCNF0_A: .long 0xfe8000e0 +DBRFCNF1_A: .long 0xfe8000e4 +DBRFCNF2_A: .long 0xfe8000e8 +DBCALCNF_A: .long 0xfe8000f4 +DBRFEN_A: .long 0xfe800014 +DBACEN_A: .long 0xfe800010 +DBWAIT_A: .long 0xfe80001c +DBCALTR_A: .long 0xfe8000f8 +DBPDNCNF_A: .long 0xfe800180 + +WAIT_OSC_TIME: .long 6000 +WAIT_30US: .long 13333 + +DBCMD_RSTL_VAL: .long 0x20000000 +DBCMD_PDEN_VAL: .long 0x1000d73c +DBCMD_WAIT_VAL: .long 0x0000d73c +DBCMD_RSTH_VAL: .long 0x2100d73c +DBCMD_PDXT_VAL: .long 0x110000c8 +DBCMD_MRS0_VAL: .long 0x28000930 +DBCMD_MRS1_VAL: .long 0x29000004 +DBCMD_MRS2_VAL: .long 0x2a000008 +DBCMD_MRS3_VAL: .long 0x2b000000 +DBCMD_ZQCL_VAL: .long 0x03000200 +DBCMD_REF_VAL: .long 0x0c000000 +DBCMD_SRXT_VAL: .long 0x19000000 +DBKIND_D: .long 0x00000007 +DBCONF_D: .long 0x0f030a01 +DBTR0_D: .long 0x00000007 +DBTR1_D: .long 0x00000006 +DBTR2_D: .long 0x00000000 +DBTR3_D: .long 0x00000007 +DBTR4_D: .long 0x00070007 +DBTR5_D: .long 0x0000001b +DBTR6_D: .long 0x00000014 +DBTR7_D: .long 0x00000004 +DBTR8_D: .long 0x00000014 +DBTR9_D: .long 0x00000004 +DBTR10_D: .long 0x00000008 +DBTR11_D: .long 0x00000007 +DBTR12_D: .long 0x0000000e +DBTR13_D: .long 0x000000a0 +DBTR14_D: .long 0x00060006 +DBTR15_D: .long 0x00000003 +DBTR16_D: .long 0x00160002 +DBTR17_D: .long 0x000c0000 +DBTR18_D: .long 0x00000200 +DBTR19_D: .long 0x00000040 +DBRNK0_D: .long 0x00000001 +DBPDCNT0_D: .long 0x00000001 +DBPDCNT1_D: .long 0x00000001 +DBPDCNT2_D: .long 0x00000000 +DBPDCNT3_D: .long 0x00004010 +DBPDLCK_D: .long 0x0000a55a +DBPDRGA_D: .long 0x00000028 +DBPDRGD_D: .long 0x00017100 + +DBADJ0_D: .long 0x00010000 +DBADJ2_D: .long 0x18061806 +DBRFCNF0_D: .long 0x000001ff +DBRFCNF1_D: .long 0x00081040 +DBRFCNF2_D: .long 0x00000000 +DBCALCNF_D: .long 0x0000ffff +DBRFEN_D: .long 0x00000001 +DBACEN_D: .long 0x00000001 +DBCALTR_D: .long 0x08200820 +DBPDNCNF_D: .long 0x00000001 + + .align 2 +exit_ddr: +#if defined(CONFIG_SH_32BIT) + /*------- set PMB -------*/ + write32 PASCR_A, PASCR_29BIT_D + write32 MMUCR_A, MMUCR_D + + /***************************************************************** + * ent virt phys v sz c wt + * 0 0xa0000000 0x00000000 1 128M 0 1 + * 1 0xa8000000 0x48000000 1 128M 0 1 + * 5 0x88000000 0x48000000 1 128M 1 1 + */ + write32 PMB_ADDR_SPIBOOT_A, PMB_ADDR_SPIBOOT_D + write32 PMB_DATA_SPIBOOT_A, PMB_DATA_SPIBOOT_D + write32 PMB_ADDR_DDR_C1_A, PMB_ADDR_DDR_C1_D + write32 PMB_DATA_DDR_C1_A, PMB_DATA_DDR_C1_D + write32 PMB_ADDR_DDR_N1_A, PMB_ADDR_DDR_N1_D + write32 PMB_DATA_DDR_N1_A, PMB_DATA_DDR_N1_D + + write32 PMB_ADDR_ENTRY2, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY3, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY4, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY6, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY7, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY8, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY9, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY10, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY11, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY12, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY13, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY14, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY15, PMB_ADDR_NOT_USE_D + + write32 PASCR_A, PASCR_INIT + mov.l DUMMY_ADDR, r0 + icbi @r0 +#endif /* if defined(CONFIG_SH_32BIT) */ + +exit_pmb: + /* CPU is running on ILRAM? */ + mov r14, r0 + tst #1, r0 + bt 1f + + mov.l _stack_ilram, r15 + mov.l _spiboot_main, r0 +100: bsrf r0 + nop + + .align 2 +_spiboot_main: .long (spiboot_main - (100b + 4)) +_stack_ilram: .long 0xe5204000 + +1: + write32 CCR_A, CCR_D + + rts + nop + + .align 2 + +#if defined(CONFIG_SH_32BIT) +/*------- set PMB -------*/ +PMB_ADDR_SPIBOOT_A: .long PMB_ADDR_BASE(0) +PMB_ADDR_DDR_N1_A: .long PMB_ADDR_BASE(1) +PMB_ADDR_DDR_C1_A: .long PMB_ADDR_BASE(5) +PMB_ADDR_ENTRY2: .long PMB_ADDR_BASE(2) +PMB_ADDR_ENTRY3: .long PMB_ADDR_BASE(3) +PMB_ADDR_ENTRY4: .long PMB_ADDR_BASE(4) +PMB_ADDR_ENTRY6: .long PMB_ADDR_BASE(6) +PMB_ADDR_ENTRY7: .long PMB_ADDR_BASE(7) +PMB_ADDR_ENTRY8: .long PMB_ADDR_BASE(8) +PMB_ADDR_ENTRY9: .long PMB_ADDR_BASE(9) +PMB_ADDR_ENTRY10: .long PMB_ADDR_BASE(10) +PMB_ADDR_ENTRY11: .long PMB_ADDR_BASE(11) +PMB_ADDR_ENTRY12: .long PMB_ADDR_BASE(12) +PMB_ADDR_ENTRY13: .long PMB_ADDR_BASE(13) +PMB_ADDR_ENTRY14: .long PMB_ADDR_BASE(14) +PMB_ADDR_ENTRY15: .long PMB_ADDR_BASE(15) + +PMB_ADDR_SPIBOOT_D: .long mk_pmb_addr_val(0xa0) +PMB_ADDR_DDR_C1_D: .long mk_pmb_addr_val(0x88) +PMB_ADDR_DDR_N1_D: .long mk_pmb_addr_val(0xa8) +PMB_ADDR_NOT_USE_D: .long 0x00000000 + +PMB_DATA_SPIBOOT_A: .long PMB_DATA_BASE(0) +PMB_DATA_DDR_N1_A: .long PMB_DATA_BASE(1) +PMB_DATA_DDR_C1_A: .long PMB_DATA_BASE(5) + +/* ppn ub v s1 s0 c wt */ +PMB_DATA_SPIBOOT_D: .long mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1) +PMB_DATA_DDR_C1_D: .long mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1) +PMB_DATA_DDR_N1_D: .long mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1) + +PASCR_A: .long 0xff000070 +DUMMY_ADDR: .long 0xa0000000 +PASCR_29BIT_D: .long 0x00000000 +PASCR_INIT: .long 0x80000080 +MMUCR_A: .long 0xff000010 +MMUCR_D: .long 0x00000004 /* clear ITLB */ +#endif /* CONFIG_SH_32BIT */ + +CCR_A: .long CCR +CCR_D: .long CCR_CACHE_INIT diff --git a/board/renesas/sh7753evb/sh7753evb.c b/board/renesas/sh7753evb/sh7753evb.c new file mode 100644 index 00000000000..42b920fb333 --- /dev/null +++ b/board/renesas/sh7753evb/sh7753evb.c @@ -0,0 +1,326 @@ +/* + * Copyright (C) 2012 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +int checkboard(void) +{ + puts("BOARD: SH7753 EVB\n"); + + return 0; +} + +static void init_gpio(void) +{ + struct gpio_regs *gpio = GPIO_BASE; + struct sermux_regs *sermux = SERMUX_BASE; + + /* GPIO */ + writew(0x0000, &gpio->pacr); /* GETHER */ + writew(0x0001, &gpio->pbcr); /* INTC */ + writew(0x0000, &gpio->pccr); /* PWMU, INTC */ + writew(0x0000, &gpio->pdcr); /* SPI0 */ + writew(0xeaff, &gpio->pecr); /* GPIO */ + writew(0x0000, &gpio->pfcr); /* WDT */ + writew(0x0004, &gpio->pgcr); /* SPI0, GETHER MDIO gate(PTG1) */ + writew(0x0000, &gpio->phcr); /* SPI1 */ + writew(0x0000, &gpio->picr); /* SDHI */ + writew(0x0000, &gpio->pjcr); /* SCIF4 */ + writew(0x0003, &gpio->pkcr); /* SerMux */ + writew(0x0000, &gpio->plcr); /* SerMux */ + writew(0x0000, &gpio->pmcr); /* RIIC */ + writew(0x0000, &gpio->pncr); /* USB, SGPIO */ + writew(0x0000, &gpio->pocr); /* SGPIO */ + writew(0xd555, &gpio->pqcr); /* GPIO */ + writew(0x0000, &gpio->prcr); /* RIIC */ + writew(0x0000, &gpio->pscr); /* RIIC */ + writew(0x0000, &gpio->ptcr); /* STATUS */ + writeb(0x00, &gpio->pudr); + writew(0x5555, &gpio->pucr); /* Debug LED */ + writew(0x0000, &gpio->pvcr); /* RSPI */ + writew(0x0000, &gpio->pwcr); /* EVC */ + writew(0x0000, &gpio->pxcr); /* LBSC */ + writew(0x0000, &gpio->pycr); /* LBSC */ + writew(0x0000, &gpio->pzcr); /* eMMC */ + writew(0xfe00, &gpio->psel0); + writew(0x0000, &gpio->psel1); + writew(0x3000, &gpio->psel2); + writew(0xff00, &gpio->psel3); + writew(0x771f, &gpio->psel4); + writew(0x0ffc, &gpio->psel5); + writew(0x00ff, &gpio->psel6); + writew(0xfc00, &gpio->psel7); + + writeb(0x10, &sermux->smr0); /* SMR0: SerMux mode 0 */ +} + +static void init_usb_phy(void) +{ + struct usb_common_regs *common0 = USB0_COMMON_BASE; + struct usb_common_regs *common1 = USB1_COMMON_BASE; + struct usb0_phy_regs *phy = USB0_PHY_BASE; + struct usb1_port_regs *port = USB1_PORT_BASE; + struct usb1_alignment_regs *align = USB1_ALIGNMENT_BASE; + + writew(0x0100, &phy->reset); /* set reset */ + /* port0 = USB0, port1 = USB1 */ + writew(0x0002, &phy->portsel); + writel(0x0001, &port->port1sel); /* port1 = Host */ + writew(0x0111, &phy->reset); /* clear reset */ + + writew(0x4000, &common0->suspmode); + writew(0x4000, &common1->suspmode); + +#if defined(__LITTLE_ENDIAN) + writel(0x00000000, &align->ehcidatac); + writel(0x00000000, &align->ohcidatac); +#endif +} + +static void init_gether_mdio(void) +{ + struct gpio_regs *gpio = GPIO_BASE; + + writew(readw(&gpio->pgcr) | 0x0004, &gpio->pgcr); + writeb(readb(&gpio->pgdr) | 0x02, &gpio->pgdr); /* Use ET0-MDIO */ +} + +static void set_mac_to_sh_giga_eth_register(int channel, char *mac_string) +{ + struct ether_mac_regs *ether; + unsigned char mac[6]; + unsigned long val; + + eth_parse_enetaddr(mac_string, mac); + + if (!channel) + ether = GETHER0_MAC_BASE; + else + ether = GETHER1_MAC_BASE; + + val = (mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3]; + writel(val, ðer->mahr); + val = (mac[4] << 8) | mac[5]; + writel(val, ðer->malr); +} + +/***************************************************************** + * This PMB must be set on this timing. The lowlevel_init is run on + * Area 0(phys 0x00000000), so we have to map it. + * + * The new PMB table is following: + * ent virt phys v sz c wt + * 0 0xa0000000 0x40000000 1 128M 0 1 + * 1 0xa8000000 0x48000000 1 128M 0 1 + * 2 0xb0000000 0x50000000 1 128M 0 1 + * 3 0xb8000000 0x58000000 1 128M 0 1 + * 4 0x80000000 0x40000000 1 128M 1 1 + * 5 0x88000000 0x48000000 1 128M 1 1 + * 6 0x90000000 0x50000000 1 128M 1 1 + * 7 0x98000000 0x58000000 1 128M 1 1 + */ +static void set_pmb_on_board_init(void) +{ + struct mmu_regs *mmu = MMU_BASE; + + /* clear ITLB */ + writel(0x00000004, &mmu->mmucr); + + /* delete PMB for SPIBOOT */ + writel(0, PMB_ADDR_BASE(0)); + writel(0, PMB_DATA_BASE(0)); + + /* add PMB for SDRAM(0x40000000 - 0x47ffffff) */ + /* ppn ub v s1 s0 c wt */ + writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(0)); + writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(0)); + writel(mk_pmb_addr_val(0xb0), PMB_ADDR_BASE(2)); + writel(mk_pmb_data_val(0x50, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(2)); + writel(mk_pmb_addr_val(0xb8), PMB_ADDR_BASE(3)); + writel(mk_pmb_data_val(0x58, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(3)); + writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(4)); + writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(4)); + writel(mk_pmb_addr_val(0x90), PMB_ADDR_BASE(6)); + writel(mk_pmb_data_val(0x50, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(6)); + writel(mk_pmb_addr_val(0x98), PMB_ADDR_BASE(7)); + writel(mk_pmb_data_val(0x58, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(7)); +} + +int board_init(void) +{ + struct gether_control_regs *gether = GETHER_CONTROL_BASE; + + init_gpio(); + set_pmb_on_board_init(); + + /* Sets TXnDLY to B'010 */ + writel(0x00000202, &gether->gbecont); + + init_usb_phy(); + init_gether_mdio(); + + return 0; +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; + printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); + + return 0; +} + +int board_mmc_init(bd_t *bis) +{ + struct gpio_regs *gpio = GPIO_BASE; + + writew(readw(&gpio->pgcr) | 0x0040, &gpio->pgcr); + writeb(readb(&gpio->pgdr) & ~0x08, &gpio->pgdr); /* Reset */ + udelay(1); + writeb(readb(&gpio->pgdr) | 0x08, &gpio->pgdr); /* Release reset */ + udelay(200); + + return mmcif_mmc_init(); +} + +static int get_sh_eth_mac_raw(unsigned char *buf, int size) +{ + struct spi_flash *spi; + int ret; + + spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); + if (spi == NULL) { + printf("%s: spi_flash probe failed.\n", __func__); + return 1; + } + + ret = spi_flash_read(spi, SH7753EVB_ETHERNET_MAC_BASE, size, buf); + if (ret) { + printf("%s: spi_flash read failed.\n", __func__); + spi_flash_free(spi); + return 1; + } + spi_flash_free(spi); + + return 0; +} + +static int get_sh_eth_mac(int channel, char *mac_string, unsigned char *buf) +{ + memcpy(mac_string, &buf[channel * (SH7753EVB_ETHERNET_MAC_SIZE + 1)], + SH7753EVB_ETHERNET_MAC_SIZE); + mac_string[SH7753EVB_ETHERNET_MAC_SIZE] = 0x00; /* terminate */ + + return 0; +} + +static void init_ethernet_mac(void) +{ + char mac_string[64]; + char env_string[64]; + int i; + unsigned char *buf; + + buf = malloc(256); + if (!buf) { + printf("%s: malloc failed.\n", __func__); + return; + } + get_sh_eth_mac_raw(buf, 256); + + /* Gigabit Ethernet */ + for (i = 0; i < SH7753EVB_ETHERNET_NUM_CH; i++) { + get_sh_eth_mac(i, mac_string, buf); + if (i == 0) + setenv("ethaddr", mac_string); + else { + sprintf(env_string, "eth%daddr", i); + setenv(env_string, mac_string); + } + set_mac_to_sh_giga_eth_register(i, mac_string); + } + + free(buf); +} + +int board_late_init(void) +{ + init_ethernet_mac(); + + return 0; +} + +int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int i, ret; + char mac_string[256]; + struct spi_flash *spi; + unsigned char *buf; + + if (argc != 3) { + buf = malloc(256); + if (!buf) { + printf("%s: malloc failed.\n", __func__); + return 1; + } + + get_sh_eth_mac_raw(buf, 256); + + /* print current MAC address */ + for (i = 0; i < SH7753EVB_ETHERNET_NUM_CH; i++) { + get_sh_eth_mac(i, mac_string, buf); + printf("GETHERC ch%d = %s\n", i, mac_string); + } + free(buf); + return 0; + } + + /* new setting */ + memset(mac_string, 0xff, sizeof(mac_string)); + sprintf(mac_string, "%s\t%s", + argv[1], argv[2]); + + /* write MAC data to SPI rom */ + spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); + if (!spi) { + printf("%s: spi_flash probe failed.\n", __func__); + return 1; + } + + ret = spi_flash_erase(spi, SH7753EVB_ETHERNET_MAC_BASE_SPI, + SH7753EVB_SPI_SECTOR_SIZE); + if (ret) { + printf("%s: spi_flash erase failed.\n", __func__); + return 1; + } + + ret = spi_flash_write(spi, SH7753EVB_ETHERNET_MAC_BASE_SPI, + sizeof(mac_string), mac_string); + if (ret) { + printf("%s: spi_flash write failed.\n", __func__); + spi_flash_free(spi); + return 1; + } + spi_flash_free(spi); + + puts("The writing of the MAC address to SPI ROM was completed.\n"); + + return 0; +} + +U_BOOT_CMD( + write_mac, 3, 1, do_write_mac, + "write MAC address for GETHERC", + "[GETHERC ch0] [GETHERC ch1]\n" +); diff --git a/board/renesas/sh7753evb/spi-boot.c b/board/renesas/sh7753evb/spi-boot.c new file mode 100644 index 00000000000..21903d9c7bd --- /dev/null +++ b/board/renesas/sh7753evb/spi-boot.c @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2013 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include + +#define CONFIG_SPI_ADDR 0x00000000 +#define PHYADDR(_addr) ((_addr & 0x1fffffff) | 0x40000000) +#define CONFIG_RAM_BOOT_PHYS PHYADDR(CONFIG_SYS_TEXT_BASE) + +#define SPIWDMADR 0xFE001018 +#define SPIWDMCNTR 0xFE001020 +#define SPIDMCOR 0xFE001028 +#define SPIDMINTSR 0xFE001188 +#define SPIDMINTMR 0xFE001190 + +#define SPIDMINTSR_DMEND 0x00000004 + +#define TBR 0xFE002000 +#define RBR 0xFE002000 + +#define CR1 0xFE002008 +#define CR2 0xFE002010 +#define CR3 0xFE002018 +#define CR4 0xFE002020 +#define CR7 0xFE002038 +#define CR8 0xFE002040 + +/* CR1 */ +#define SPI_TBE 0x80 +#define SPI_TBF 0x40 +#define SPI_RBE 0x20 +#define SPI_RBF 0x10 +#define SPI_PFONRD 0x08 +#define SPI_SSDB 0x04 +#define SPI_SSD 0x02 +#define SPI_SSA 0x01 + +/* CR2 */ +#define SPI_RSTF 0x80 +#define SPI_LOOPBK 0x40 +#define SPI_CPOL 0x20 +#define SPI_CPHA 0x10 +#define SPI_L1M0 0x08 + +/* CR4 */ +#define SPI_TBEI 0x80 +#define SPI_TBFI 0x40 +#define SPI_RBEI 0x20 +#define SPI_RBFI 0x10 +#define SPI_SpiS0 0x02 +#define SPI_SSS 0x01 + +/* CR7 */ +#define CR7_IDX_OR12 0x12 +#define OR12_ADDR32 0x00000001 + +#define spi_write(val, addr) (*(volatile unsigned long *)(addr)) = val +#define spi_read(addr) (*(volatile unsigned long *)(addr)) + +/* M25P80 */ +#define M25_READ 0x03 +#define M25_READ_4BYTE 0x13 + +extern void bss_start(void); + +#define __uses_spiboot2 __attribute__((section(".spiboot2.text"))) +static void __uses_spiboot2 spi_reset(void) +{ + int timeout = 0x00100000; + + /* Make sure the last transaction is finalized */ + spi_write(0x00, CR3); + spi_write(0x02, CR1); + while (!(spi_read(CR4) & SPI_SpiS0)) { + if (timeout-- < 0) + break; + } + spi_write(0x00, CR1); + + spi_write(spi_read(CR2) | SPI_RSTF, CR2); /* fifo reset */ + spi_write(spi_read(CR2) & ~SPI_RSTF, CR2); + + spi_write(0, SPIDMCOR); +} + +static void __uses_spiboot2 spi_read_flash(void *buf, unsigned long addr, + unsigned long len) +{ + spi_write(CR7_IDX_OR12, CR7); + if (spi_read(CR8) & OR12_ADDR32) { + /* 4-bytes address mode */ + spi_write(M25_READ_4BYTE, TBR); + spi_write((addr >> 24) & 0xFF, TBR); /* ADDR31-24 */ + } else { + /* 3-bytes address mode */ + spi_write(M25_READ, TBR); + } + spi_write((addr >> 16) & 0xFF, TBR); /* ADDR23-16 */ + spi_write((addr >> 8) & 0xFF, TBR); /* ADDR15-8 */ + spi_write(addr & 0xFF, TBR); /* ADDR7-0 */ + + spi_write(SPIDMINTSR_DMEND, SPIDMINTSR); + spi_write((unsigned long)buf, SPIWDMADR); + spi_write(len & 0xFFFFFFE0, SPIWDMCNTR); + spi_write(1, SPIDMCOR); + + spi_write(0xff, CR3); + spi_write(spi_read(CR1) | SPI_SSDB, CR1); + spi_write(spi_read(CR1) | SPI_SSA, CR1); + + while (!(spi_read(SPIDMINTSR) & SPIDMINTSR_DMEND)) + ; + + /* Nagate SP0-SS0 */ + spi_write(0, CR1); +} + +void __uses_spiboot2 spiboot_main(void) +{ + /* + * This code rounds len up for SPIWDMCNTR. We should set it to 0 in + * lower 5-bits. + */ + void (*_start)(void) = (void *)CONFIG_SYS_TEXT_BASE; + volatile unsigned long len = (bss_start - _start + 31) & 0xffffffe0; + + spi_reset(); + spi_read_flash((void *)CONFIG_RAM_BOOT_PHYS, CONFIG_SPI_ADDR, len); + + _start(); +} diff --git a/board/renesas/sh7753evb/u-boot.lds b/board/renesas/sh7753evb/u-boot.lds new file mode 100644 index 00000000000..053df642ea9 --- /dev/null +++ b/board/renesas/sh7753evb/u-boot.lds @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu + * + * Copyright (C) 2012 + * Yoshihiro Shimoda + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + * entry and reloct_dst will be provided via ldflags + */ + . = .; + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + KEEP(arch/sh/cpu/sh4/start.o (.text)) + *(.spiboot1.text) + *(.spiboot2.text) + . = ALIGN(8192); + common/env_embedded.o (.ppcenv) + . = ALIGN(8192); + common/env_embedded.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss (NOLOAD) : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (__bss_end = .); +} diff --git a/boards.cfg b/boards.cfg index 2128996a1e6..93c3fd1b8b2 100644 --- a/boards.cfg +++ b/boards.cfg @@ -1209,6 +1209,7 @@ Active sh sh4 - renesas r0p7734 Active sh sh4 - renesas r2dplus r2dplus - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu Active sh sh4 - renesas r7780mp r7780mp - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu Active sh sh4 - renesas sh7752evb sh7752evb - - +Active sh sh4 - renesas sh7753evb sh7753evb - - Active sh sh4 - renesas sh7757lcr sh7757lcr - - Active sh sh4 - renesas sh7763rdp sh7763rdp - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu Active sh sh4 - renesas sh7785lcr sh7785lcr - - diff --git a/doc/README.sh7753evb b/doc/README.sh7753evb new file mode 100644 index 00000000000..5fe178c53f0 --- /dev/null +++ b/doc/README.sh7753evb @@ -0,0 +1,67 @@ +======================================== +Renesas SH7753 EVB board +======================================== + +This board specification: +========================= + +The SH7753 EVB (board config name:sh7753evb) has the following device: + + - SH7753 (SH-4A) + - DDR3-SDRAM 512MB + - SPI ROM 8MB + - Gigabit Ethernet controllers + - eMMC 4GB + + +Configuration for This board: +============================= + +You can select the configuration as follows: + + - make sh7753evb_config + + +This board specific command: +============================ + +This board has the following its specific command: + + - write_mac + + +1. write_mac + +You can write MAC address to SPI ROM. + + Usage 1) Write MAC address + + write_mac [GETHERC ch0] [GETHERC ch1] + + For example) + => write_mac 74:90:50:00:33:9e 74:90:50:00:33:9f + *) We have to input the command as a single line + (without carriage return) + *) We have to reset after input the command. + + Usage 2) Show current data + + write_mac + + For example) + => write_mac + GETHERC ch0 = 74:90:50:00:33:9e + GETHERC ch1 = 74:90:50:00:33:9f + + +Update SPI ROM: +============================ + +1. Copy u-boot image to RAM area. +2. Probe SPI device. + => sf probe 0 + SF: Detected MX25L6405D with page size 64KiB, total 8 MiB +3. Erase SPI ROM. + => sf erase 0 80000 +4. Write u-boot image to SPI ROM. + => sf write 0x48000000 0 80000 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h new file mode 100644 index 00000000000..f7eb86d1d6a --- /dev/null +++ b/include/configs/sh7753evb.h @@ -0,0 +1,137 @@ +/* + * Configuation settings for the sh7753evb board + * + * Copyright (C) 2012 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SH7753EVB_H +#define __SH7753EVB_H + +#undef DEBUG +#define CONFIG_SH 1 +#define CONFIG_SH4A 1 +#define CONFIG_SH_32BIT 1 +#define CONFIG_CPU_SH7753 1 +#define CONFIG_SH7753EVB 1 + +#define CONFIG_SYS_TEXT_BASE 0x5ff80000 +#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7753evb/u-boot.lds" + +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_NFS +#define CONFIG_CMD_DFL +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SF +#define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_MD5SUM +#define CONFIG_MD5 +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" + +#define CONFIG_VERSION_VARIABLE +#undef CONFIG_SHOW_BOOT_PROGRESS +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE + +/* MEMORY */ +#define SH7753EVB_SDRAM_BASE (0x40000000) +#define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024) + +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE 512 +#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } + +/* SCIF */ +#define CONFIG_SCIF_CONSOLE 1 +#define CONFIG_CONS_SCIF2 1 +#undef CONFIG_SYS_CONSOLE_INFO_QUIET +#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE + +#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ + 480 * 1024 * 1024) +#undef CONFIG_SYS_ALT_MEMTEST +#undef CONFIG_SYS_MEMTEST_SCRATCH +#undef CONFIG_SYS_LOADS_BAUD_CHANGE + +#define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE) +#define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ + 128 * 1024 * 1024) + +#define CONFIG_SYS_MONITOR_BASE 0x00000000 +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) +#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) + +/* FLASH */ +#define CONFIG_SYS_NO_FLASH + +/* Ether */ +#define CONFIG_SH_ETHER 1 +#define CONFIG_SH_ETHER_USE_PORT 0 +#define CONFIG_SH_ETHER_PHY_ADDR 18 +#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 +#define CONFIG_SH_ETHER_USE_GETHER 1 +#define CONFIG_PHYLIB +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII +#define CONFIG_PHY_VITESSE + +#define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000 +#define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024) +#define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI +#define SH7753EVB_ETHERNET_MAC_SIZE 17 +#define SH7753EVB_ETHERNET_NUM_CH 2 +#define CONFIG_BOARD_LATE_INIT + +/* SPI */ +#define CONFIG_SH_SPI 1 +#define CONFIG_SH_SPI_BASE 0xfe002000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 + +/* MMCIF */ +#define CONFIG_MMC 1 +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_SH_MMCIF 1 +#define CONFIG_SH_MMCIF_ADDR 0xffcb0000 +#define CONFIG_SH_MMCIF_CLK 48000000 + +/* ENV setting */ +#define CONFIG_ENV_IS_EMBEDDED +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_ADDR (0x00080000) +#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netboot=bootp; bootm\0" + +/* Board Clock */ +#define CONFIG_SYS_CLK_FREQ 48000000 +#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SYS_TMU_CLK_DIV 4 +#endif /* __SH7753EVB_H */ -- cgit v1.3.1 From 3990994c43e3abb05c0127d19ef67d7abde3c1b7 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Mon, 9 Dec 2013 16:20:16 +0100 Subject: ARM: trats: dfu: Enable default Poll Timeout for Trats board Provide default Poll Timeout value for Trats board. Signed-off-by: Lukasz Majewski --- include/configs/trats.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/trats.h b/include/configs/trats.h index 08771422ec4..6cd15c25bdb 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -99,6 +99,7 @@ #define CONFIG_THOR_FUNCTION #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M +#define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_DFU_FUNCTION #define CONFIG_DFU_MMC -- cgit v1.3.1 From 2c57b03bab960b77303043cb9736050173d36fb9 Mon Sep 17 00:00:00 2001 From: "Poddar, Sourav" Date: Thu, 14 Nov 2013 21:01:14 +0530 Subject: config: dra7_evm: Add Bank Address Register(BAR) config Add config to support bank address register. Signed-off-by: Sourav Poddar Tested-by: Yebio Mesfin Reviewed-by: Jagannadha Sutradharudu Teki --- include/configs/dra7xx_evm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 48b47cbd0b5..f210ed8b924 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -60,6 +60,7 @@ #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_CMD_SPI +#define CONFIG_SPI_FLASH_BAR #define CONFIG_TI_SPI_MMAP #define CONFIG_SF_DEFAULT_SPEED 48000000 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 -- cgit v1.3.1 From 2d51bc30366a2f1df86309fe6bb572107743f9dd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 20 Dec 2013 11:24:07 -0500 Subject: PowerPC: Drop linkstation_HGLAN support With changes to the rtl8169 ethernet to improve cache support, we have needed additional cache functions for mpc8245. As the board maintainer has been unresponsive, remove this board. Cc: Guennadi Liakhovetski Signed-off-by: Tom Rini --- board/linkstation/Makefile | 8 - board/linkstation/avr.c | 280 ---------------------- board/linkstation/hwctl.c | 133 ----------- board/linkstation/ide.c | 85 ------- board/linkstation/linkstation.c | 124 ---------- boards.cfg | 1 - include/configs/linkstation.h | 504 ---------------------------------------- 7 files changed, 1135 deletions(-) delete mode 100644 board/linkstation/Makefile delete mode 100644 board/linkstation/avr.c delete mode 100644 board/linkstation/hwctl.c delete mode 100644 board/linkstation/ide.c delete mode 100644 board/linkstation/linkstation.c delete mode 100644 include/configs/linkstation.h (limited to 'include/configs') diff --git a/board/linkstation/Makefile b/board/linkstation/Makefile deleted file mode 100644 index 3eeba7dcaa5..00000000000 --- a/board/linkstation/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = linkstation.o ide.o hwctl.o avr.o diff --git a/board/linkstation/avr.c b/board/linkstation/avr.c deleted file mode 100644 index 62e586ba09f..00000000000 --- a/board/linkstation/avr.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - * avr.c - * - * AVR functions - * - * Copyright (C) 2006 Mihai Georgian - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include -#include - -/* Button codes from the AVR */ -#define PWRR 0x20 /* Power button release */ -#define PWRP 0x21 /* Power button push */ -#define RESR 0x22 /* Reset button release */ -#define RESP 0x23 /* Reset button push */ -#define AVRINIT 0x33 /* Init complete */ -#define AVRRESET 0x31 /* Reset request */ - -/* LED commands */ -#define PWRBLINKSTRT '[' /* Blink power LED */ -#define PWRBLINKSTOP 'Z' /* Solid power LED */ -#define HDDLEDON 'W' /* HDD LED on */ -#define HDDLEDOFF 'V' /* HDD LED off */ -#define HDDBLINKSTRT 'Y' /* HDD LED start blink */ -#define HDDBLINKSTOP 'X' /* HDD LED stop blink */ - -/* Timings for LEDs blinking to show choice */ -#define PULSETIME 250 /* msecs */ -#define LONGPAUSE (5 * PULSETIME) - -/* Button press times */ -#define PUSHHOLD 1000 /* msecs */ -#define NOBUTTON (6 * (LONGPAUSE+PULSETIME)) - -/* Boot and console choices */ -#define MAX_BOOT_CHOICE 3 - -static char *consoles[] = { - "serial", -#if defined(CONFIG_NETCONSOLE) - "nc", -#endif -}; -#define MAX_CONS_CHOICE (sizeof(consoles)/sizeof(char *)) - -#if !defined(CONFIG_NETCONSOLE) -#define DEF_CONS_CHOICE 0 -#else -#define DEF_CONS_CHOICE 1 -#endif - -#define perror(fmt, args...) printf("%s: " fmt, __FUNCTION__ , ##args) - -extern void miconCntl_SendCmd(unsigned char dat); -extern void miconCntl_DisWDT(void); - -static int boot_stop; - -static int boot_choice = 1; -static int cons_choice = DEF_CONS_CHOICE; - -static char envbuffer[16]; - -void init_AVR_DUART (void) -{ - NS16550_t AVR_port = (NS16550_t) CONFIG_SYS_NS16550_COM2; - int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / 9600; - - /* - * AVR port init sequence taken from - * the original Linkstation init code - * Normal U-Boot serial reinit doesn't - * work because the AVR uses even parity - */ - AVR_port->lcr = 0x00; - AVR_port->ier = 0x00; - AVR_port->lcr = UART_LCR_BKSE; - AVR_port->dll = clock_divisor & 0xff; - AVR_port->dlm = (clock_divisor >> 8) & 0xff; - AVR_port->lcr = UART_LCR_WLS_8 | UART_LCR_PEN | UART_LCR_EPS; - AVR_port->mcr = 0x00; - AVR_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR; - - miconCntl_DisWDT(); - - boot_stop = 0; - miconCntl_SendCmd(PWRBLINKSTRT); -} - -static inline int avr_tstc(void) -{ - return (NS16550_tstc((NS16550_t)CONFIG_SYS_NS16550_COM2)); -} - -static inline char avr_getc(void) -{ - return (NS16550_getc((NS16550_t)CONFIG_SYS_NS16550_COM2)); -} - -static int push_timeout(char button_code) -{ - ulong push_start = get_timer(0); - while (get_timer(push_start) <= PUSHHOLD) - if (avr_tstc() && avr_getc() == button_code) - return 0; - return 1; -} - -static void next_boot_choice(void) -{ - ulong return_start; - ulong pulse_start; - int on_times; - int button_on; - int led_state; - char c; - - button_on = 0; - return_start = get_timer(0); - - on_times = boot_choice; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - pulse_start = get_timer(0); - - while (get_timer(return_start) <= NOBUTTON || button_on) { - if (avr_tstc()) { - c = avr_getc(); - if (c == PWRP) - button_on = 1; - else if (c == PWRR) { - button_on = 0; - return_start = get_timer(0); - if (++boot_choice > MAX_BOOT_CHOICE) - boot_choice = 1; - sprintf(envbuffer, "bootcmd%d", boot_choice); - if (getenv(envbuffer)) { - sprintf(envbuffer, "run bootcmd%d", boot_choice); - setenv("bootcmd", envbuffer); - } - on_times = boot_choice; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - pulse_start = get_timer(0); - } else { - perror("Unexpected code: 0x%02X\n", c); - } - } - if (on_times && get_timer(pulse_start) > PULSETIME) { - if (led_state == 1) { - --on_times; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - } else { - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - } - pulse_start = get_timer(0); - } - if (!on_times && get_timer(pulse_start) > LONGPAUSE) { - on_times = boot_choice; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - pulse_start = get_timer(0); - } - } - if (led_state) - miconCntl_SendCmd(HDDLEDOFF); -} - -void next_cons_choice(int console) -{ - ulong return_start; - ulong pulse_start; - int on_times; - int button_on; - int led_state; - char c; - - button_on = 0; - cons_choice = console; - return_start = get_timer(0); - - on_times = cons_choice+1; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - pulse_start = get_timer(0); - - while (get_timer(return_start) <= NOBUTTON || button_on) { - if (avr_tstc()) { - c = avr_getc(); - if (c == RESP) - button_on = 1; - else if (c == RESR) { - button_on = 0; - return_start = get_timer(0); - cons_choice = (cons_choice + 1) % MAX_CONS_CHOICE; - console_assign(stdin, consoles[cons_choice]); - console_assign(stdout, consoles[cons_choice]); - console_assign(stderr, consoles[cons_choice]); - on_times = cons_choice+1; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - pulse_start = get_timer(0); - } else { - perror("Unexpected code: 0x%02X\n", c); - } - } - if (on_times && get_timer(pulse_start) > PULSETIME) { - if (led_state == 0) { - --on_times; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - } else { - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - } - pulse_start = get_timer(0); - } - if (!on_times && get_timer(pulse_start) > LONGPAUSE) { - on_times = cons_choice+1; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - pulse_start = get_timer(0); - } - } - if (led_state); - miconCntl_SendCmd(HDDLEDOFF); -} - -int avr_input(void) -{ - char avr_button; - - if (!avr_tstc()) - return 0; - - avr_button = avr_getc(); - switch (avr_button) { - case PWRP: - if (push_timeout(PWRR)) { - /* Timeout before power button release */ - boot_stop = ~boot_stop; - if (boot_stop) - miconCntl_SendCmd(PWRBLINKSTOP); - else - miconCntl_SendCmd(PWRBLINKSTRT); - /* Wait for power button release */ - while (avr_getc() != PWRR) - ; - } else - /* Power button released */ - next_boot_choice(); - break; - case RESP: - /* Wait for Reset button release */ - while (avr_getc() != RESR) - ; - next_cons_choice(cons_choice); - break; - case AVRINIT: - return 0; - default: - perror("Unexpected code: 0x%02X\n", avr_button); - return 0; - } - if (boot_stop) - return (-3); - else - return (-2); -} - -void avr_StopBoot(void) -{ - boot_stop = ~0; - miconCntl_SendCmd(PWRBLINKSTOP); -} diff --git a/board/linkstation/hwctl.c b/board/linkstation/hwctl.c deleted file mode 100644 index d2090be1ad5..00000000000 --- a/board/linkstation/hwctl.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * hwctl.c - * - * LinkStation HW Control Driver - * - * Copyright (C) 2001-2004 BUFFALO INC. - * - * This software may be used and distributed according to the terms of - * the GNU General Public License (GPL), incorporated herein by reference. - * Drivers based on or derived from this code fall under the GPL and must - * retain the authorship, copyright and license notice. This file is not - * a complete program and may only be used when the entire operating - * system is licensed under the GPL. - * - */ - -#include -#include -#include -#include - -#define AVR_PORT CONFIG_SYS_NS16550_COM2 - -/* 2005.5.10 BUFFALO add */ -/*--------------------------------------------------------------*/ -static inline void miconCntl_SendUart(unsigned char dat) -{ - out_8((unsigned char *)AVR_PORT, dat); - mdelay(1); -} - -/*--------------------------------------------------------------*/ -void miconCntl_SendCmd(unsigned char dat) -{ - int i; - - for (i=0; i<4; i++){ - miconCntl_SendUart(dat); - } -} - -/*--------------------------------------------------------------*/ -void miconCntl_FanLow(void) -{ -#ifdef CONFIG_HTGL - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -void miconCntl_FanHigh(void) -{ -#ifdef CONFIG_HTGL - miconCntl_SendCmd(0x5D); -#endif -} - -/*--------------------------------------------------------------*/ -/* 1000Mbps */ -void miconCntl_Eth1000M(int up) -{ -#ifdef CONFIG_HTGL - if (up) - miconCntl_SendCmd(0x93); - else - miconCntl_SendCmd(0x92); -#else - if (up) - miconCntl_SendCmd(0x5D); - else - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -/* 100Mbps */ -void miconCntl_Eth100M(int up) -{ -#ifdef CONFIG_HTGL - if (up) - miconCntl_SendCmd(0x91); - else - miconCntl_SendCmd(0x90); -#else - if (up) - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -/* 10Mbps */ -void miconCntl_Eth10M(int up) -{ -#ifdef CONFIG_HTGL - if (up) - miconCntl_SendCmd(0x8F); - else - miconCntl_SendCmd(0x8E); -#else - if (up) - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -/* */ -void miconCntl_5f(void) -{ - miconCntl_SendCmd(0x5F); - mdelay(100); -} - -/*--------------------------------------------------------------*/ -/* "reboot start" signal */ -void miconCntl_Reboot(void) -{ - miconCntl_SendCmd(0x43); -} - -/*--------------------------------------------------------------*/ -/* Disable watchdog timer */ -void miconCntl_DisWDT(void) -{ - miconCntl_SendCmd(0x41); /* A */ - miconCntl_SendCmd(0x46); /* F */ - miconCntl_SendCmd(0x4A); /* J */ - miconCntl_SendCmd(0x3E); /* > */ - miconCntl_SendCmd(0x56); /* V */ - miconCntl_SendCmd(0x3E); /* > */ - miconCntl_SendCmd(0x5A); /* Z */ - miconCntl_SendCmd(0x56); /* V */ - miconCntl_SendCmd(0x4B); /* K */ -} diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c deleted file mode 100644 index 7b3fe65cffe..00000000000 --- a/board/linkstation/ide.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -/* ide.c - ide support functions */ - - -#include - -#ifdef CONFIG_CMD_IDE -#include -#include -#include - -#define IT8212_PCI_CpuCONTROL 0x5e -#define IT8212_PCI_PciModeCONTROL 0x50 -#define IT8212_PCI_IdeIoCONFIG 0x40 -#define IT8212_PCI_IdeBusSkewCONTROL 0x4c -#define IT8212_PCI_IdeDrivingCURRENT 0x42 - -extern struct pci_controller hose; - -int ide_preinit (void) -{ - int status; - pci_dev_t devbusfn; - int l; - - status = 1; - for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) { - ide_bus_offset[l] = -ATA_STATUS; - } - devbusfn = pci_find_device(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, 0); - if (devbusfn == -1) - devbusfn = pci_find_device(PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0); - if (devbusfn != -1) { - u32 ide_bus_offset32; - - status = 0; - - pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, - &ide_bus_offset32); - ide_bus_offset[0] = ide_bus_offset32 & 0xfffffffe; - ide_bus_offset[0] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[0] & 0xfffffffe, - PCI_REGION_IO); - if (CONFIG_SYS_IDE_MAXBUS > 1) { - pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, - (u32 *) &ide_bus_offset[1]); - ide_bus_offset[1] &= 0xfffffffe; - ide_bus_offset[1] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[1] & 0xfffffffe, - PCI_REGION_IO); - } - } - - if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) { - pci_write_config_byte(devbusfn, IT8212_PCI_CpuCONTROL, 0x01); - pci_write_config_byte(devbusfn, IT8212_PCI_PciModeCONTROL, 0x00); - pci_write_config_word(devbusfn, PCI_COMMAND, 0x0047); -#ifdef CONFIG_IT8212_SECONDARY_ENABLE - pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0xA0F3); -#else - pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0x8031); -#endif - pci_write_config_dword(devbusfn, IT8212_PCI_IdeBusSkewCONTROL, 0x02040204); -/* __LS_COMMENT__ BUFFALO changed 2004.11.10 changed for EMI */ - pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); /* 10mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); */ /* 4mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); */ /* 6mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); */ /* 6mA,2mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); */ /* 8mA,4mA */ - pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00); - } - - return (status); -} - -void ide_set_reset (int flag) { - return; -} - -#endif /* CONFIG_CMD_IDE */ diff --git a/board/linkstation/linkstation.c b/board/linkstation/linkstation.c deleted file mode 100644 index 75cda8681f6..00000000000 --- a/board/linkstation/linkstation.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * linkstation.c - * - * Misc LinkStation specific functions - * - * Copyright (C) 2006 Mihai Georgian - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_PCI -#include -#endif - -DECLARE_GLOBAL_DATA_PTR; - -extern void init_AVR_DUART(void); - -int checkboard (void) -{ - char *p; - bd_t *bd = gd->bd; - - init_AVR_DUART(); - - if ((p = getenv ("console_nr")) != NULL) { - unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3; - - bd->bi_baudrate &= ~3; - bd->bi_baudrate |= con_nr & 3; - } - return 0; -} - -phys_size_t initdram (int board_type) -{ - return (get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE)); -} - -/* - * Initialize PCI Devices - */ -#ifdef CONFIG_PCI - -#ifndef CONFIG_PCI_PNP - -static struct pci_config_table pci_linkstation_config_table[] = { - /* vendor, device, class */ - /* bus, dev, func */ - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0b, 0, /* AN983B or RTL8110S */ - /* ethernet controller */ - pci_cfgfunc_config_device, { PCI_ETH_IOADDR, - PCI_ETH_MEMADDR, - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0c, 0, /* SII680 or IT8211AF */ - /* ide controller */ - pci_cfgfunc_config_device, { PCI_IDE_IOADDR, - PCI_IDE_MEMADDR, - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0e, 0, /* D720101 USB controller, 1st USB 1.1 */ - pci_cfgfunc_config_device, { PCI_USB0_IOADDR, - PCI_USB0_MEMADDR, - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0e, 1, /* D720101 USB controller, 2nd USB 1.1 */ - pci_cfgfunc_config_device, { PCI_USB1_IOADDR, - PCI_USB1_MEMADDR, - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0e, 2, /* D720101 USB controller, USB 2.0 */ - pci_cfgfunc_config_device, { PCI_USB2_IOADDR, - PCI_USB2_MEMADDR, - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { } -}; -#endif - -struct pci_controller hose = { -#ifndef CONFIG_PCI_PNP - config_table:pci_linkstation_config_table, -#endif -}; - -void pci_init_board (void) -{ - pci_mpc824x_init (&hose); - - /* Reset USB 1.1 */ - /* Haven't seen any change without these on a HG, maybe it is - * needed on other models */ - out_le32((volatile unsigned*)(PCI_USB0_MEMADDR + 8), 1); - out_le32((volatile unsigned*)(PCI_USB1_MEMADDR + 8), 1); -} -#endif /* CONFIG_PCI */ - -#define UART_DCR 0x80004511 -int board_early_init_f (void) -{ - /* set DUART mode */ - out_8((volatile u8*)UART_DCR, 1); - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} diff --git a/boards.cfg b/boards.cfg index c602a161a0f..8951bb18eca 100644 --- a/boards.cfg +++ b/boards.cfg @@ -636,7 +636,6 @@ Active powerpc mpc824x - - cpc45 Active powerpc mpc824x - - cu824 CU824 - Wolfgang Denk Active powerpc mpc824x - - eXalion eXalion - Torsten Demke Active powerpc mpc824x - - hidden_dragon HIDDEN_DRAGON - Yusdi Santoso -Active powerpc mpc824x - - linkstation linkstation_HGLAN linkstation:HGLAN=1 Guennadi Liakhovetski Active powerpc mpc824x - - musenki MUSENKI - Jim Thompson Active powerpc mpc824x - - mvblue MVBLUE - - Active powerpc mpc824x - - sandpoint Sandpoint8240 - Wolfgang Denk diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h deleted file mode 100644 index fcd809dfbfc..00000000000 --- a/include/configs/linkstation.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - * Copyright (C) 2006 Mihai Georgian - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Valid values for CONFIG_SYS_TEXT_BASE are: - * - * Standard configuration - all models - * 0xFFF00000 boot from flash - * - * Test configuration (boot from RAM using uloader.o) - * LinkStation HD-HLAN and KuroBox Standard - * 0x03F00000 boot from RAM - * LinkStation HD-HGLAN and KuroBox HG - * 0x07F00000 boot from RAM - */ -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xFFF00000 -#endif - -#if 0 -#define DEBUG -#endif - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ - -/*----------------------------------------------------------------------- - * User configurable settings: - * Mandatory settings: - * CONFIG_IPADDR_LS - the IP address of the LinkStation - * CONFIG_SERVERIP_LS - the address of the server for NFS/TFTP/DHCP/BOOTP - * Optional settins: - * CONFIG_NCIP_LS - the adress of the computer running net console - * if not configured, it will be set to - * CONFIG_SERVERIP_LS - */ - - -#define CONFIG_IPADDR_LS 192.168.11.150 -#define CONFIG_SERVERIP_LS 192.168.11.149 - -#if !defined(CONFIG_IPADDR_LS) || !defined(CONFIG_SERVERIP_LS) -#error Both CONFIG_IPADDR_LS and CONFIG_SERVERIP_LS must be defined -#endif - -#if !defined(CONFIG_NCIP_LS) -#define CONFIG_NCIP_LS CONFIG_SERVERIP_LS -#endif - -/*---------------------------------------------------------------------- - * DO NOT CHANGE ANYTHING BELOW, UNLESS YOU KNOW WHAT YOU ARE DOING - *---------------------------------------------------------------------*/ - -#define CONFIG_MPC8245 1 -#define CONFIG_LINKSTATION 1 - -/*--------------------------------------- - * Supported models - * - * LinkStation HDLAN /KuroBox Standard (CONFIG_HLAN) - * LinkStation old model (CONFIG_LAN) - totally untested - * LinkStation HGLAN / KuroBox HG (CONFIG_HGLAN) - * - * Models not supported yet - * TeraStatin (CONFIG_HTGL) - */ - -#if defined(CONFIG_HLAN) || defined(CONFIG_LAN) -#define CONFIG_IDENT_STRING " LinkStation / KuroBox" -#elif defined(CONFIG_HGLAN) -#define CONFIG_IDENT_STRING " LinkStation HG / KuroBox HG" -#elif defined(CONFIG_HTGL) -#define CONFIG_IDENT_STRING " TeraStation" -#else -#error No LinkStation model defined -#endif - -#define CONFIG_BOOTDELAY 5 -#define CONFIG_ZERO_BOOTDELAY_CHECK -#undef CONFIG_BOOT_RETRY_TIME - -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Boot in %02d seconds ('s' to stop)...", bootdelay -#define CONFIG_AUTOBOOT_STOP_STR "s" - -#define CONFIG_CMD_IDE -#define CONFIG_CMD_PCI -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING -#define CONFIG_CMD_EXT2 - -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_NISDOMAIN -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_NTPSERVER -#define CONFIG_BOOTP_TIMEOFFSET - -#define CONFIG_OF_LIBFDT 1 - -#define OF_STDOUT_PATH "/soc10x/serial@80004600" - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ - -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Default load address: 8 MB */ - -#define CONFIG_BOOTCOMMAND "run bootcmd1" -#define CONFIG_BOOTARGS "root=/dev/sda1 console=ttyS1,57600 netconsole=@192.168.1.7/eth0,@192.168.1.1/00:50:BF:A4:59:71 rtc-rs5c372.probe=0,0x32 debug" -#define CONFIG_NFSBOOTCOMMAND "bootp;run nfsargs;bootm" - -#define CONFIG_SYS_CONSOLE_IS_IN_ENV - -#if defined(CONFIG_HLAN) || defined(CONFIG_LAN) -#define UBFILE "share/u-boot/u-boot-hd.flash.bin" -#elif defined(CONFIG_HGLAN) -#define UBFILE "share/u-boot/u-boot-hg.flash.bin" -#elif defined(CONFIG_HTGL) -#define UBFILE "share/u-boot/u-boot-ht.flash.bin" -#else -#error No LinkStation model defined -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ - "stdin=nc\0" \ - "stdout=nc\0" \ - "stderr=nc\0" \ - "ipaddr="__stringify(CONFIG_IPADDR_LS)"\0" \ - "netmask=255.255.255.0\0" \ - "serverip="__stringify(CONFIG_SERVERIP_LS)"\0" \ - "ncip="__stringify(CONFIG_NCIP_LS)"\0" \ - "netretry=no\0" \ - "nc=setenv stdin nc;setenv stdout nc;setenv stderr nc\0" \ - "ser=setenv stdin serial;setenv stdout serial;setenv stderr serial\0" \ - "ldaddr=800000\0" \ - "hdpart=0:1\0" \ - "hdfile=boot/uImage\0" \ - "hdload=echo Loading ${hdpart}:${hdfile};ext2load ide ${hdpart} ${ldaddr} ${hdfile};ext2load ide ${hdpart} 7f0000 boot/kuroboxHG.dtb\0" \ - "boothd=setenv bootargs " CONFIG_BOOTARGS ";bootm ${ldaddr} - 7f0000\0" \ - "hdboot=run hdload;run boothd\0" \ - "flboot=setenv bootargs root=/dev/hda1;bootm ffc00000\0" \ - "emboot=setenv bootargs root=/dev/ram0;bootm ffc00000\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \ - "bootretry=30\0" \ - "bootcmd1=run hdboot;run flboot\0" \ - "bootcmd2=run flboot\0" \ - "bootcmd3=run emboot\0" \ - "writeng=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4e474e47 1;cp.b 800000 fff70000 4\0" \ - "writeok=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4f4b4f4b 1;cp.b 800000 fff70000 4\0" \ - "ubpart=0:3\0" \ - "ubfile="UBFILE"\0" \ - "ubload=echo Loading ${ubpart}:${ubfile};ext2load ide ${ubpart} ${ldaddr} ${ubfile}\0" \ - "ubsaddr=fff00000\0" \ - "ubeaddr=fff2ffff\0" \ - "ubflash=protect off ${ubsaddr} ${ubeaddr};era ${ubsaddr} ${ubeaddr};cp.b ${ldaddr} ${ubsaddr} ${filesize};cmp.b ${ldaddr} ${ubsaddr} ${filesize}\0" \ - "upgrade=run ubload ubflash\0" - -/*----------------------------------------------------------------------- - * PCI stuff - */ -#define CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE -/* Verified: CONFIG_PCI_PNP doesn't work */ -#undef CONFIG_PCI_PNP -#define CONFIG_PCI_SCAN_SHOW - -#ifndef CONFIG_PCI_PNP -/* Keep the following defines in sync with the BAT mappings */ - -#define PCI_ETH_IOADDR 0xbfff00 -#define PCI_ETH_MEMADDR 0xbffffc00 -#define PCI_IDE_IOADDR 0xbffed0 -#define PCI_IDE_MEMADDR 0xbffffb00 -#define PCI_USB0_IOADDR 0 -#define PCI_USB0_MEMADDR 0xbfffe000 -#define PCI_USB1_IOADDR 0 -#define PCI_USB1_MEMADDR 0xbfffd000 -#define PCI_USB2_IOADDR 0 -#define PCI_USB2_MEMADDR 0xbfffcf00 - -#endif - -/*----------------------------------------------------------------------- - * Ethernet stuff - */ - -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) -#define CONFIG_TULIP -#define CONFIG_TULIP_USE_IO -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_RTL8169 -#endif - -#define CONFIG_NET_RETRY_COUNT 5 - -#define CONFIG_NETCONSOLE - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -#define CONFIG_SYS_FLASH_BASE 0xFFC00000 -#define CONFIG_SYS_FLASH_SIZE 0x00400000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - -#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_EUMB_ADDR 0x80000000 -#define CONFIG_SYS_PCI_MEM_ADDR 0xB0000000 -#define CONFIG_SYS_MISC_REGION_ADDR 0xFE000000 - -#define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256 kB */ -#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve some kB for malloc() */ - -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 1M ... 8M in DRAM */ - -/* Maximum amount of RAM */ -#if defined(CONFIG_HLAN) || defined(CONFIG_LAN) -#define CONFIG_SYS_MAX_RAM_SIZE 0x04000000 /* 64MB of SDRAM */ -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_SYS_MAX_RAM_SIZE 0x08000000 /* 128MB of SDRAM */ -#else -#error Unknown LinkStation type -#endif - -/*----------------------------------------------------------------------- - * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build - * - * RAM based builds are for testing purposes. A Linux module, uloader.o, - * exists to load U-Boot and pass control to it - * - * Always do "make clean" after changing the build type - */ -#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_RAMBOOT -#endif - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area - */ -#if 1 /* RAM is available when the first C function is called */ -#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 0x1000) -#else -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#endif -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -/*---------------------------------------------------------------------- - * Serial configuration - */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 57600 - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL - -#define CONFIG_SYS_NS16550_REG_SIZE 1 - -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4600) /* Console port */ -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_EUMB_ADDR + 0x4500) /* AVR port */ - -/* - * Low Level Configuration Settings - * (address mappings, register initial values, etc.) - * You should know what you are doing if you make changes here. - * For the detail description refer to the MPC8245 user's manual. - * - * Unless indicated otherwise, the values are - * taken from the orignal Linkstation boot code - * - * Most of the low level configuration setttings are normally used - * in arch/powerpc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation. - * Low level initialisation is done in board/linkstation/early_init.S - * The values below are included for reference purpose only - */ - -/* FIXME: 32.768 MHz is the crystal frequency but */ -/* the real frequency is lower by about 0.75% */ -#define CONFIG_SYS_CLK_FREQ 32768000 - -/* Bit-field values for MCCR1. */ -#define CONFIG_SYS_ROMNAL 0 -#define CONFIG_SYS_ROMFAL 11 - -#define CONFIG_SYS_BANK0_ROW 2 /* Only bank 0 used: 13 x n x 4 */ -#define CONFIG_SYS_BANK1_ROW 0 -#define CONFIG_SYS_BANK2_ROW 0 -#define CONFIG_SYS_BANK3_ROW 0 -#define CONFIG_SYS_BANK4_ROW 0 -#define CONFIG_SYS_BANK5_ROW 0 -#define CONFIG_SYS_BANK6_ROW 0 -#define CONFIG_SYS_BANK7_ROW 0 - -/* Bit-field values for MCCR2. */ -#define CONFIG_SYS_TSWAIT 0 -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) -#define CONFIG_SYS_REFINT 0x15e0 -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_SYS_REFINT 0x1580 -#endif - -/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */ -#define CONFIG_SYS_BSTOPRE 0x91c - -/* Bit-field values for MCCR3. */ -#define CONFIG_SYS_REFREC 7 - -/* Bit-field values for MCCR4. */ -#define CONFIG_SYS_PRETOACT 2 -#define CONFIG_SYS_ACTTOPRE 2 /* Original value was 2 */ -#define CONFIG_SYS_ACTORW 2 -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) -#define CONFIG_SYS_SDMODE_CAS_LAT 2 /* For 100MHz bus */ -/*#define CONFIG_SYS_SDMODE_BURSTLEN 3*/ -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_SYS_SDMODE_CAS_LAT 3 /* For 133MHz bus */ -/*#define CONFIG_SYS_SDMODE_BURSTLEN 2*/ -#endif -#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1 -#define CONFIG_SYS_EXTROM 1 /* Original setting but there is no EXTROM */ -#define CONFIG_SYS_REGDIMM 0 -#define CONFIG_SYS_DBUS_SIZE2 1 -#define CONFIG_SYS_SDMODE_WRAP 0 - -#define CONFIG_SYS_PGMAX 0x32 /* All boards use this setting. Original 0x92 */ -#define CONFIG_SYS_SDRAM_DSCD 0x30 - -/* Memory bank settings. - * Only bits 20-29 are actually used from these vales to set the - * start/end addresses. The upper two bits will always be 0, and the lower - * 20 bits will be 0x00000 for a start address, or 0xfffff for an end - * address. Refer to the MPC8240 book. - */ - -#define CONFIG_SYS_BANK0_START 0x00000000 -#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1) -#define CONFIG_SYS_BANK0_ENABLE 1 -#define CONFIG_SYS_BANK1_START 0x3ff00000 -#define CONFIG_SYS_BANK1_END 0x3fffffff -#define CONFIG_SYS_BANK1_ENABLE 0 -#define CONFIG_SYS_BANK2_START 0x3ff00000 -#define CONFIG_SYS_BANK2_END 0x3fffffff -#define CONFIG_SYS_BANK2_ENABLE 0 -#define CONFIG_SYS_BANK3_START 0x3ff00000 -#define CONFIG_SYS_BANK3_END 0x3fffffff -#define CONFIG_SYS_BANK3_ENABLE 0 -#define CONFIG_SYS_BANK4_START 0x3ff00000 -#define CONFIG_SYS_BANK4_END 0x3fffffff -#define CONFIG_SYS_BANK4_ENABLE 0 -#define CONFIG_SYS_BANK5_START 0x3ff00000 -#define CONFIG_SYS_BANK5_END 0x3fffffff -#define CONFIG_SYS_BANK5_ENABLE 0 -#define CONFIG_SYS_BANK6_START 0x3ff00000 -#define CONFIG_SYS_BANK6_END 0x3fffffff -#define CONFIG_SYS_BANK6_ENABLE 0 -#define CONFIG_SYS_BANK7_START 0x3ff00000 -#define CONFIG_SYS_BANK7_END 0x3fffffff -#define CONFIG_SYS_BANK7_ENABLE 0 - -#define CONFIG_SYS_ODCR 0x15 - -/*---------------------------------------------------------------------- - * Initial BAT mappings - */ - -/* NOTES: - * 1) GUARDED and WRITETHROUGH not allowed in IBATS - * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT - */ - -/* SDRAM */ -#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L -#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U - -/* EUMB: 1MB of address space */ -#define CONFIG_SYS_IBAT1L (CONFIG_SYS_EUMB_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT1U (CONFIG_SYS_EUMB_ADDR | BATU_BL_1M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT1L (CONFIG_SYS_IBAT1L | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U - -/* PCI Mem: 256MB of address space */ -#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI_MEM_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI_MEM_ADDR | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT2L (CONFIG_SYS_IBAT2L | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U - -/* PCI and local ROM/Flash: last 32MB of address space */ -#define CONFIG_SYS_IBAT3L (CONFIG_SYS_MISC_REGION_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT3U (CONFIG_SYS_MISC_REGION_ADDR | BATU_BL_32M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT3L (CONFIG_SYS_IBAT3L | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - * - * FIXME: This doesn't appear to be true for the newer kernels - * which map more that 8 MB - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/*----------------------------------------------------------------------- - * FLASH organization - */ -#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ - -#undef CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 72 /* Max number of sectors per flash */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 12000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 1000 - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ - -#define CONFIG_ENV_IS_IN_FLASH -/* - * The original LinkStation flash organisation uses - * 448 kB (0xFFF00000 - 0xFFF6FFFF) for the boot loader - * We use the last sector of this area to store the environment - * which leaves max. 384 kB for the U-Boot itself - */ -#define CONFIG_ENV_ADDR 0xFFF60000 -#define CONFIG_ENV_SIZE 0x00010000 -#define CONFIG_ENV_SECT_SIZE 0x00010000 - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 32 -#ifdef CONFIG_CMD_KGDB -#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - -/*----------------------------------------------------------------------- - * IDE/ATA definitions - */ -#undef CONFIG_IDE_LED /* No IDE LED */ -#define CONFIG_IDE_RESET /* no reset for ide supported */ -#define CONFIG_IDE_PREINIT /* check for units */ -#define CONFIG_LBA48 /* 48 bit LBA supported */ - -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) || defined(CONFIG_HGLAN) -#define CONFIG_SYS_IDE_MAXBUS 1 /* Scan only 1 IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE 1 /* Only 1 drive per IDE bus */ -#elif defined(CONFIG_HGTL) -#define CONFIG_SYS_IDE_MAXBUS 2 /* Max. 2 IDE busses */ -#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */ -#else -#error Config IDE: Unknown LinkStation type -#endif - -#define CONFIG_SYS_ATA_BASE_ADDR 0 - -#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* Offset for data I/O */ -#define CONFIG_SYS_ATA_REG_OFFSET 0 /* Offset for normal registers */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0 /* Offset for alternate registers */ - -/*----------------------------------------------------------------------- - * Partitions and file system - */ -#define CONFIG_DOS_PARTITION - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From fbe76ae4e3bacd5183294488947ec148df28d55b Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Wed, 11 Dec 2013 12:42:11 +0530 Subject: board/freescale:Remove use of CONFIG_SPL_NAND_MINIMAL CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary review purpose. So, use CONFIG_SPL_NAND_BOOT config. Signed-off-by: Prabhakar Kushwaha --- README | 3 +++ board/freescale/bsc9131rdb/tlb.c | 2 +- board/freescale/bsc9132qds/tlb.c | 2 +- board/freescale/p1010rdb/tlb.c | 2 +- include/configs/BSC9131RDB.h | 2 +- include/configs/BSC9132QDS.h | 2 +- include/configs/P1010RDB.h | 2 +- 7 files changed, 9 insertions(+), 6 deletions(-) (limited to 'include/configs') diff --git a/README b/README index 895fef37e81..e58e9c0e1c1 100644 --- a/README +++ b/README @@ -3267,6 +3267,9 @@ FIT uImage format: Defines the size and behavior of the NAND that SPL uses to read U-Boot + CONFIG_SPL_NAND_BOOT + Add support NAND boot + CONFIG_SYS_NAND_U_BOOT_OFFS Location in NAND to read U-Boot from diff --git a/board/freescale/bsc9131rdb/tlb.c b/board/freescale/bsc9131rdb/tlb.c index 669fe8ad32c..c8ecf5de591 100644 --- a/board/freescale/bsc9131rdb/tlb.c +++ b/board/freescale/bsc9131rdb/tlb.c @@ -30,7 +30,7 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), -#ifdef CONFIG_SPL_NAND_MINIMAL +#ifdef CONFIG_SPL_NAND_BOOT SET_TLB_ENTRY(1, 0xffffe000, 0xffffe000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 10, BOOKE_PAGESZ_4K, 1), diff --git a/board/freescale/bsc9132qds/tlb.c b/board/freescale/bsc9132qds/tlb.c index 02655e9bafd..07febc2b375 100644 --- a/board/freescale/bsc9132qds/tlb.c +++ b/board/freescale/bsc9132qds/tlb.c @@ -30,7 +30,7 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), -#ifdef CONFIG_SPL_NAND_MINIMAL +#ifdef CONFIG_SPL_NAND_BOOT SET_TLB_ENTRY(1, 0xffffe000, 0xffffe000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 10, BOOKE_PAGESZ_4K, 1), diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index a7af0f67566..a3d36b35d56 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -30,7 +30,7 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), -#ifdef CONFIG_SPL_NAND_MINIMAL +#ifdef CONFIG_SPL_NAND_BOOT SET_TLB_ENTRY(1, 0xffffe000, 0xffffe000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 10, BOOKE_PAGESZ_4K, 1), diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 4aed5afa379..584aba8d0e4 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -29,7 +29,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index f025e3197ba..6170cbc81f9 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -38,7 +38,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index fe5309a227f..ea5cb6501b6 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -37,7 +37,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -- cgit v1.3.1 From 562de1d6da5bdc1789bd258d464d6ca57571861d Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Thu, 12 Dec 2013 12:09:01 +0530 Subject: board/t1040qds: Relax IFC FPGA timings Current IFC-FPGA TCH(Chip Select hold time with respect to WE deassertion) is 0 i.e. 0 ns hold time on writes. This may not work on higher clock freqencies. So, Increase TCH as 0x8 i.e. 8 ip_clk. Signed-off-by: Prabhakar Kushwaha --- include/configs/T1040QDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index d0ebd6aba8b..8ecf188bd33 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -248,7 +248,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) #define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 -- cgit v1.3.1 From 9407c3fc2ea9f61243cd460a3fe64dfb396b3721 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 17 Dec 2013 11:21:08 -0800 Subject: powerpc/P1022DS: Define new nand_ecclayout structure macros Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to reduce the image size, by taking advantage of the new nand_ecclayout structure. Signed-off-by: York Sun CC: Prabhakar Kushwaha CC: Scott Wood --- include/configs/P1022DS.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/configs') diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index ba43ccec60f..934a6cb7a6a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -75,6 +75,8 @@ #endif #define CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 +#define CONFIG_SYS_NAND_MAX_OOBFREE 5 #ifdef CONFIG_NAND #define CONFIG_SPL -- cgit v1.3.1 From ab13ad58359e803d948267881e4f495927cb7548 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 17 Dec 2013 11:21:09 -0800 Subject: powerpc/B4860QDS: Define new nand_ecclayout structure macros Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to reduce the image size, by taking advantage of the new nand_ecclayout structure. Signed-off-by: York Sun CC: Prabhakar Kushwaha CC: Scott Wood --- include/configs/B4860QDS.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/configs') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 3c6cd61342d..c182158be4a 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -289,6 +289,8 @@ unsigned long get_board_ddr_clk(void); /* NAND Flash on IFC */ #define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) -- cgit v1.3.1 From 8fe207d0369dc31cd75b8660b48c1d77571a99e4 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Tue, 17 Dec 2013 22:11:07 -0600 Subject: powerpc/cms700: limit NAND data structure size This fixes a build break due to excessively large NAND data structures. Signed-off-by: Scott Wood Cc: Matthias Fuchs --- include/configs/CMS700.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/configs') diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 4a5fc864a65..0bb22be9f3c 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -149,6 +149,9 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 48 + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is -- cgit v1.3.1 From 8c618dd66adfab736b88a86f51c057b019988a90 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Thu, 26 Dec 2013 12:40:55 +0530 Subject: board/t1040qds: Enable memory reset control Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start accessing it. Signed-off-by: Prabhakar Kushwaha --- board/freescale/t1040qds/t1040qds.c | 5 +++++ include/configs/T1040QDS.h | 1 + 2 files changed, 6 insertions(+) (limited to 'include/configs') diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c index 2aa176c7a29..de3ea5c2aa2 100644 --- a/board/freescale/t1040qds/t1040qds.c +++ b/board/freescale/t1040qds/t1040qds.c @@ -239,3 +239,8 @@ void qixis_dump_switch(void) printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1])); } } + +int board_need_mem_reset(void) +{ + return 1; +} diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 8ecf188bd33..7d0bc043f99 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_RST_FORCE_MEM 0x01 #define CONFIG_SYS_CSPR3_EXT (0xf) #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ -- cgit v1.3.1 From 57226221f4becb629026ad78b3be55fa3247fbeb Mon Sep 17 00:00:00 2001 From: Luka Perkov Date: Thu, 31 Oct 2013 04:05:05 +0100 Subject: kirkwood: ib62x0: use device tree and update config Signed-off-by: Luka Perkov CC: Prafulla Wadaskar Acked-By: Prafulla Wadaskar --- include/configs/ib62x0.h | 38 +++++++++++++++++++++++--------------- 1 file changed, 23 insertions(+), 15 deletions(-) (limited to 'include/configs') diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 7fa0c5356c1..186fd35fdbc 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -27,6 +27,11 @@ */ #define CONFIG_MACH_TYPE MACH_TYPE_NAS6210 +/* + * Enable device tree support + */ +#define CONFIG_OF_LIBFDT + /* * Compression configuration */ @@ -41,6 +46,7 @@ #define CONFIG_SYS_MVFS #include #define CONFIG_CMD_ENV +#define CONFIG_CMD_BOOTZ #define CONFIG_CMD_IDE #define CONFIG_CMD_MII #define CONFIG_CMD_NAND @@ -66,7 +72,7 @@ #define CONFIG_ENV_IS_NOWHERE #endif #define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x80000 +#define CONFIG_ENV_OFFSET 0xe0000 /* * Default environment variables @@ -74,24 +80,26 @@ #define CONFIG_BOOTCOMMAND \ "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ "ubi part root; " \ - "ubifsmount ubi:root; " \ + "ubifsmount ubi:rootfs; " \ "ubifsload 0x800000 ${kernel}; " \ - "ubifsload 0x1100000 ${initrd}; " \ - "bootm 0x800000 0x1100000" - -#define CONFIG_MTDPARTS \ - "mtdparts=orion_nand:" \ - "0x80000@0x0(uboot)," \ - "0x20000@0x80000(uboot_env)," \ - "-@0xa0000(root)\0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ + "ubifsload 0x700000 ${fdt}; " \ + "ubifsumount; " \ + "fdt addr 0x700000; fdt resize; fdt chosen; " \ + "bootz 0x800000 - 0x700000" + +#define CONFIG_MTDPARTS \ + "mtdparts=orion_nand:" \ + "0xe0000@0x0(uboot)," \ + "0x20000@0xe0000(uboot_env)," \ + "-@0x100000(root)\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ "mtdparts="CONFIG_MTDPARTS \ - "kernel=/boot/uImage\0" \ - "initrd=/boot/uInitrd\0" \ - "bootargs_root=ubi.mtd=2 root=ubi0:root rootfstype=ubifs\0" + "kernel=/boot/zImage\0" \ + "fdt=/boot/ib62x0.dtb\0" \ + "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" /* * Ethernet driver configuration -- cgit v1.3.1 From 5e4eeab92bb900ebb79e42deec601511071f17f1 Mon Sep 17 00:00:00 2001 From: Karlheinz Jerg Date: Wed, 18 Sep 2013 09:32:48 +0200 Subject: arm/km: add support for km_kirkwood_128m16 board The board is similar to the standard km_kirkwood board. From a u-boot point of view, the only difference is an increased 256 MiB DRAM (128M16). A board based on this design is for example the SUP12. Signed-off-by: Karlheinz Jerg Signed-off-by: Holger Brunck --- boards.cfg | 1 + include/configs/km_kirkwood.h | 10 ++++++++++ 2 files changed, 11 insertions(+) (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index 9949bb53672..01ff5b50917 100644 --- a/boards.cfg +++ b/boards.cfg @@ -171,6 +171,7 @@ Active arm arm926ejs kirkwood iomega - Active arm arm926ejs kirkwood karo tk71 tk71 - - Active arm arm926ejs kirkwood keymile km_arm km_kirkwood km_kirkwood:KM_KIRKWOOD Valentin Longchamp Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_pci km_kirkwood:KM_KIRKWOOD_PCI Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_128m16 km_kirkwood:KM_KIRKWOOD_128M16 Valentin Longchamp Active arm arm926ejs kirkwood keymile km_arm kmcoge5un km_kirkwood:KM_COGE5UN Valentin Longchamp Active arm arm926ejs kirkwood keymile km_arm kmnusa km_kirkwood:KM_NUSA Valentin Longchamp Active arm arm926ejs kirkwood keymile km_arm kmsuv31 km_kirkwood:KM_SUV31 Valentin Longchamp diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 0e6073c6425..b8b64c49960 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -35,6 +35,16 @@ #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_FPGA_CONFIG +/* KM_KIRKWOOD_128M16 */ +#elif defined(CONFIG_KM_KIRKWOOD_128M16) +#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16" +#define CONFIG_HOSTNAME km_kirkwood_128m16 +#undef CONFIG_SYS_KWD_CONFIG +#define CONFIG_SYS_KWD_CONFIG \ + $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg +#define CONFIG_KM_DISABLE_PCIE +#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ + /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA) #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ -- cgit v1.3.1 From e28d4a272f4e59185581f9c7252016872b4681e6 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Mon, 7 Oct 2013 15:10:03 +0200 Subject: arm/km: fix i2c mux define for km_kirkwood_128m16 target Due to the i2c mux rework in u-boot we now have only to specify the busnumber and not the whole mux configuration. Signed-off-by: Holger Brunck Acked-by: Heiko Schocher --- include/configs/km_kirkwood.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index b8b64c49960..74c72325f65 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -43,7 +43,7 @@ #define CONFIG_SYS_KWD_CONFIG \ $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_DISABLE_PCIE -#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA) -- cgit v1.3.1 From d8794da53b918929b6345e3d64dd74861aab086d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 18 Dec 2013 14:43:08 -0500 Subject: cam_enc_4xx: Set CONFIG_SYS_NAND_MAX_OOBFREE / CONFIG_SYS_NAND_MAX_ECCPOS With the changes to make OOBFREE/ECCPOS configurable but default to larger, we need to set these config options for the space savings they provide. Cc: Scott Wood Cc: Heiko Schocher Signed-off-by: Tom Rini --- include/configs/cam_enc_4xx.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/configs') diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index c1042aecbf6..8182a7577bc 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -236,6 +236,8 @@ #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCSIZE 0x200 #define CONFIG_SYS_NAND_ECCBYTES 10 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_5_ADDR_CYCLE -- cgit v1.3.1 From 456ccfdf0d5eefc153b143bd13731a59e2d71585 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 20 Dec 2013 11:19:33 -0500 Subject: TI:omap3: Drop omap3_zoom2 The omap3_zoom2 board has not been updated for a correct CONFIG_SYS_HZ and Tom Rix's email has long been bouncing. Signed-off-by: Tom Rini --- board/logicpd/zoom2/Makefile | 11 -- board/logicpd/zoom2/config.mk | 17 --- board/logicpd/zoom2/debug_board.c | 44 ------- board/logicpd/zoom2/led.c | 116 ------------------ board/logicpd/zoom2/zoom2.c | 183 ---------------------------- board/logicpd/zoom2/zoom2.h | 142 ---------------------- board/logicpd/zoom2/zoom2_serial.c | 130 -------------------- board/logicpd/zoom2/zoom2_serial.h | 59 --------- boards.cfg | 1 - drivers/serial/ns16550.c | 5 +- include/configs/omap3_zoom2.h | 237 ------------------------------------- 11 files changed, 2 insertions(+), 943 deletions(-) delete mode 100644 board/logicpd/zoom2/Makefile delete mode 100644 board/logicpd/zoom2/config.mk delete mode 100644 board/logicpd/zoom2/debug_board.c delete mode 100644 board/logicpd/zoom2/led.c delete mode 100644 board/logicpd/zoom2/zoom2.c delete mode 100644 board/logicpd/zoom2/zoom2.h delete mode 100644 board/logicpd/zoom2/zoom2_serial.c delete mode 100644 board/logicpd/zoom2/zoom2_serial.h delete mode 100644 include/configs/omap3_zoom2.h (limited to 'include/configs') diff --git a/board/logicpd/zoom2/Makefile b/board/logicpd/zoom2/Makefile deleted file mode 100644 index 8ec5f256133..00000000000 --- a/board/logicpd/zoom2/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := zoom2.o -obj-y += debug_board.o -obj-y += zoom2_serial.o -obj-$(CONFIG_STATUS_LED) += led.o diff --git a/board/logicpd/zoom2/config.mk b/board/logicpd/zoom2/config.mk deleted file mode 100644 index 1c382f71893..00000000000 --- a/board/logicpd/zoom2/config.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# (C) Copyright 2009 -# Texas Instruments, -# -# Zoom II uses OMAP3 (ARM-CortexA8) CPU -# see http://www.ti.com/ for more information on Texas Instruments -# -# SPDX-License-Identifier: GPL-2.0+ -# -# Physical Address: -# 0x80000000 (bank0) -# 0xA0000000 (bank1) -# Linux-Kernel is expected to be at 0x80008000, entry 0x80008000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/logicpd/zoom2/debug_board.c b/board/logicpd/zoom2/debug_board.c deleted file mode 100644 index 071f41074ba..00000000000 --- a/board/logicpd/zoom2/debug_board.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include -#include -#include -#include - -#define DEBUG_BOARD_CONNECTED 1 -#define DEBUG_BOARD_NOT_CONNECTED 0 - -static int debug_board_connected = DEBUG_BOARD_CONNECTED; - -static void zoom2_debug_board_detect (void) -{ - int val = 0; - - if (!gpio_request(158, "")) { - /* - * GPIO to query for debug board - * 158 db board query - */ - gpio_direction_input(158); - val = gpio_get_value(158); - } - - if (!val) - debug_board_connected = DEBUG_BOARD_NOT_CONNECTED; -} - -int zoom2_debug_board_connected (void) -{ - static int first_time = 1; - - if (first_time) { - zoom2_debug_board_detect (); - first_time = 0; - } - return debug_board_connected; -} diff --git a/board/logicpd/zoom2/led.c b/board/logicpd/zoom2/led.c deleted file mode 100644 index 5d37ac15f2f..00000000000 --- a/board/logicpd/zoom2/led.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include -#include -#include -#include -#include - -static unsigned int saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF}; - -/* - * GPIO LEDs - * 173 red - * 154 blue - * 61 blue2 - */ -#define ZOOM2_LED_RED 173 -#define ZOOM2_LED_BLUE 154 -#define ZOOM2_LED_BLUE2 61 - -void red_led_off(void) -{ - /* red */ - if (!gpio_request(ZOOM2_LED_RED, "")) { - gpio_direction_output(ZOOM2_LED_RED, 0); - gpio_set_value(ZOOM2_LED_RED, 0); - } - saved_state[STATUS_LED_RED] = STATUS_LED_OFF; -} - -void blue_led_off(void) -{ - /* blue */ - if (!gpio_request(ZOOM2_LED_BLUE, "")) { - gpio_direction_output(ZOOM2_LED_BLUE, 0); - gpio_set_value(ZOOM2_LED_BLUE, 0); - } - - /* blue 2 */ - if (!gpio_request(ZOOM2_LED_BLUE2, "")) { - gpio_direction_output(ZOOM2_LED_BLUE2, 0); - gpio_set_value(ZOOM2_LED_BLUE2, 0); - } - saved_state[STATUS_LED_BLUE] = STATUS_LED_OFF; -} - -void red_led_on(void) -{ - blue_led_off(); - - /* red */ - if (!gpio_request(ZOOM2_LED_RED, "")) { - gpio_direction_output(ZOOM2_LED_RED, 0); - gpio_set_value(ZOOM2_LED_RED, 1); - } - saved_state[STATUS_LED_RED] = STATUS_LED_ON; -} - -void blue_led_on(void) -{ - red_led_off(); - - /* blue */ - if (!gpio_request(ZOOM2_LED_BLUE, "")) { - gpio_direction_output(ZOOM2_LED_BLUE, 0); - gpio_set_value(ZOOM2_LED_BLUE, 1); - } - - /* blue 2 */ - if (!gpio_request(ZOOM2_LED_BLUE2, "")) { - gpio_direction_output(ZOOM2_LED_BLUE2, 0); - gpio_set_value(ZOOM2_LED_BLUE2, 1); - } - - saved_state[STATUS_LED_BLUE] = STATUS_LED_ON; -} - -void __led_init (led_id_t mask, int state) -{ - __led_set (mask, state); -} - -void __led_toggle (led_id_t mask) -{ - if (STATUS_LED_BLUE == mask) { - if (STATUS_LED_ON == saved_state[STATUS_LED_BLUE]) - blue_led_off(); - else - blue_led_on(); - } else if (STATUS_LED_RED == mask) { - if (STATUS_LED_ON == saved_state[STATUS_LED_RED]) - red_led_off(); - else - red_led_on(); - } -} - -void __led_set (led_id_t mask, int state) -{ - if (STATUS_LED_BLUE == mask) { - if (STATUS_LED_ON == state) - blue_led_on(); - else - blue_led_off(); - } else if (STATUS_LED_RED == mask) { - if (STATUS_LED_ON == state) - red_led_on(); - else - red_led_off(); - } -} diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c deleted file mode 100644 index e14de04695a..00000000000 --- a/board/logicpd/zoom2/zoom2.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix - * - * Derived from Zoom1 code by - * Nishanth Menon - * Sunil Kumar - * Shashi Ranjan - * Richard Woodruff - * Syed Mohammed Khasim - * - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include -#ifdef CONFIG_STATUS_LED -#include -#endif -#include -#include -#include -#include -#include -#include -#include -#include -#include "zoom2.h" -#include "zoom2_serial.h" - -DECLARE_GLOBAL_DATA_PTR; - -/* - * This the the zoom2, board specific, gpmc configuration for the - * quad uart on the debug board. The more general gpmc configurations - * are setup at the cpu level in arch/arm/cpu/armv7/omap3/mem.c - * - * The details of the setting of the serial gpmc setup are not available. - * The values were provided by another party. - */ -static u32 gpmc_serial_TL16CP754C[GPMC_MAX_REG] = { - 0x00011000, - 0x001F1F01, - 0x00080803, - 0x1D091D09, - 0x041D1F1F, - 0x1D0904C4, 0 -}; - -/* Used to track the revision of the board */ -static zoom2_revision revision = ZOOM2_REVISION_UNKNOWN; - -/* - * Routine: zoom2_get_revision - * Description: Return the revision of the Zoom2 this code is running on. - */ -zoom2_revision zoom2_get_revision(void) -{ - return revision; -} - -/* - * Routine: zoom2_identify - * Description: Detect which version of Zoom2 we are running on. - */ -void zoom2_identify(void) -{ - /* - * To check for production board vs beta board, - * check if gpio 94 is clear. - * - * No way yet to check for alpha board identity. - * Alpha boards were produced in very limited quantities - * and they are not commonly used. They are mentioned here - * only for completeness. - */ - if (!gpio_request(94, "")) { - unsigned int val; - - gpio_direction_input(94); - val = gpio_get_value(94); - - if (val) - revision = ZOOM2_REVISION_BETA; - else - revision = ZOOM2_REVISION_PRODUCTION; - } - - printf("Board revision "); - switch (revision) { - case ZOOM2_REVISION_PRODUCTION: - printf("Production\n"); - break; - case ZOOM2_REVISION_BETA: - printf("Beta\n"); - break; - default: - printf("Unknown\n"); - break; - } -} - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init (void) -{ - u32 *gpmc_config; - - gpmc_init (); /* in SRAM or SDRAM, finish GPMC */ - - /* Configure console support on zoom2 */ - gpmc_config = gpmc_serial_TL16CP754C; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[3], - SERIAL_TL16CP754C_BASE, GPMC_SIZE_16M); - - /* board id for Linux */ - gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - -#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) - status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); -#endif - return 0; -} - -/* - * Routine: misc_init_r - * Description: Configure zoom board specific configurations - */ -int misc_init_r(void) -{ - zoom2_identify(); - twl4030_power_init(); - twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); - dieid_num_r(); - - /* - * Board Reset - * The board is reset by holding the the large button - * on the top right side of the main board for - * eight seconds. - * - * There are reported problems of some beta boards - * continously resetting. For those boards, disable resetting. - */ - if (ZOOM2_REVISION_PRODUCTION <= zoom2_get_revision()) - twl4030_power_reset_init(); - - return 0; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs (void) -{ - /* platform specific muxes */ - MUX_ZOOM2 (); -} - -#ifdef CONFIG_GENERIC_MMC -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} -#endif - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_LAN91C96 - rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE); -#endif - return rc; -} -#endif diff --git a/board/logicpd/zoom2/zoom2.h b/board/logicpd/zoom2/zoom2.h deleted file mode 100644 index 850c790a08d..00000000000 --- a/board/logicpd/zoom2/zoom2.h +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix - * - * Derived from: board/omap3/zoom1/zoom1.h - * Nishanth Menon - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef _BOARD_ZOOM2_H_ -#define _BOARD_ZOOM2_H_ - -const omap3_sysinfo sysinfo = { - DDR_STACKED, - "OMAP3 Zoom2 ", - "NAND", -}; - -typedef enum { - ZOOM2_REVISION_UNKNOWN = 0, - ZOOM2_REVISION_ALPHA, - ZOOM2_REVISION_BETA, - ZOOM2_REVISION_PRODUCTION -} zoom2_revision; - -zoom2_revision zoom2_get_revision(void); - -/* - * IEN - Input Enable - * IDIS - Input Disable - * PTD - Pull type Down - * PTU - Pull type Up - * DIS - Pull type selection is inactive - * EN - Pull type selection is active - * M0 - Mode 0 - * The commented string gives the final mux configuration for that pin - */ -#define MUX_ZOOM2() \ - /* SDRC*/\ - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /* SDRC_D0 */\ - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /* SDRC_D1 */\ - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /* SDRC_D2 */\ - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /* SDRC_D3 */\ - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /* SDRC_D4 */\ - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /* SDRC_D5 */\ - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /* SDRC_D6 */\ - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /* SDRC_D7 */\ - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /* SDRC_D8 */\ - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /* SDRC_D9 */\ - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /* SDRC_D10 */\ - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /* SDRC_D11 */\ - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\ - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /* SDRC_D13 */\ - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /* SDRC_D14 */\ - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /* SDRC_D15 */\ - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /* SDRC_D16 */\ - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /* SDRC_D17 */\ - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /* SDRC_D18 */\ - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /* SDRC_D19 */\ - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /* SDRC_D20 */\ - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /* SDRC_D21 */\ - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /* SDRC_D22 */\ - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /* SDRC_D23 */\ - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /* SDRC_D24 */\ - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /* SDRC_D25 */\ - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /* SDRC_D26 */\ - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /* SDRC_D27 */\ - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /* SDRC_D28 */\ - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /* SDRC_D29 */\ - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /* SDRC_D30 */\ - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /* SDRC_D31 */\ - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /* SDRC_CLK */\ - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /* SDRC_DQS0 */\ - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /* SDRC_DQS1 */\ - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /* SDRC_DQS2 */\ - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /* SDRC_DQS3 */\ -/* GPMC */\ - MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /* GPMC_A1 */\ - MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /* GPMC_A2 */\ - MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /* GPMC_A3 */\ - MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /* GPMC_A4 */\ - MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /* GPMC_A5 */\ - MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /* GPMC_A6 */\ - MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /* GPMC_A7 */\ - MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /* GPMC_A8 */\ - MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /* GPMC_A9 */\ - MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /* GPMC_A10 */\ - MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /* GPMC_D0 */\ - MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /* GPMC_D1 */\ - MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /* GPMC_D2 */\ - MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /* GPMC_D3 */\ - MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /* GPMC_D4 */\ - MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /* GPMC_D5 */\ - MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /* GPMC_D6 */\ - MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /* GPMC_D7 */\ - MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /* GPMC_D8 */\ - MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /* GPMC_D9 */\ - MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /* GPMC_D10 */\ - MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /* GPMC_D11 */\ - MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /* GPMC_D12 */\ - MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /* GPMC_D13 */\ - MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /* GPMC_D14 */\ - MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /* GPMC_D15 */\ - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /* GPMC_nCS0 */\ - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M7)) /* GPMC_nCS1 */\ - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M7)) /* GPMC_nCS2 */\ - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M7)) /* GPMC_nCS3 */\ - MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M7)) /* GPMC_nCS4 */\ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M7)) /* GPMC_nCS5 */\ - MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /* GPMC_nCS6 */\ - MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M7)) /* GPMC_nCS7 */\ - MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /* GPMC_CLK */\ - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /* GPMC_nADV_ALE */\ - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /* GPMC_nOE */\ - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /* GPMC_nWE */\ - MUX_VAL(CP(GPMC_NWP), (IDIS | PTU | DIS | M0)) /* GPMC_nWP */\ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /* GPMC_nBE0_CLE */\ - MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /* GPMC_nBE1 */\ - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTD | EN | M0)) /* GPMC_WAIT0 */\ - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /* GPMC_WAIT1 */\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /* GPMC_WAIT2 */\ - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /* GPMC_WAIT3 */\ -/* IDCC modem Power On */\ - MUX_VAL(CP(CAM_D11), (IEN | PTU | EN | M4)) /* GPIO_110 */\ - MUX_VAL(CP(CAM_D4), (IEN | PTU | EN | M4)) /* GPIO_103 */\ -/* GPMC CS7 has LAN9211 device */\ - MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | EN | M0)) /* GPMC_nCS7 */\ - MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M4)) /* LAN9221 */\ - MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M0)) /* MCSPI1_CS2 */\ -/* GPMC CS3 has Serial TL16CP754C device */\ - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /* GPMC_nCS3 */\ -/* Toggle Reset pin of TL16CP754C device */\ - MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTU | EN | M4)) /* GPIO_152 */\ - udelay(10);\ - MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | EN | M4)) /* GPIO_152 */\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */\ -/* LEDS */\ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | EN | M4)) /* GPIO_173 red */\ - MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | EN | M4)) /* GPIO_154 blue */\ - MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | EN | M4)) /* GPIO_61 blue2 */ - -#endif /* _BOARD_ZOOM2_H_ */ diff --git a/board/logicpd/zoom2/zoom2_serial.c b/board/logicpd/zoom2/zoom2_serial.c deleted file mode 100644 index 29592761161..00000000000 --- a/board/logicpd/zoom2/zoom2_serial.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix - * - * SPDX-License-Identifier: GPL-2.0+ - * - * This file was adapted from arch/powerpc/cpu/mpc5xxx/serial.c - */ - -#include -#include -#include -#include -#include "zoom2_serial.h" - -int quad_init_dev (unsigned long base) -{ - /* - * The Quad UART is on the debug board. - * Check if the debug board is attached before using the UART - */ - if (zoom2_debug_board_connected ()) { - NS16550_t com_port = (NS16550_t) base; - int baud_divisor = CONFIG_SYS_NS16550_CLK / 16 / - CONFIG_BAUDRATE; - - /* - * Zoom2 has a board specific initialization of its UART. - * This generic initialization has been copied from - * drivers/serial/ns16550.c. The macros have been expanded. - * - * Do the following instead of - * - * NS16550_init (com_port, clock_divisor); - */ - com_port->ier = 0x00; - - /* - * On Zoom2 board Set pre-scalar to 1 - * CLKSEL is GND => MCR[7] is 1 => preslr is 4 - * So change the prescl to 1 - */ - com_port->lcr = 0xBF; - com_port->fcr |= 0x10; - com_port->mcr &= 0x7F; - - /* This is generic ns16550.c setup */ - com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; - com_port->dll = 0; - com_port->dlm = 0; - com_port->lcr = UART_LCR_8N1; - com_port->mcr = UART_MCR_DTR | UART_MCR_RTS; - com_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR | - UART_FCR_TXSR; - com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; - com_port->dll = baud_divisor & 0xff; - com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = UART_LCR_8N1; - } - /* - * We have to lie here, otherwise the board init code will hang - * on the check - */ - return 0; -} - -void quad_putc_dev (unsigned long base, const char c) -{ - if (zoom2_debug_board_connected ()) { - - if (c == '\n') - quad_putc_dev (base, '\r'); - - NS16550_putc ((NS16550_t) base, c); - } else { - usbtty_putc(c); - } -} - -void quad_puts_dev (unsigned long base, const char *s) -{ - if (zoom2_debug_board_connected ()) { - while ((s != NULL) && (*s != '\0')) - quad_putc_dev (base, *s++); - } else { - usbtty_puts(s); - } -} - -int quad_getc_dev (unsigned long base) -{ - if (zoom2_debug_board_connected ()) - return NS16550_getc ((NS16550_t) base); - - return usbtty_getc(); -} - -int quad_tstc_dev (unsigned long base) -{ - if (zoom2_debug_board_connected ()) - return NS16550_tstc ((NS16550_t) base); - - return usbtty_tstc(); -} - -void quad_setbrg_dev (unsigned long base) -{ - if (zoom2_debug_board_connected ()) { - - int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / - CONFIG_BAUDRATE; - - NS16550_reinit ((NS16550_t) base, clock_divisor); - } -} - -QUAD_INIT (0) -QUAD_INIT (1) -QUAD_INIT (2) -QUAD_INIT (3) - -struct serial_device *default_serial_console(void) -{ - switch (ZOOM2_DEFAULT_SERIAL_DEVICE) { - case 0: return &zoom2_serial_device0; - case 1: return &zoom2_serial_device1; - case 2: return &zoom2_serial_device2; - case 3: return &zoom2_serial_device3; - } -} diff --git a/board/logicpd/zoom2/zoom2_serial.h b/board/logicpd/zoom2/zoom2_serial.h deleted file mode 100644 index 82244521ac5..00000000000 --- a/board/logicpd/zoom2/zoom2_serial.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef ZOOM2_SERIAL_H -#define ZOOM2_SERIAL_H - -#include - -extern int zoom2_debug_board_connected (void); - -#define SERIAL_TL16CP754C_BASE 0x10000000 /* Zoom2 Serial chip address */ - -#define QUAD_BASE_0 SERIAL_TL16CP754C_BASE -#define QUAD_BASE_1 (SERIAL_TL16CP754C_BASE + 0x100) -#define QUAD_BASE_2 (SERIAL_TL16CP754C_BASE + 0x200) -#define QUAD_BASE_3 (SERIAL_TL16CP754C_BASE + 0x300) - -#define QUAD_INIT(n) \ -int quad_init_##n(void) \ -{ \ - return quad_init_dev(QUAD_BASE_##n); \ -} \ -void quad_setbrg_##n(void) \ -{ \ - quad_setbrg_dev(QUAD_BASE_##n); \ -} \ -void quad_putc_##n(const char c) \ -{ \ - quad_putc_dev(QUAD_BASE_##n, c); \ -} \ -void quad_puts_##n(const char *s) \ -{ \ - quad_puts_dev(QUAD_BASE_##n, s); \ -} \ -int quad_getc_##n(void) \ -{ \ - return quad_getc_dev(QUAD_BASE_##n); \ -} \ -int quad_tstc_##n(void) \ -{ \ - return quad_tstc_dev(QUAD_BASE_##n); \ -} \ -struct serial_device zoom2_serial_device##n = \ -{ \ - .name = __stringify(n), \ - .start = quad_init_##n, \ - .stop = NULL, \ - .setbrg = quad_setbrg_##n, \ - .getc = quad_getc_##n, \ - .tstc = quad_tstc_##n, \ - .putc = quad_putc_##n, \ - .puts = quad_puts_##n, \ -}; - -#endif /* ZOOM2_SERIAL_H */ diff --git a/boards.cfg b/boards.cfg index 9949bb53672..a49fa660891 100644 --- a/boards.cfg +++ b/boards.cfg @@ -326,7 +326,6 @@ Active arm armv7 omap3 isee igep00x0 Active arm armv7 omap3 logicpd am3517evm am3517_evm - Vaibhav Hiremath Active arm armv7 omap3 logicpd omap3som omap3_logic - Peter Barada Active arm armv7 omap3 logicpd zoom1 omap3_zoom1 - Nishanth Menon -Active arm armv7 omap3 logicpd zoom2 omap3_zoom2 - Tom Rix Active arm armv7 omap3 matrix_vision mvblx omap3_mvblx - Michael Jones Active arm armv7 omap3 nokia rx51 nokia_rx51 - Pali Rohár Active arm armv7 omap3 technexion tao3530 omap3_ha tao3530:SYS_BOARD_OMAP3_HA Stefan Roese diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 181c81815ac..fbc37b27e8e 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -56,9 +56,8 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) ; serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); -#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ - defined(CONFIG_AM33XX) || defined(CONFIG_TI81XX) || \ - defined(CONFIG_AM43XX) +#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ + defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h deleted file mode 100644 index f7497408158..00000000000 --- a/include/configs/omap3_zoom2.h +++ /dev/null @@ -1,237 +0,0 @@ -/* - * (C) Copyright 2006-2009 - * Texas Instruments. - * Richard Woodruff - * Syed Mohammed Khasim - * Nishanth Menon - * Tom Rix - * - * Configuration settings for the TI OMAP3430 Zoom II board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */ -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON - -#define CONFIG_SDRC /* The chip has SDRC controller */ - -#include /* get chip and board defs */ -#include - -/* - * Display CPU and Board information - */ -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#define CONFIG_OF_LIBFDT 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ - /* Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - * Zoom2 uses the TL16CP754C on the debug board - */ -/* - * 0 - 1 : first USB with respect to the left edge of the debug board - * 2 - 3 : second USB with respect to the left edge of the debug board - */ -#define ZOOM2_DEFAULT_SERIAL_DEVICE 0 - -#define V_NS16550_CLK (1843200) /* 1.8432 Mhz */ - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_REG_SIZE (-2) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {115200} - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1 - -/* Status LED */ -#define CONFIG_STATUS_LED 1 /* Status LED enabled */ -#define CONFIG_BOARD_SPECIFIC_LED 1 -#define STATUS_LED_BLUE 0 -#define STATUS_LED_RED 1 -/* Blue */ -#define STATUS_LED_BIT STATUS_LED_BLUE -#define STATUS_LED_STATE STATUS_LED_ON -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) -/* Red */ -#define STATUS_LED_BIT1 STATUS_LED_RED -#define STATUS_LED_STATE1 STATUS_LED_OFF -#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) -/* Optional value */ -#define STATUS_LED_BOOT STATUS_LED_BIT - -/* GPIO banks */ -#ifdef CONFIG_STATUS_LED -#define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */ -#define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */ -#endif -#define CONFIG_OMAP3_GPIO_3 /* board revision */ -#define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */ - -/* USB */ -#define CONFIG_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 -#define CONFIG_TWL4030_USB 1 - -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "Zoom2" - -/* commands to include */ -#include - -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_NAND /* NAND support */ -#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ - -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ -#undef CONFIG_CMD_NFS /* NFS support */ - -#define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP34XX - -/* - * TWL4030 - */ -#define CONFIG_TWL4030_POWER 1 -#define CONFIG_TWL4030_LED 1 - -/* - * Board NAND Info. - */ -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand at */ - /* CS0 */ -#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -/* Environment information */ -#define CONFIG_BOOTDELAY 10 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "usbtty=cdc_acm\0" \ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # " -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -/* Memtest from start of memory to 31MB */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000) -/* The default load address is the start of memory */ -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ -/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ - -/* Configure the PISMO */ -#define PISMO1_NAND_SIZE GPMC_SIZE_128M -#define PISMO1_ONEN_SIZE GPMC_SIZE_128M - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE -#endif - -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - -#define CONFIG_ENV_IS_IN_NAND 1 -#define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */ - -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET -#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET - -#define CONFIG_SYS_CACHELINE_SIZE 64 - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From 8ad59c9a7bef49a18078888ad8eba8e87737c3b2 Mon Sep 17 00:00:00 2001 From: Jeroen Hofstee Date: Sat, 21 Dec 2013 18:03:09 +0100 Subject: ARM: tam3517-common: fix nand spl boot commit f9095aac793aa8917ab9b915c5d449e6dc8d3d30, "mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme" removed CONFIG_SPL_NAND_SOFTECC from the tam3517 common config, causing the spl nand boot to fail. Add it back, so derived boards boot again. Cc: Pekon Gupta Cc: Scott Wood Cc: Raphael Assenat Cc: Stefano Babic Cc: Tapani Utriainen Signed-off-by: Jeroen Hofstee Acked-by: Stefano Babic --- include/configs/tam3517-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 439fc47eb85..d44b5c036de 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -224,6 +224,7 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_CONSOLE #define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ #define CONFIG_SPL_LIBCOMMON_SUPPORT -- cgit v1.3.1 From 4b9b2c300a23ca4a85811918dc92e822a9571a87 Mon Sep 17 00:00:00 2001 From: Jeroen Hofstee Date: Sat, 21 Dec 2013 18:06:33 +0100 Subject: ARM: twister: add missing gpio clock init Commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d breaks boards which do not explicitly enable the gpio clocks. This causes the twister spl to hang, since it uses the no longer enabled gpio 55. Add CONFIG_OMAP3_GPIO_2 to unbrick the board. Cc: Stefano Babic Cc: Tapani Utriainen Signed-off-by: Jeroen Hofstee Acked-by: Stefano Babic --- include/configs/twister.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/configs') diff --git a/include/configs/twister.h b/include/configs/twister.h index b6ca59c33c3..f24dc136caa 100644 --- a/include/configs/twister.h +++ b/include/configs/twister.h @@ -50,4 +50,7 @@ #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_SPL_BOARD_INIT +/* gpio 55 is used as SPL_OS_BOOT_KEY */ +#define CONFIG_OMAP3_GPIO_2 + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 6f72892a4412013c4257f8475ed9d940132a202f Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Tue, 31 Dec 2013 12:55:15 +0200 Subject: arm: omap: cm_t35: enable gpio bank 5 clocks explicitly Following commit "arm: omap3: Enable clocks for peripherals only if they are used" (f33b9bd3984fb11e1d8566a866adc5957b1e1c9d) it is now necessary to enable clocks for GPIO banks explicitly. On cm_t35, GPIO bank 5 is necessary for scf0403 lcd support. Enable GPIO bank 5 clocks. Signed-off-by: Nikita Kiryanov Cc: Igor Grinberg Cc: Tom Rini Acked-by: Igor Grinberg --- include/configs/cm_t35.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 4640c431dcb..7729a02ab65 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -316,6 +316,7 @@ /* Display Configuration */ #define CONFIG_OMAP3_GPIO_2 +#define CONFIG_OMAP3_GPIO_5 #define CONFIG_VIDEO_OMAP3 #define LCD_BPP LCD_COLOR16 -- cgit v1.3.1 From 9f618330328b18547dbc8ebc1f0c48fefdae7513 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 6 Jan 2014 15:43:35 +0900 Subject: sh: delete redundant CONFIG_SH definition CONFIG_SH is defined in arch/sh/config.mk. It is not necessary to define it in each board header config header file. Signed-off-by: Masahiro Yamada Cc: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/configs/MigoR.h | 1 - include/configs/ap325rxa.h | 1 - include/configs/ap_sh4a_4a.h | 1 - include/configs/ecovec.h | 1 - include/configs/espt.h | 1 - include/configs/mpr2.h | 1 - include/configs/ms7720se.h | 1 - include/configs/ms7722se.h | 1 - include/configs/ms7750se.h | 1 - include/configs/r0p7734.h | 1 - include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - include/configs/rsk7203.h | 1 - include/configs/rsk7264.h | 1 - include/configs/rsk7269.h | 1 - include/configs/sh7752evb.h | 1 - include/configs/sh7753evb.h | 1 - include/configs/sh7757lcr.h | 1 - include/configs/sh7763rdp.h | 1 - include/configs/sh7785lcr.h | 1 - include/configs/shmin.h | 1 - 21 files changed, 21 deletions(-) (limited to 'include/configs') diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 9fd45514266..47e3322200b 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -10,7 +10,6 @@ #define __MIGO_R_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 #define CONFIG_MIGO_R 1 diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 933de52c568..a3c6b2b9089 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -11,7 +11,6 @@ #define __AP325RXA_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7723 1 #define CONFIG_AP325RXA 1 diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index 83a5c37e43f..7478386530e 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -10,7 +10,6 @@ #define __AP_SH4A_4A_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 3483cf1f58b..a8f6dc9a05a 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -23,7 +23,6 @@ */ #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7724 1 diff --git a/include/configs/espt.h b/include/configs/espt.h index 1bd7eeceb9a..8493c2427c3 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -10,7 +10,6 @@ #ifndef __ESPT_H #define __ESPT_H -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7763 1 #define CONFIG_ESPT 1 diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index fcf237edb91..47ed694b406 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -24,7 +24,6 @@ #define CONFIG_VERSION_VARIABLE /* CPU and platform */ -#define CONFIG_SH 1 #define CONFIG_SH3 1 #define CONFIG_CPU_SH7720 1 #define CONFIG_MPR2 1 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index ec8523eb95c..029f0e7e4fd 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -9,7 +9,6 @@ #ifndef __MS7720SE_H #define __MS7720SE_H -#define CONFIG_SH 1 #define CONFIG_SH3 1 #define CONFIG_CPU_SH7720 1 #define CONFIG_MS7720SE 1 diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 54fb7c3e86d..20f822657f9 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -9,7 +9,6 @@ #ifndef __MS7722SE_H #define __MS7722SE_H -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 #define CONFIG_MS7722SE 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index eea3bd1f2cc..d7285fd9642 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -9,7 +9,6 @@ #ifndef __MS7750SE_H #define __MS7750SE_H -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7750 1 /* #define CONFIG_CPU_SH7751 1 */ diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index dd26a71bcbc..766d9b77794 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -10,7 +10,6 @@ #define __R0P7734_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index ddcc975874b..264abeb97b4 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -3,7 +3,6 @@ #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7751 1 #define CONFIG_CPU_SH_TYPE_R 1 diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index f5e4daab8f9..3574c52cc13 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -11,7 +11,6 @@ #define __R7780RP_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7780 1 #define CONFIG_R7780MP 1 diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index acee4e89857..d64579f4a79 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -11,7 +11,6 @@ #define __RSK7203_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7203 1 diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index a5dbb64f48d..62b06188d01 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -12,7 +12,6 @@ #define __RSK7264_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7264 1 diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 9f54160afb3..452f5b4122c 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -11,7 +11,6 @@ #define __RSK7269_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7269 1 diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index ebdc5c8b054..d4d45b4c569 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -10,7 +10,6 @@ #define __SH7752EVB_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7752 1 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index f7eb86d1d6a..fa6e74a3928 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -10,7 +10,6 @@ #define __SH7753EVB_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7753 1 diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index ce1add26894..5752dbb3b28 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -10,7 +10,6 @@ #define __SH7757LCR_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7757 1 diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index a13778830a3..0b19e05d4fa 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -10,7 +10,6 @@ #ifndef __SH7763RDP_H #define __SH7763RDP_H -#define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7763 1 #define CONFIG_SH7763RDP 1 diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 4acbcab1b20..95f5a284022 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -10,7 +10,6 @@ #define __SH7785LCR_H #undef DEBUG -#define CONFIG_SH 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7785 1 #define CONFIG_SH7785LCR 1 diff --git a/include/configs/shmin.h b/include/configs/shmin.h index 5c990fc96d0..4f333b0631f 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -9,7 +9,6 @@ #ifndef __SHMIN_H #define __SHMIN_H -#define CONFIG_SH 1 #define CONFIG_SH3 1 #define CONFIG_CPU_SH7706 1 /* T-SH7706LAN */ -- cgit v1.3.1 From 31a30dd23a1f8ace4ab119f3daea3a821ad15f62 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 8 Jan 2014 13:48:51 +0900 Subject: sh: sh2: remove CONFIG_SH2 definition from board config CONFIG_SH2 was already defined in arch/sh/sh2/config.mk. This removes CONFIG_SH2 from board config files of SH2. Signed-off-by: Nobuhiro Iwamatsu --- include/configs/rsk7203.h | 1 - include/configs/rsk7264.h | 1 - include/configs/rsk7269.h | 1 - 3 files changed, 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index d64579f4a79..5920a2630c2 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -11,7 +11,6 @@ #define __RSK7203_H #undef DEBUG -#define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7203 1 #define CONFIG_RSK7203 1 diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 62b06188d01..5338cf23b6d 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -12,7 +12,6 @@ #define __RSK7264_H #undef DEBUG -#define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7264 1 #define CONFIG_RSK7264 1 diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 452f5b4122c..4796039f1ad 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -11,7 +11,6 @@ #define __RSK7269_H #undef DEBUG -#define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7269 1 #define CONFIG_RSK7269 1 -- cgit v1.3.1 From 2bb29629fc4790c53ec9275b66e4641405ea5ac4 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 8 Jan 2014 13:51:07 +0900 Subject: sh: sh3: remove CONFIG_SH3 definition from board config CONFIG_SH3 was already defined in arch/sh/sh3/config.mk. This removes CONFIG_SH3 from board config files of SH3. Signed-off-by: Nobuhiro Iwamatsu --- include/configs/mpr2.h | 1 - include/configs/ms7720se.h | 1 - include/configs/shmin.h | 1 - 3 files changed, 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index 47ed694b406..8ae497c6d56 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -24,7 +24,6 @@ #define CONFIG_VERSION_VARIABLE /* CPU and platform */ -#define CONFIG_SH3 1 #define CONFIG_CPU_SH7720 1 #define CONFIG_MPR2 1 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index 029f0e7e4fd..585d68f208e 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -9,7 +9,6 @@ #ifndef __MS7720SE_H #define __MS7720SE_H -#define CONFIG_SH3 1 #define CONFIG_CPU_SH7720 1 #define CONFIG_MS7720SE 1 diff --git a/include/configs/shmin.h b/include/configs/shmin.h index 4f333b0631f..f8155efbc98 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -9,7 +9,6 @@ #ifndef __SHMIN_H #define __SHMIN_H -#define CONFIG_SH3 1 #define CONFIG_CPU_SH7706 1 /* T-SH7706LAN */ #define CONFIG_SHMIN 1 -- cgit v1.3.1 From cdc902bd9cca9b5a14353f46435b8fa27c0db590 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 8 Jan 2014 14:10:10 +0900 Subject: sh: sh4: remove CONFIG_SH4 definition from board config CONFIG_SH4 was already defined in arch/sh/sh4/config.mk. This removes CONFIG_SH4 from board config files of SH4. Signed-off-by: Nobuhiro Iwamatsu --- include/configs/MigoR.h | 1 - include/configs/ap325rxa.h | 1 - include/configs/ap_sh4a_4a.h | 1 - include/configs/ecovec.h | 1 - include/configs/espt.h | 1 - include/configs/ms7722se.h | 1 - include/configs/ms7750se.h | 1 - include/configs/r0p7734.h | 1 - include/configs/r2dplus.h | 1 - include/configs/sh7763rdp.h | 1 - 10 files changed, 10 deletions(-) (limited to 'include/configs') diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 47e3322200b..88df94f1123 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -10,7 +10,6 @@ #define __MIGO_R_H #undef DEBUG -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 #define CONFIG_MIGO_R 1 diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index a3c6b2b9089..462b2e29106 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -11,7 +11,6 @@ #define __AP325RXA_H #undef DEBUG -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7723 1 #define CONFIG_AP325RXA 1 diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index 7478386530e..0162c3b04eb 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -10,7 +10,6 @@ #define __AP_SH4A_4A_H #undef DEBUG -#define CONFIG_SH4 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 #define CONFIG_AP_SH4A_4A 1 diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index a8f6dc9a05a..ee9bd0731fb 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -23,7 +23,6 @@ */ #undef DEBUG -#define CONFIG_SH4 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7724 1 #define CONFIG_BOARD_LATE_INIT 1 diff --git a/include/configs/espt.h b/include/configs/espt.h index 8493c2427c3..de16be70b2c 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -10,7 +10,6 @@ #ifndef __ESPT_H #define __ESPT_H -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7763 1 #define CONFIG_ESPT 1 #define __LITTLE_ENDIAN 1 diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 20f822657f9..1c8ada6c03f 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -9,7 +9,6 @@ #ifndef __MS7722SE_H #define __MS7722SE_H -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 #define CONFIG_MS7722SE 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index d7285fd9642..4cf8efeca03 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -9,7 +9,6 @@ #ifndef __MS7750SE_H #define __MS7750SE_H -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7750 1 /* #define CONFIG_CPU_SH7751 1 */ /* #define CONFIG_CPU_TYPE_R 1 */ diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 766d9b77794..0bb7cc54bd2 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -10,7 +10,6 @@ #define __R0P7734_H #undef DEBUG -#define CONFIG_SH4 1 #define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 #define CONFIG_R0P7734 1 diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 264abeb97b4..24d0c34db68 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -3,7 +3,6 @@ #undef DEBUG -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7751 1 #define CONFIG_CPU_SH_TYPE_R 1 #define CONFIG_R2DPLUS 1 diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 0b19e05d4fa..2438318fca5 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -10,7 +10,6 @@ #ifndef __SH7763RDP_H #define __SH7763RDP_H -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7763 1 #define CONFIG_SH7763RDP 1 #define __LITTLE_ENDIAN 1 -- cgit v1.3.1 From 8f0960e8378e0fc14d6216f60910994c217d3d57 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 8 Jan 2014 14:57:30 +0900 Subject: sh: sh2: Change CONFIG_SYS_HZ to CONFIG_SH_CMT_CLK_FREQ CONFIG_SYS_HZ of SH2 is not used as frequency of base timer. This is the correct clock of CMT. This changes from CONFIG_SYS_HZ to CONFIG_SH_CMT_CLK_FREQ, in order to use CONFIG_SYS_HZ as clock of CMT. Signed-off-by: Nobuhiro Iwamatsu --- arch/sh/lib/time_sh2.c | 2 +- include/configs/rsk7203.h | 2 +- include/configs/rsk7264.h | 2 +- include/configs/rsk7269.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include/configs') diff --git a/arch/sh/lib/time_sh2.c b/arch/sh/lib/time_sh2.c index be3896c3ed7..4b1f47b6adf 100644 --- a/arch/sh/lib/time_sh2.c +++ b/arch/sh/lib/time_sh2.c @@ -84,5 +84,5 @@ void __udelay(unsigned long usec) unsigned long get_tbclk(void) { - return CONFIG_SYS_HZ; + return CONFIG_SH_CMT_CLK_FREQ; } diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index 5920a2630c2..54363245803 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -85,7 +85,7 @@ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) +#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) /* Network interface */ #define CONFIG_SMC911X diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 5338cf23b6d..4aaa3ef74b7 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -65,7 +65,7 @@ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) +#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) /* Network interface */ #define CONFIG_SMC911X diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 4796039f1ad..11fc231fa67 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -64,7 +64,7 @@ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) +#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) /* Network interface */ #define CONFIG_SMC911X -- cgit v1.3.1 From f931483e4e41b7f3d738077040385b1776f635dc Mon Sep 17 00:00:00 2001 From: Lubomir Popov Date: Thu, 19 Dec 2013 17:14:02 +0200 Subject: ARM: omap5_uevm: Enable 8-bit eMMC access All prerequisites are already available, so why not enable 8-bit access - it is a matter of a define in the board file only. Signed-off-by: Lubomir Popov Acked-by: Pantelis Antoniou --- include/configs/omap5_uevm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 2f128b8a690..76c5106b45e 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -36,6 +36,7 @@ #define CONFIG_EFI_PARTITION #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART +#define CONFIG_HSMMC2_8BIT /* Required support for the TCA642X GPIO we have on the uEVM */ #define CONFIG_TCA642X -- cgit v1.3.1 From f4d8de48f5a2aa1885daa0d425b8c0568a2ccb69 Mon Sep 17 00:00:00 2001 From: Henrik Nordström Date: Sun, 10 Nov 2013 10:26:56 -0700 Subject: sandbox: block driver using host file/device as backing store MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Provide a way to use any host file or device as a block device in U-Boot. This can be used to provide filesystem access within U-Boot to an ext2 image file on the host, for example. The support is plumbed into the filesystem and partition interfaces. We don't want to print a message in the driver every time we find a missing device. Pass the information back to the caller where a message can be printed if desired. Signed-off-by: Henrik Nordström Signed-off-by: Simon Glass - Removed change to part.c get_device_and_partition() Signed-off-by: Simon Glass Reviewed-by: Simon Glass --- common/cmd_sandbox.c | 64 +++++++++++++++++++++++ disk/part.c | 6 +++ drivers/block/Makefile | 1 + drivers/block/sandbox.c | 124 +++++++++++++++++++++++++++++++++++++++++++++ include/config_fallbacks.h | 3 +- include/configs/sandbox.h | 3 ++ include/part.h | 5 ++ include/sandboxblockdev.h | 18 +++++++ 8 files changed, 223 insertions(+), 1 deletion(-) create mode 100644 drivers/block/sandbox.c create mode 100644 include/sandboxblockdev.h (limited to 'include/configs') diff --git a/common/cmd_sandbox.c b/common/cmd_sandbox.c index 8d59364b636..00982b164dd 100644 --- a/common/cmd_sandbox.c +++ b/common/cmd_sandbox.c @@ -6,6 +6,9 @@ #include #include +#include +#include +#include static int do_sandbox_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -25,10 +28,69 @@ static int do_sandbox_save(cmd_tbl_t *cmdtp, int flag, int argc, return do_save(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX); } +static int do_sandbox_bind(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc < 2 || argc > 3) + return CMD_RET_USAGE; + char *ep; + char *dev_str = argv[1]; + char *file = argc >= 3 ? argv[2] : NULL; + int dev = simple_strtoul(dev_str, &ep, 16); + if (*ep) { + printf("** Bad device specification %s **\n", dev_str); + return CMD_RET_USAGE; + } + return host_dev_bind(dev, file); +} + +static int do_sandbox_info(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc < 1 || argc > 2) + return CMD_RET_USAGE; + int min_dev = 0; + int max_dev = CONFIG_HOST_MAX_DEVICES - 1; + if (argc >= 2) { + char *ep; + char *dev_str = argv[1]; + int dev = simple_strtoul(dev_str, &ep, 16); + if (*ep) { + printf("** Bad device specification %s **\n", dev_str); + return CMD_RET_USAGE; + } + min_dev = dev; + max_dev = dev; + } + int dev; + printf("%3s %12s %s\n", "dev", "blocks", "path"); + for (dev = min_dev; dev <= max_dev; dev++) { + block_dev_desc_t *blk_dev; + int ret; + + printf("%3d ", dev); + ret = host_get_dev_err(dev, &blk_dev); + if (ret) { + if (ret == -ENOENT) + puts("Not bound to a backing file\n"); + else if (ret == -ENODEV) + puts("Invalid host device number\n"); + + continue; + } + struct host_block_dev *host_dev = blk_dev->priv; + printf("%12lu %s\n", (unsigned long)blk_dev->lba, + host_dev->filename); + } + return 0; +} + static cmd_tbl_t cmd_sandbox_sub[] = { U_BOOT_CMD_MKENT(load, 7, 0, do_sandbox_load, "", ""), U_BOOT_CMD_MKENT(ls, 3, 0, do_sandbox_ls, "", ""), U_BOOT_CMD_MKENT(save, 6, 0, do_sandbox_save, "", ""), + U_BOOT_CMD_MKENT(bind, 3, 0, do_sandbox_bind, "", ""), + U_BOOT_CMD_MKENT(info, 3, 0, do_sandbox_info, "", ""), }; static int do_sandbox(cmd_tbl_t *cmdtp, int flag, int argc, @@ -57,4 +119,6 @@ U_BOOT_CMD( "sb ls host - list files on host\n" "sb save host [] - " "save a file to host\n" + "sb bind [] - bind \"host\" device to file\n" + "sb info [] - show device binding & info" ); diff --git a/disk/part.c b/disk/part.c index d2e34cfcfa9..6941033d8d7 100644 --- a/disk/part.c +++ b/disk/part.c @@ -42,6 +42,9 @@ static const struct block_drvr block_drvr[] = { #endif #if defined(CONFIG_SYSTEMACE) { .name = "ace", .get_dev = systemace_get_dev, }, +#endif +#if defined(CONFIG_SANDBOX) + { .name = "host", .get_dev = host_get_dev, }, #endif { }, }; @@ -286,6 +289,9 @@ static void print_part_header (const char *type, block_dev_desc_t * dev_desc) case IF_TYPE_MMC: puts ("MMC"); break; + case IF_TYPE_HOST: + puts("HOST"); + break; default: puts ("UNKNOWN"); break; diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 4e94378388c..8697da4262b 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -18,5 +18,6 @@ obj-$(CONFIG_SATA_DWC) += sata_dwc.o obj-$(CONFIG_SATA_SIL3114) += sata_sil3114.o obj-$(CONFIG_SATA_SIL) += sata_sil.o obj-$(CONFIG_IDE_SIL680) += sil680.o +obj-$(CONFIG_SANDBOX) += sandbox.o obj-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o obj-$(CONFIG_SYSTEMACE) += systemace.o diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c new file mode 100644 index 00000000000..73f4c4a9e98 --- /dev/null +++ b/drivers/block/sandbox.c @@ -0,0 +1,124 @@ +/* + * Copyright (C) 2013 Henrik Nordstrom + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include + +static struct host_block_dev host_devices[CONFIG_HOST_MAX_DEVICES]; + +static struct host_block_dev *find_host_device(int dev) +{ + if (dev >= 0 && dev < CONFIG_HOST_MAX_DEVICES) + return &host_devices[dev]; + + return NULL; +} + +static unsigned long host_block_read(int dev, unsigned long start, + lbaint_t blkcnt, void *buffer) +{ + struct host_block_dev *host_dev = find_host_device(dev); + + if (!host_dev) + return -1; + if (os_lseek(host_dev->fd, + start * host_dev->blk_dev.blksz, + OS_SEEK_SET) == -1) { + printf("ERROR: Invalid position\n"); + return -1; + } + ssize_t len = os_read(host_dev->fd, buffer, + blkcnt * host_dev->blk_dev.blksz); + if (len >= 0) + return len / host_dev->blk_dev.blksz; + return -1; +} + +static unsigned long host_block_write(int dev, unsigned long start, + lbaint_t blkcnt, const void *buffer) +{ + struct host_block_dev *host_dev = find_host_device(dev); + if (os_lseek(host_dev->fd, + start * host_dev->blk_dev.blksz, + OS_SEEK_SET) == -1) { + printf("ERROR: Invalid position\n"); + return -1; + } + ssize_t len = os_write(host_dev->fd, buffer, blkcnt * + host_dev->blk_dev.blksz); + if (len >= 0) + return len / host_dev->blk_dev.blksz; + return -1; +} + +int host_dev_bind(int dev, char *filename) +{ + struct host_block_dev *host_dev = find_host_device(dev); + + if (!host_dev) + return -1; + if (host_dev->blk_dev.priv) { + os_close(host_dev->fd); + host_dev->blk_dev.priv = NULL; + } + if (host_dev->filename) + free(host_dev->filename); + if (filename && *filename) { + host_dev->filename = strdup(filename); + } else { + host_dev->filename = NULL; + return 0; + } + + host_dev->fd = os_open(host_dev->filename, OS_O_RDWR); + if (host_dev->fd == -1) { + printf("Failed to access host backing file '%s'\n", + host_dev->filename); + return 1; + } + + block_dev_desc_t *blk_dev = &host_dev->blk_dev; + blk_dev->if_type = IF_TYPE_HOST; + blk_dev->priv = host_dev; + blk_dev->blksz = 512; + blk_dev->lba = os_lseek(host_dev->fd, 0, OS_SEEK_END) / blk_dev->blksz; + blk_dev->block_read = host_block_read; + blk_dev->block_write = host_block_write; + blk_dev->dev = dev; + blk_dev->part_type = PART_TYPE_UNKNOWN; + init_part(blk_dev); + + return 0; +} + +int host_get_dev_err(int dev, block_dev_desc_t **blk_devp) +{ + struct host_block_dev *host_dev = find_host_device(dev); + + if (!host_dev) + return -ENODEV; + + if (!host_dev->blk_dev.priv) + return -ENOENT; + + *blk_devp = &host_dev->blk_dev; + return 0; +} + +block_dev_desc_t *host_get_dev(int dev) +{ + block_dev_desc_t *blk_dev; + + if (host_get_dev_err(dev, &blk_dev)) + return NULL; + + return blk_dev; +} diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 3633b09aa91..d8339b26cca 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -50,7 +50,8 @@ defined(CONFIG_CMD_PART) || \ defined(CONFIG_CMD_GPT) || \ defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) + defined(CONFIG_SYSTEMACE) || \ + defined(CONFIG_SANDBOX) #define HAVE_BLOCK_DEVICE #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 7e78a231d7a..98bdd70ffa9 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -39,6 +39,9 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE +#define CONFIG_CMD_PART +#define CONFIG_DOS_PARTITION +#define CONFIG_HOST_MAX_DEVICES 4 #define CONFIG_SYS_VSNPRINTF diff --git a/include/part.h b/include/part.h index ce840bd841b..4beb6db89b1 100644 --- a/include/part.h +++ b/include/part.h @@ -58,6 +58,8 @@ typedef struct block_dev_desc { #define IF_TYPE_MMC 6 #define IF_TYPE_SD 7 #define IF_TYPE_SATA 8 +#define IF_TYPE_HOST 9 +#define IF_TYPE_MAX 10 /* Max number of IF_TYPE_* supported */ /* Part types */ #define PART_TYPE_UNKNOWN 0x00 @@ -102,6 +104,8 @@ block_dev_desc_t* usb_stor_get_dev(int dev); block_dev_desc_t* mmc_get_dev(int dev); block_dev_desc_t* systemace_get_dev(int dev); block_dev_desc_t* mg_disk_get_dev(int dev); +block_dev_desc_t *host_get_dev(int dev); +int host_get_dev_err(int dev, block_dev_desc_t **blk_devp); /* disk/part.c */ int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); @@ -123,6 +127,7 @@ static inline block_dev_desc_t* usb_stor_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* mmc_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* systemace_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* mg_disk_get_dev(int dev) { return NULL; } +static inline block_dev_desc_t *host_get_dev(int dev) { return NULL; } static inline int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info) { return -1; } diff --git a/include/sandboxblockdev.h b/include/sandboxblockdev.h new file mode 100644 index 00000000000..627787aa326 --- /dev/null +++ b/include/sandboxblockdev.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2013, Henrik Nordstrom + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SANDBOX_BLOCK_DEV__ +#define __SANDBOX_BLOCK_DEV__ + +struct host_block_dev { + block_dev_desc_t blk_dev; + char *filename; + int fd; +}; + +int host_dev_bind(int dev, char *filename); + +#endif -- cgit v1.3.1 From ed3f5a30a7bc4254e516caad7f01baf4596359b7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 10 Nov 2013 10:27:05 -0700 Subject: sandbox: tpm: Add TPM emulation Add a simple TPM emulator for sandbox. It only supports a small subset of TPM operations. However, these are enough to perform common tasks. Note this is an initial commit to get this working, but it could use cleaning up (for example constants instead of open-coded values). Signed-off-by: Simon Glass Signed-off-by: Simon Glass Reviewed-by: Simon Glass --- drivers/tpm/Makefile | 1 + drivers/tpm/tpm_tis_sandbox.c | 262 ++++++++++++++++++++++++++++++++++++++++++ include/configs/sandbox.h | 2 + 3 files changed, 265 insertions(+) create mode 100644 drivers/tpm/tpm_tis_sandbox.c (limited to 'include/configs') diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index 2f2353f809b..150570ee7e4 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o obj-$(CONFIG_TPM_TIS_I2C) += tpm.o obj-$(CONFIG_TPM_TIS_I2C) += tpm_tis_i2c.o obj-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o +obj-$(CONFIG_TPM_TIS_SANDBOX) += tpm_tis_sandbox.o diff --git a/drivers/tpm/tpm_tis_sandbox.c b/drivers/tpm/tpm_tis_sandbox.c new file mode 100644 index 00000000000..80cf734f1c2 --- /dev/null +++ b/drivers/tpm/tpm_tis_sandbox.c @@ -0,0 +1,262 @@ +/* + * Copyright (c) 2013 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +/* TPM NVRAM location indices. */ +#define FIRMWARE_NV_INDEX 0x1007 +#define KERNEL_NV_INDEX 0x1008 + +#define NV_DATA_PUBLIC_PERMISSIONS_OFFSET 60 + +/* Kernel TPM space - KERNEL_NV_INDEX, locked with physical presence */ +#define ROLLBACK_SPACE_KERNEL_VERSION 2 +#define ROLLBACK_SPACE_KERNEL_UID 0x4752574C /* 'GRWL' */ + +struct rollback_space_kernel { + /* Struct version, for backwards compatibility */ + uint8_t struct_version; + /* Unique ID to detect space redefinition */ + uint32_t uid; + /* Kernel versions */ + uint32_t kernel_versions; + /* Reserved for future expansion */ + uint8_t reserved[3]; + /* Checksum (v2 and later only) */ + uint8_t crc8; +} __packed rollback_space_kernel; + +/* + * These numbers derive from adding the sizes of command fields as shown in + * the TPM commands manual. + */ +#define TPM_REQUEST_HEADER_LENGTH 10 +#define TPM_RESPONSE_HEADER_LENGTH 10 + +/* These are the different non-volatile spaces that we emulate */ +enum { + NV_GLOBAL_LOCK, + NV_SEQ_FIRMWARE, + NV_SEQ_KERNEL, + NV_SEQ_COUNT, +}; + +/* Size of each non-volatile space */ +#define NV_DATA_SIZE 0x20 + +/* + * Information about our TPM emulation. This is preserved in the sandbox + * state file if enabled. + */ +static struct tpm_state { + uint8_t nvdata[NV_SEQ_COUNT][NV_DATA_SIZE]; +} state; + +/** + * sandbox_tpm_read_state() - read the sandbox EC state from the state file + * + * If data is available, then blob and node will provide access to it. If + * not this function sets up an empty TPM. + * + * @blob: Pointer to device tree blob, or NULL if no data to read + * @node: Node offset to read from + */ +static int sandbox_tpm_read_state(const void *blob, int node) +{ + const char *prop; + int len; + int i; + + if (!blob) + return 0; + + for (i = 0; i < NV_SEQ_COUNT; i++) { + char prop_name[20]; + + sprintf(prop_name, "nvdata%d", i); + prop = fdt_getprop(blob, node, prop_name, &len); + if (prop && len == NV_DATA_SIZE) + memcpy(state.nvdata[i], prop, NV_DATA_SIZE); + } + + return 0; +} + +/** + * cros_ec_write_state() - Write out our state to the state file + * + * The caller will ensure that there is a node ready for the state. The node + * may already contain the old state, in which case it is overridden. + * + * @blob: Device tree blob holding state + * @node: Node to write our state into + */ +static int sandbox_tpm_write_state(void *blob, int node) +{ + int i; + + /* + * We are guaranteed enough space to write basic properties. + * We could use fdt_add_subnode() to put each set of data in its + * own node - perhaps useful if we add access informaiton to each. + */ + for (i = 0; i < NV_SEQ_COUNT; i++) { + char prop_name[20]; + + sprintf(prop_name, "nvdata%d", i); + fdt_setprop(blob, node, prop_name, state.nvdata[i], + NV_DATA_SIZE); + } + + return 0; +} + +SANDBOX_STATE_IO(sandbox_tpm, "google,sandbox-tpm", sandbox_tpm_read_state, + sandbox_tpm_write_state); + +static int index_to_seq(uint32_t index) +{ + switch (index) { + case FIRMWARE_NV_INDEX: + return NV_SEQ_FIRMWARE; + case KERNEL_NV_INDEX: + return NV_SEQ_KERNEL; + case 0: + return NV_GLOBAL_LOCK; + } + + printf("Invalid nv index %#x\n", index); + return -1; +} + +int tis_sendrecv(const u8 *sendbuf, size_t send_size, + u8 *recvbuf, size_t *recv_len) +{ + struct tpm_state *tpm = &state; + uint32_t code, index, length, type; + uint8_t *data; + int seq; + + code = get_unaligned_be32(sendbuf + sizeof(uint16_t) + + sizeof(uint32_t)); + printf("tpm: %zd bytes, recv_len %zd, cmd = %x\n", send_size, + *recv_len, code); + print_buffer(0, sendbuf, 1, send_size, 0); + switch (code) { + case 0x65: /* get flags */ + type = get_unaligned_be32(sendbuf + 14); + switch (type) { + case 4: + index = get_unaligned_be32(sendbuf + 18); + printf("Get flags index %#02x\n", index); + *recv_len = 22; + memset(recvbuf, '\0', *recv_len); + put_unaligned_be32(22, recvbuf + + TPM_RESPONSE_HEADER_LENGTH); + data = recvbuf + TPM_RESPONSE_HEADER_LENGTH + + sizeof(uint32_t); + switch (index) { + case FIRMWARE_NV_INDEX: + break; + case KERNEL_NV_INDEX: + /* TPM_NV_PER_PPWRITE */ + put_unaligned_be32(1, data + + NV_DATA_PUBLIC_PERMISSIONS_OFFSET); + break; + } + break; + case 0x11: /* TPM_CAP_NV_INDEX */ + index = get_unaligned_be32(sendbuf + 18); + printf("Get cap nv index %#02x\n", index); + put_unaligned_be32(22, recvbuf + + TPM_RESPONSE_HEADER_LENGTH); + break; + default: + printf(" ** Unknown 0x65 command type %#02x\n", + type); + return -1; + } + break; + case 0xcd: /* nvwrite */ + index = get_unaligned_be32(sendbuf + 10); + length = get_unaligned_be32(sendbuf + 18); + seq = index_to_seq(index); + if (seq < 0) + return -1; + printf("tpm: nvwrite index=%#02x, len=%#02x\n", index, length); + memcpy(&tpm->nvdata[seq], + recvbuf + TPM_RESPONSE_HEADER_LENGTH + sizeof(uint32_t), + length); + *recv_len = 12; + memset(recvbuf, '\0', *recv_len); + break; + case 0xcf: /* nvread */ + index = get_unaligned_be32(sendbuf + 10); + length = get_unaligned_be32(sendbuf + 18); + seq = index_to_seq(index); + if (seq < 0) + return -1; + printf("tpm: nvread index=%#02x, len=%#02x\n", index, length); + *recv_len = TPM_RESPONSE_HEADER_LENGTH + sizeof(uint32_t) + + length; + memset(recvbuf, '\0', *recv_len); + put_unaligned_be32(length, recvbuf + + TPM_RESPONSE_HEADER_LENGTH); + if (seq == NV_SEQ_KERNEL) { + struct rollback_space_kernel rsk; + + data = recvbuf + TPM_RESPONSE_HEADER_LENGTH + + sizeof(uint32_t); + rsk.struct_version = 2; + rsk.uid = ROLLBACK_SPACE_KERNEL_UID; + rsk.kernel_versions = 0; + rsk.crc8 = crc8((unsigned char *)&rsk, + offsetof(struct rollback_space_kernel, + crc8)); + memcpy(data, &rsk, sizeof(rsk)); + } else { + memcpy(recvbuf + TPM_RESPONSE_HEADER_LENGTH + + sizeof(uint32_t), &tpm->nvdata[seq], length); + } + break; + case 0x14: /* tpm extend */ + case 0x15: /* pcr read */ + case 0x5d: /* force clear */ + case 0x6f: /* physical enable */ + case 0x72: /* physical set deactivated */ + case 0x99: /* startup */ + case 0x4000000a: /* assert physical presence */ + *recv_len = 12; + memset(recvbuf, '\0', *recv_len); + break; + default: + printf("Unknown tpm command %02x\n", code); + return -1; + } + + return 0; +} + +int tis_open(void) +{ + printf("%s\n", __func__); + return 0; +} + +int tis_close(void) +{ + printf("%s\n", __func__); + return 0; +} + +int tis_init(void) +{ + printf("%s\n", __func__); + return 0; +} diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 98bdd70ffa9..a6d55822b82 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -129,4 +129,6 @@ #define CONFIG_LZO #define CONFIG_LZMA +#define CONFIG_TPM_TIS_SANDBOX + #endif -- cgit v1.3.1 From 6b87abe3ac357649a990c05a6a5f9fd232cca21c Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Thu, 9 Jan 2014 12:22:12 +0900 Subject: sh: sh4: Remove CONFIG_SH4A definition from source code SH4 and SH4A are compatible. But some instructions are different from these. In Linux kernel, It is treated as a separate CPU, but for now, I think that there is no need to divide especially in the U-Boot. This removes CONFIG_SH4A definition from source code, SH4A is treated as SH4. And this fix white space. Signed-off-by: Nobuhiro Iwamatsu --- arch/sh/cpu/sh2/cpu.c | 4 ---- arch/sh/cpu/sh4/cpu.c | 4 ---- arch/sh/include/asm/cache.h | 4 ++-- arch/sh/include/asm/processor.h | 5 ++--- include/configs/ap_sh4a_4a.h | 1 - include/configs/ecovec.h | 1 - include/configs/r0p7734.h | 1 - include/configs/r7780mp.h | 1 - include/configs/sh7752evb.h | 1 - include/configs/sh7753evb.h | 1 - include/configs/sh7757lcr.h | 1 - include/configs/sh7785lcr.h | 1 - include/sh_tmu.h | 2 +- 13 files changed, 5 insertions(+), 22 deletions(-) (limited to 'include/configs') diff --git a/arch/sh/cpu/sh2/cpu.c b/arch/sh/cpu/sh2/cpu.c index 18479a4c40f..a2f856f4594 100644 --- a/arch/sh/cpu/sh2/cpu.c +++ b/arch/sh/cpu/sh2/cpu.c @@ -23,11 +23,7 @@ int checkcpu(void) { -#if defined(CONFIG_SH2A) - puts("CPU: SH2A\n"); -#else puts("CPU: SH2\n"); -#endif return 0; } diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c index 91133a38aee..e8ee0a45ab9 100644 --- a/arch/sh/cpu/sh4/cpu.c +++ b/arch/sh/cpu/sh4/cpu.c @@ -13,11 +13,7 @@ int checkcpu(void) { -#ifdef CONFIG_SH4A - puts("CPU: SH-4A\n"); -#else puts("CPU: SH4\n"); -#endif return 0; } diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index b21dc4422ed..0698a377595 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h @@ -1,7 +1,7 @@ #ifndef __ASM_SH_CACHE_H #define __ASM_SH_CACHE_H -#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) +#if defined(CONFIG_SH4) int cache_control(unsigned int cmd); @@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; }; */ #define ARCH_DMA_MINALIGN 32 -#endif /* CONFIG_SH4 || CONFIG_SH4A */ +#endif /* CONFIG_SH4 */ /* * Use the L1 data cache line size value for the minimum DMA buffer alignment diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 938a89cff50..c3441ff5585 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -3,10 +3,9 @@ #if defined(CONFIG_SH2) || \ defined (CONFIG_SH2A) # include -#elif defined (CONFIG_SH3) +#elif defined(CONFIG_SH3) # include -#elif defined (CONFIG_SH4) || \ - defined (CONFIG_SH4A) +#elif defined(CONFIG_SH4) # include #endif #endif diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index 0162c3b04eb..bb39491f8b6 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -10,7 +10,6 @@ #define __AP_SH4A_4A_H #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 #define CONFIG_AP_SH4A_4A 1 #define CONFIG_400MHZ_MODE 1 diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index ee9bd0731fb..3a5cc74829c 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -23,7 +23,6 @@ */ #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7724 1 #define CONFIG_BOARD_LATE_INIT 1 #define CONFIG_ECOVEC 1 diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 0bb7cc54bd2..53128ecc120 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -10,7 +10,6 @@ #define __R0P7734_H #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 #define CONFIG_R0P7734 1 #define CONFIG_400MHZ_MODE 1 diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 3574c52cc13..8156724f7f6 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -11,7 +11,6 @@ #define __R7780RP_H #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7780 1 #define CONFIG_R7780MP 1 #define CONFIG_SYS_R7780MP_OLD_FLASH 1 diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index d4d45b4c569..f06abbca0c2 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -10,7 +10,6 @@ #define __SH7752EVB_H #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7752 1 #define CONFIG_SH7752EVB 1 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index fa6e74a3928..e400db08ad9 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -10,7 +10,6 @@ #define __SH7753EVB_H #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7753 1 #define CONFIG_SH7753EVB 1 diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 5752dbb3b28..08bff1da3fa 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -10,7 +10,6 @@ #define __SH7757LCR_H #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7757 1 #define CONFIG_SH7757LCR 1 diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 95f5a284022..2723eaf2d3d 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -10,7 +10,6 @@ #define __SH7785LCR_H #undef DEBUG -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7785 1 #define CONFIG_SH7785LCR 1 diff --git a/include/sh_tmu.h b/include/sh_tmu.h index f5b42faea41..61afc7136d7 100644 --- a/include/sh_tmu.h +++ b/include/sh_tmu.h @@ -47,7 +47,7 @@ struct tmu_regs { }; #endif /* CONFIG_SH3 */ -#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) || defined(CONFIG_RMOBILE) +#if defined(CONFIG_SH4) || defined(CONFIG_RMOBILE) struct tmu_regs { u32 reserved; u8 tstr; -- cgit v1.3.1 From 2a7a210e2cb724f4a941786e58878baf6edce846 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Thu, 26 Dec 2013 15:29:07 +0400 Subject: mmc/dwmmc: use bounce buffer for data exchange between CPU and MMC controller Bounce buffer implementation takes care of proper data buffer alignemt and correct flush/invalidation of data cache at once so we no longer depend on input data variety and make sure CPU and MMC controller deal with expected data in case of enabled data cache. Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in board configuration, otherwise corresponding library won't be compiled and linker will fail to build resulting executable. Difference since v1 - fixed compile-time warning with type casting to "void *": Slight edit to remove UTF8 characters in the commit message. Acked-by: Jaehoon Chung Tested-by: Jaehoon Chung Acked-by: Pantelis Antoniou ==== passing argument 2 of 'bounce_buffer_start' discards 'const' qualifier from pointer target type ==== Signed-off-by: Alexey Brodkin Cc: Mischa Jonker Cc: Alim Akhtar Cc: Rajeshwari Shinde Cc: Jaehoon Chung Cc: Amar Cc: Kyungmin Park Cc: Minkyu Kang Cc: Simon Glass Cc: Pantelis Antoniou Cc: Andy Fleming --- drivers/mmc/dw_mmc.c | 32 ++++++++++++++++++++++---------- include/configs/arndale.h | 1 + include/configs/exynos5250-dt.h | 1 + 3 files changed, 24 insertions(+), 10 deletions(-) (limited to 'include/configs') diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 82abe19eaba..4cec5aaa604 100755 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -6,6 +6,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include @@ -41,11 +42,13 @@ static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, } static void dwmci_prepare_data(struct dwmci_host *host, - struct mmc_data *data, struct dwmci_idmac *cur_idmac) + struct mmc_data *data, + struct dwmci_idmac *cur_idmac, + void *bounce_buffer) { unsigned long ctrl; unsigned int i = 0, flags, cnt, blk_cnt; - ulong data_start, data_end, start_addr; + ulong data_start, data_end; blk_cnt = data->blocks; @@ -55,11 +58,6 @@ static void dwmci_prepare_data(struct dwmci_host *host, data_start = (ulong)cur_idmac; dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac); - if (data->flags == MMC_DATA_READ) - start_addr = (unsigned int)data->dest; - else - start_addr = (unsigned int)data->src; - do { flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ; flags |= (i == 0) ? DWMCI_IDMAC_FS : 0; @@ -70,7 +68,7 @@ static void dwmci_prepare_data(struct dwmci_host *host, cnt = data->blocksize * 8; dwmci_set_idma_desc(cur_idmac, flags, cnt, - start_addr + (i * PAGE_SIZE)); + (u32)bounce_buffer + (i * PAGE_SIZE)); if (blk_cnt <= 8) break; @@ -117,6 +115,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, u32 retry = 10000; u32 mask, ctrl; ulong start = get_timer(0); + struct bounce_buffer bbstate; while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { if (get_timer(start) > timeout) { @@ -127,8 +126,19 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL); - if (data) - dwmci_prepare_data(host, data, cur_idmac); + if (data) { + if (data->flags == MMC_DATA_READ) { + bounce_buffer_start(&bbstate, (void*)data->dest, + data->blocksize * + data->blocks, GEN_BB_WRITE); + } else { + bounce_buffer_start(&bbstate, (void*)data->src, + data->blocksize * + data->blocks, GEN_BB_READ); + } + dwmci_prepare_data(host, data, cur_idmac, + bbstate.bounce_buffer); + } dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg); @@ -204,6 +214,8 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl &= ~(DWMCI_DMA_EN); dwmci_writel(host, DWMCI_CTRL, ctrl); + + bounce_buffer_stop(&bbstate); } udelay(100); diff --git a/include/configs/arndale.h b/include/configs/arndale.h index a3cb56b8bf2..3d29caf4c5e 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -85,6 +85,7 @@ #define CONFIG_DWMMC #define CONFIG_EXYNOS_DWMMC #define CONFIG_SUPPORT_EMMC_BOOT +#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 8fb904cddf4..b39bafca3e0 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -102,6 +102,7 @@ #define CONFIG_DWMMC #define CONFIG_EXYNOS_DWMMC #define CONFIG_SUPPORT_EMMC_BOOT +#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOARD_EARLY_INIT_F -- cgit v1.3.1 From 129168290a9a21afb4cbb899cdc25580cbe5921c Mon Sep 17 00:00:00 2001 From: David Feng Date: Sat, 14 Dec 2013 11:47:37 +0800 Subject: arm64: board support of vexpress_aemv8a Signed-off-by: David Feng Signed-off-by: Bhupesh Sharma --- board/armltd/vexpress64/Makefile | 8 ++ board/armltd/vexpress64/vexpress64.c | 56 +++++++++++ boards.cfg | 1 + include/configs/vexpress_aemv8a.h | 189 +++++++++++++++++++++++++++++++++++ 4 files changed, 254 insertions(+) create mode 100644 board/armltd/vexpress64/Makefile create mode 100644 board/armltd/vexpress64/vexpress64.c create mode 100644 include/configs/vexpress_aemv8a.h (limited to 'include/configs') diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile new file mode 100644 index 00000000000..e009141a426 --- /dev/null +++ b/board/armltd/vexpress64/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := vexpress64.o diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c new file mode 100644 index 00000000000..2ec3bc9835c --- /dev/null +++ b/board/armltd/vexpress64/vexpress64.c @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2013 + * David Feng + * Sharma Bhupesh + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + /* + * Clear spin table so that secondary processors + * observe the correct value after waken up from wfe. + */ + *(unsigned long *)CPU_RELEASE_ADDR = 0; + + gd->ram_size = PHYS_SDRAM_1_SIZE; + return 0; +} + +int timer_init(void) +{ + return 0; +} + +/* + * Board specific reset that is system reset. + */ +void reset_cpu(ulong addr) +{ +} + +/* + * Board specific ethernet initialization routine. + */ +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} diff --git a/boards.cfg b/boards.cfg index ba88c1d0447..e1685905720 100644 --- a/boards.cfg +++ b/boards.cfg @@ -397,6 +397,7 @@ Active arm pxa - - vpac270 Active arm pxa - icpdas lp8x4x lp8x4x - Sergey Yanovich Active arm pxa - toradex - colibri_pxa270 - Marek Vasut Active arm sa1100 - - - jornada - Kristoffer Ericson +Active arm armv8 - armltd vexpress64 vexpress_aemv8a vexpress_aemv8a:ARM64 David Feng Active avr32 at32ap at32ap700x atmel - atngw100 - Haavard Skinnemoen Active avr32 at32ap at32ap700x atmel - atngw100mkii - Andreas Bießmann Active avr32 at32ap at32ap700x atmel atstk1000 atstk1002 - Haavard Skinnemoen diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h new file mode 100644 index 00000000000..ce5f3847760 --- /dev/null +++ b/include/configs/vexpress_aemv8a.h @@ -0,0 +1,189 @@ +/* + * Configuration for Versatile Express. Parts were derived from other ARM + * configurations. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __VEXPRESS_AEMV8A_H +#define __VEXPRESS_AEMV8A_H + +#define DEBUG + +#define CONFIG_REMAKE_ELF + +/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ + +/*#define CONFIG_SYS_GENERIC_BOARD*/ + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_SUPPORT_RAW_INITRD + +/* Cache Definitions */ +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_ICACHE_OFF + +#define CONFIG_IDENT_STRING " vexpress_aemv8a" +#define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" + +/* Link Definitions */ +#define CONFIG_SYS_TEXT_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_LIBFDT + +#define CONFIG_DEFAULT_DEVICE_TREE vexpress64 + +/* SMP Spin Table Definitions */ +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) + +/* CS register bases for the original memory map. */ +#define V2M_PA_CS0 0x00000000 +#define V2M_PA_CS1 0x14000000 +#define V2M_PA_CS2 0x18000000 +#define V2M_PA_CS3 0x1c000000 +#define V2M_PA_CS4 0x0c000000 +#define V2M_PA_CS5 0x10000000 + +#define V2M_PERIPH_OFFSET(x) (x << 16) +#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) +#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) +#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) + +#define V2M_BASE 0x80000000 + +/* + * Physical addresses, offset from V2M_PA_CS0-3 + */ +#define V2M_NOR0 (V2M_PA_CS0) +#define V2M_NOR1 (V2M_PA_CS4) +#define V2M_SRAM (V2M_PA_CS1) + +/* Common peripherals relative to CS7. */ +#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) +#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) +#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) +#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) + +#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) +#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) +#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) +#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) + +#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) + +#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) +#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) + +#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) +#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) + +#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) + +#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) + +/* System register offsets. */ +#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) +#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) +#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE (0x2C001000) +#define GICC_BASE (0x2C002000) + +#define CONFIG_SYS_MEMTEST_START V2M_BASE +#define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) + +/* SMSC9115 Ethernet from SMSC9118 family */ +#define CONFIG_SMC9111 1 +#define CONFIG_SMC9111_BASE (0x1a000000) + +/* PL011 Serial Configuration */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 24000000 +#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1} +#define CONFIG_CONS_INDEX 0 + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_SERIAL0 V2M_UART0 +#define CONFIG_SYS_SERIAL1 V2M_UART1 + +/* Command line configuration */ +#define CONFIG_MENU +/*#define CONFIG_MENU_SHOW*/ +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_BDI +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PXE +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_IMI +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_RUN +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_SOURCE +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_PXE +#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2048 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr=0x200000\0" \ + "initrd_addr=0xa00000\0" \ + "initrd_size=0x2000000\0" \ + "fdt_addr=0x100000\0" \ + "fdt_high=0xa0000000\0" + +#define CONFIG_BOOTARGS "console=ttyAMA0 root=/dev/ram0" +#define CONFIG_BOOTCOMMAND "bootm $kernel_addr " \ + "$initrd_addr:$initrd_size $fdt_addr" +#define CONFIG_BOOTDELAY -1 + +/* Do not preserve environment */ +#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x1000 + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PROMPT "VExpress64# " +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_MAXARGS 64 /* max command args */ + +#endif /* __VEXPRESS_AEMV8A_H */ -- cgit v1.3.1 From 773590ebaf602e7df20715f41b1d58d3c489d48c Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:02 +0530 Subject: zynq: Enable CONFIG_FIT_VERBOSE Enabled fit_format_{error,warning}() Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 82ec826f735..6019c4a4aac 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -127,6 +127,7 @@ /* OF */ #define CONFIG_FIT +#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ #define CONFIG_OF_LIBFDT /* Commands */ -- cgit v1.3.1 From 09ed635bcc794110840c4e8661a6e272ffe779bb Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:03 +0530 Subject: zynq: Enable Boot FreeBSD/vxWorks This enabled Boot FreeBSD/vxWorks from an ELF image support Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 6019c4a4aac..049281831cd 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -130,6 +130,13 @@ #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ #define CONFIG_OF_LIBFDT +/* Boot FreeBSD/vxWorks from an ELF image */ +#if defined(CONFIG_ZYNQ_BOOT_FREEBSD) +# define CONFIG_API +# define CONFIG_CMD_ELF +# define CONFIG_SYS_MMC_MAX_DEVICE 1 +#endif + /* Commands */ #include -- cgit v1.3.1 From 36e0e197349259d18d366f4bf3820f8212dd0cc2 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:04 +0530 Subject: zynq: Cleanup on miscellaneous configs Cleanup on miscellaneous configurable options: - Rename SYS_PROMPT as "zynq-uboot" - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 049281831cd..e34024dafc6 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -111,19 +111,20 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "zynq-uboot> " +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_LOAD_ADDR 0 -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* OF */ #define CONFIG_FIT -- cgit v1.3.1 From 7cd04192fc4e616b150240b396e1f5ae959cfe1c Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:05 +0530 Subject: zynq: Cleanup on memory configs Cleanup on memory configuration options: - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index e34024dafc6..8be52df0669 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -13,14 +13,6 @@ /* CPU clock */ #define CONFIG_CPU_FREQ_HZ 800000000 -/* Ram */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_TEXT_BASE 0 -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) - /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} @@ -105,11 +97,6 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_MALLOC_LEN 0x400000 -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "zynq-uboot> " @@ -125,7 +112,21 @@ #define CONFIG_SYS_LOAD_ADDR 0 +/* Physical Memory map */ +#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) + +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* OF */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ -- cgit v1.3.1 From 53e49f746ce16c8f51063522542270a31c136e66 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:06 +0530 Subject: zynq: Minor config cleanup Cleanups mostly on: - Add comments - Re-order configs - Remove #define CONFIG_ZYNQ_SDHCI Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 76 ++++++++++++++++++++++++++------------------------ 1 file changed, 39 insertions(+), 37 deletions(-) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 8be52df0669..c8ab06f2fc1 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -7,33 +7,51 @@ #ifndef __CONFIG_ZYNQ_H #define __CONFIG_ZYNQ_H -#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ +/* High Level configuration Options */ +#define CONFIG_ARMV7 #define CONFIG_ZYNQ /* CPU clock */ -#define CONFIG_CPU_FREQ_HZ 800000000 +#ifndef CONFIG_CPU_FREQ_HZ +# define CONFIG_CPU_FREQ_HZ 800000000 +#endif +/* Serial drivers */ +#define CONFIG_BAUDRATE 115200 /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -#define CONFIG_BAUDRATE 115200 - -/* XPSS Serial driver */ +/* Zynq Serial driver */ #define CONFIG_ZYNQ_SERIAL #define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000 #define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE #define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +/* DCC driver */ +#if defined(CONFIG_ZYNQ_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ +#endif + /* Ethernet driver */ #define CONFIG_NET_MULTI #define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 -#define CONFIG_ZYNQ_SDHCI -#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_SPI +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + +/* NOR */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ZYNQ_SDHCI0 /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC @@ -48,7 +66,6 @@ #endif #define CONFIG_ZYNQ_I2C0 - /* I2C */ #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) # define CONFIG_CMD_I2C @@ -58,26 +75,6 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 #endif -#if defined(CONFIG_ZYNQ_DCC) -# define CONFIG_ARM_DCC -# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ -#endif - -#define CONFIG_ZYNQ_SPI - -/* SPI */ -#ifdef CONFIG_ZYNQ_SPI -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_SST -# define CONFIG_CMD_SF -#endif - -/* Enable the PL to be downloaded */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX -#define CONFIG_FPGA_ZYNQPL -#define CONFIG_CMD_FPGA - #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY @@ -91,12 +88,9 @@ #define CONFIG_PHY_MARVELL /* Environment */ +#define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE 0x10000 - -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_LOAD_ADDR 0 /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "zynq-uboot> " @@ -110,8 +104,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LOAD_ADDR 0 - /* Physical Memory map */ #define CONFIG_SYS_TEXT_BASE 0 @@ -122,15 +114,25 @@ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) +#define CONFIG_SYS_MALLOC_LEN 0x400000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -/* OF */ + +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA + +/* Open Firmware flat tree */ +#define CONFIG_OF_LIBFDT + +/* FIT support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ -#define CONFIG_OF_LIBFDT /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) -- cgit v1.3.1 From 8cfac504427306f3050ce81f9f7bea09fbe9d76a Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:07 +0530 Subject: zynq: Enable cache options - Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index c8ab06f2fc1..6e545e5d4bf 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -16,6 +16,16 @@ # define CONFIG_CPU_FREQ_HZ 800000000 #endif +/* Cache options */ +#define CONFIG_CMD_CACHE +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +# define CONFIG_SYS_L2_PL310 +# define CONFIG_SYS_PL310_BASE 0xf8f02000 +#endif + /* Serial drivers */ #define CONFIG_BAUDRATE 115200 /* The following table includes the supported baudrates */ -- cgit v1.3.1 From 625d7637513a41045e47b7ccd36185f0e4c1df26 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:08 +0530 Subject: zynq: Add UART0, UART1 configs support Zynq uart controller support two serial ports like CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 6e545e5d4bf..f1045589e81 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -33,10 +33,22 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} /* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL -#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000 -#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE -#define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#define CONFIG_ZYNQ_SERIAL_UART1 +#ifdef CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#endif + +#ifdef CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 +#endif + +#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) +# define CONFIG_ZYNQ_SERIAL +#endif /* DCC driver */ #if defined(CONFIG_ZYNQ_DCC) -- cgit v1.3.1 From 88fcfb1ce72d063a867fcc391f18b3d551a5ccac Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:09 +0530 Subject: zynq: Add GEM0, GEM1 configs support Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include/configs') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index f1045589e81..ea25159a201 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -57,10 +57,16 @@ #endif /* Ethernet driver */ -#define CONFIG_NET_MULTI -#define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif #define CONFIG_ZYNQ_SPI /* SPI */ @@ -103,12 +109,6 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL -/* MII and Phylib */ -#define CONFIG_MII -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_PHYLIB -#define CONFIG_PHY_MARVELL - /* Environment */ #define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -- cgit v1.3.1 From 06fe8daeb5a8c255555b09e1660682560c23df8d Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:10 +0530 Subject: zynq-common: Rename zynq with zynq-common zynq.h -> zynq-common.h, zynq-common is Common configuration options for all Zynq boards. zynq.h is no longer exists hense removed from boards.cfg Signed-off-by: Jagannadha Sutradharudu Teki --- boards.cfg | 2 - include/configs/zynq-common.h | 176 ++++++++++++++++++++++++++++++++++++++++++ include/configs/zynq.h | 173 ----------------------------------------- 3 files changed, 176 insertions(+), 175 deletions(-) create mode 100644 include/configs/zynq-common.h delete mode 100644 include/configs/zynq.h (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index 029553d66fb..9e85fe0e233 100644 --- a/boards.cfg +++ b/boards.cfg @@ -357,8 +357,6 @@ Active arm armv7 socfpga altera socfpga Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang -Active arm armv7 zynq xilinx zynq zynq - Michal Simek -Active arm armv7 zynq xilinx zynq zynq_dcc zynq:ZYNQ_DCC Michal Simek Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h new file mode 100644 index 00000000000..9fe06e84593 --- /dev/null +++ b/include/configs/zynq-common.h @@ -0,0 +1,176 @@ +/* + * (C) Copyright 2012 Michal Simek + * (C) Copyright 2013 Xilinx, Inc. + * + * Common configuration options for all Zynq boards. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_COMMON_H +#define __CONFIG_ZYNQ_COMMON_H + +/* High Level configuration Options */ +#define CONFIG_ARMV7 +#define CONFIG_ZYNQ + +/* CPU clock */ +#ifndef CONFIG_CPU_FREQ_HZ +# define CONFIG_CPU_FREQ_HZ 800000000 +#endif + +/* Cache options */ +#define CONFIG_CMD_CACHE +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +# define CONFIG_SYS_L2_PL310 +# define CONFIG_SYS_PL310_BASE 0xf8f02000 +#endif + +/* Serial drivers */ +#define CONFIG_BAUDRATE 115200 +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +/* Zynq Serial driver */ +#define CONFIG_ZYNQ_SERIAL_UART1 +#ifdef CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#endif + +#ifdef CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 +#endif + +#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) +# define CONFIG_ZYNQ_SERIAL +#endif + +/* DCC driver */ +#if defined(CONFIG_ZYNQ_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ +#endif + +/* Ethernet driver */ +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif + +#define CONFIG_ZYNQ_SPI +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + +/* NOR */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +/* MMC */ +#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) +# define CONFIG_MMC +# define CONFIG_GENERIC_MMC +# define CONFIG_SDHCI +# define CONFIG_ZYNQ_SDHCI +# define CONFIG_CMD_MMC +# define CONFIG_CMD_FAT +# define CONFIG_SUPPORT_VFAT +# define CONFIG_CMD_EXT2 +# define CONFIG_DOS_PARTITION +#endif + +#define CONFIG_ZYNQ_I2C0 +/* I2C */ +#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) +# define CONFIG_CMD_I2C +# define CONFIG_SYS_I2C +# define CONFIG_SYS_I2C_ZYNQ +# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 +# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 +#endif + +#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL + +/* Environment */ +#define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_LOAD_ADDR 0 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "zynq-uboot> " +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Physical Memory map */ +#define CONFIG_SYS_TEXT_BASE 0 + +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) + +#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA + +/* Open Firmware flat tree */ +#define CONFIG_OF_LIBFDT + +/* FIT support */ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ + +/* Boot FreeBSD/vxWorks from an ELF image */ +#if defined(CONFIG_ZYNQ_BOOT_FREEBSD) +# define CONFIG_API +# define CONFIG_CMD_ELF +# define CONFIG_SYS_MMC_MAX_DEVICE 1 +#endif + +/* Commands */ +#include + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII + +#endif /* __CONFIG_ZYNQ_COMMON_H */ diff --git a/include/configs/zynq.h b/include/configs/zynq.h deleted file mode 100644 index ea25159a201..00000000000 --- a/include/configs/zynq.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * (C) Copyright 2012 Michal Simek - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQ_H -#define __CONFIG_ZYNQ_H - -/* High Level configuration Options */ -#define CONFIG_ARMV7 -#define CONFIG_ZYNQ - -/* CPU clock */ -#ifndef CONFIG_CPU_FREQ_HZ -# define CONFIG_CPU_FREQ_HZ 800000000 -#endif - -/* Cache options */ -#define CONFIG_CMD_CACHE -#define CONFIG_SYS_CACHELINE_SIZE 32 - -#define CONFIG_SYS_L2CACHE_OFF -#ifndef CONFIG_SYS_L2CACHE_OFF -# define CONFIG_SYS_L2_PL310 -# define CONFIG_SYS_PL310_BASE 0xf8f02000 -#endif - -/* Serial drivers */ -#define CONFIG_BAUDRATE 115200 -/* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} - -/* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL_UART1 -#ifdef CONFIG_ZYNQ_SERIAL_UART0 -# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 -# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE -# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 -#endif - -#ifdef CONFIG_ZYNQ_SERIAL_UART1 -# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 -# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE -# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 -#endif - -#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) -# define CONFIG_ZYNQ_SERIAL -#endif - -/* DCC driver */ -#if defined(CONFIG_ZYNQ_DCC) -# define CONFIG_ARM_DCC -# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ -#endif - -/* Ethernet driver */ -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 -#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) -# define CONFIG_NET_MULTI -# define CONFIG_ZYNQ_GEM -# define CONFIG_MII -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_PHYLIB -# define CONFIG_PHY_MARVELL -#endif - -#define CONFIG_ZYNQ_SPI -/* SPI */ -#ifdef CONFIG_ZYNQ_SPI -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_SST -# define CONFIG_CMD_SF -#endif - -/* NOR */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_SDHCI0 -/* MMC */ -#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) -# define CONFIG_MMC -# define CONFIG_GENERIC_MMC -# define CONFIG_SDHCI -# define CONFIG_ZYNQ_SDHCI -# define CONFIG_CMD_MMC -# define CONFIG_CMD_FAT -# define CONFIG_SUPPORT_VFAT -# define CONFIG_CMD_EXT2 -# define CONFIG_DOS_PARTITION -#endif - -#define CONFIG_ZYNQ_I2C0 -/* I2C */ -#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) -# define CONFIG_CMD_I2C -# define CONFIG_SYS_I2C -# define CONFIG_SYS_I2C_ZYNQ -# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 -# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 -#endif - -#define CONFIG_BOOTP_SERVERIP -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_MAY_FAIL - -/* Environment */ -#define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_SYS_LOAD_ADDR 0 - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "zynq-uboot> " -#define CONFIG_SYS_HUSH_PARSER - -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -/* Physical Memory map */ -#define CONFIG_SYS_TEXT_BASE 0 - -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) - -#define CONFIG_SYS_MALLOC_LEN 0x400000 -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* Enable the PL to be downloaded */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX -#define CONFIG_FPGA_ZYNQPL -#define CONFIG_CMD_FPGA - -/* Open Firmware flat tree */ -#define CONFIG_OF_LIBFDT - -/* FIT support */ -#define CONFIG_FIT -#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ - -/* Boot FreeBSD/vxWorks from an ELF image */ -#if defined(CONFIG_ZYNQ_BOOT_FREEBSD) -# define CONFIG_API -# define CONFIG_CMD_ELF -# define CONFIG_SYS_MMC_MAX_DEVICE 1 -#endif - -/* Commands */ -#include - -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII - -#endif /* __CONFIG_ZYNQ_H */ -- cgit v1.3.1 From 022b02064a04d5edf2dc8e7cdf666421eed9d888 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:12 +0530 Subject: zynq: Add zynq zc70x board support The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki --- boards.cfg | 1 + include/configs/zynq-common.h | 9 --------- include/configs/zynq_zc70x.h | 25 +++++++++++++++++++++++++ 3 files changed, 26 insertions(+), 9 deletions(-) create mode 100644 include/configs/zynq_zc70x.h (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index 9e85fe0e233..51090ae384c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -357,6 +357,7 @@ Active arm armv7 socfpga altera socfpga Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang +Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 9fe06e84593..bce1094f6d3 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -36,7 +36,6 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} /* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL_UART1 #ifdef CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 # define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE @@ -60,8 +59,6 @@ #endif /* Ethernet driver */ -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) # define CONFIG_NET_MULTI # define CONFIG_ZYNQ_GEM @@ -71,7 +68,6 @@ # define CONFIG_PHY_MARVELL #endif -#define CONFIG_ZYNQ_SPI /* SPI */ #ifdef CONFIG_ZYNQ_SPI # define CONFIG_SPI_FLASH @@ -79,10 +75,6 @@ # define CONFIG_CMD_SF #endif -/* NOR */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_SDHCI0 /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC @@ -96,7 +88,6 @@ # define CONFIG_DOS_PARTITION #endif -#define CONFIG_ZYNQ_I2C0 /* I2C */ #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) # define CONFIG_CMD_I2C diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h new file mode 100644 index 00000000000..99108041ff0 --- /dev/null +++ b/include/configs/zynq_zc70x.h @@ -0,0 +1,25 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC70X_H +#define __CONFIG_ZYNQ_ZC70X_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include + +#endif /* __CONFIG_ZYNQ_ZC70X_H */ -- cgit v1.3.1 From 796d49969e2674f1f2ab8564ccc7b6cb62892e38 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:13 +0530 Subject: zynq: Add zynq zed board support Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki --- boards.cfg | 1 + include/configs/zynq_zed.h | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 include/configs/zynq_zed.h (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index 51090ae384c..d8e27cc4cc7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,6 +358,7 @@ Active arm armv7 u8500 st-ericsson snowball Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h new file mode 100644 index 00000000000..278db1ef9b9 --- /dev/null +++ b/include/configs/zynq_zed.h @@ -0,0 +1,24 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Zynq Evaluation and Development Board - ZedBoard + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZED_H +#define __CONFIG_ZYNQ_ZED_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include + +#endif /* __CONFIG_ZYNQ_ZED_H */ -- cgit v1.3.1 From 86737bcf07e595e78620d29b429ad9e994a32659 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:14 +0530 Subject: zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 1 - include/configs/zynq_zc70x.h | 2 ++ include/configs/zynq_zed.h | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bce1094f6d3..bb9e3374a0c 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -125,7 +125,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 99108041ff0..6950d41d411 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZC70X_H #define __CONFIG_ZYNQ_ZC70X_H +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 278db1ef9b9..31926df57c8 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZED_H #define __CONFIG_ZYNQ_ZED_H +#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 -- cgit v1.3.1 From 0f5c215650625f4533c0456f60638aeab1801b3e Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:15 +0530 Subject: zynq-common: Define exact TEXT_BASE Defined TEXT_BASE for u-boot starts from 0x4000000 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bb9e3374a0c..e5b1e1d759b 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -121,7 +121,7 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* Physical Memory map */ -#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_SYS_TEXT_BASE 0x4000000 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -- cgit v1.3.1 From 65da1efde2d76535265bf521f9f5a643e6755c9b Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:16 +0530 Subject: zynq: zc70x: Add Catalyst 24WC08 EEPROM config support Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 10 ++++++++++ include/configs/zynq_zc70x.h | 1 + 2 files changed, 11 insertions(+) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e5b1e1d759b..cf963334768 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -97,6 +97,16 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 #endif +/* EEPROM */ +#ifdef CONFIG_ZYNQ_EEPROM +# define CONFIG_CMD_EEPROM +# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ +#endif + #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 6950d41d411..0a7fa97cff8 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -20,6 +20,7 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_BOOT_FREEBSD #include -- cgit v1.3.1 From e3b01de78c58a83f596deb4ab7fdcdffa3cb806c Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:17 +0530 Subject: zynq: Add zynq microzed board support MicroZed is a low-cost development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z010-1CLG400C Memory: - 1 GB of DDR3 SDRAM - 128Mb of QSPI flash(S25FL128SAGBHI200) - Micro SD card interface Communication: - 10/100/1000 Ethernet - USB 2.0 - USB-UART User I/O: - 100 User I/O (50 per connector) - Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc: - Xilinx PC4 JTAG configuration port - PS JTAG pins accessible via Pmod - 33.33 MHz oscillator - User LED and push switch For more info - http://zedboard.org/product/microzed Signed-off-by: Jagannadha Sutradharudu Teki --- boards.cfg | 1 + include/configs/zynq_microzed.h | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 include/configs/zynq_microzed.h (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index d8e27cc4cc7..682af42bdbc 100644 --- a/boards.cfg +++ b/boards.cfg @@ -359,6 +359,7 @@ Active arm armv7 u8500 st-ericsson u8500 Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h new file mode 100644 index 00000000000..549a664ef58 --- /dev/null +++ b/include/configs/zynq_microzed.h @@ -0,0 +1,25 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Micro Zynq Evaluation and Development Board - MicroZedBoard + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_MICROZED_H +#define __CONFIG_ZYNQ_MICROZED_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 + +#include + +#endif /* __CONFIG_ZYNQ_MICROZED_H */ -- cgit v1.3.1 From e1d3425b0b4a6119f4eeeaee2802d3081418b7ff Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:18 +0530 Subject: zynq: Add zynq_zc770 xm010 board support ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1Gb DDR3 - 1Mb SST SPI flash - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki --- boards.cfg | 1 + include/configs/zynq_zc770.h | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) create mode 100644 include/configs/zynq_zc770.h (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index 682af42bdbc..02e144faa5b 100644 --- a/boards.cfg +++ b/boards.cfg @@ -360,6 +360,7 @@ Active arm armv7 vf610 freescale vf610twr Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h new file mode 100644 index 00000000000..8589d9d5e87 --- /dev/null +++ b/include/configs/zynq_zc770.h @@ -0,0 +1,30 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC770 board. + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC770_H +#define __CONFIG_ZYNQ_ZC770_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_SYS_NO_FLASH + +#if defined(CONFIG_ZC770_XM010) +# define CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_GEM0 +# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +# define CONFIG_ZYNQ_SDHCI0 +# define CONFIG_ZYNQ_SPI + +#else +# define CONFIG_ZYNQ_SERIAL_UART0 +#endif + +#include + +#endif /* __CONFIG_ZYNQ_ZC770_H */ -- cgit v1.3.1 From 309a9165f8564dc4608ed9dacfe4577413225cd7 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:19 +0530 Subject: zynq: Add zynq_zc770 xm013 board support ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki --- boards.cfg | 1 + include/configs/zynq_zc770.h | 5 +++++ 2 files changed, 6 insertions(+) (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index 02e144faa5b..19905d0bb1e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -361,6 +361,7 @@ Active arm armv7 zynq xilinx zynq zynq_zc70x - Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 8589d9d5e87..181f9fb832a 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,11 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM013) +# define CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_GEM1 +# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 + #else # define CONFIG_ZYNQ_SERIAL_UART0 #endif -- cgit v1.3.1 From fe5eddbf9818ba857d0d7f5e849b5682c9717b74 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:20 +0530 Subject: zynq: Add zynq_zc770 xm012 board support ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki Cc: Stefan Roese --- boards.cfg | 1 + include/configs/zynq-common.h | 16 ++++++++++++++++ include/configs/zynq_zc770.h | 4 ++++ 3 files changed, 21 insertions(+) (limited to 'include/configs') diff --git a/boards.cfg b/boards.cfg index 19905d0bb1e..a1a727fb5ec 100644 --- a/boards.cfg +++ b/boards.cfg @@ -361,6 +361,7 @@ Active arm armv7 zynq xilinx zynq zynq_zc70x - Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index cf963334768..db47c421740 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -75,6 +75,22 @@ # define CONFIG_CMD_SF #endif +/* NOR */ +#ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_SYS_FLASH_BASE 0xE2000000 +# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +# define CONFIG_SYS_MAX_FLASH_SECT 512 +# define CONFIG_SYS_FLASH_ERASE_TOUT 1000 +# define CONFIG_SYS_FLASH_WRITE_TOUT 5000 +# define CONFIG_FLASH_SHOW_PROGRESS 10 +# define CONFIG_SYS_FLASH_CFI +# undef CONFIG_SYS_FLASH_EMPTY_INFO +# define CONFIG_FLASH_CFI_DRIVER +# undef CONFIG_SYS_FLASH_PROTECTION +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#endif + /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 181f9fb832a..16b904743f1 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,10 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM012) +# define CONFIG_ZYNQ_SERIAL_UART1 +# undef CONFIG_SYS_NO_FLASH + #elif defined(CONFIG_ZC770_XM013) # define CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_GEM1 -- cgit v1.3.1 From b3de92495f23db58a2643fb9328edacbf9a17f1c Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:21 +0530 Subject: zynq: Add support to find bootmode Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki --- arch/arm/cpu/armv7/zynq/slcr.c | 6 ++++++ arch/arm/include/asm/arch-zynq/sys_proto.h | 1 + board/xilinx/zynq/board.c | 25 +++++++++++++++++++++++++ doc/README.zynq | 25 +++++++++++++++++++++++-- include/configs/zynq-common.h | 1 + 5 files changed, 56 insertions(+), 2 deletions(-) (limited to 'include/configs') diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c index 717ec65aeee..b4c11c324c0 100644 --- a/arch/arm/cpu/armv7/zynq/slcr.c +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -101,6 +101,12 @@ void zynq_slcr_devcfg_enable(void) zynq_slcr_lock(); } +u32 zynq_slcr_get_boot_mode(void) +{ + /* Get the bootmode register value */ + return readl(&slcr_base->boot_mode); +} + u32 zynq_slcr_get_idcode(void) { return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >> diff --git a/arch/arm/include/asm/arch-zynq/sys_proto.h b/arch/arm/include/asm/arch-zynq/sys_proto.h index 110de909221..8f925af8a41 100644 --- a/arch/arm/include/asm/arch-zynq/sys_proto.h +++ b/arch/arm/include/asm/arch-zynq/sys_proto.h @@ -13,6 +13,7 @@ extern void zynq_slcr_cpu_reset(void); extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk); extern void zynq_slcr_devcfg_disable(void); extern void zynq_slcr_devcfg_enable(void); +extern u32 zynq_slcr_get_boot_mode(void); extern u32 zynq_slcr_get_idcode(void); extern void zynq_ddrc_init(void); diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 5119c09037e..a5b9bdef46a 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -12,6 +12,12 @@ DECLARE_GLOBAL_DATA_PTR; +/* Bootmode setting values */ +#define ZYNQ_BM_MASK 0x0F +#define ZYNQ_BM_NOR 0x02 +#define ZYNQ_BM_SD 0x05 +#define ZYNQ_BM_JTAG 0x0 + #ifdef CONFIG_FPGA Xilinx_desc fpga; @@ -59,6 +65,25 @@ int board_init(void) return 0; } +int board_late_init(void) +{ + switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { + case ZYNQ_BM_NOR: + setenv("modeboot", "norboot"); + break; + case ZYNQ_BM_SD: + setenv("modeboot", "sdboot"); + break; + case ZYNQ_BM_JTAG: + setenv("modeboot", "jtagboot"); + break; + default: + setenv("modeboot", ""); + break; + } + + return 0; +} #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bis) diff --git a/doc/README.zynq b/doc/README.zynq index 56a74b4f1f0..ea1c8c14124 100644 --- a/doc/README.zynq +++ b/doc/README.zynq @@ -28,7 +28,27 @@ and I/O programmability. - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) -3. Mainline status +3. Bootmode + +Zynq has a facility to read the bootmode from the slcr bootmode register +once user is setting through jumpers on the board - see page no:1546 on [5] + +All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins +on [5]. + +board_late_init() will read the bootmode values using slcr bootmode register +at runtime and assign the modeboot variable to specific bootmode string which +is intern used in autoboot. + +SLCR bootmode register Bit[3:0] values +#define ZYNQ_BM_NOR 0x02 +#define ZYNQ_BM_SD 0x05 +#define ZYNQ_BM_JTAG 0x0 + +"modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot" +bootmode strings at runtime. + +4. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq @@ -41,7 +61,7 @@ and I/O programmability. spi- drivers/spi/zynq_spi.c i2c - drivers/i2c/zynq_i2c.c -4. TODO +5. TODO - Add zynq boards support - zc70x, zed, microzed, zc770 - Add zynq qspi controller driver @@ -54,6 +74,7 @@ and I/O programmability. [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm [3] http://zedboard.org/product/zedboard [4] http://zedboard.org/product/microzed +[5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf -- Jagannadha Sutradharudu Teki diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index db47c421740..b1fa0cb8ea8 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -140,6 +140,7 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_AUTO_COMPLETE +#define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MAXARGS 15 /* max number of command args */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -- cgit v1.3.1 From e83f61a6b3c1123b5fede849cd2a426df1d3b9d1 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:22 +0530 Subject: zynq-common: Define default environment Defined default env. for autoboot FIT image from respective boot devices. Default settings: fit_image=fit.itb load_addr=0x2000000 fit_size=0x800000 flash_off=0x100000 nor_flash_off=0xE2100000 Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b1fa0cb8ea8..1eaf17d9381 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -132,7 +132,28 @@ /* Environment */ #define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_SYS_LOAD_ADDR 0 + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fit_image=fit.itb\0" \ + "load_addr=0x2000000\0" \ + "fit_size=0x800000\0" \ + "flash_off=0x100000\0" \ + "nor_flash_off=0xE2100000\0" \ + "fdt_high=0x20000000\0" \ + "initrd_high=0x20000000\0" \ + "norboot=echo Copying FIT from NOR flash to RAM... && " \ + "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ + "bootm ${load_addr}\0" \ + "sdboot=echo Copying FIT from SD to RAM... && " \ + "fatload mmc 0 ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" \ + "jtagboot=echo TFTPing FIT to RAM... && " \ + "tftp ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" +#define CONFIG_BOOTCOMMAND "run $modeboot" +#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ +#define CONFIG_SYS_LOAD_ADDR 0 /* default? */ /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "zynq-uboot> " -- cgit v1.3.1 From 18eee22f4cd9f864a3986f54c5af14040e093cbe Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:23 +0530 Subject: zynq-common: Change Env. Sector size to 128Kb Changed Env. Sector size from 0x10000 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 1eaf17d9381..402009ee956 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -129,8 +129,10 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE (128 << 10) + /* Environment */ -#define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE /* Default environment */ -- cgit v1.3.1 From ed53e4d6900e863ef971bb79b96c0cb6676f35d8 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:24 +0530 Subject: zynq-common: Define flash env. partition Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 402009ee956..568c49f4c77 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -133,7 +133,17 @@ #define CONFIG_ENV_SIZE (128 << 10) /* Environment */ -#define CONFIG_ENV_IS_NOWHERE +#ifndef CONFIG_ENV_IS_NOWHERE +# ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_ENV_IS_IN_FLASH +# elif defined(CONFIG_SYS_NO_FLASH) +# define CONFIG_ENV_IS_NOWHERE +# endif + +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# define CONFIG_ENV_OFFSET 0xE0000 +# define CONFIG_CMD_SAVEENV +#endif /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ -- cgit v1.3.1 From b660ca13a8b2dab6d9d4127274060359abea4210 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:25 +0530 Subject: zynq-common: Define CONFIG_ENV_OVERWRITE Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 568c49f4c77..184d4ba820b 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -132,6 +132,9 @@ /* Total Size of Environment Sector */ #define CONFIG_ENV_SIZE (128 << 10) +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + /* Environment */ #ifndef CONFIG_ENV_IS_NOWHERE # ifndef CONFIG_SYS_NO_FLASH -- cgit v1.3.1 From f8f36c5dda67c53c471d1fe65215b9124ef62d71 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:26 +0530 Subject: dts: zynq: Add basic fdt support This patch provides a basic fdt support for zynq u-boot. zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches. u-boot build: once configuring of a board done for building dtb with zynq-zed.dts as an input zynq-uboot> make DEVICE_TREE=zynq-zed Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported. Signed-off-by: Jagannadha Sutradharudu Teki --- arch/arm/dts/zynq-7000.dtsi | 13 +++++++++++++ board/xilinx/dts/zynq-zed.dts | 14 ++++++++++++++ include/configs/zynq-common.h | 5 +++++ 3 files changed, 32 insertions(+) create mode 100644 arch/arm/dts/zynq-7000.dtsi create mode 100644 board/xilinx/dts/zynq-zed.dts (limited to 'include/configs') diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi new file mode 100644 index 00000000000..f20b8bd604d --- /dev/null +++ b/arch/arm/dts/zynq-7000.dtsi @@ -0,0 +1,13 @@ +/* + * Xilinx Zynq 7000 DTSI + * Describes the hardware common to all Zynq 7000-based boards. + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/include/ "skeleton.dtsi" + +/ { + compatible = "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/dts/zynq-zed.dts b/board/xilinx/dts/zynq-zed.dts new file mode 100644 index 00000000000..91a5deba4a9 --- /dev/null +++ b/board/xilinx/dts/zynq-zed.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZED board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZED Board"; + compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; +}; diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 184d4ba820b..8707bc00c01 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -212,6 +212,11 @@ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ +/* FDT support */ +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE +#define CONFIG_DISPLAY_BOARDINFO_LATE + /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) # define CONFIG_API -- cgit v1.3.1 From a8826eb4b34f47747ef760191c2aeaaa53d4d482 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:28 +0530 Subject: zynq-common: Enable verified boot(RSA) CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq-common.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/configs') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 8707bc00c01..e7a8e9fb11b 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -217,6 +217,10 @@ #define CONFIG_OF_SEPARATE #define CONFIG_DISPLAY_BOARDINFO_LATE +/* RSA support */ +#define CONFIG_FIT_SIGNATURE +#define CONFIG_RSA + /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) # define CONFIG_API -- cgit v1.3.1 From c91d0c74cfe4c6c6e155392a6b057fa868719297 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 9 Jan 2014 01:48:30 +0530 Subject: zynq: Enable CONFIG_DEFAULT_DEVICE_TREE Enabled default dts files on respective pre-board config files this is way MAKEALL will works. and it's upto user to build specific dts by specifying at build time. $ make zynq_zc70x_config $ make --> with default dts zynq-zc702.dts or $ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dts Signed-off-by: Jagannadha Sutradharudu Teki --- include/configs/zynq_microzed.h | 1 + include/configs/zynq_zc70x.h | 1 + include/configs/zynq_zc770.h | 3 +++ include/configs/zynq_zed.h | 1 + 4 files changed, 6 insertions(+) (limited to 'include/configs') diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h index 549a664ef58..b0328a2cc17 100644 --- a/include/configs/zynq_microzed.h +++ b/include/configs/zynq_microzed.h @@ -19,6 +19,7 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_DEFAULT_DEVICE_TREE zynq-microzed #include diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 0a7fa97cff8..673660e6596 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -22,6 +22,7 @@ #define CONFIG_ZYNQ_I2C0 #define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_BOOT_FREEBSD +#define CONFIG_DEFAULT_DEVICE_TREE zynq-zc702 #include diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 16b904743f1..8aa96e7121b 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -20,15 +20,18 @@ # define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm010 #elif defined(CONFIG_ZC770_XM012) # define CONFIG_ZYNQ_SERIAL_UART1 # undef CONFIG_SYS_NO_FLASH +# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm012 #elif defined(CONFIG_ZC770_XM013) # define CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_GEM1 # define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 +# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm013 #else # define CONFIG_ZYNQ_SERIAL_UART0 diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 31926df57c8..412dede5331 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -20,6 +20,7 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_BOOT_FREEBSD +#define CONFIG_DEFAULT_DEVICE_TREE zynq-zed #include -- cgit v1.3.1 From 4efd69250f6118ebd783867b3809001a1886ce9e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 26 Dec 2013 00:53:26 +0100 Subject: ARM: pxa: Fix OneNAND window access on VPAC270 Access the OneNAND 1KiB window on the VPAC270 as an SRAM instead of accessing it as a burst-RAM. This fixes a problem where the board failed to reboot sometimes as the CPU couldn't start executing from the OneNAND 1KiB window. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Tom Rini --- include/configs/vpac270.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 71a89b6edd1..c6d47635b38 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -286,7 +286,7 @@ /* * Memory settings */ -#define CONFIG_SYS_MSC0_VAL 0x3ffc95fa +#define CONFIG_SYS_MSC0_VAL 0x3ffc95f9 #define CONFIG_SYS_MSC1_VAL 0x02ccf974 #define CONFIG_SYS_MSC2_VAL 0x00000000 #ifdef CONFIG_RAM_256M -- cgit v1.3.1 From e570aca9474bb707cd2cab0c5c9b8aba957ae51e Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Mon, 13 Jan 2014 21:06:17 +0100 Subject: mx1ads: remove board support Signed-off-by: Albert ARIBAUD Acked-by: Stefano Babic --- board/mx1ads/Makefile | 16 --- board/mx1ads/lowlevel_init.S | 68 ---------- board/mx1ads/mx1ads.c | 178 ------------------------- board/mx1ads/syncflash.c | 307 ------------------------------------------- boards.cfg | 1 - doc/README.scrapyard | 1 + include/configs/mx1ads.h | 163 ----------------------- 7 files changed, 1 insertion(+), 733 deletions(-) delete mode 100644 board/mx1ads/Makefile delete mode 100644 board/mx1ads/lowlevel_init.S delete mode 100644 board/mx1ads/mx1ads.c delete mode 100644 board/mx1ads/syncflash.c delete mode 100644 include/configs/mx1ads.h (limited to 'include/configs') diff --git a/board/mx1ads/Makefile b/board/mx1ads/Makefile deleted file mode 100644 index 6dfd18e202e..00000000000 --- a/board/mx1ads/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -# -# board/mx1ads/Makefile -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (c) Copyright 2004 -# Techware Information Technology, Inc. -# http://www.techware.com.tw/ -# -# Ming-Len Wu -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := mx1ads.o syncflash.o -obj-y += lowlevel_init.o diff --git a/board/mx1ads/lowlevel_init.S b/board/mx1ads/lowlevel_init.S deleted file mode 100644 index d1e472a933c..00000000000 --- a/board/mx1ads/lowlevel_init.S +++ /dev/null @@ -1,68 +0,0 @@ -/* - * board/mx1ads/lowlevel_init.S - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#define SDCTL0 0x221000 -#define SDCTL1 0x221004 - - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE - -.globl lowlevel_init -lowlevel_init: -/* memory controller init */ - - ldr r1, =SDCTL0 - -/* Set Precharge Command */ - - ldr r3, =0x92120200 -/* ldr r3, =0x92120251 -*/ - str r3, [r1] - -/* Issue Precharge All Commad */ - ldr r3, =0x8200000 - ldr r2, [r3] - -/* Set AutoRefresh Command */ - ldr r3, =0xA2120200 - str r3, [r1] - -/* Issue AutoRefresh Command */ - ldr r3, =0x8000000 - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - -/* Set Mode Register */ - ldr r3, =0xB2120200 - str r3, [r1] - -/* Issue Mode Register Command */ - ldr r3, =0x08111800 /* Mode Register Value */ - ldr r2, [r3] - -/* Set Normal Mode */ - ldr r3, =0x82124200 - str r3, [r1] - -/* everything is fine now */ - mov pc, lr diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c deleted file mode 100644 index 4266048981c..00000000000 --- a/board/mx1ads/mx1ads.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * board/mx1ads/mx1ads.c - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -/*#include */ -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -#define FCLK_SPEED 1 - -#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ -#define M_MDIV 0xC3 -#define M_PDIV 0x4 -#define M_SDIV 0x1 -#elif FCLK_SPEED==1 /* Fout = 202.8MHz */ -#define M_MDIV 0xA1 -#define M_PDIV 0x3 -#define M_SDIV 0x1 -#endif - -#define USB_CLOCK 1 - -#if USB_CLOCK==0 -#define U_M_MDIV 0xA1 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x1 -#elif USB_CLOCK==1 -#define U_M_MDIV 0x48 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x2 -#endif - -#if 0 - -static inline void delay (unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); -} - -#endif - -/* - * Miscellaneous platform dependent initialisations - */ - -void SetAsynchMode (void) -{ - __asm__ ("mrc p15,0,r0,c1,c0,0 \n" - "mov r2, #0xC0000000 \n" - "orr r0,r2,r0 \n" "mcr p15,0,r0,c1,c0,0 \n"); -} - -static u32 mc9328sid; - -int board_early_init_f(void) -{ - mc9328sid = SIDR; - - GPCR = 0x000003AB; /* I/O pad driving strength */ - - /* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */ -/* MX1_CS1L = 0x11110601; */ - - MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */ - -/* set FCLK divider 1 (i.e. FCLK to MCU PLL CLK) and - * BCLK divider to 2 (i.e. BCLK to 48 MHz) - */ - CSCR = 0xAF000403; - - CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */ - CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */ - -/* setup cs4 for cs8900 ethernet */ - - CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */ - CS4L = 0x00001501; - - GIUS (0) &= 0xFF3FFFFF; - GPR (0) &= 0xFF3FFFFF; - - readl(0x1500000C); - readl(0x1500000C); - - SetAsynchMode (); - - icache_enable (); - dcache_enable (); - -/* set PERCLKs */ - PCDR = 0x00000055; /* set PERCLKS */ - -/* PERCLK3 is only used by SSI so the SSI driver can set it any value it likes - * PERCLK1 and PERCLK2 are shared so DO NOT change it in any other place - * all sources selected as normal interrupt - */ - -/* MX1_INTTYPEH = 0; - MX1_INTTYPEL = 0; -*/ - return 0; -} - -int board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_MX1ADS; - - gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */ - - return 0; -} - -int board_late_init (void) -{ - - setenv ("stdout", "serial"); - setenv ("stderr", "serial"); - - switch (mc9328sid) { - case 0x0005901d: - printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n", - mc9328sid); - break; - case 0x04d4c01d: - printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n", - mc9328sid); - break; - case 0x00d4c01d: - printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n", - mc9328sid); - break; - - default: - printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n", - mc9328sid); - break; - } - return 0; -} - -int dram_init(void) -{ - /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, - PHYS_SDRAM_1_SIZE); - return 0; -} - -void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c deleted file mode 100644 index 5d685338fb8..00000000000 --- a/board/mx1ads/syncflash.c +++ /dev/null @@ -1,307 +0,0 @@ -/* - * board/mx1ads/syncflash.c - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -/*#include */ -#include - -typedef unsigned long * p_u32; - -/* 4Mx16x2 IAM=0 CSD1 */ - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Following Setting is for CSD1 */ -#define SFCTL 0x00221004 -#define reg_SFCTL __REG(SFCTL) - -#define SYNCFLASH_A10 (0x00100000) - -#define CMD_NORMAL (0x81020300) /* Normal Mode */ -#define CMD_PREC (CMD_NORMAL + 0x10000000) /* Precharge Command */ -#define CMD_AUTO (CMD_NORMAL + 0x20000000) /* Auto Refresh Command */ -#define CMD_LMR (CMD_NORMAL + 0x30000000) /* Load Mode Register Command */ -#define CMD_LCR (CMD_NORMAL + 0x60000000) /* LCR Command */ -#define CMD_PROGRAM (CMD_NORMAL + 0x70000000) - -#define MODE_REG_VAL (CONFIG_SYS_FLASH_BASE+0x0008CC00) /* Cas Latency 3 */ - -/* LCR Command */ -#define LCR_READSTATUS (0x0001C000) /* 0x70 */ -#define LCR_ERASE_CONFIRM (0x00008000) /* 0x20 */ -#define LCR_ERASE_NVMODE (0x0000C000) /* 0x30 */ -#define LCR_PROG_NVMODE (0x00028000) /* 0xA0 */ -#define LCR_SR_CLEAR (0x00014000) /* 0x50 */ - -/* Get Status register */ -u32 SF_SR(void) { - u32 tmp; - - reg_SFCTL = CMD_PROGRAM; - tmp = __REG(CONFIG_SYS_FLASH_BASE); - - reg_SFCTL = CMD_NORMAL; - - reg_SFCTL = CMD_LCR; /* Activate LCR Mode */ - __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR); - - return tmp; -} - -/* check if SyncFlash is ready */ -u8 SF_Ready(void) { - u32 tmp; - - tmp = SF_SR(); - - if ((tmp & 0x00800000) && (tmp & 0x001C0000)) { - printf ("SyncFlash Error code %08x\n",tmp); - }; - - if ((tmp & 0x00000080) && (tmp & 0x0000001C)) { - printf ("SyncFlash Error code %08x\n",tmp); - }; - - if (tmp == 0x00800080) /* Test Bit 7 of SR */ - return 1; - else - return 0; -} - -/* Issue the precharge all command */ -void SF_PrechargeAll(void) { - - /* Set Precharge Command */ - reg_SFCTL = CMD_PREC; - /* Issue Precharge All Command */ - __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); -} - -/* set SyncFlash to normal mode */ -void SF_Normal(void) { - - SF_PrechargeAll(); - - reg_SFCTL = CMD_NORMAL; -} - -/* Erase SyncFlash */ -void SF_Erase(u32 RowAddress) { - - reg_SFCTL = CMD_NORMAL; - __REG(RowAddress); - - reg_SFCTL = CMD_PREC; - __REG(RowAddress); - - reg_SFCTL = CMD_LCR; /* Set LCR mode */ - __REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */ - - reg_SFCTL = CMD_NORMAL; /* return to Normal mode */ - __REG(RowAddress) = 0xD0D0D0D0; /* Confirm */ - - while(!SF_Ready()); -} - -void SF_NvmodeErase(void) { - SF_PrechargeAll(); - - reg_SFCTL = CMD_LCR; /* Set to LCR mode */ - __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0; /* Issue Erase Nvmode Reg Command */ - - reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */ - __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0; /* Confirm */ - - while(!SF_Ready()); -} - -void SF_NvmodeWrite(void) { - SF_PrechargeAll(); - - reg_SFCTL = CMD_LCR; /* Set to LCR mode */ - __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0; /* Issue Program Nvmode reg command */ - - reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */ - __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0; /* Confirm not needed */ -} - -/****************************************************************************************/ - -ulong flash_init(void) { - int i, j; - -/* Turn on CSD1 for negating RESETSF of SyncFLash */ - - reg_SFCTL |= 0x80000000; /* enable CSD1 for SyncFlash */ - udelay(200); - - reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */ - __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */ - - SF_Normal(); - - i = 0; - - flash_info[i].flash_id = FLASH_MAN_MT | FLASH_MT28S4M16LC; - - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - - for (j = 0; j < flash_info[i].sector_count; j++) { - flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE + j * 0x00100000; - } - - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); - - return FLASH_BANK_SIZE; -} - -void flash_print_info (flash_info_t *info) { - - int i; - - switch (info->flash_id & FLASH_VENDMASK) { - case (FLASH_MAN_MT & FLASH_VENDMASK): - printf("Micron: "); - break; - default: - printf("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case (FLASH_MT28S4M16LC & FLASH_TYPEMASK): - printf("2x FLASH_MT28S4M16LC (16MB Total)\n"); - break; - default: - printf("Unknown Chip Type\n"); - return; - break; - } - - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses: "); - - for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) - printf ("\n "); - - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - - printf ("\n"); -} - -/*-----------------------------------------------------------------------*/ - -int flash_erase (flash_info_t *info, int s_first, int s_last) { - int iflag, cflag, prot, sect; - int rc = ERR_OK; - -/* first look for protection bits */ - - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; - - if ((s_first < 0) || (s_first > s_last)) - return ERR_INVAL; - - if ((info->flash_id & FLASH_VENDMASK) != (FLASH_MAN_MT & FLASH_VENDMASK)) - return ERR_UNKNOWN_FLASH_VENDOR; - - prot = 0; - - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) - prot++; - } - - if (prot) { - printf("protected!\n"); - return ERR_PROTECTED; - } -/* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); - -/* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last && !ctrlc(); sect++) { - - printf("Erasing sector %2d ... ", sect); - -/* arm simple, non interrupt dependent timer */ - - get_timer(0); - - SF_NvmodeErase(); - SF_NvmodeWrite(); - - SF_Erase(CONFIG_SYS_FLASH_BASE + (0x0100000 * sect)); - SF_Normal(); - - printf("ok.\n"); - } - - if (ctrlc()) - printf("User Interrupt!\n"); - - if (iflag) - enable_interrupts(); - - if (cflag) - icache_enable(); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { - int i; - - for(i = 0; i < cnt; i += 4) { - - SF_PrechargeAll(); - - reg_SFCTL = CMD_PROGRAM; /* Enter SyncFlash Program mode */ - __REG(addr + i) = __REG((u32)src + i); - - while(!SF_Ready()); - } - - SF_Normal(); - - return ERR_OK; -} diff --git a/boards.cfg b/boards.cfg index af739347e7b..928e22239d1 100644 --- a/boards.cfg +++ b/boards.cfg @@ -65,7 +65,6 @@ Active arm arm920t at91 BuS eb_cpux9k2 Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2_ram eb_cpux9k2:RAMBOOT Jens Scharsig Active arm arm920t at91 eukrea cpuat91 cpuat91 cpuat91 Eric Benard Active arm arm920t at91 eukrea cpuat91 cpuat91_ram cpuat91:RAMBOOT Eric Benard -Active arm arm920t imx - - mx1ads - - Active arm arm920t imx - - scb9328 - Torsten Koschorrek Active arm arm920t ks8695 - - cm4008 - Greg Ungerer Active arm arm920t ks8695 - - cm41xx - - diff --git a/doc/README.scrapyard b/doc/README.scrapyard index be3e97eebde..2aed8559939 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for... Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +mx1ads arm arm920t - 2014-01-13 mini2440 arm arm920t - 2014-01-13 Gabriel Huau omap730p2 arm arm926ejs 79c5c08d 2013-11-11 pn62 powerpc mpc824x 649acfe1 2013-11-11 Wolfgang Grandegger diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h deleted file mode 100644 index 12667c57c13..00000000000 --- a/include/configs/mx1ads.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * include/configs/mx1ads.h - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu - * - * This is the Configuration setting for Motorola MX1ADS board - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ -#define CONFIG_IMX 1 /* It's a Motorola MC9328 SoC */ -#define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */ - -/* - * Select serial console configuration - */ -#define CONFIG_IMX_SERIAL -#define CONFIG_IMX_SERIAL1 /* internal uart 1 */ -/* #define _CONFIG_UART2 */ /* internal uart 2 */ -/* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */ - -#define CONFIG_BOARD_LATE_INIT -#define USE_920T_MMU 1 - -#if 0 -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ -#endif - -/* - * Size of malloc() pool - */ - -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * CS8900 Ethernet drivers - */ -#define CONFIG_CS8900 /* we have a CS8900 on-board */ -#define CONFIG_CS8900_BASE 0x15000300 -#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ - -/* - * select serial console configuration - */ - -/* #define CONFIG_UART1 */ -/* #define CONFIG_UART2 1 */ - -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_ELF - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "root=/dev/msdk mem=48M" -#define CONFIG_BOOTFILE "mx1ads" -#define CONFIG_BOOTCOMMAND "tftp; bootm" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#endif - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_HUSH_PARSER 1 - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT "MX1ADS$ " /* Monitor Command Prompt */ -#else -#define CONFIG_SYS_PROMPT "MX1ADS=> " /* Monitor Command Prompt */ -#endif - -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) - /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x09000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 -#define CONFIG_SYS_CPUSPEED 0x141 - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ - -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ -#define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ - -#define CONFIG_SYS_TEXT_BASE 0x10000000 - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_GBL_DATA_OFFSET) - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */ -#define CONFIG_SYS_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */ -#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */ - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -#define CONFIG_SYNCFLASH 1 -#define PHYS_FLASH_SIZE 0x01000000 -#define CONFIG_SYS_MAX_FLASH_SECT (16) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+0x00ff8000) - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x04000 /* Total Size of Environment Sector */ -#define CONFIG_ENV_SECT_SIZE 0x100000 - -/*----------------------------------------------------------------------- - * Enable passing ATAGS - */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 - -#define CONFIG_SYS_CLK_FREQ 16780000 -#define CONFIG_SYSPLL_CLK_FREQ 16000000 - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From 0e05b217c2dac0ebd2c888427347eda9e9506cc1 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 8 Jan 2014 10:32:22 +0900 Subject: arm: lager: Add support QSPI device and enable boot from SPI flash This supports SH-QSPI device on lager board, and enable booting from SPI flash. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/configs/lager.h | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) (limited to 'include/configs') diff --git a/include/configs/lager.h b/include/configs/lager.h index 893282540e3..b6c1954a949 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -34,7 +34,15 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NFS #define CONFIG_CMD_BOOTZ -#define CONFIG_CMD_FLASH + +#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) +#define CONFIG_CMD_FLASH +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#else +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SYS_TEXT_BASE 0xE8080000 +#endif #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -104,8 +112,8 @@ #define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) +#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) /* USE NOR FLASH */ -#define CONFIG_SYS_TEXT_BASE 0x00000000 #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_FLASH_CFI_DRIVER @@ -124,10 +132,27 @@ /* ENV setting */ #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ CONFIG_SYS_MONITOR_LEN) + +#else /* CONFIG_SYS_USE_BOOT_NORFLASH */ + +/* USE SPI */ +#define CONFIG_SPI +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SH_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SYS_NO_FLASH + +/* ENV setting */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_ADDR 0xC0000 +#endif + +/* Common ENV setting */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) -- cgit v1.3.1 From c71b4dd2da0dcddabd7c29e6c3dc8a495d4bd928 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 8 Jan 2014 10:32:24 +0900 Subject: arm: koelsch: Add support QSPI device and enable boot from SPI flash This supports SH-QSPI device on koelsch board, and enable booting from SPI flash. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/configs/koelsch.h | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) (limited to 'include/configs') diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index f8cca5b2810..cc3c7a8e6a9 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -31,7 +31,16 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NFS #define CONFIG_CMD_BOOTZ + +#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) #define CONFIG_CMD_FLASH +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#else +/* SPI flash boot is default. */ +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SYS_TEXT_BASE 0xE6304000 +#endif #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -101,7 +110,7 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_TEXT_BASE 0x00000000 +#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_FLASH_CFI_DRIVER @@ -117,13 +126,28 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 3000 #define CONFIG_SYS_FLASH_LOCK_TOUT 3000 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 - /* ENV setting */ #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ CONFIG_SYS_MONITOR_LEN) + +#else /* CONFIG_SYS_USE_BOOT_NORFLASH */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SPI +#define CONFIG_SH_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_FLASH_SPANSION +/* ENV setting */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_ADDR 0xC0000 + +#endif /* CONFIG_SYS_USE_BOOT_NORFLASH */ + +/* Common ENV setting */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) -- cgit v1.3.1