From 01c9857fa806e23a30f2b042b32ceeac6bee9d36 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 2 Oct 2020 11:16:09 +0200 Subject: video: dw-mipi-dsi: permit configuring the escape clock rate The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency higher than 10MHz for the TX Escape Clock, thus make the target rate configurable. This is based on the Linux commit [1] and adapted to the U-Boot driver. [1] a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate") Signed-off-by: Neil Armstrong --- include/mipi_dsi.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/mipi_dsi.h b/include/mipi_dsi.h index 55c7ab33286..4ca05f71e29 100644 --- a/include/mipi_dsi.h +++ b/include/mipi_dsi.h @@ -123,6 +123,7 @@ struct mipi_dsi_phy_ops { void (*post_set_mode)(void *priv_data, unsigned long mode_flags); int (*get_timing)(void *priv_data, unsigned int lane_mbps, struct mipi_dsi_phy_timing *timing); + void (*get_esc_clk_rate)(void *priv_data, unsigned int *esc_clk_rate); }; /** -- cgit v1.2.3