From 99e555a79ab882eb8b38886fa5dab053d4d64bfa Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:44:55 -0600 Subject: x86: coral: Add ACPI tables for coral This device has a large set of ACPI tables. Bring these in from coreboot so that full functionality is available (apart from SMI). Signed-off-by: Simon Glass --- include/bloblist.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/bloblist.h b/include/bloblist.h index 609ac421d66..bbe0a35d5a2 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -27,6 +27,11 @@ enum bloblist_tag_t { BLOBLISTT_SPL_HANDOFF, /* Hand-off info from SPL */ BLOBLISTT_VBOOT_CTX, /* Chromium OS verified boot context */ BLOBLISTT_VBOOT_HANDOFF, /* Chromium OS internal handoff info */ + /* + * Advanced Configuration and Power Interface Global Non-Volatile + * Sleeping table. This forms part of the ACPI tables passed to Linux. + */ + BLOBLISTT_ACPI_GNVS, }; /** -- cgit v1.3.1 From e0a896b88f2e517b10c67a4f85f3846a0312041d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:44:56 -0600 Subject: acpi: Add support for writing a _PRW A 'Power Resource for Wake' list the resources a device depends on for wake. Add a function to generate this. Signed-off-by: Simon Glass --- include/acpi/acpigen.h | 10 ++++++++++ lib/acpi/acpigen.c | 10 ++++++++++ test/dm/acpigen.c | 30 ++++++++++++++++++++++++++++++ 3 files changed, 50 insertions(+) (limited to 'include') diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h index 228ac9c404b..a9b70123c0a 100644 --- a/include/acpi/acpigen.h +++ b/include/acpi/acpigen.h @@ -563,4 +563,14 @@ int acpigen_set_enable_tx_gpio(struct acpi_ctx *ctx, u32 tx_state_val, const char *dw0_read, const char *dw0_write, struct acpi_gpio *gpio, bool enable); +/** + * acpigen_write_prw() - Write a power resource for wake (_PRW) + * + * @ctx: ACPI context pointer + * @wake: GPE that wakes up the device + * @level: Deepest power system sleeping state that can be entered while still + * providing wake functionality + */ +void acpigen_write_prw(struct acpi_ctx *ctx, uint wake, uint level); + #endif diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c index c609ef4daa4..527de89b1e1 100644 --- a/lib/acpi/acpigen.c +++ b/lib/acpi/acpigen.c @@ -426,6 +426,16 @@ void acpigen_write_register_resource(struct acpi_ctx *ctx, acpigen_write_resourcetemplate_footer(ctx); } +void acpigen_write_prw(struct acpi_ctx *ctx, uint wake, uint level) +{ + /* Name (_PRW, Package () { wake, level } */ + acpigen_write_name(ctx, "_PRW"); + acpigen_write_package(ctx, 2); + acpigen_write_integer(ctx, wake); + acpigen_write_integer(ctx, level); + acpigen_pop_len(ctx); +} + /* * ToUUID(uuid) * diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c index 1b2767e732d..1dc064ffbcf 100644 --- a/test/dm/acpigen.c +++ b/test/dm/acpigen.c @@ -1097,3 +1097,33 @@ static int dm_test_acpi_write_name(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_acpi_write_name, 0); + +/* Test emitting a _PRW component */ +static int dm_test_acpi_write_prw(struct unit_test_state *uts) +{ + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_prw(ctx, 5, 3); + ut_asserteq(NAME_OP, *ptr++); + + ut_asserteq_strn("_PRW", (char *)ptr); + ptr += 4; + ut_asserteq(PACKAGE_OP, *ptr++); + ut_asserteq(8, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(2, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(5, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(3, *ptr++); + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_prw, 0); -- cgit v1.3.1 From da7cff338f08cf43706a96bcd8cf398b7fb6ae2d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:44:57 -0600 Subject: acpi: Add support for conditions and return values Add functions to support generating ACPI code for condition checks and return values. Signed-off-by: Simon Glass --- include/acpi/acpigen.h | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++ lib/acpi/acpigen.c | 68 ++++++++++++++++++++++++++++++++++++ test/dm/acpigen.c | 91 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 252 insertions(+) (limited to 'include') diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h index a9b70123c0a..fa9409e3528 100644 --- a/include/acpi/acpigen.h +++ b/include/acpi/acpigen.h @@ -52,12 +52,24 @@ enum { LOCAL5_OP = 0x65, LOCAL6_OP = 0x66, LOCAL7_OP = 0x67, + ARG0_OP = 0x68, + ARG1_OP = 0x69, + ARG2_OP = 0x6a, + ARG3_OP = 0x6b, + ARG4_OP = 0x6c, + ARG5_OP = 0x6d, + ARG6_OP = 0x6e, STORE_OP = 0x70, AND_OP = 0x7b, OR_OP = 0x7d, NOT_OP = 0x80, DEVICE_OP = 0x82, POWER_RES_OP = 0x84, + LEQUAL_OP = 0x93, + TO_BUFFER_OP = 0x96, + TO_INTEGER_OP = 0x99, + IF_OP = 0xa0, + ELSE_OP = 0xa1, RETURN_OP = 0xa4, }; @@ -573,4 +585,85 @@ int acpigen_set_enable_tx_gpio(struct acpi_ctx *ctx, u32 tx_state_val, */ void acpigen_write_prw(struct acpi_ctx *ctx, uint wake, uint level); +/** + * acpigen_write_if() - Write an If block + * + * This requires a call to acpigen_pop_len() to complete the block + * + * @ctx: ACPI context pointer + */ +void acpigen_write_if(struct acpi_ctx *ctx); + +/** + * acpigen_write_if_lequal_op_int() - Write comparison between op and integer + * + * Generates ACPI code for checking if operand1 and operand2 are equal + * + * If (Lequal (op, val)) + * + * @ctx: ACPI context pointer + * @op: Operand to check + * @val: Value to check against + */ +void acpigen_write_if_lequal_op_int(struct acpi_ctx *ctx, uint op, u64 val); + +/** + * acpigen_write_else() - Write an Ef block + * + * This requires a call to acpigen_pop_len() to complete the block + * + * @ctx: ACPI context pointer + */ +void acpigen_write_else(struct acpi_ctx *ctx); + +/** + * acpigen_write_to_buffer() - Write a ToBuffer operation + * + * E.g.: to generate: ToBuffer (Arg0, Local0) + * use acpigen_write_to_buffer(ctx, ARG0_OP, LOCAL0_OP) + * + * @ctx: ACPI context pointer + * @src: Source argument + * @dst: Destination argument + */ +void acpigen_write_to_buffer(struct acpi_ctx *ctx, uint src, uint dst); + +/** + * acpigen_write_to_integer() - Write a ToInteger operation + * + * E.g.: to generate: ToInteger (Arg0, Local0) + * use acpigen_write_to_integer(ctx, ARG0_OP, LOCAL0_OP) + * + * @ctx: ACPI context pointer + * @src: Source argument + * @dst: Destination argument + */ +void acpigen_write_to_integer(struct acpi_ctx *ctx, uint src, uint dst); + +/** + * acpigen_write_return_byte_buffer() - Write a return of a byte buffer + * + * @ctx: ACPI context pointer + * @arr: Array of bytes to return + * @size: Number of bytes + */ +void acpigen_write_return_byte_buffer(struct acpi_ctx *ctx, u8 *arr, + size_t size); + +/** + * acpigen_write_return_singleton_buffer() - Write a return of a 1-byte buffer + * + * @ctx: ACPI context pointer + * @arg: Byte to return + */ +void acpigen_write_return_singleton_buffer(struct acpi_ctx *ctx, uint arg); + +/** + * acpigen_write_return_byte() - Write a return of a byte + * + * @ctx: ACPI context pointer + * @arg: Byte to return + */ +void acpigen_write_return_byte(struct acpi_ctx *ctx, uint arg); + #endif diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c index 527de89b1e1..2518bf83dda 100644 --- a/lib/acpi/acpigen.c +++ b/lib/acpi/acpigen.c @@ -541,6 +541,74 @@ void acpigen_write_debug_string(struct acpi_ctx *ctx, const char *str) acpigen_emit_ext_op(ctx, DEBUG_OP); } +void acpigen_write_if(struct acpi_ctx *ctx) +{ + acpigen_emit_byte(ctx, IF_OP); + acpigen_write_len_f(ctx); +} + +void acpigen_write_if_lequal_op_int(struct acpi_ctx *ctx, uint op, u64 val) +{ + acpigen_write_if(ctx); + acpigen_emit_byte(ctx, LEQUAL_OP); + acpigen_emit_byte(ctx, op); + acpigen_write_integer(ctx, val); +} + +void acpigen_write_else(struct acpi_ctx *ctx) +{ + acpigen_emit_byte(ctx, ELSE_OP); + acpigen_write_len_f(ctx); +} + +void acpigen_write_to_buffer(struct acpi_ctx *ctx, uint src, uint dst) +{ + acpigen_emit_byte(ctx, TO_BUFFER_OP); + acpigen_emit_byte(ctx, src); + acpigen_emit_byte(ctx, dst); +} + +void acpigen_write_to_integer(struct acpi_ctx *ctx, uint src, uint dst) +{ + acpigen_emit_byte(ctx, TO_INTEGER_OP); + acpigen_emit_byte(ctx, src); + acpigen_emit_byte(ctx, dst); +} + +void acpigen_write_byte_buffer(struct acpi_ctx *ctx, u8 *arr, size_t size) +{ + size_t i; + + acpigen_emit_byte(ctx, BUFFER_OP); + acpigen_write_len_f(ctx); + acpigen_write_integer(ctx, size); + + for (i = 0; i < size; i++) + acpigen_emit_byte(ctx, arr[i]); + + acpigen_pop_len(ctx); +} + +void acpigen_write_return_byte_buffer(struct acpi_ctx *ctx, u8 *arr, + size_t size) +{ + acpigen_emit_byte(ctx, RETURN_OP); + acpigen_write_byte_buffer(ctx, arr, size); +} + +void acpigen_write_return_singleton_buffer(struct acpi_ctx *ctx, uint arg) +{ + u8 buf = arg; + + acpigen_write_return_byte_buffer(ctx, &buf, 1); +} + +void acpigen_write_return_byte(struct acpi_ctx *ctx, uint arg) +{ + acpigen_emit_byte(ctx, RETURN_OP); + acpigen_write_byte(ctx, arg); +} + /** * acpigen_get_dw0_in_local5() - Generate code to put dw0 cfg0 in local5 * diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c index 1dc064ffbcf..cce19f11209 100644 --- a/test/dm/acpigen.c +++ b/test/dm/acpigen.c @@ -1127,3 +1127,94 @@ static int dm_test_acpi_write_prw(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_acpi_write_prw, 0); + +/* Test emitting writing conditionals */ +static int dm_test_acpi_write_cond(struct unit_test_state *uts) +{ + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_if(ctx); + acpigen_pop_len(ctx); + ut_asserteq(IF_OP, *ptr++); + ut_asserteq(3, acpi_test_get_length(ptr)); + ptr += 3; + + acpigen_write_else(ctx); + acpigen_pop_len(ctx); + ut_asserteq(ELSE_OP, *ptr++); + ut_asserteq(3, acpi_test_get_length(ptr)); + ptr += 3; + + acpigen_write_if_lequal_op_int(ctx, LOCAL1_OP, 5); + acpigen_pop_len(ctx); + ut_asserteq(IF_OP, *ptr++); + ut_asserteq(7, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(LEQUAL_OP, *ptr++); + ut_asserteq(LOCAL1_OP, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(5, *ptr++); + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_cond, 0); + +/* Test emitting writing return values and ToBuffer/ToInteger */ +static int dm_test_acpi_write_return(struct unit_test_state *uts) +{ + int len = sizeof(TEST_STRING); + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_to_buffer(ctx, ARG0_OP, LOCAL0_OP); + ut_asserteq(TO_BUFFER_OP, *ptr++); + ut_asserteq(ARG0_OP, *ptr++); + ut_asserteq(LOCAL0_OP, *ptr++); + + acpigen_write_to_integer(ctx, ARG0_OP, LOCAL0_OP); + ut_asserteq(TO_INTEGER_OP, *ptr++); + ut_asserteq(ARG0_OP, *ptr++); + ut_asserteq(LOCAL0_OP, *ptr++); + + acpigen_write_return_byte_buffer(ctx, (u8 *)TEST_STRING, len); + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ut_asserteq(5 + len, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(len, *ptr++); + ut_asserteq_mem(TEST_STRING, ptr, len); + ptr += len; + + acpigen_write_return_singleton_buffer(ctx, 123); + len = 1; + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ut_asserteq(4 + len, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(ONE_OP, *ptr++); + ut_asserteq(123, *ptr++); + + acpigen_write_return_byte(ctx, 43); + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(43, *ptr++); + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_return, 0); -- cgit v1.3.1 From 88490e197903f6961cf2ee79d0ff8f0727155f27 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:44:58 -0600 Subject: acpi: Support generating a multi-function _DSM for devices Add a function to generate ACPI code for a _DSM method for a device. This includes functions for starting and ending each part of the _DSM. Signed-off-by: Simon Glass [bmeng: fix the "new blank line at EOF" git warning] Signed-off-by: Bin Meng --- include/acpi/acpi_device.h | 14 +++++ include/acpi/acpigen.h | 99 +++++++++++++++++++++++++++++++++++ lib/acpi/acpi_device.c | 43 ++++++++++++++++ lib/acpi/acpigen.c | 54 ++++++++++++++++++++ test/dm/acpigen.c | 125 +++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 335 insertions(+) (limited to 'include') diff --git a/include/acpi/acpi_device.h b/include/acpi/acpi_device.h index 11461e168d3..a5b12217820 100644 --- a/include/acpi/acpi_device.h +++ b/include/acpi/acpi_device.h @@ -28,6 +28,9 @@ struct udevice; /* Length of a full path to an ACPI device */ #define ACPI_PATH_MAX 30 +/* UUID for an I2C _DSM method */ +#define ACPI_DSM_I2C_HID_UUID "3cdff6f7-4267-4555-ad05-b30a3d8938de" + /* Values that can be returned for ACPI device _STA method */ enum acpi_dev_status { ACPI_DSTATUS_PRESENT = BIT(0), @@ -319,6 +322,17 @@ int acpi_device_write_gpio_desc(struct acpi_ctx *ctx, int acpi_device_write_interrupt_or_gpio(struct acpi_ctx *ctx, struct udevice *dev, const char *prop); +/** + * acpi_device_write_dsm_i2c_hid() - Write a device-specific method for HID + * + * This writes a DSM for an I2C Human-Interface Device based on the config + * provided + * + * @hid_desc_reg_offset: HID register offset + */ +int acpi_device_write_dsm_i2c_hid(struct acpi_ctx *ctx, + int hid_desc_reg_offset); + /** * acpi_device_write_i2c_dev() - Write an I2C device to ACPI * diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h index fa9409e3528..34b3115bc9c 100644 --- a/include/acpi/acpigen.h +++ b/include/acpi/acpigen.h @@ -666,4 +666,103 @@ void acpigen_write_return_singleton_buffer(struct acpi_ctx *ctx, uint arg); */ void acpigen_write_return_byte(struct acpi_ctx *ctx, uint arg); +/** + * acpigen_write_dsm_start() - Start a _DSM method + * + * Generate ACPI AML code to start the _DSM method. + * + * The functions need to be called in the correct sequence as below. + * + * Within the region, Local0 and Local1 must be are left + * untouched, but Local2-Local7 can be used + * + * Arguments passed into _DSM method: + * Arg0 = UUID + * Arg1 = Revision + * Arg2 = Function index + * Arg3 = Function-specific arguments + * + * AML code generated looks like this: + * Method (_DSM, 4, Serialized) { -- acpigen_write_dsm_start) + * ToBuffer (Arg0, Local0) + * If (LEqual (Local0, ToUUID(uuid))) { -- acpigen_write_dsm_uuid_start + * ToInteger (Arg2, Local1) + * If (LEqual (Local1, 0)) { -- acpigen_write_dsm_uuid_start_cond + * + * } -- acpigen_write_dsm_uuid_end_cond + * ... + * If (LEqual (Local1, n)) { -- acpigen_write_dsm_uuid_start_cond + * + * } -- acpigen_write_dsm_uuid_end_cond + * Return (Buffer (One) { 0x0 }) + * } -- acpigen_write_dsm_uuid_end + * ... + * If (LEqual (Local0, ToUUID(uuidn))) { + * ... + * } + * Return (Buffer (One) { 0x0 }) -- acpigen_write_dsm_end + * } + * + * @ctx: ACPI context pointer + */ +void acpigen_write_dsm_start(struct acpi_ctx *ctx); + +/** + * acpigen_write_dsm_uuid_start() - Start a new UUID block + * + * This starts generation of code to handle a particular UUID: + * + * If (LEqual (Local0, ToUUID(uuid))) { + * ToInteger (Arg2, Local1) + * + * @ctx: ACPI context pointer + */ +int acpigen_write_dsm_uuid_start(struct acpi_ctx *ctx, const char *uuid); + +/** + * acpigen_write_dsm_uuid_start_cond() - Start a new condition block + * + * This starts generation of condition-checking code to handle a particular + * function: + * + * If (LEqual (Local1, i)) + * + * @ctx: ACPI context pointer + */ +void acpigen_write_dsm_uuid_start_cond(struct acpi_ctx *ctx, int seq); + +/** + * acpigen_write_dsm_uuid_end_cond() - Start a new condition block + * + * This ends generation of condition-checking code to handle a particular + * function: + * + * } + * + * @ctx: ACPI context pointer + */ +void acpigen_write_dsm_uuid_end_cond(struct acpi_ctx *ctx); + +/** + * acpigen_write_dsm_uuid_end() - End a UUID block + * + * This ends generation of code to handle a particular UUID: + * + * Return (Buffer (One) { 0x0 }) + * + * @ctx: ACPI context pointer + */ +void acpigen_write_dsm_uuid_end(struct acpi_ctx *ctx); + +/** + * acpigen_write_dsm_end() - End a _DSM method + * + * This ends generates of the _DSM block: + * + * Return (Buffer (One) { 0x0 }) + * + * @ctx: ACPI context pointer + */ +void acpigen_write_dsm_end(struct acpi_ctx *ctx); + #endif diff --git a/lib/acpi/acpi_device.c b/lib/acpi/acpi_device.c index 3c75b6d9629..8248664a10a 100644 --- a/lib/acpi/acpi_device.c +++ b/lib/acpi/acpi_device.c @@ -487,6 +487,49 @@ int acpi_device_add_power_res(struct acpi_ctx *ctx, u32 tx_state_val, return 0; } +int acpi_device_write_dsm_i2c_hid(struct acpi_ctx *ctx, + int hid_desc_reg_offset) +{ + int ret; + + acpigen_write_dsm_start(ctx); + ret = acpigen_write_dsm_uuid_start(ctx, ACPI_DSM_I2C_HID_UUID); + if (ret) + return log_ret(ret); + + acpigen_write_dsm_uuid_start_cond(ctx, 0); + /* ToInteger (Arg1, Local2) */ + acpigen_write_to_integer(ctx, ARG1_OP, LOCAL2_OP); + /* If (LEqual (Local2, 0x0)) */ + acpigen_write_if_lequal_op_int(ctx, LOCAL2_OP, 0x0); + /* Return (Buffer (One) { 0x1f }) */ + acpigen_write_return_singleton_buffer(ctx, 0x1f); + acpigen_pop_len(ctx); /* Pop : If */ + /* Else */ + acpigen_write_else(ctx); + /* If (LEqual (Local2, 0x1)) */ + acpigen_write_if_lequal_op_int(ctx, LOCAL2_OP, 0x1); + /* Return (Buffer (One) { 0x3f }) */ + acpigen_write_return_singleton_buffer(ctx, 0x3f); + acpigen_pop_len(ctx); /* Pop : If */ + /* Else */ + acpigen_write_else(ctx); + /* Return (Buffer (One) { 0x0 }) */ + acpigen_write_return_singleton_buffer(ctx, 0x0); + acpigen_pop_len(ctx); /* Pop : Else */ + acpigen_pop_len(ctx); /* Pop : Else */ + acpigen_write_dsm_uuid_end_cond(ctx); + + acpigen_write_dsm_uuid_start_cond(ctx, 1); + acpigen_write_return_byte(ctx, hid_desc_reg_offset); + acpigen_write_dsm_uuid_end_cond(ctx); + + acpigen_write_dsm_uuid_end(ctx); + acpigen_write_dsm_end(ctx); + + return 0; +} + /* ACPI 6.3 section 6.4.3.8.2.1 - I2cSerialBus() */ static void acpi_device_write_i2c(struct acpi_ctx *ctx, const struct acpi_i2c *i2c) diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c index 2518bf83dda..d859f378413 100644 --- a/lib/acpi/acpigen.c +++ b/lib/acpi/acpigen.c @@ -609,6 +609,60 @@ void acpigen_write_return_byte(struct acpi_ctx *ctx, uint arg) acpigen_write_byte(ctx, arg); } +void acpigen_write_dsm_start(struct acpi_ctx *ctx) +{ + /* Method (_DSM, 4, Serialized) */ + acpigen_write_method_serialized(ctx, "_DSM", 4); + + /* ToBuffer (Arg0, Local0) */ + acpigen_write_to_buffer(ctx, ARG0_OP, LOCAL0_OP); +} + +int acpigen_write_dsm_uuid_start(struct acpi_ctx *ctx, const char *uuid) +{ + int ret; + + /* If (LEqual (Local0, ToUUID(uuid))) */ + acpigen_write_if(ctx); + acpigen_emit_byte(ctx, LEQUAL_OP); + acpigen_emit_byte(ctx, LOCAL0_OP); + ret = acpigen_write_uuid(ctx, uuid); + if (ret) + return log_msg_ret("uuid", ret); + + /* ToInteger (Arg2, Local1) */ + acpigen_write_to_integer(ctx, ARG2_OP, LOCAL1_OP); + + return 0; +} + +void acpigen_write_dsm_uuid_start_cond(struct acpi_ctx *ctx, int seq) +{ + /* If (LEqual (Local1, i)) */ + acpigen_write_if_lequal_op_int(ctx, LOCAL1_OP, seq); +} + +void acpigen_write_dsm_uuid_end_cond(struct acpi_ctx *ctx) +{ + acpigen_pop_len(ctx); /* If */ +} + +void acpigen_write_dsm_uuid_end(struct acpi_ctx *ctx) +{ + /* Default case: Return (Buffer (One) { 0x0 }) */ + acpigen_write_return_singleton_buffer(ctx, 0x0); + + acpigen_pop_len(ctx); /* If (LEqual (Local0, ToUUID(uuid))) */ +} + +void acpigen_write_dsm_end(struct acpi_ctx *ctx) +{ + /* Return (Buffer (One) { 0x0 }) */ + acpigen_write_return_singleton_buffer(ctx, 0x0); + + acpigen_pop_len(ctx); /* Method _DSM */ +} + /** * acpigen_get_dw0_in_local5() - Generate code to put dw0 cfg0 in local5 * diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c index cce19f11209..62d48dc419c 100644 --- a/test/dm/acpigen.c +++ b/test/dm/acpigen.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -1218,3 +1219,127 @@ static int dm_test_acpi_write_return(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_acpi_write_return, 0); + +/* Test emitting a DSM for an I2C HID */ +static int dm_test_acpi_write_i2c_dsm(struct unit_test_state *uts) +{ + char uuid_str[UUID_STR_LEN + 1]; + const int reg_offset = 0x20; + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + ut_assertok(acpi_device_write_dsm_i2c_hid(ctx, reg_offset)); + + /* acpigen_write_dsm_start() */ + ut_asserteq(METHOD_OP, *ptr++); + ut_asserteq(0x78, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq_strn("_DSM", (char *)ptr); + ptr += 4; + ut_asserteq(ACPI_METHOD_SERIALIZED_MASK | 4, *ptr++); + + ut_asserteq(TO_BUFFER_OP, *ptr++); + ut_asserteq(ARG0_OP, *ptr++); + ut_asserteq(LOCAL0_OP, *ptr++); + + /* acpigen_write_dsm_uuid_start() */ + ut_asserteq(IF_OP, *ptr++); + ut_asserteq(0x65, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(LEQUAL_OP, *ptr++); + ut_asserteq(LOCAL0_OP, *ptr++); + + ut_asserteq(BUFFER_OP, *ptr++); + ut_asserteq(UUID_BIN_LEN + 6, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(WORD_PREFIX, *ptr++); + ut_asserteq(UUID_BIN_LEN, get_unaligned((u16 *)ptr)); + ptr += 2; + uuid_bin_to_str(ptr, uuid_str, UUID_STR_FORMAT_GUID); + ut_asserteq_str(ACPI_DSM_I2C_HID_UUID, uuid_str); + ptr += UUID_BIN_LEN; + + ut_asserteq(TO_INTEGER_OP, *ptr++); + ut_asserteq(ARG2_OP, *ptr++); + ut_asserteq(LOCAL1_OP, *ptr++); + + /* acpigen_write_dsm_uuid_start_cond() */ + ut_asserteq(IF_OP, *ptr++); + ut_asserteq(0x34, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(LEQUAL_OP, *ptr++); + ut_asserteq(LOCAL1_OP, *ptr++); + ut_asserteq(ZERO_OP, *ptr++); + + /* + * See code from acpi_device_write_dsm_i2c_hid(). We don't check every + * piece + */ + ut_asserteq(TO_INTEGER_OP, *ptr++); + ut_asserteq(ARG1_OP, *ptr++); + ut_asserteq(LOCAL2_OP, *ptr++); + + ut_asserteq(IF_OP, *ptr++); + ut_asserteq(0xd, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(LEQUAL_OP, *ptr++); + ut_asserteq(LOCAL2_OP, *ptr++); + ut_asserteq(ZERO_OP, *ptr++); /* function 0 */ + + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ptr += 5; + + ut_asserteq(ELSE_OP, *ptr++); + ptr += 3; + + ut_asserteq(IF_OP, *ptr++); + ut_asserteq(0xd, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(LEQUAL_OP, *ptr++); + ut_asserteq(LOCAL2_OP, *ptr++); + ut_asserteq(ONE_OP, *ptr++); + + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ptr += 5; + + ut_asserteq(ELSE_OP, *ptr++); + ptr += 3; + + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ptr += 5; + + /* acpigen_write_dsm_uuid_start_cond() */ + ut_asserteq(IF_OP, *ptr++); + ut_asserteq(9, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq(LEQUAL_OP, *ptr++); + ut_asserteq(LOCAL1_OP, *ptr++); + ut_asserteq(ONE_OP, *ptr++); /* function 1 */ + + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(reg_offset, *ptr++); + + /* acpigen_write_dsm_uuid_end() */ + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ptr += 5; + + /* acpigen_write_dsm_end */ + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ptr += 5; + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_i2c_dsm, 0); -- cgit v1.3.1 From 23dd0ea4c7edbde5bc05a1567ba0bf41734ea524 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:44:59 -0600 Subject: dm: acpi: Use correct GPIO polarity type in acpi_dp_add_gpio() This function currently accepts the IRQ-polarity type. Fix it to use the GPIO type instead. Signed-off-by: Simon Glass --- drivers/sound/max98357a.c | 2 +- include/acpi/acpi_dp.h | 2 +- lib/acpi/acpi_dp.c | 4 ++-- test/dm/acpi_dp.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/drivers/sound/max98357a.c b/drivers/sound/max98357a.c index 841bc6ef682..827262d235c 100644 --- a/drivers/sound/max98357a.c +++ b/drivers/sound/max98357a.c @@ -81,7 +81,7 @@ static int max98357a_acpi_fill_ssdt(const struct udevice *dev, dp = acpi_dp_new_table("_DSD"); acpi_dp_add_gpio(dp, "sdmode-gpio", path, 0, 0, priv->sdmode_gpio.flags & GPIOD_ACTIVE_LOW ? - ACPI_IRQ_ACTIVE_LOW : ACPI_IRQ_ACTIVE_HIGH); + ACPI_GPIO_ACTIVE_LOW : ACPI_GPIO_ACTIVE_HIGH); acpi_dp_add_integer(dp, "sdmode-delay", dev_read_u32_default(dev, "sdmode-delay", 0)); acpi_dp_write(ctx, dp); diff --git a/include/acpi/acpi_dp.h b/include/acpi/acpi_dp.h index 0b514bce59c..5e539b1d218 100644 --- a/include/acpi/acpi_dp.h +++ b/include/acpi/acpi_dp.h @@ -221,7 +221,7 @@ struct acpi_dp *acpi_dp_add_child(struct acpi_dp *dp, const char *name, */ struct acpi_dp *acpi_dp_add_gpio(struct acpi_dp *dp, const char *name, const char *ref, int index, int pin, - enum acpi_irq_polarity polarity); + enum acpi_gpio_polarity polarity); /** * acpi_dp_write() - Write Device Property hierarchy and clean up resources diff --git a/lib/acpi/acpi_dp.c b/lib/acpi/acpi_dp.c index 579cab47715..7e3e3259d8d 100644 --- a/lib/acpi/acpi_dp.c +++ b/lib/acpi/acpi_dp.c @@ -324,7 +324,7 @@ struct acpi_dp *acpi_dp_add_integer_array(struct acpi_dp *dp, const char *name, struct acpi_dp *acpi_dp_add_gpio(struct acpi_dp *dp, const char *name, const char *ref, int index, int pin, - enum acpi_irq_polarity polarity) + enum acpi_gpio_polarity polarity) { struct acpi_dp *gpio; @@ -336,7 +336,7 @@ struct acpi_dp *acpi_dp_add_gpio(struct acpi_dp *dp, const char *name, if (!acpi_dp_add_reference(gpio, NULL, ref) || !acpi_dp_add_integer(gpio, NULL, index) || !acpi_dp_add_integer(gpio, NULL, pin) || - !acpi_dp_add_integer(gpio, NULL, polarity == ACPI_IRQ_ACTIVE_LOW)) + !acpi_dp_add_integer(gpio, NULL, polarity == ACPI_GPIO_ACTIVE_LOW)) return NULL; if (!acpi_dp_add_array(dp, gpio)) diff --git a/test/dm/acpi_dp.c b/test/dm/acpi_dp.c index e0fa61263c8..44bcabda6bc 100644 --- a/test/dm/acpi_dp.c +++ b/test/dm/acpi_dp.c @@ -398,9 +398,9 @@ static int dm_test_acpi_dp_gpio(struct unit_test_state *uts) /* Try a few different parameters */ ut_assertnonnull(acpi_dp_add_gpio(dp, "reset", TEST_REF, 0x23, 0x24, - ACPI_IRQ_ACTIVE_HIGH)); + ACPI_GPIO_ACTIVE_HIGH)); ut_assertnonnull(acpi_dp_add_gpio(dp, "allow", TEST_REF, 0, 0, - ACPI_IRQ_ACTIVE_LOW)); + ACPI_GPIO_ACTIVE_LOW)); ptr = acpigen_get_current(ctx); ut_assertok(acpi_dp_write(ctx, dp)); -- cgit v1.3.1 From fd42f263cef9fd6bba9ded76a82d4ac66450e156 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:01 -0600 Subject: i2c: Add a generic driver to generate ACPI info Many I2C devices produce roughly the same ACPI data with just things like the GPIO/interrupt information being different. This can be handled by a generic driver along with some information in the device tree. Add a generic i2c driver for this purpose. Signed-off-by: Simon Glass Reviewed-by: Heiko Schocher --- doc/device-tree-bindings/i2c/generic-acpi.txt | 42 +++++ drivers/i2c/Makefile | 3 + drivers/i2c/acpi_i2c.c | 226 ++++++++++++++++++++++++++ drivers/i2c/acpi_i2c.h | 15 ++ drivers/i2c/i2c-uclass.c | 17 ++ include/acpi/acpi_device.h | 55 +++++++ include/i2c.h | 23 +++ 7 files changed, 381 insertions(+) create mode 100644 doc/device-tree-bindings/i2c/generic-acpi.txt create mode 100644 drivers/i2c/acpi_i2c.c create mode 100644 drivers/i2c/acpi_i2c.h (limited to 'include') diff --git a/doc/device-tree-bindings/i2c/generic-acpi.txt b/doc/device-tree-bindings/i2c/generic-acpi.txt new file mode 100644 index 00000000000..3510a71b570 --- /dev/null +++ b/doc/device-tree-bindings/i2c/generic-acpi.txt @@ -0,0 +1,42 @@ +I2C generic device +================== + +This is used only to generate ACPI tables for an I2C device. + +Required properties : + + - compatible : "i2c-chip"; + - reg : I2C chip address + - acpi,hid : HID name for the device + +Optional properies in addition to device.txt: + + - reset-gpios : GPIO used to assert reset to the device + - irq-gpios : GPIO used for interrupt (if Interrupt is not used) + - stop-gpios : GPIO used to stop the device + - interrupts-extended : Interrupt to use for the device + - reset-delay-ms : Delay after de-asserting reset, in ms + - reset-off-delay-ms : Delay after asserting reset (during power off) + - enable-delay-ms : Delay after asserting enable + - enable-off-delay-ms : Delay after de-asserting enable (during power off) + - stop-delay-ms : Delay after de-aserting stop + - stop-off-delay-ms : Delay after asserting stop (during power off) + - hid-descr-addr : HID register offset (for Human Interface Devices) + +Example +------- + + elan-touchscreen@10 { + compatible = "i2c-chip"; + reg = <0x10>; + acpi,hid = "ELAN0001"; + acpi,ddn = "ELAN Touchscreen"; + interrupts-extended = <&acpi_gpe GPIO_21_IRQ + IRQ_TYPE_EDGE_FALLING>; + linux,probed; + reset-gpios = <&gpio_n GPIO_36 GPIO_ACTIVE_HIGH>; + reset-delay-ms = <20>; + enable-gpios = <&gpio_n GPIO_152 GPIO_ACTIVE_HIGH>; + enable-delay-ms = <1>; + acpi,has-power-resource; + }; diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index f7b27864488..bd248cbf52b 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -3,6 +3,9 @@ # (C) Copyright 2000-2007 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-$(CONFIG_DM_I2C) += i2c-uclass.o +ifdef CONFIG_ACPIGEN +obj-$(CONFIG_DM_I2C) += acpi_i2c.o +endif obj-$(CONFIG_DM_I2C_GPIO) += i2c-gpio.o obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o diff --git a/drivers/i2c/acpi_i2c.c b/drivers/i2c/acpi_i2c.c new file mode 100644 index 00000000000..57d29683cbf --- /dev/null +++ b/drivers/i2c/acpi_i2c.c @@ -0,0 +1,226 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Google LLC + */ + +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_X86 +#include +#endif +#include +#include + +static bool acpi_i2c_add_gpios_to_crs(struct acpi_i2c_priv *priv) +{ + /* + * Return false if: + * 1. Request to explicitly disable export of GPIOs in CRS, or + * 2. Both reset and enable GPIOs are not provided. + */ + if (priv->disable_gpio_export_in_crs || + (!dm_gpio_is_valid(&priv->reset_gpio) && + !dm_gpio_is_valid(&priv->enable_gpio))) + return false; + + return true; +} + +static int acpi_i2c_write_gpio(struct acpi_ctx *ctx, struct gpio_desc *gpio, + int *curindex) +{ + int ret; + + if (!dm_gpio_is_valid(gpio)) + return -ENOENT; + + acpi_device_write_gpio_desc(ctx, gpio); + ret = *curindex; + (*curindex)++; + + return ret; +} + +int acpi_i2c_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx) +{ + int reset_gpio_index = -1, enable_gpio_index = -1, irq_gpio_index = -1; + enum i2c_device_t type = dev_get_driver_data(dev); + struct acpi_i2c_priv *priv = dev_get_priv(dev); + struct acpi_dp *dsd = NULL; + char scope[ACPI_PATH_MAX]; + char name[ACPI_NAME_MAX]; + int tx_state_val; + int curindex = 0; + int ret; + +#ifdef CONFIG_X86 + tx_state_val = PAD_CFG0_TX_STATE; +#elif defined(CONFIG_SANDBOX) + tx_state_val = BIT(7); /* test value */ +#else +#error "Not supported on this architecture" +#endif + ret = acpi_get_name(dev, name); + if (ret) + return log_msg_ret("name", ret); + ret = acpi_device_scope(dev, scope, sizeof(scope)); + if (ret) + return log_msg_ret("scope", ret); + + /* Device */ + acpigen_write_scope(ctx, scope); + acpigen_write_device(ctx, name); + acpigen_write_name_string(ctx, "_HID", priv->hid); + if (type == I2C_DEVICE_HID_OVER_I2C) + acpigen_write_name_string(ctx, "_CID", "PNP0C50"); + acpigen_write_name_integer(ctx, "_UID", priv->uid); + acpigen_write_name_string(ctx, "_DDN", priv->desc); + acpigen_write_sta(ctx, acpi_device_status(dev)); + + /* Resources */ + acpigen_write_name(ctx, "_CRS"); + acpigen_write_resourcetemplate_header(ctx); + acpi_device_write_i2c_dev(ctx, dev); + + /* Use either Interrupt() or GpioInt() */ + if (dm_gpio_is_valid(&priv->irq_gpio)) { + irq_gpio_index = acpi_i2c_write_gpio(ctx, &priv->irq_gpio, + &curindex); + } else { + ret = acpi_device_write_interrupt_irq(ctx, &priv->irq); + if (ret < 0) + return log_msg_ret("irq", ret); + } + + if (acpi_i2c_add_gpios_to_crs(priv)) { + reset_gpio_index = acpi_i2c_write_gpio(ctx, &priv->reset_gpio, + &curindex); + enable_gpio_index = acpi_i2c_write_gpio(ctx, &priv->enable_gpio, + &curindex); + } + acpigen_write_resourcetemplate_footer(ctx); + + /* Wake capabilities */ + if (priv->wake) { + acpigen_write_name_integer(ctx, "_S0W", 4); + acpigen_write_prw(ctx, priv->wake, 3); + } + + /* DSD */ + if (priv->probed || priv->property_count || priv->compat_string || + reset_gpio_index >= 0 || enable_gpio_index >= 0 || + irq_gpio_index >= 0) { + char path[ACPI_PATH_MAX]; + + ret = acpi_device_path(dev, path, sizeof(path)); + if (ret) + return log_msg_ret("path", ret); + + dsd = acpi_dp_new_table("_DSD"); + if (priv->compat_string) + acpi_dp_add_string(dsd, "compatible", + priv->compat_string); + if (priv->probed) + acpi_dp_add_integer(dsd, "linux,probed", 1); + if (irq_gpio_index >= 0) + acpi_dp_add_gpio(dsd, "irq-gpios", path, + irq_gpio_index, 0, + priv->irq_gpio.flags & + GPIOD_ACTIVE_LOW ? + ACPI_GPIO_ACTIVE_LOW : 0); + if (reset_gpio_index >= 0) + acpi_dp_add_gpio(dsd, "reset-gpios", path, + reset_gpio_index, 0, + priv->reset_gpio.flags & + GPIOD_ACTIVE_LOW ? + ACPI_GPIO_ACTIVE_LOW : 0); + if (enable_gpio_index >= 0) + acpi_dp_add_gpio(dsd, "enable-gpios", path, + enable_gpio_index, 0, + priv->enable_gpio.flags & + GPIOD_ACTIVE_LOW ? + ACPI_GPIO_ACTIVE_LOW : 0); + /* Generic property list is not supported */ + acpi_dp_write(ctx, dsd); + } + + /* Power Resource */ + if (priv->has_power_resource) { + ret = acpi_device_add_power_res(ctx, tx_state_val, + "\\_SB.GPC0", "\\_SB.SPC0", + &priv->reset_gpio, priv->reset_delay_ms, + priv->reset_off_delay_ms, &priv->enable_gpio, + priv->enable_delay_ms, priv->enable_off_delay_ms, + &priv->stop_gpio, priv->stop_delay_ms, + priv->stop_off_delay_ms); + if (ret) + return log_msg_ret("power", ret); + } + if (priv->hid_desc_reg_offset) { + ret = acpi_device_write_dsm_i2c_hid(ctx, + priv->hid_desc_reg_offset); + if (ret) + return log_msg_ret("dsm", ret); + } + + acpigen_pop_len(ctx); /* Device */ + acpigen_pop_len(ctx); /* Scope */ + + return 0; +} + +int acpi_i2c_ofdata_to_platdata(struct udevice *dev) +{ + struct acpi_i2c_priv *priv = dev_get_priv(dev); + + gpio_request_by_name(dev, "reset-gpios", 0, &priv->reset_gpio, + GPIOD_IS_OUT); + gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable_gpio, + GPIOD_IS_OUT); + gpio_request_by_name(dev, "irq-gpios", 0, &priv->irq_gpio, GPIOD_IS_IN); + gpio_request_by_name(dev, "stop-gpios", 0, &priv->stop_gpio, + GPIOD_IS_OUT); + irq_get_by_index(dev, 0, &priv->irq); + priv->hid = dev_read_string(dev, "acpi,hid"); + if (!priv->hid) + return log_msg_ret("hid", -EINVAL); + dev_read_u32(dev, "acpi,uid", &priv->uid); + priv->desc = dev_read_string(dev, "acpi,ddn"); + dev_read_u32(dev, "acpi,wake", &priv->wake); + priv->probed = dev_read_bool(dev, "linux,probed"); + priv->compat_string = dev_read_string(dev, "acpi,compatible"); + priv->has_power_resource = dev_read_bool(dev, + "acpi,has-power-resource"); + dev_read_u32(dev, "hid-descr-addr", &priv->hid_desc_reg_offset); + dev_read_u32(dev, "reset-delay-ms", &priv->reset_delay_ms); + dev_read_u32(dev, "reset-off-delay-ms", &priv->reset_off_delay_ms); + dev_read_u32(dev, "enable-delay-ms", &priv->enable_delay_ms); + dev_read_u32(dev, "enable-off-delay-ms", &priv->enable_off_delay_ms); + dev_read_u32(dev, "stop-delay-ms", &priv->stop_delay_ms); + dev_read_u32(dev, "stop-off-delay-ms", &priv->stop_off_delay_ms); + + return 0; +} + +/* Use name specified in priv or build one from I2C address */ +static int acpi_i2c_get_name(const struct udevice *dev, char *out_name) +{ + struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); + struct acpi_i2c_priv *priv = dev_get_priv(dev); + + snprintf(out_name, ACPI_NAME_MAX, + priv->hid_desc_reg_offset ? "H%03X" : "D%03X", + chip->chip_addr); + + return 0; +} + +struct acpi_ops acpi_i2c_ops = { + .fill_ssdt = acpi_i2c_fill_ssdt, + .get_name = acpi_i2c_get_name, +}; diff --git a/drivers/i2c/acpi_i2c.h b/drivers/i2c/acpi_i2c.h new file mode 100644 index 00000000000..1f4be296016 --- /dev/null +++ b/drivers/i2c/acpi_i2c.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 Google LLC + */ + +#ifndef __ACPI_I2C_H +#define __ACPI_I2C_H + +#include + +extern struct acpi_ops acpi_i2c_ops; + +int acpi_i2c_ofdata_to_platdata(struct udevice *dev); + +#endif diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index 2373aa2ea4c..5c4626b0442 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #include #include @@ -16,6 +18,7 @@ #include #endif #include +#include "acpi_i2c.h" #define I2C_MAX_OFFSET_LEN 4 @@ -749,7 +752,21 @@ UCLASS_DRIVER(i2c_generic) = { .name = "i2c_generic", }; +static const struct udevice_id generic_chip_i2c_ids[] = { + { .compatible = "i2c-chip", .data = I2C_DEVICE_GENERIC }, +#if CONFIG_IS_ENABLED(ACPIGEN) + { .compatible = "hid-over-i2c", .data = I2C_DEVICE_HID_OVER_I2C }, +#endif + { } +}; + U_BOOT_DRIVER(i2c_generic_chip_drv) = { .name = "i2c_generic_chip_drv", .id = UCLASS_I2C_GENERIC, + .of_match = generic_chip_i2c_ids, +#if CONFIG_IS_ENABLED(ACPIGEN) + .ofdata_to_platdata = acpi_i2c_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct acpi_i2c_priv), +#endif + ACPI_OPS_PTR(&acpi_i2c_ops) }; diff --git a/include/acpi/acpi_device.h b/include/acpi/acpi_device.h index a5b12217820..1b838fcb857 100644 --- a/include/acpi/acpi_device.h +++ b/include/acpi/acpi_device.h @@ -10,7 +10,9 @@ #define __ACPI_DEVICE_H #include +#include #include +#include #include struct acpi_ctx; @@ -235,6 +237,59 @@ struct acpi_spi { const char *resource; }; +/** + * struct acpi_i2c_priv - Information read from device tree + * + * This is used by devices which want to specify various pieces of ACPI + * information, including power control. It allows a generic function to + * generate the information for ACPI, based on device-tree properties. + * + * @disable_gpio_export_in_crs: Don't export GPIOs in the CRS + * @reset_gpio: GPIO used to assert reset to the device + * @enable_gpio: GPIO used to enable the device + * @stop_gpio: GPIO used to stop the device + * @irq_gpio: GPIO used for interrupt (if @irq is not used) + * @irq: IRQ used for interrupt (if @irq_gpio is not used) + * @hid: _HID value for device (required) + * @uid: _UID value for device + * @desc: _DDN value for device + * @wake: Wake event, e.g. GPE0_DW1_15; 0 if none + * @property_count: Number of other DSD properties (currently always 0) + * @probed: true set set 'linux,probed' property + * @compat_string: Device tree compatible string to report through ACPI + * @has_power_resource: true if this device has a power resource + * @reset_delay_ms: Delay after de-asserting reset, in ms + * @reset_off_delay_ms: Delay after asserting reset (during power off) + * @enable_delay_ms: Delay after asserting enable + * @enable_off_delay_ms: Delay after de-asserting enable (during power off) + * @stop_delay_ms: Delay after de-aserting stop + * @stop_off_delay_ms: Delay after asserting stop (during power off) + * @hid_desc_reg_offset: HID register offset (for Human Interface Devices) + */ +struct acpi_i2c_priv { + bool disable_gpio_export_in_crs; + struct gpio_desc reset_gpio; + struct gpio_desc enable_gpio; + struct gpio_desc irq_gpio; + struct gpio_desc stop_gpio; + struct irq irq; + const char *hid; + u32 uid; + const char *desc; + u32 wake; + u32 property_count; + bool probed; + const char *compat_string; + bool has_power_resource; + u32 reset_delay_ms; + u32 reset_off_delay_ms; + u32 enable_delay_ms; + u32 enable_off_delay_ms; + u32 stop_delay_ms; + u32 stop_off_delay_ms; + u32 hid_desc_reg_offset; +}; + /** * acpi_device_path() - Get the full path to an ACPI device * diff --git a/include/i2c.h b/include/i2c.h index 1d792db454a..880aa8032b7 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -58,6 +58,12 @@ enum i2c_address_mode { I2C_MODE_10_BIT }; +/** enum i2c_device_t - Types of I2C devices, used for compatible strings */ +enum i2c_device_t { + I2C_DEVICE_GENERIC, + I2C_DEVICE_HID_OVER_I2C, +}; + struct udevice; /** * struct dm_i2c_chip - information about an i2c chip @@ -558,6 +564,23 @@ int i2c_emul_find(struct udevice *dev, struct udevice **emulp); */ struct udevice *i2c_emul_get_device(struct udevice *emul); +/* ACPI operations for generic I2C devices */ +extern struct acpi_ops i2c_acpi_ops; + +/** + * acpi_i2c_ofdata_to_platdata() - Read properties intended for ACPI + * + * This reads the generic I2C properties from the device tree, so that these + * can be used to create ACPI information for the device. + * + * See the i2c/generic-acpi.txt binding file for information about the + * properties. + * + * @dev: I2C device to process + * @return 0 if OK, -EINVAL if acpi,hid is not present + */ +int acpi_i2c_ofdata_to_platdata(struct udevice *dev); + #ifndef CONFIG_DM_I2C /* -- cgit v1.3.1 From c9cc37de2c71ebbf953c290144c3efc18145ded9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:03 -0600 Subject: x86: apl: Support writing the IntelGraphicsMem table This table is needed by the Linux graphics driver to handle graphics correctly. Write it to ACPI. Signed-off-by: Simon Glass --- arch/x86/Kconfig | 8 + arch/x86/cpu/apollolake/Kconfig | 1 + arch/x86/cpu/intel_common/Makefile | 4 + arch/x86/cpu/intel_common/intel_opregion.c | 168 ++++++++++++++++++++ arch/x86/include/asm/intel_opregion.h | 247 +++++++++++++++++++++++++++++ arch/x86/lib/fsp/fsp_graphics.c | 32 ++++ include/bloblist.h | 1 + 7 files changed, 461 insertions(+) create mode 100644 arch/x86/cpu/intel_common/intel_opregion.c create mode 100644 arch/x86/include/asm/intel_opregion.h (limited to 'include') diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 680f26f1b8e..675a43e3b60 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1001,4 +1001,12 @@ config PCIEX_LENGTH_128MB config PCIEX_LENGTH_64MB bool +config INTEL_GMA_ACPI + bool "Generate ACPI table for Intel GMA graphics" + help + The Intel GMA graphics driver in Linux expects an ACPI table + which describes the layout of the registers and the display + connected to the device. Enable this option to create this + table so that graphics works correctly. + endmenu diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig index 16ac2b3f504..319f12684b7 100644 --- a/arch/x86/cpu/apollolake/Kconfig +++ b/arch/x86/cpu/apollolake/Kconfig @@ -48,6 +48,7 @@ config INTEL_APOLLOLAKE imply CMD_CLK imply CLK_INTEL imply ACPI_GPE + imply INTEL_GMA_ACPI if INTEL_APOLLOLAKE diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile index 374803b8760..207d5413965 100644 --- a/arch/x86/cpu/intel_common/Makefile +++ b/arch/x86/cpu/intel_common/Makefile @@ -9,6 +9,10 @@ obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += report_platform.o obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += mrc.o endif +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_INTEL_GMA_ACPI) += intel_opregion.o +endif + ifdef CONFIG_INTEL_CAR_CQOS obj-$(CONFIG_TPL_BUILD) += car2.o ifndef CONFIG_SPL_BUILD diff --git a/arch/x86/cpu/intel_common/intel_opregion.c b/arch/x86/cpu/intel_common/intel_opregion.c new file mode 100644 index 00000000000..4e6c64d9aaa --- /dev/null +++ b/arch/x86/cpu/intel_common/intel_opregion.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Writing IntelGraphicsMem table for ACPI + * + * Copyright 2019 Google LLC + * Modified from coreboot src/soc/intel/gma/opregion.c + */ + +#include +#include +#include +#include +#include +#include + +static char vbt_data[8 << 10]; + +static int locate_vbt(char **vbtp, int *sizep) +{ + struct binman_entry vbt; + struct udevice *dev; + u32 vbtsig = 0; + int size; + int ret; + + ret = binman_entry_find("intel-vbt", &vbt); + if (ret) + return log_msg_ret("find VBT", ret); + ret = uclass_first_device_err(UCLASS_SPI_FLASH, &dev); + if (ret) + return log_msg_ret("find flash", ret); + size = vbt.size; + if (size > sizeof(vbt_data)) + return log_msg_ret("vbt", -E2BIG); + ret = spi_flash_read_dm(dev, vbt.image_pos, size, vbt_data); + if (ret) + return log_msg_ret("read", ret); + + memcpy(&vbtsig, vbt_data, sizeof(vbtsig)); + if (vbtsig != VBT_SIGNATURE) { + log_err("Missing/invalid signature in VBT data file!\n"); + return -EINVAL; + } + + log_info("Found a VBT of %u bytes\n", size); + *sizep = size; + *vbtp = vbt_data; + + return 0; +} + +/* Write ASLS PCI register and prepare SWSCI register */ +static int intel_gma_opregion_register(struct udevice *dev, ulong opregion) +{ + int sci_reg; + + if (!device_active(dev)) + return -ENOENT; + + /* + * Intel BIOS Specification + * Chapter 5.3.7 "Initialise Hardware State" + */ + dm_pci_write_config32(dev, ASLS, opregion); + + /* + * Atom-based platforms use a combined SMI/SCI register, + * whereas non-Atom platforms use a separate SCI register + */ + if (IS_ENABLED(CONFIG_INTEL_GMA_SWSMISCI)) + sci_reg = SWSMISCI; + else + sci_reg = SWSCI; + + /* + * Intel's Windows driver relies on this: + * Intel BIOS Specification + * Chapter 5.4 "ASL Software SCI Handler" + */ + dm_pci_clrset_config16(dev, sci_reg, GSSCIE, SMISCISEL); + + return 0; +} + +int intel_gma_init_igd_opregion(struct udevice *dev, + struct igd_opregion *opregion) +{ + struct optionrom_vbt *vbt = NULL; + char *vbt_buf; + int vbt_size; + int ret; + + ret = locate_vbt(&vbt_buf, &vbt_size); + if (ret) { + log_err("GMA: VBT couldn't be found\n"); + return log_msg_ret("find vbt", ret); + } + vbt = (struct optionrom_vbt *)vbt_buf; + + memset(opregion, '\0', sizeof(struct igd_opregion)); + + memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE, + sizeof(opregion->header.signature)); + memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild, + ARRAY_SIZE(vbt->coreblock_biosbuild)); + /* Extended VBT support */ + if (vbt->hdr_vbt_size > sizeof(opregion->vbt.gvd1)) { + struct optionrom_vbt *ext_vbt; + + ret = bloblist_ensure_size(BLOBLISTT_INTEL_VBT, + vbt->hdr_vbt_size, + (void **)&ext_vbt); + if (ret) { + log_err("GMA: Unable to add Ext VBT to bloblist\n"); + return log_msg_ret("blob", ret); + } + + memcpy(ext_vbt, vbt, vbt->hdr_vbt_size); + opregion->mailbox3.rvda = (uintptr_t)ext_vbt; + opregion->mailbox3.rvds = vbt->hdr_vbt_size; + } else { + /* Raw VBT size which can fit in gvd1 */ + printf("copy to %p\n", opregion->vbt.gvd1); + memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size); + } + + /* 8kb */ + opregion->header.size = sizeof(struct igd_opregion) / 1024; + + /* + * Left-shift version field to accommodate Intel Windows driver quirk + * when not using a VBIOS. + * Required for Legacy boot + NGI, UEFI + NGI, and UEFI + GOP driver. + * + * No adverse effects when using VBIOS or booting Linux. + */ + opregion->header.version = IGD_OPREGION_VERSION << 24; + + /* We just assume we're mobile for now */ + opregion->header.mailboxes = MAILBOXES_MOBILE; + + /* Initialise Mailbox 1 */ + opregion->mailbox1.clid = 1; + + /* Initialise Mailbox 3 */ + opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS; + opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH; + opregion->mailbox3.pcft = 0; /* should be (IMON << 1) & 0x3e */ + opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS; + opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000; + opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19; + opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433; + opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c; + opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866; + opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f; + opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99; + opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2; + opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc; + opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5; + opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff; + + /* Write ASLS PCI register and prepare SWSCI register */ + ret = intel_gma_opregion_register(dev, (ulong)opregion); + if (ret) + return log_msg_ret("write asls", ret); + + return 0; +} diff --git a/arch/x86/include/asm/intel_opregion.h b/arch/x86/include/asm/intel_opregion.h new file mode 100644 index 00000000000..fb3e38617e4 --- /dev/null +++ b/arch/x86/include/asm/intel_opregion.h @@ -0,0 +1,247 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Writing IntelGraphicsMem table for ACPI + * + * Copyright 2019 Google LLC + * Modified from coreboot src/soc/intel/gma/opregion.h + */ + +#ifndef _ASM_INTEL_OPREGION_H_ +#define _ASM_INTEL_OPREGION_H_ + +#define VBT_SIGNATURE 0x54425624 + +/* IGD PCI Configuration register */ +#define ASLS 0xfc /* OpRegion Base */ +#define SWSCI 0xe8 /* SWSCI Register */ +#define SWSMISCI 0xe0 /* SWSMISCI Register */ +#define GSSCIE BIT(0) /* SCI Event trigger */ +#define SMISCISEL BIT(15) /* Select SMI or SCI event source */ + +/* mailbox 0: header */ +struct __packed opregion_header { + u8 signature[16]; /* Offset 0 OpRegion signature */ + u32 size; /* Offset 16 OpRegion size */ + u32 version; /* Offset 20 OpRegion structure version */ + u8 sbios_version[32]; /* Offset 24 System BIOS build version */ + u8 vbios_version[16]; /* Offset 56 Video BIOS build version */ + u8 driver_version[16]; /* Offset 72 Graphic drvr build version */ + u32 mailboxes; /* Offset 88 Mailboxes supported */ + u32 dmod; /* Offset 92 Driver Model */ + u32 pcon; /* Offset 96 Platform Capabilities */ + u16 dver[16]; /* Offset 100 GOP Version */ + u8 reserved[124]; /* Offset 132 Reserved */ +}; + +#define IGD_OPREGION_SIGNATURE "IntelGraphicsMem" +#define IGD_OPREGION_VERSION 2 + +#define IGD_MBOX1 BIT(0) +#define IGD_MBOX2 BIT(1) +#define IGD_MBOX3 BIT(2) +#define IGD_MBOX4 BIT(3) +#define IGD_MBOX5 BIT(4) + +#define MAILBOXES_MOBILE (IGD_MBOX1 | IGD_MBOX2 | IGD_MBOX3 | \ + IGD_MBOX4 | IGD_MBOX5) +#define MAILBOXES_DESKTOP (IGD_MBOX2 | IGD_MBOX4) + +#define SBIOS_VERSION_SIZE 32 + +/* mailbox 1: public ACPI methods */ +struct __packed opregion_mailbox1 { + u32 drdy; /* Offset 0 Driver readiness */ + u32 csts; /* Offset 4 Status */ + u32 cevt; /* Offset 8 Current event */ + u8 reserved[20]; /* Offset 12 Reserved */ + u32 didl; /* Offset 32 Supported display device 1 */ + u32 ddl2; /* Offset 36 Supported display device 2 */ + u32 ddl3; /* Offset 40 Supported display device 3 */ + u32 ddl4; /* Offset 44 Supported display device 4 */ + u32 ddl5; /* Offset 48 Supported display device 5 */ + u32 ddl6; /* Offset 52 Supported display device 6 */ + u32 ddl7; /* Offset 56 Supported display device 7 */ + u32 ddl8; /* Offset 60 Supported display device 8 */ + u32 cpdl; /* Offset 64 Currently present display device 1 */ + u32 cpl2; /* Offset 68 Currently present display device 2 */ + u32 cpl3; /* Offset 72 Currently present display device 3 */ + u32 cpl4; /* Offset 76 Currently present display device 4 */ + u32 cpl5; /* Offset 80 Currently present display device 5 */ + u32 cpl6; /* Offset 84 Currently present display device 6 */ + u32 cpl7; /* Offset 88 Currently present display device 7 */ + u32 cpl8; /* Offset 92 Currently present display device 8 */ + u32 cadl; /* Offset 96 Currently active display device 1 */ + u32 cal2; /* Offset 100 Currently active display device 2 */ + u32 cal3; /* Offset 104 Currently active display device 3 */ + u32 cal4; /* Offset 108 Currently active display device 4 */ + u32 cal5; /* Offset 112 Currently active display device 5 */ + u32 cal6; /* Offset 116 Currently active display device 6 */ + u32 cal7; /* Offset 120 Currently active display device 7 */ + u32 cal8; /* Offset 124 Currently active display device 8 */ + u32 nadl; /* Offset 128 Next active device 1 */ + u32 ndl2; /* Offset 132 Next active device 2 */ + u32 ndl3; /* Offset 136 Next active device 3 */ + u32 ndl4; /* Offset 140 Next active device 4 */ + u32 ndl5; /* Offset 144 Next active device 5 */ + u32 ndl6; /* Offset 148 Next active device 6 */ + u32 ndl7; /* Offset 152 Next active device 7 */ + u32 ndl8; /* Offset 156 Next active device 8 */ + u32 aslp; /* Offset 160 ASL sleep timeout */ + u32 tidx; /* Offset 164 Toggle table index */ + u32 chpd; /* Offset 168 Current hot plug enable indicator */ + u32 clid; /* Offset 172 Current lid state indicator */ + u32 cdck; /* Offset 176 Current docking state indicator */ + u32 sxsw; /* Offset 180 Display Switch notification on Sx State + * resume + */ + u32 evts; /* Offset 184 Events supported by ASL */ + u32 cnot; /* Offset 188 Current OS Notification */ + u32 nrdy; /* Offset 192 Reasons for DRDY = 0 */ + u32 ddl9; /* Offset 196 Extended Supported display device 1 */ + u32 dd10; /* Offset 200 Extended Supported display device 2 */ + u32 dd11; /* Offset 204 Extended Supported display device 3 */ + u32 dd12; /* Offset 208 Extended Supported display device 4 */ + u32 dd13; /* Offset 212 Extended Supported display device 5 */ + u32 dd14; /* Offset 216 Extended Supported display device 6 */ + u32 dd15; /* Offset 220 Extended Supported display device 7 */ + u32 cpl9; /* Offset 224 Extended Currently present device 1 */ + u32 cp10; /* Offset 228 Extended Currently present device 2 */ + u32 cp11; /* Offset 232 Extended Currently present device 3 */ + u32 cp12; /* Offset 236 Extended Currently present device 4 */ + u32 cp13; /* Offset 240 Extended Currently present device 5 */ + u32 cp14; /* Offset 244 Extended Currently present device 6 */ + u32 cp15; /* Offset 248 Extended Currently present device 7 */ + u8 reserved2[4]; /* Offset 252 Reserved 4 bytes */ +}; + +/* mailbox 2: software sci interface */ +struct __packed opregion_mailbox2 { + u32 scic; /* Offset 0 Software SCI function number parameters */ + u32 parm; /* Offset 4 Software SCI function number parameters */ + u32 dslp; /* Offset 8 Driver sleep timeout */ + u8 reserved[244]; /* Offset 12 Reserved */ +}; + +/* mailbox 3: power conservation */ +struct __packed opregion_mailbox3 { + u32 ardy; /* Offset 0 Driver readiness */ + u32 aslc; /* Offset 4 ASLE interrupt command / status */ + u32 tche; /* Offset 8 Technology enabled indicator */ + u32 alsi; /* Offset 12 Current ALS illuminance reading */ + u32 bclp; /* Offset 16 Backlight britness to set */ + u32 pfit; /* Offset 20 Panel fitting Request */ + u32 cblv; /* Offset 24 Brightness Current State */ + /* Offset 28 Backlight Brightness Level Duty Cycle Mapping Table */ + u16 bclm[20]; + u32 cpfm; /* Offset 68 Panel Fitting Current Mode */ + u32 epfm; /* Offset 72 Enabled Panel Fitting Modes */ + u8 plut[74]; /* Offset 76 Panel Look Up Table */ + /* Offset 150 PWM Frequency and Minimum Brightness */ + u32 pfmb; + u32 ccdv; /* Offset 154 Color Correction Default Values */ + u32 pcft; /* Offset 158 Power Conservation Features */ + u32 srot; /* Offset 162 Supported Rotation angle */ + u32 iuer; /* Offset 166 Intel Ultrabook Event Register */ + u64 fdsp; /* Offset 170 FFS Display Physical address */ + u32 fdss; /* Offset 178 FFS Display Size */ + u32 stat; /* Offset 182 State Indicator */ + /* + * Offset 186 (Igd opregion offset 0x3BAh) + * Physical address of Raw VBT data + */ + u64 rvda; + /* Offset 194 (Igd opregion offset 0x3C2h) Size of Raw VBT data */ + u32 rvds; + u8 reserved[58]; /* Offset 198 Reserved */ +}; + +#define IGD_BACKLIGHT_BRIGHTNESS 0xff +#define IGD_INITIAL_BRIGHTNESS 0x64 + +#define IGD_FIELD_VALID BIT(31) +#define IGD_WORD_FIELD_VALID BIT(15) +#define IGD_PFIT_STRETCH 6 + +/* mailbox 4: vbt */ +struct __packed opregion_vbt { + u8 gvd1[6 << 10]; +}; + +/* Mailbox 5: BIOS to Driver Notification Extension */ +struct __packed opregion_mailbox5 { + u32 phed; /* Offset 7168 Panel Header */ + u8 bddc[256]; /* Offset 7172 Panel EDID */ + u8 reserved[764]; /* Offset 7428 764 bytes */ +}; + +/* IGD OpRegion */ +struct __packed igd_opregion { + struct opregion_header header; + struct opregion_mailbox1 mailbox1; + struct opregion_mailbox2 mailbox2; + struct opregion_mailbox3 mailbox3; + struct opregion_vbt vbt; + struct opregion_mailbox5 mailbox5; +}; + +/* Intel Video BIOS (Option ROM) */ +struct __packed optionrom_header { + u16 signature; + u8 size; + u8 reserved[21]; + u16 pcir_offset; + u16 vbt_offset; +}; + +#define OPROM_SIGNATURE 0xaa55 + +struct __packed optionrom_pcir { + u32 signature; + u16 vendor; + u16 device; + u16 reserved1; + u16 length; + u8 revision; + u8 classcode[3]; + u16 imagelength; + u16 coderevision; + u8 codetype; + u8 indicator; + u16 reserved2; +}; + +struct __packed optionrom_vbt { + u8 hdr_signature[20]; + u16 hdr_version; + u16 hdr_size; + u16 hdr_vbt_size; + u8 hdr_vbt_checksum; + u8 hdr_reserved; + u32 hdr_vbt_datablock; + u32 hdr_aim[4]; + u8 datahdr_signature[16]; + u16 datahdr_version; + u16 datahdr_size; + u16 datahdr_datablocksize; + u8 coreblock_id; + u16 coreblock_size; + u16 coreblock_biossize; + u8 coreblock_biostype; + u8 coreblock_releasestatus; + u8 coreblock_hwsupported; + u8 coreblock_integratedhw; + u8 coreblock_biosbuild[4]; + u8 coreblock_biossignon[155]; +}; + +/** + * intel_gma_init_igd_opregion() - Initialise IGD OpRegion + * + * This is called from ACPI code and OS drivers + * + * @return 0 if OK, -ve on error + */ +int intel_gma_init_igd_opregion(struct udevice *dev, + struct igd_opregion *opregion); + +#endif /* _ASM_INTEL_OPREGION_H_ */ diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index e8c1e07af1c..858d7942fed 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -3,14 +3,19 @@ * Copyright (C) 2017, Bin Meng */ +#define LOG_CATEGORY UCLASS_VIDEO + #include #include #include #include #include #include +#include #include +#include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -127,6 +132,32 @@ static int fsp_video_bind(struct udevice *dev) return 0; } +#ifdef CONFIG_INTEL_GMA_ACPI +static int fsp_video_acpi_write_tables(const struct udevice *dev, + struct acpi_ctx *ctx) +{ + struct igd_opregion *opregion; + int ret; + + printf("ACPI: * IGD OpRegion\n"); + opregion = (struct igd_opregion *)ctx->current; + + ret = intel_gma_init_igd_opregion((struct udevice *)dev, opregion); + if (ret) + return ret; + + acpi_inc_align(ctx, sizeof(struct igd_opregion)); + + return 0; +} +#endif + +struct acpi_ops fsp_video_acpi_ops = { +#ifdef CONFIG_INTEL_GMA_ACPI + .write_tables = fsp_video_acpi_write_tables, +#endif +}; + static const struct udevice_id fsp_video_ids[] = { { .compatible = "fsp-fb" }, { } @@ -139,6 +170,7 @@ U_BOOT_DRIVER(fsp_video) = { .bind = fsp_video_bind, .probe = fsp_video_probe, .flags = DM_FLAG_PRE_RELOC, + ACPI_OPS_PTR(&fsp_video_acpi_ops) }; static struct pci_device_id fsp_video_supported[] = { diff --git a/include/bloblist.h b/include/bloblist.h index bbe0a35d5a2..7d8480548e0 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -32,6 +32,7 @@ enum bloblist_tag_t { * Sleeping table. This forms part of the ACPI tables passed to Linux. */ BLOBLISTT_ACPI_GNVS, + BLOBLISTT_INTEL_VBT, /* Intel Video-BIOS table */ }; /** -- cgit v1.3.1 From 10552377d44045fbf1a30615b2c2d1d4ae5d03ec Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:06 -0600 Subject: x86: apl: Add power-management definitions Add SCI and power-state definitions required by ACPI tables. Fix the license to match the original source file. Als update the guard on acpi_pmc.h to avoid an error when buiding ASL. Signed-off-by: Simon Glass --- arch/x86/include/asm/arch-apollolake/pm.h | 40 ++++++++++++++++++++++++++++++- include/power/acpi_pmc.h | 4 ++-- 2 files changed, 41 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/arch/x86/include/asm/arch-apollolake/pm.h b/arch/x86/include/asm/arch-apollolake/pm.h index 6718290c4fe..9a8d971e910 100644 --- a/arch/x86/include/asm/arch-apollolake/pm.h +++ b/arch/x86/include/asm/arch-apollolake/pm.h @@ -1,12 +1,15 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2015-2016 Intel Corp. * (Written by Lance Zhao for Intel Corp.) + * Copyright 2019 Google LLC */ #ifndef _ASM_ARCH_PM_H #define _ASM_ARCH_PM_H +#include + #define PMC_GPE_SW_31_0 0 #define PMC_GPE_SW_63_32 1 #define PMC_GPE_NW_31_0 3 @@ -16,4 +19,39 @@ #define PMC_GPE_N_63_32 7 #define PMC_GPE_W_31_0 9 +#define IRQ_REG 0x106c +#define SCI_IRQ_SHIFT 24 +#define SCI_IRQ_MASK (0xff << SCI_IRQ_SHIFT) +#define SCIS_IRQ9 9 +#define SCIS_IRQ10 10 +#define SCIS_IRQ11 11 +#define SCIS_IRQ20 20 +#define SCIS_IRQ21 21 +#define SCIS_IRQ22 22 +#define SCIS_IRQ23 23 + +/* P-state configuration */ +#define PSS_MAX_ENTRIES 8 +#define PSS_RATIO_STEP 2 +#define PSS_LATENCY_TRANSITION 10 +#define PSS_LATENCY_BUSMASTER 10 + +#ifndef __ASSEMBLY__ +/* Track power state from reset to log events */ +struct __packed chipset_power_state { + u16 pm1_sts; + u16 pm1_en; + u32 pm1_cnt; + u32 gpe0_sts[GPE0_REG_MAX]; + u32 gpe0_en[GPE0_REG_MAX]; + u16 tco1_sts; + u16 tco2_sts; + u32 prsts; + u32 gen_pmcon1; + u32 gen_pmcon2; + u32 gen_pmcon3; + u32 prev_sleep_state; +}; +#endif /* !__ASSEMBLY__ */ + #endif diff --git a/include/power/acpi_pmc.h b/include/power/acpi_pmc.h index 5fbf7451369..222288b71a4 100644 --- a/include/power/acpi_pmc.h +++ b/include/power/acpi_pmc.h @@ -6,7 +6,7 @@ #ifndef __ACPI_PMC_H #define __ACPI_PMC_H -#ifndef __ACPI__ +#ifndef __ASSEMBLY__ enum { GPE0_REG_MAX = 4, @@ -194,6 +194,6 @@ void pmc_dump_info(struct udevice *dev); */ int pmc_gpe_init(struct udevice *dev); -#endif /* !__ACPI__ */ +#endif /* !__ASSEMBLY__ */ #endif -- cgit v1.3.1 From 6c0da2da7ca9f4bf75e384dc679bcb4575a9940e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:08 -0600 Subject: x86: Add a few common Intel CPU functions Add functions to query CPU information, needed for ACPI. Signed-off-by: Simon Glass --- arch/x86/cpu/intel_common/cpu.c | 64 +++++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/cpu_common.h | 49 ++++++++++++++++++++++++++++++ include/acpi/acpigen.h | 12 ++++++++ 3 files changed, 125 insertions(+) (limited to 'include') diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 509730aea96..cb4ef84013a 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -227,3 +228,66 @@ void cpu_set_eist(bool eist_status) msr.lo &= ~MISC_ENABLE_ENHANCED_SPEEDSTEP; msr_write(MSR_IA32_MISC_ENABLE, msr); } + +int cpu_get_coord_type(void) +{ + return HW_ALL; +} + +int cpu_get_min_ratio(void) +{ + msr_t msr; + + /* Get bus ratio limits and calculate clock speeds */ + msr = msr_read(MSR_PLATFORM_INFO); + + return (msr.hi >> 8) & 0xff; /* Max Efficiency Ratio */ +} + +int cpu_get_max_ratio(void) +{ + u32 ratio_max; + msr_t msr; + + if (cpu_config_tdp_levels()) { + /* Set max ratio to nominal TDP ratio */ + msr = msr_read(MSR_CONFIG_TDP_NOMINAL); + ratio_max = msr.lo & 0xff; + } else { + msr = msr_read(MSR_PLATFORM_INFO); + /* Max Non-Turbo Ratio */ + ratio_max = (msr.lo >> 8) & 0xff; + } + + return ratio_max; +} + +int cpu_get_bus_clock_khz(void) +{ + /* + * CPU bus clock is set by default here to 100MHz. This function returns + * the bus clock in KHz. + */ + return INTEL_BCLK_MHZ * 1000; +} + +int cpu_get_power_max(void) +{ + int power_unit; + msr_t msr; + + msr = msr_read(MSR_PKG_POWER_SKU_UNIT); + power_unit = 2 << ((msr.lo & 0xf) - 1); + msr = msr_read(MSR_PKG_POWER_SKU); + + return (msr.lo & 0x7fff) * 1000 / power_unit; +} + +int cpu_get_max_turbo_ratio(void) +{ + msr_t msr; + + msr = msr_read(MSR_TURBO_RATIO_LIMIT); + + return msr.lo & 0xff; +} diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index cdd99a90b76..a7b7112d417 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -128,4 +128,53 @@ void cpu_set_eist(bool eist_status); */ void cpu_set_p_state_to_turbo_ratio(void); +/** + * cpu_get_coord_type() - Get the type of coordination for P-State transition + * + * See ACPI spec v6.3 section 8.4.6.5 _PSD (P-State Dependency) + * + * @return HW_ALL (always) + */ +int cpu_get_coord_type(void); + +/** + * cpu_get_min_ratio() - get minimum support frequency ratio for CPU + * + * @return minimum ratio + */ +int cpu_get_min_ratio(void); + +/** + * cpu_get_max_ratio() - get nominal TDP ration or max non-turbo ratio + * + * If a nominal TDP ratio is available, it is returned. Otherwise this returns + * the maximum non-turbo frequency ratio for this processor + * + * @return max ratio + */ +int cpu_get_max_ratio(void); + +/** + * cpu_get_bus_clock_khz() - Get the bus clock frequency in KHz + * + * This is the value the clock ratio is multiplied with + * + * @return bus-block frequency in KHz + */ +int cpu_get_bus_clock_khz(void); + +/** + * cpu_get_power_max() - Get maximum CPU TDP + * + * @return maximum CPU TDP (Thermal-design power) in mW + */ +int cpu_get_power_max(void); + +/** + * cpu_get_max_turbo_ratio() - Get maximum turbo ratio + * + * @return maximum ratio + */ +int cpu_get_max_turbo_ratio(void); + #endif diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h index 34b3115bc9c..c412898169e 100644 --- a/include/acpi/acpigen.h +++ b/include/acpi/acpigen.h @@ -73,6 +73,18 @@ enum { RETURN_OP = 0xa4, }; +/** + * enum psd_coord - Coordination types for P-states + * + * The type of coordination that exists (hardware) or is required (software) as + * a result of the underlying hardware dependency + */ +enum psd_coord { + SW_ALL = 0xfc, + SW_ANY = 0xfd, + HW_ALL = 0xfe +}; + /** * acpigen_get_current() - Get the current ACPI code output pointer * -- cgit v1.3.1 From d2628984b7831b26d8f9ac25c966d6151df7a929 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:09 -0600 Subject: x86: acpi: Support generation of the HPET table Add an implementation of the HPET (High Precision Event Timer) ACPI table. Since this is x86-specific, put it in an x86-specific file Signed-off-by: Simon Glass --- arch/x86/include/asm/acpi_table.h | 10 +++++++ arch/x86/lib/acpi_table.c | 59 +++++++++++++++++++++++++++++++++++++++ include/acpi/acpi_table.h | 31 ++++++++++++++------ 3 files changed, 91 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index 733085c1785..7047ee6c772 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -36,6 +36,16 @@ int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base, u32 acpi_fill_mcfg(u32 current); u32 acpi_fill_csrt(u32 current); +/** + * acpi_write_hpet() - Write out a HPET table + * + * Write out the table for High-Precision Event Timers + * + * @ctx: Current ACPI context + * @return 0 if OK, -ve on error + */ +int acpi_write_hpet(struct acpi_ctx *ctx); + /** * acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table * diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 36ef3e5f0b7..0080c96cfe7 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -529,3 +529,62 @@ ulong acpi_get_rsdp_addr(void) { return acpi_rsdp_addr; } + +/** + * acpi_write_hpet() - Write out a HPET table + * + * Write out the table for High-Precision Event Timers + * + * @hpet: Place to put HPET table + */ +static int acpi_create_hpet(struct acpi_hpet *hpet) +{ + struct acpi_table_header *header = &hpet->header; + struct acpi_gen_regaddr *addr = &hpet->addr; + + /* + * See IA-PC HPET (High Precision Event Timers) Specification v1.0a + * https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/software-developers-hpet-spec-1-0a.pdf + */ + memset((void *)hpet, '\0', sizeof(struct acpi_hpet)); + + /* Fill out header fields. */ + acpi_fill_header(header, "HPET"); + + header->aslc_revision = ASL_REVISION; + header->length = sizeof(struct acpi_hpet); + header->revision = acpi_get_table_revision(ACPITAB_HPET); + + /* Fill out HPET address */ + addr->space_id = 0; /* Memory */ + addr->bit_width = 64; + addr->bit_offset = 0; + addr->addrl = CONFIG_HPET_ADDRESS & 0xffffffff; + addr->addrh = ((unsigned long long)CONFIG_HPET_ADDRESS) >> 32; + + hpet->id = *(u32 *)CONFIG_HPET_ADDRESS; + hpet->number = 0; + hpet->min_tick = 0; /* HPET_MIN_TICKS */ + + header->checksum = table_compute_checksum(hpet, + sizeof(struct acpi_hpet)); + + return 0; +} + +int acpi_write_hpet(struct acpi_ctx *ctx) +{ + struct acpi_hpet *hpet; + int ret; + + log_debug("ACPI: * HPET\n"); + + hpet = ctx->current; + acpi_inc_align(ctx, sizeof(struct acpi_hpet)); + acpi_create_hpet(hpet); + ret = acpi_add_table(ctx, hpet); + if (ret) + return log_msg_ret("add", ret); + + return 0; +} diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index fe9b29f3f82..f8140446a59 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -20,6 +20,9 @@ #define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */ #define ASLC_ID "INTL" /* Intel ASL Compiler */ +/* TODO(sjg@chromium.org): Figure out how to get compiler revision */ +#define ASL_REVISION 0 + #define ACPI_RSDP_REV_ACPI_1_0 0 #define ACPI_RSDP_REV_ACPI_2_0 2 @@ -56,6 +59,15 @@ struct __packed acpi_table_header { u32 aslc_revision; /* ASL compiler revision number */ }; +struct acpi_gen_regaddr { + u8 space_id; /* Address space ID */ + u8 bit_width; /* Register size in bits */ + u8 bit_offset; /* Register bit offset */ + u8 access_size; /* Access size */ + u32 addrl; /* Register address, low 32 bits */ + u32 addrh; /* Register address, high 32 bits */ +}; + /* A maximum number of 32 ACPI tables ought to be enough for now */ #define MAX_ACPI_TABLES 32 @@ -71,6 +83,16 @@ struct acpi_xsdt { u64 entry[MAX_ACPI_TABLES]; }; +/* HPET timers */ +struct __packed acpi_hpet { + struct acpi_table_header header; + u32 id; + struct acpi_gen_regaddr addr; + u8 number; + u16 min_tick; + u8 attributes; +}; + /* FADT Preferred Power Management Profile */ enum acpi_pm_profile { ACPI_PM_UNSPECIFIED = 0, @@ -138,15 +160,6 @@ enum acpi_address_space_size { ACPI_ACCESS_SIZE_QWORD_ACCESS }; -struct acpi_gen_regaddr { - u8 space_id; /* Address space ID */ - u8 bit_width; /* Register size in bits */ - u8 bit_offset; /* Register bit offset */ - u8 access_size; /* Access size */ - u32 addrl; /* Register address, low 32 bits */ - u32 addrh; /* Register address, high 32 bits */ -}; - /* FADT (Fixed ACPI Description Table) */ struct __packed acpi_fadt { struct acpi_table_header header; -- cgit v1.3.1 From f37979e7b75e1290e9756c3e964a85ef8b10c3c7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:10 -0600 Subject: x86: acpi: Support generation of the DBG2 table Add an implementation of the DBG2 (Debug Port Table 2) ACPI table. Adjust one of the header includes to be in the correct order, before adding more. Note that the DBG2 table is generic but the PCI UART is x86-specific at present since it assumes an ns16550 UART. It can be generalised later if necessary. Signed-off-by: Simon Glass --- arch/x86/include/asm/acpi_table.h | 11 +++++++ arch/x86/lib/acpi_table.c | 41 +++++++++++++++++++++++++ include/acpi/acpi_table.h | 40 ++++++++++++++++++++++++ lib/acpi/acpi_table.c | 64 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 156 insertions(+) (limited to 'include') diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index 7047ee6c772..1b7ff509516 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -46,6 +46,17 @@ u32 acpi_fill_csrt(u32 current); */ int acpi_write_hpet(struct acpi_ctx *ctx); +/** + * acpi_write_dbg2_pci_uart() - Write out a DBG2 table + * + * @ctx: Current ACPI context + * @dev: Debug UART device to describe + * @access_size: Access size for UART (e.g. ACPI_ACCESS_SIZE_DWORD_ACCESS) + * @return 0 if OK, -ve on error + */ +int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev, + uint access_size); + /** * acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table * diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 0080c96cfe7..e257c789838 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -588,3 +589,43 @@ int acpi_write_hpet(struct acpi_ctx *ctx) return 0; } + +int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev, + uint access_size) +{ + struct acpi_dbg2_header *dbg2 = ctx->current; + char path[ACPI_PATH_MAX]; + struct acpi_gen_regaddr address; + phys_addr_t addr; + int ret; + + if (!device_active(dev)) { + log_info("Device not enabled\n"); + return -EACCES; + } + /* + * PCI devices don't remember their resource allocation information in + * U-Boot at present. We assume that MMIO is used for the UART and that + * the address space is 32 bytes: ns16550 uses 8 registers of up to + * 32-bits each. This is only for debugging so it is not a big deal. + */ + addr = dm_pci_read_bar32(dev, 0); + printf("UART addr %lx\n", (ulong)addr); + + memset(&address, '\0', sizeof(address)); + address.space_id = ACPI_ADDRESS_SPACE_MEMORY; + address.addrl = (uint32_t)addr; + address.addrh = (uint32_t)((addr >> 32) & 0xffffffff); + address.access_size = access_size; + + ret = acpi_device_path(dev, path, sizeof(path)); + if (ret) + return log_msg_ret("path", ret); + acpi_create_dbg2(dbg2, ACPI_DBG2_SERIAL_PORT, + ACPI_DBG2_16550_COMPATIBLE, &address, 0x1000, path); + + acpi_inc_align(ctx, dbg2->header.length); + acpi_add_table(ctx, dbg2); + + return 0; +} diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index f8140446a59..c826a797f5b 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -448,6 +448,29 @@ struct __packed acpi_dmar { #define ACPI_DBG2_UNKNOWN 0x00FF +/* DBG2: Microsoft Debug Port Table 2 header */ +struct __packed acpi_dbg2_header { + struct acpi_table_header header; + u32 devices_offset; + u32 devices_count; +}; + +/* DBG2: Microsoft Debug Port Table 2 device entry */ +struct __packed acpi_dbg2_device { + u8 revision; + u16 length; + u8 address_count; + u16 namespace_string_length; + u16 namespace_string_offset; + u16 oem_data_length; + u16 oem_data_offset; + u16 port_type; + u16 port_subtype; + u8 reserved[2]; + u16 base_address_offset; + u16 address_size_offset; +}; + /* SPCR (Serial Port Console Redirection table) */ struct __packed acpi_spcr { struct acpi_table_header header; @@ -522,6 +545,23 @@ int acpi_get_table_revision(enum acpi_tables table); */ int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags); +/** + * acpi_create_dbg2() - Create a DBG2 table + * + * This table describes how to access the debug UART + * + * @dbg2: Place to put information + * @port_type: Serial port type (see ACPI_DBG2_...) + * @port_subtype: Serial port sub-type (see ACPI_DBG2_...) + * @address: ACPI address of port + * @address_size: Size of address space + * @device_path: Path of device (created using acpi_device_path()) + */ +void acpi_create_dbg2(struct acpi_dbg2_header *dbg2, + int port_type, int port_subtype, + struct acpi_gen_regaddr *address, uint32_t address_size, + const char *device_path); + /** * acpi_fill_header() - Set up a new table header * diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c index acc55e7fad6..908d8903893 100644 --- a/lib/acpi/acpi_table.c +++ b/lib/acpi/acpi_table.c @@ -264,3 +264,67 @@ void acpi_setup_base_tables(struct acpi_ctx *ctx, void *start) */ acpi_align64(ctx); } + +void acpi_create_dbg2(struct acpi_dbg2_header *dbg2, + int port_type, int port_subtype, + struct acpi_gen_regaddr *address, u32 address_size, + const char *device_path) +{ + uintptr_t current; + struct acpi_dbg2_device *device; + u32 *dbg2_addr_size; + struct acpi_table_header *header; + size_t path_len; + const char *path; + char *namespace; + + /* Fill out header fields. */ + current = (uintptr_t)dbg2; + memset(dbg2, '\0', sizeof(struct acpi_dbg2_header)); + header = &dbg2->header; + + header->revision = acpi_get_table_revision(ACPITAB_DBG2); + acpi_fill_header(header, "DBG2"); + header->aslc_revision = ASL_REVISION; + + /* One debug device defined */ + dbg2->devices_offset = sizeof(struct acpi_dbg2_header); + dbg2->devices_count = 1; + current += sizeof(struct acpi_dbg2_header); + + /* Device comes after the header */ + device = (struct acpi_dbg2_device *)current; + memset(device, 0, sizeof(struct acpi_dbg2_device)); + current += sizeof(struct acpi_dbg2_device); + + device->revision = 0; + device->address_count = 1; + device->port_type = port_type; + device->port_subtype = port_subtype; + + /* Base Address comes after device structure */ + memcpy((void *)current, address, sizeof(struct acpi_gen_regaddr)); + device->base_address_offset = current - (uintptr_t)device; + current += sizeof(struct acpi_gen_regaddr); + + /* Address Size comes after address structure */ + dbg2_addr_size = (uint32_t *)current; + device->address_size_offset = current - (uintptr_t)device; + *dbg2_addr_size = address_size; + current += sizeof(uint32_t); + + /* Namespace string comes last, use '.' if not provided */ + path = device_path ? : "."; + /* Namespace string length includes NULL terminator */ + path_len = strlen(path) + 1; + namespace = (char *)current; + device->namespace_string_length = path_len; + device->namespace_string_offset = current - (uintptr_t)device; + strncpy(namespace, path, path_len); + current += path_len; + + /* Update structure lengths and checksum */ + device->length = current - (uintptr_t)device; + header->length = current - (uintptr_t)dbg2; + header->checksum = table_compute_checksum(dbg2, header->length); +} -- cgit v1.3.1 From 15403289e5ddb0d777f95f5836add1316e2d9ae2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:11 -0600 Subject: acpi: Add support for generating processor tables ACPI has a number of CPU-related tables. Add utility functions to write out the basic packages. Signed-off-by: Simon Glass --- include/acpi/acpigen.h | 39 ++++++++++++++++++ lib/acpi/acpigen.c | 55 +++++++++++++++++++++++++ test/dm/acpigen.c | 107 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 201 insertions(+) (limited to 'include') diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h index c412898169e..3a2c6339d5e 100644 --- a/include/acpi/acpigen.h +++ b/include/acpi/acpigen.h @@ -64,7 +64,9 @@ enum { OR_OP = 0x7d, NOT_OP = 0x80, DEVICE_OP = 0x82, + PROCESSOR_OP = 0x83, POWER_RES_OP = 0x84, + NOTIFY_OP = 0x86, LEQUAL_OP = 0x93, TO_BUFFER_OP = 0x96, TO_INTEGER_OP = 0x99, @@ -777,4 +779,41 @@ void acpigen_write_dsm_uuid_end(struct acpi_ctx *ctx); */ void acpigen_write_dsm_end(struct acpi_ctx *ctx); +/** + * acpigen_write_processor() - Write a Processor package + * + * This emits a Processor package header with the required information. The + * caller must complete the information and call acpigen_pop_len() at the end + * + * @ctx: ACPI context pointer + * @cpuindex: CPU number + * @pblock_addr: PBlk system IO address + * @pblock_len: PBlk length + */ +void acpigen_write_processor(struct acpi_ctx *ctx, uint cpuindex, + u32 pblock_addr, uint pblock_len); + +/** + * acpigen_write_processor_package() - Write a package containing the processors + * + * The package containins the name of each processor in the SoC + * + * @ctx: ACPI context pointer + * @name: Package name (.e.g "PPKG") + * @first_core: Number of the first core (e.g. 0) + * @core_count: Number of cores (e.g. 4) + */ +void acpigen_write_processor_package(struct acpi_ctx *ctx, const char *name, + uint first_core, uint core_count); + +/** + * acpigen_write_processor_cnot() - Write a processor notification method + * + * This writes a method that notifies all CPU cores + * + * @ctx: ACPI context pointer + * @num_cores: Number of CPU cores + */ +void acpigen_write_processor_cnot(struct acpi_ctx *ctx, const uint num_cores); + #endif diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c index d859f378413..b9985075cde 100644 --- a/lib/acpi/acpigen.c +++ b/lib/acpi/acpigen.c @@ -17,6 +17,9 @@ #include #include +/* CPU path format */ +#define ACPI_CPU_STRING "\\_PR.CP%02d" + u8 *acpigen_get_current(struct acpi_ctx *ctx) { return ctx->current; @@ -340,6 +343,58 @@ void acpigen_write_method_serialized(struct acpi_ctx *ctx, const char *name, ACPI_METHOD_SERIALIZED_MASK); } +void acpigen_write_processor(struct acpi_ctx *ctx, uint cpuindex, + u32 pblock_addr, uint pblock_len) +{ + /* + * Processor (\_PR.CPnn, cpuindex, pblock_addr, pblock_len) + * { + */ + char pscope[16]; + + acpigen_emit_ext_op(ctx, PROCESSOR_OP); + acpigen_write_len_f(ctx); + + snprintf(pscope, sizeof(pscope), ACPI_CPU_STRING, cpuindex); + acpigen_emit_namestring(ctx, pscope); + acpigen_emit_byte(ctx, cpuindex); + acpigen_emit_dword(ctx, pblock_addr); + acpigen_emit_byte(ctx, pblock_len); +} + +void acpigen_write_processor_package(struct acpi_ctx *ctx, + const char *const name, + const uint first_core, + const uint core_count) +{ + uint i; + char pscope[16]; + + acpigen_write_name(ctx, name); + acpigen_write_package(ctx, core_count); + for (i = first_core; i < first_core + core_count; ++i) { + snprintf(pscope, sizeof(pscope), ACPI_CPU_STRING, i); + acpigen_emit_namestring(ctx, pscope); + } + acpigen_pop_len(ctx); +} + +void acpigen_write_processor_cnot(struct acpi_ctx *ctx, const uint num_cores) +{ + int core_id; + + acpigen_write_method(ctx, "\\_PR.CNOT", 1); + for (core_id = 0; core_id < num_cores; core_id++) { + char buffer[30]; + + snprintf(buffer, sizeof(buffer), ACPI_CPU_STRING, core_id); + acpigen_emit_byte(ctx, NOTIFY_OP); + acpigen_emit_namestring(ctx, buffer); + acpigen_emit_byte(ctx, ARG0_OP); + } + acpigen_pop_len(ctx); +} + void acpigen_write_device(struct acpi_ctx *ctx, const char *name) { acpigen_emit_ext_op(ctx, DEVICE_OP); diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c index 62d48dc419c..74b7e23aab3 100644 --- a/test/dm/acpigen.c +++ b/test/dm/acpigen.c @@ -1343,3 +1343,110 @@ static int dm_test_acpi_write_i2c_dsm(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_acpi_write_i2c_dsm, 0); + +/* Test emitting a processor */ +static int dm_test_acpi_write_processor(struct unit_test_state *uts) +{ + const int cpuindex = 6; + const u32 pblock_addr = 0x12345600; + const u32 pblock_len = 0x60; + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_processor(ctx, cpuindex, pblock_addr, pblock_len); + acpigen_pop_len(ctx); + + ut_asserteq(EXT_OP_PREFIX, *ptr++); + ut_asserteq(PROCESSOR_OP, *ptr++); + ut_asserteq(0x13, acpi_test_get_length(ptr)); + ptr += 3; + ut_asserteq_strn("\\._PR_CP06", (char *)ptr); + ptr += 10; + ut_asserteq(cpuindex, *ptr++); + ut_asserteq(pblock_addr, get_unaligned((u32 *)ptr)); + ptr += 4; + ut_asserteq(pblock_len, *ptr++); + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_processor, 0); + +/* Test emitting a processor package */ +static int dm_test_acpi_write_processor_package(struct unit_test_state *uts) +{ + const int core_count = 3; + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_processor_package(ctx, "XCPU", 0, core_count); + + ut_asserteq(NAME_OP, *ptr++); + ut_asserteq_strn("XCPU", (char *)ptr); + ptr += 4; + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(core_count, *ptr++); + + ut_asserteq_strn("\\._PR_CP00", (char *)ptr); + ptr += 10; + ut_asserteq_strn("\\._PR_CP01", (char *)ptr); + ptr += 10; + ut_asserteq_strn("\\._PR_CP02", (char *)ptr); + ptr += 10; + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_processor_package, 0); + +/* Test emitting a processor notification package */ +static int dm_test_acpi_write_processor_cnot(struct unit_test_state *uts) +{ + const int core_count = 3; + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_processor_cnot(ctx, core_count); + + ut_asserteq(METHOD_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq_strn("\\._PR_CNOT", (char *)ptr); + ptr += 10; + ut_asserteq(1, *ptr++); + + ut_asserteq(NOTIFY_OP, *ptr++); + ut_asserteq_strn("\\._PR_CP00", (char *)ptr); + ptr += 10; + ut_asserteq(ARG0_OP, *ptr++); + ut_asserteq(NOTIFY_OP, *ptr++); + ut_asserteq_strn("\\._PR_CP01", (char *)ptr); + ptr += 10; + ut_asserteq(ARG0_OP, *ptr++); + ut_asserteq(NOTIFY_OP, *ptr++); + ut_asserteq_strn("\\._PR_CP02", (char *)ptr); + ptr += 10; + ut_asserteq(ARG0_OP, *ptr++); + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_processor_cnot, 0); -- cgit v1.3.1 From 350c7f52b93c5612dd3d53966bd54cb68b94d80b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:13 -0600 Subject: acpi: Add more support for generating processor tables This adds tables relating to P-States and C-States. Signed-off-by: Simon Glass --- include/acpi/acpigen.h | 162 +++++++++++++++++++++++++++ lib/acpi/acpigen.c | 167 ++++++++++++++++++++++++++++ test/dm/acpigen.c | 294 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 623 insertions(+) (limited to 'include') diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h index 3a2c6339d5e..976f4dbb9af 100644 --- a/include/acpi/acpigen.h +++ b/include/acpi/acpigen.h @@ -10,8 +10,10 @@ #ifndef __ACPI_ACPIGEN_H #define __ACPI_ACPIGEN_H +#include #include +struct acpi_cstate; struct acpi_ctx; struct acpi_gen_regaddr; struct acpi_gpio; @@ -87,6 +89,53 @@ enum psd_coord { HW_ALL = 0xfe }; +/** + * enum csd_coord - Coordination types for C-states + * + * The type of coordination that exists (hardware) or is required (software) as + * a result of the underlying hardware dependency + */ +enum csd_coord { + CSD_HW_ALL = 0xfe, +}; + +/** + * struct acpi_cstate - Information about a C-State + * + * @ctype: C State type (1=C1, 2=C2, 3=C3) + * @latency: Worst-case latency to enter and exit the C State (in uS) + * @power: Average power consumption of the processor when in this C-State (mW) + * @resource: Register to read to place the processor in this state + */ +struct acpi_cstate { + uint ctype; + uint latency; + uint power; + struct acpi_gen_regaddr resource; +}; + +/** + * struct acpi_tstate - Information about a Throttling Supported State + * + * See ACPI v6.3 section 8.4.5.2: _TSS (Throttling Supported States) + * + * @percent: Percent of the core CPU operating frequency that will be + * available when this throttling state is invoked + * @power: Throttling state’s maximum power dissipation (mw) + * @latency: Worst-case latency (uS) that the CPU is unavailable during a + * transition from any throttling state to this throttling state + * @control: Value to be written to the Processor Control Register + * (THROTTLE_CTRL) to initiate a transition to this throttling state + * @status: Value in THROTTLE_STATUS when in this state + */ +struct acpi_tstate { + uint percent; + uint power; + uint latency; + uint control; + uint status; +}; + /** * acpigen_get_current() - Get the current ACPI code output pointer * @@ -816,4 +865,117 @@ void acpigen_write_processor_package(struct acpi_ctx *ctx, const char *name, */ void acpigen_write_processor_cnot(struct acpi_ctx *ctx, const uint num_cores); +/** + * acpigen_write_ppc() - generates a function returning max P-states + * + * @ctx: ACPI context pointer + * @num_pstates: Number of pstates to return + */ +void acpigen_write_ppc(struct acpi_ctx *ctx, uint num_pstates); + +/** + * acpigen_write_ppc() - generates a function returning PPCM + * + * This returns the maximum number of supported P-states, as saved in the + * variable PPCM + * + * @ctx: ACPI context pointer + */ +void acpigen_write_ppc_nvs(struct acpi_ctx *ctx); + +/** + * acpigen_write_tpc() - Write a _TPC method that returns the TPC limit + * + * @ctx: ACPI context pointer + * @gnvs_tpc_limit: Variable that holds the TPC limit + */ +void acpigen_write_tpc(struct acpi_ctx *ctx, const char *gnvs_tpc_limit); + +/** + * acpigen_write_pss_package() - Write a PSS package + * + * See ACPI v6.3 section 8.4.6: Processor Performance Control + * + * @ctx: ACPI context pointer + * @corefreq: CPU core frequency in MHz + * @translat: worst-case latency in uS that the CPU is unavailable during a + * transition from any performance state to this performance state + * @busmlat: worst-case latency in microseconds that Bus Masters are prevented + * from accessing memory during a transition from any performance state to + * this performance state + * @control: Value to write to PERF_CTRL to move to this performance state + * @status: Expected PERF_STATUS value when in this state + */ +void acpigen_write_pss_package(struct acpi_ctx *ctx, uint corefreq, uint power, + uint translat, uint busmlat, uint control, + uint status); + +/** + * acpigen_write_psd_package() - Write a PSD package + * + * Writes a P-State dependency package + * + * See ACPI v6.3 section 8.4.6.5: _PSD (P-State Dependency) + * + * @ctx: ACPI context pointer + * @domain: Dependency domain number to which this P state entry belongs + * @numprocs: Number of processors belonging to the domain for this logical + * processor’s P-states + * @coordtype: Coordination type + */ +void acpigen_write_psd_package(struct acpi_ctx *ctx, uint domain, uint numprocs, + enum psd_coord coordtype); + +/** + * acpigen_write_cst_package() - Write a _CST package + * + * See ACPI v6.3 section 8.4.2.1: _CST (C States) + * + * @ctx: ACPI context pointer + * @entry: Array of entries + * @nentries; Number of entries + */ +void acpigen_write_cst_package(struct acpi_ctx *ctx, + const struct acpi_cstate *entry, int nentries); + +/** + * acpigen_write_csd_package() - Write a _CSD Package + * + * See ACPI v6.3 section 8.4.2.2: _CSD (C-State Dependency) + * + * @ctx: ACPI context pointer + * @domain: dependency domain number to which this C state entry belongs + * @numprocs: number of processors belonging to the domain for the particular + * C-state + * @coordtype: Co-ordination type + * @index: Index of the C-State entry in the _CST object for which the + * dependency applies + */ +void acpigen_write_csd_package(struct acpi_ctx *ctx, uint domain, uint numprocs, + enum csd_coord coordtype, uint index); + +/** + * acpigen_write_tss_package() - Write a _TSS package + * + * @ctx: ACPI context pointer + * @entry: Entries to write + * @nentries: Number of entries to write + */ +void acpigen_write_tss_package(struct acpi_ctx *ctx, + struct acpi_tstate *entry, int nentries); + +/** + * acpigen_write_tsd_package() - Write a _TSD package + * + * See ACPI v6.3 section 8.4.5.4: _TSD (T-State Dependency) + * + * @ctx: ACPI context pointer + * @domain: dependency domain number to which this T state entry belongs + * @numprocs: Number of processors belonging to the domain for this logical + * processor’s T-states + * @coordtype: Coordination type + */ +void acpigen_write_tsd_package(struct acpi_ctx *ctx, uint domain, uint numprocs, + enum psd_coord coordtype); + #endif diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c index b9985075cde..e395226e3de 100644 --- a/lib/acpi/acpigen.c +++ b/lib/acpi/acpigen.c @@ -481,6 +481,53 @@ void acpigen_write_register_resource(struct acpi_ctx *ctx, acpigen_write_resourcetemplate_footer(ctx); } +void acpigen_write_ppc(struct acpi_ctx *ctx, uint num_pstates) +{ + /* + * Method (_PPC, 0, NotSerialized) + * { + * Return (num_pstates) + * } + */ + acpigen_write_method(ctx, "_PPC", 0); + acpigen_emit_byte(ctx, RETURN_OP); + acpigen_write_byte(ctx, num_pstates); + acpigen_pop_len(ctx); +} + +/* + * Generates a func with max supported P-states saved + * in the variable PPCM. + */ +void acpigen_write_ppc_nvs(struct acpi_ctx *ctx) +{ + /* + * Method (_PPC, 0, NotSerialized) + * { + * Return (PPCM) + * } + */ + acpigen_write_method(ctx, "_PPC", 0); + acpigen_emit_byte(ctx, RETURN_OP); + acpigen_emit_namestring(ctx, "PPCM"); + acpigen_pop_len(ctx); +} + +void acpigen_write_tpc(struct acpi_ctx *ctx, const char *gnvs_tpc_limit) +{ + /* + * // Sample _TPC method + * Method (_TPC, 0, NotSerialized) + * { + * Return (\TLVL) + * } + */ + acpigen_write_method(ctx, "_TPC", 0); + acpigen_emit_byte(ctx, RETURN_OP); + acpigen_emit_namestring(ctx, gnvs_tpc_limit); + acpigen_pop_len(ctx); +} + void acpigen_write_prw(struct acpi_ctx *ctx, uint wake, uint level) { /* Name (_PRW, Package () { wake, level } */ @@ -491,6 +538,126 @@ void acpigen_write_prw(struct acpi_ctx *ctx, uint wake, uint level) acpigen_pop_len(ctx); } +void acpigen_write_pss_package(struct acpi_ctx *ctx, u32 core_freq, u32 power, + u32 trans_lat, u32 busm_lat, u32 control, + u32 status) +{ + acpigen_write_package(ctx, 6); + acpigen_write_dword(ctx, core_freq); + acpigen_write_dword(ctx, power); + acpigen_write_dword(ctx, trans_lat); + acpigen_write_dword(ctx, busm_lat); + acpigen_write_dword(ctx, control); + acpigen_write_dword(ctx, status); + acpigen_pop_len(ctx); + + log_debug("PSS: %uMHz power %u control 0x%x status 0x%x\n", + core_freq, power, control, status); +} + +void acpigen_write_psd_package(struct acpi_ctx *ctx, uint domain, uint numprocs, + enum psd_coord coordtype) +{ + acpigen_write_name(ctx, "_PSD"); + acpigen_write_package(ctx, 1); + acpigen_write_package(ctx, 5); + acpigen_write_byte(ctx, 5); // 5 values + acpigen_write_byte(ctx, 0); // revision 0 + acpigen_write_dword(ctx, domain); + acpigen_write_dword(ctx, coordtype); + acpigen_write_dword(ctx, numprocs); + acpigen_pop_len(ctx); + acpigen_pop_len(ctx); +} + +static void acpigen_write_cst_package_entry(struct acpi_ctx *ctx, + const struct acpi_cstate *cstate) +{ + acpigen_write_package(ctx, 4); + acpigen_write_register_resource(ctx, &cstate->resource); + acpigen_write_dword(ctx, cstate->ctype); + acpigen_write_dword(ctx, cstate->latency); + acpigen_write_dword(ctx, cstate->power); + acpigen_pop_len(ctx); +} + +void acpigen_write_cst_package(struct acpi_ctx *ctx, + const struct acpi_cstate *cstate, int nentries) +{ + int i; + + acpigen_write_name(ctx, "_CST"); + acpigen_write_package(ctx, nentries + 1); + acpigen_write_dword(ctx, nentries); + + for (i = 0; i < nentries; i++) + acpigen_write_cst_package_entry(ctx, cstate + i); + + acpigen_pop_len(ctx); +} + +void acpigen_write_csd_package(struct acpi_ctx *ctx, uint domain, uint numprocs, + enum csd_coord coordtype, uint index) +{ + acpigen_write_name(ctx, "_CSD"); + acpigen_write_package(ctx, 1); + acpigen_write_package(ctx, 6); + acpigen_write_byte(ctx, 6); // 6 values + acpigen_write_byte(ctx, 0); // revision 0 + acpigen_write_dword(ctx, domain); + acpigen_write_dword(ctx, coordtype); + acpigen_write_dword(ctx, numprocs); + acpigen_write_dword(ctx, index); + acpigen_pop_len(ctx); + acpigen_pop_len(ctx); +} + +void acpigen_write_tss_package(struct acpi_ctx *ctx, + struct acpi_tstate *entry, int nentries) +{ + /* + * Sample _TSS package with 100% and 50% duty cycles + * Name (_TSS, Package (0x02) + * { + * Package(){100, 1000, 0, 0x00, 0) + * Package(){50, 520, 0, 0x18, 0) + * }) + */ + struct acpi_tstate *tstate = entry; + int i; + + acpigen_write_name(ctx, "_TSS"); + acpigen_write_package(ctx, nentries); + + for (i = 0; i < nentries; i++) { + acpigen_write_package(ctx, 5); + acpigen_write_dword(ctx, tstate->percent); + acpigen_write_dword(ctx, tstate->power); + acpigen_write_dword(ctx, tstate->latency); + acpigen_write_dword(ctx, tstate->control); + acpigen_write_dword(ctx, tstate->status); + acpigen_pop_len(ctx); + tstate++; + } + + acpigen_pop_len(ctx); +} + +void acpigen_write_tsd_package(struct acpi_ctx *ctx, u32 domain, u32 numprocs, + enum psd_coord coordtype) +{ + acpigen_write_name(ctx, "_TSD"); + acpigen_write_package(ctx, 1); + acpigen_write_package(ctx, 5); + acpigen_write_byte(ctx, 5); // 5 values + acpigen_write_byte(ctx, 0); // revision 0 + acpigen_write_dword(ctx, domain); + acpigen_write_dword(ctx, coordtype); + acpigen_write_dword(ctx, numprocs); + acpigen_pop_len(ctx); + acpigen_pop_len(ctx); +} + /* * ToUUID(uuid) * diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c index 74b7e23aab3..3ec2743af9f 100644 --- a/test/dm/acpigen.c +++ b/test/dm/acpigen.c @@ -1450,3 +1450,297 @@ static int dm_test_acpi_write_processor_cnot(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_acpi_write_processor_cnot, 0); + +/* Test acpigen_write_tpc */ +static int dm_test_acpi_write_tpc(struct unit_test_state *uts) +{ + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_tpc(ctx, "\\TLVL"); + + ut_asserteq(METHOD_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq_strn("_TPC", (char *)ptr); + ptr += 4; + ut_asserteq(0, *ptr++); + ut_asserteq(RETURN_OP, *ptr++); + ut_asserteq_strn("\\TLVL", (char *)ptr); + ptr += 5; + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_tpc, 0); + +/* Test acpigen_write_pss_package(), etc. */ +static int dm_test_acpi_write_pss_psd(struct unit_test_state *uts) +{ + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_pss_package(ctx, 1, 2, 3, 4, 5, 6); + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(6, *ptr++); + + ut_asserteq(DWORD_PREFIX, *ptr++); + ut_asserteq(1, get_unaligned((u32 *)ptr)); + ptr += 5; + + ut_asserteq(2, get_unaligned((u32 *)ptr)); + ptr += 5; + + ut_asserteq(3, get_unaligned((u32 *)ptr)); + ptr += 5; + + ut_asserteq(4, get_unaligned((u32 *)ptr)); + ptr += 5; + + ut_asserteq(5, get_unaligned((u32 *)ptr)); + ptr += 5; + + ut_asserteq(6, get_unaligned((u32 *)ptr)); + ptr += 4; + + acpigen_write_psd_package(ctx, 6, 7, HW_ALL); + ut_asserteq(NAME_OP, *ptr++); + ut_asserteq_strn("_PSD", (char *)ptr); + ptr += 4; + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(1, *ptr++); + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(5, *ptr++); + + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(5, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(0, *ptr++); + + ut_asserteq(DWORD_PREFIX, *ptr++); + ut_asserteq(6, get_unaligned((u32 *)ptr)); + ptr += 5; + + ut_asserteq(HW_ALL, get_unaligned((u32 *)ptr)); + ptr += 5; + + ut_asserteq(7, get_unaligned((u32 *)ptr)); + ptr += 4; + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_pss_psd, 0); + +/* Test acpi_write_cst_package() */ +static int dm_test_acpi_write_cst(struct unit_test_state *uts) +{ + static struct acpi_cstate cstate_map[] = { + { + /* C1 */ + .ctype = 1, /* ACPI C1 */ + .latency = 1, + .power = 1000, + .resource = { + .space_id = ACPI_ADDRESS_SPACE_FIXED, + }, + }, { + .ctype = 2, /* ACPI C2 */ + .latency = 50, + .power = 10, + .resource = { + .space_id = ACPI_ADDRESS_SPACE_IO, + .bit_width = 8, + .addrl = 0x415, + }, + }, + }; + int nentries = ARRAY_SIZE(cstate_map); + struct acpi_ctx *ctx; + u8 *ptr; + int i; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_cst_package(ctx, cstate_map, nentries); + + ut_asserteq(NAME_OP, *ptr++); + ut_asserteq_strn("_CST", (char *)ptr); + ptr += 4; + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(nentries + 1, *ptr++); + ut_asserteq(DWORD_PREFIX, *ptr++); + ut_asserteq(nentries, get_unaligned((u32 *)ptr)); + ptr += 4; + + for (i = 0; i < nentries; i++) { + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(4, *ptr++); + ut_asserteq(BUFFER_OP, *ptr++); + ptr += 0x17; + ut_asserteq(DWORD_PREFIX, *ptr++); + ut_asserteq(cstate_map[i].ctype, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(cstate_map[i].latency, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(cstate_map[i].power, get_unaligned((u32 *)ptr)); + ptr += 4; + } + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_cst, 0); + +/* Test acpi_write_cst_package() */ +static int dm_test_acpi_write_csd(struct unit_test_state *uts) +{ + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_csd_package(ctx, 12, 34, CSD_HW_ALL, 56); + + ut_asserteq(NAME_OP, *ptr++); + ut_asserteq_strn("_CSD", (char *)ptr); + ptr += 4; + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(1, *ptr++); + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(6, *ptr++); + + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(6, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(0, *ptr++); + ut_asserteq(DWORD_PREFIX, *ptr++); + ut_asserteq(12, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(CSD_HW_ALL, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(34, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(56, get_unaligned((u32 *)ptr)); + ptr += 4; + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_csd, 0); + +/* Test acpigen_write_tss_package() */ +static int dm_test_acpi_write_tss(struct unit_test_state *uts) +{ + static struct acpi_tstate tstate_list[] = { + { 1, 2, 3, 4, 5, }, + { 6, 7, 8, 9, 10, }, + }; + int nentries = ARRAY_SIZE(tstate_list); + struct acpi_ctx *ctx; + u8 *ptr; + int i; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_tss_package(ctx, tstate_list, nentries); + + ut_asserteq(NAME_OP, *ptr++); + ut_asserteq_strn("_TSS", (char *)ptr); + ptr += 4; + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(nentries, *ptr++); + + for (i = 0; i < nentries; i++) { + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(5, *ptr++); + ut_asserteq(DWORD_PREFIX, *ptr++); + ut_asserteq(tstate_list[i].percent, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(tstate_list[i].power, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(tstate_list[i].latency, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(tstate_list[i].control, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(tstate_list[i].status, get_unaligned((u32 *)ptr)); + ptr += 4; + } + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_tss, 0); + +/* Test acpigen_write_tsd_package() */ +static int dm_test_acpi_write_tsd_package(struct unit_test_state *uts) +{ + struct acpi_ctx *ctx; + u8 *ptr; + + ut_assertok(alloc_context(&ctx)); + + ptr = acpigen_get_current(ctx); + acpigen_write_tsd_package(ctx, 12, 34, HW_ALL); + + ut_asserteq(NAME_OP, *ptr++); + ut_asserteq_strn("_TSD", (char *)ptr); + ptr += 4; + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(1, *ptr++); + ut_asserteq(PACKAGE_OP, *ptr++); + ptr += 3; /* skip length */ + ut_asserteq(5, *ptr++); + + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(5, *ptr++); + ut_asserteq(BYTE_PREFIX, *ptr++); + ut_asserteq(0, *ptr++); + ut_asserteq(DWORD_PREFIX, *ptr++); + ut_asserteq(12, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(CSD_HW_ALL, get_unaligned((u32 *)ptr)); + ptr += 5; + ut_asserteq(34, get_unaligned((u32 *)ptr)); + ptr += 4; + + ut_asserteq_ptr(ptr, ctx->current); + + free_context(&ctx); + + return 0; +} +DM_TEST(dm_test_acpi_write_tsd_package, 0); -- cgit v1.3.1 From 540f0bae9bd0e19d00d11796a62a08f94d895189 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:16 -0600 Subject: x86: acpi: Add support for additional Intel tables Apollo Lake needs to generate a few more table types used on Intel SoCs. Add support for these into the x86 ACPI code. Signed-off-by: Simon Glass --- arch/x86/include/asm/acpi_table.h | 115 ++++++++++++++++++++++++++++++++++++++ arch/x86/lib/acpi_table.c | 111 ++++++++++++++++++++++++++++++++++++ include/acpi/acpi_table.h | 43 ++++++++++++++ 3 files changed, 269 insertions(+) (limited to 'include') diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index 3245e447813..faf31730730 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -98,4 +98,119 @@ int arch_write_sci_irq_select(uint scis); */ int arch_madt_sci_irq_polarity(int sci); +/** + * acpi_create_dmar_drhd() - Create a table for DMA remapping with the IOMMU + * + * See here for the specification + * https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf + * + * @ctx: ACPI context pointer + * @flags: (DRHD_INCLUDE_...) + * @segment: PCI segment asscociated with this unit + * @bar: Base address of remapping hardware register-set for this unit + */ +void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment, + u64 bar); + +/** + * acpi_create_dmar_rmrr() - Set up an RMRR + * + * This sets up a Reserved-Memory Region Reporting structure, used to allow + * DMA to regions used by devices that the BIOS controls. + * + * @ctx: ACPI context pointer + * @segment: PCI segment asscociated with this unit + * @bar: Base address of mapping + * @limit: End address of mapping + */ +void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar, + u64 limit); + +/** + * acpi_dmar_drhd_fixup() - Set the length of an DRHD + * + * This sets the DRHD length field based on the current ctx->current + * + * @ctx: ACPI context pointer + * @base: Address of the start of the DRHD + */ +void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base); + +/** + * acpi_dmar_rmrr_fixup() - Set the length of an RMRR + * + * This sets the RMRR length field based on the current ctx->current + * + * @ctx: ACPI context pointer + * @base: Address of the start of the RMRR + */ +void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base); + +/** + * acpi_create_dmar_ds_pci() - Set up a DMAR scope for a PCI device + * + * @ctx: ACPI context pointer + * @bdf: PCI device to add + * @return length of mapping in bytes + */ +int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf); + +/** + * acpi_create_dmar_ds_pci_br() - Set up a DMAR scope for a PCI bridge + * + * This is used to provide a mapping for a PCI bridge + * + * @ctx: ACPI context pointer + * @bdf: PCI device to add + * @return length of mapping in bytes + */ +int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf); + +/** + * acpi_create_dmar_ds_ioapic() - Set up a DMAR scope for an IOAPIC device + * + * @ctx: ACPI context pointer + * @enumeration_id: Enumeration ID (typically 2) + * @bdf: PCI device to add + * @return length of mapping in bytes + */ +int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id, + pci_dev_t bdf); + +/** + * acpi_create_dmar_ds_msi_hpet() - Set up a DMAR scope for an HPET + * + * Sets up a scope for a High-Precision Event Timer that supports + * Message-Signalled Interrupts + * + * @ctx: ACPI context pointer + * @enumeration_id: Enumeration ID (typically 0) + * @bdf: PCI device to add + * @return length of mapping in bytes + */ +int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id, + pci_dev_t bdf); + +/** + * acpi_fadt_common() - Handle common parts of filling out an FADT + * + * This sets up the Fixed ACPI Description Table + * + * @fadt: Pointer to place to put FADT + * @facs: Pointer to the FACS + * @dsdt: Pointer to the DSDT + */ +void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs, + void *dsdt); + +/** + * intel_acpi_fill_fadt() - Set up the contents of the FADT + * + * This sets up parts of the Fixed ACPI Description Table that are common to + * Intel chips + * + * @fadt: Pointer to place to put FADT + */ +void intel_acpi_fill_fadt(struct acpi_fadt *fadt); + #endif /* __ASM_ACPI_TABLE_H__ */ diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index e257c789838..86a9a35cb25 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -629,3 +629,114 @@ int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev, return 0; } + +void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs, + void *dsdt) +{ + struct acpi_table_header *header = &fadt->header; + + memset((void *)fadt, '\0', sizeof(struct acpi_fadt)); + + acpi_fill_header(header, "FACP"); + header->length = sizeof(struct acpi_fadt); + header->revision = 4; + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, OEM_TABLE_ID, 8); + memcpy(header->aslc_id, ASLC_ID, 4); + header->aslc_revision = 1; + + fadt->firmware_ctrl = (unsigned long)facs; + fadt->dsdt = (unsigned long)dsdt; + + fadt->x_firmware_ctl_l = (unsigned long)facs; + fadt->x_firmware_ctl_h = 0; + fadt->x_dsdt_l = (unsigned long)dsdt; + fadt->x_dsdt_h = 0; + + fadt->preferred_pm_profile = ACPI_PM_MOBILE; + + /* Use ACPI 3.0 revision */ + fadt->header.revision = 4; +} + +void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment, + u64 bar) +{ + struct dmar_entry *drhd = ctx->current; + + memset(drhd, '\0', sizeof(*drhd)); + drhd->type = DMAR_DRHD; + drhd->length = sizeof(*drhd); /* will be fixed up later */ + drhd->flags = flags; + drhd->segment = segment; + drhd->bar = bar; + acpi_inc(ctx, drhd->length); +} + +void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar, + u64 limit) +{ + struct dmar_rmrr_entry *rmrr = ctx->current; + + memset(rmrr, '\0', sizeof(*rmrr)); + rmrr->type = DMAR_RMRR; + rmrr->length = sizeof(*rmrr); /* will be fixed up later */ + rmrr->segment = segment; + rmrr->bar = bar; + rmrr->limit = limit; + acpi_inc(ctx, rmrr->length); +} + +void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base) +{ + struct dmar_entry *drhd = base; + + drhd->length = ctx->current - base; +} + +void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base) +{ + struct dmar_rmrr_entry *rmrr = base; + + rmrr->length = ctx->current - base; +} + +static int acpi_create_dmar_ds(struct acpi_ctx *ctx, enum dev_scope_type type, + uint enumeration_id, pci_dev_t bdf) +{ + /* we don't support longer paths yet */ + const size_t dev_scope_length = sizeof(struct dev_scope) + 2; + struct dev_scope *ds = ctx->current; + + memset(ds, '\0', dev_scope_length); + ds->type = type; + ds->length = dev_scope_length; + ds->enumeration = enumeration_id; + ds->start_bus = PCI_BUS(bdf); + ds->path[0].dev = PCI_DEV(bdf); + ds->path[0].fn = PCI_FUNC(bdf); + + return ds->length; +} + +int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf) +{ + return acpi_create_dmar_ds(ctx, SCOPE_PCI_SUB, 0, bdf); +} + +int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf) +{ + return acpi_create_dmar_ds(ctx, SCOPE_PCI_ENDPOINT, 0, bdf); +} + +int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id, + pci_dev_t bdf) +{ + return acpi_create_dmar_ds(ctx, SCOPE_IOAPIC, enumeration_id, bdf); +} + +int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id, + pci_dev_t bdf) +{ + return acpi_create_dmar_ds(ctx, SCOPE_MSI_HPET, enumeration_id, bdf); +} diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index c826a797f5b..a2e510cf56e 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -377,6 +377,49 @@ struct acpi_csrt_shared_info { u32 max_block_size; }; +/* Port types for ACPI _UPC object */ +enum acpi_upc_type { + UPC_TYPE_A, + UPC_TYPE_MINI_AB, + UPC_TYPE_EXPRESSCARD, + UPC_TYPE_USB3_A, + UPC_TYPE_USB3_B, + UPC_TYPE_USB3_MICRO_B, + UPC_TYPE_USB3_MICRO_AB, + UPC_TYPE_USB3_POWER_B, + UPC_TYPE_C_USB2_ONLY, + UPC_TYPE_C_USB2_SS_SWITCH, + UPC_TYPE_C_USB2_SS, + UPC_TYPE_PROPRIETARY = 0xff, + /* + * The following types are not directly defined in the ACPI + * spec but are used by coreboot to identify a USB device type. + */ + UPC_TYPE_INTERNAL = 0xff, + UPC_TYPE_UNUSED, + UPC_TYPE_HUB +}; + +enum dev_scope_type { + SCOPE_PCI_ENDPOINT = 1, + SCOPE_PCI_SUB = 2, + SCOPE_IOAPIC = 3, + SCOPE_MSI_HPET = 4, + SCOPE_ACPI_NAMESPACE_DEVICE = 5 +}; + +struct __packed dev_scope { + u8 type; + u8 length; + u8 reserved[2]; + u8 enumeration; + u8 start_bus; + struct { + u8 dev; + u8 fn; + } __packed path[0]; +}; + enum dmar_type { DMAR_DRHD = 0, DMAR_RMRR = 1, -- cgit v1.3.1 From 022256b95b134dc62317d4aba11510add00a0c28 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:18 -0600 Subject: p2sb: Add some definitions used for ACPI Allow this header to be included in ASL files by adding a header guard and a few definitions that are needed. Signed-off-by: Simon Glass --- include/p2sb.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/p2sb.h b/include/p2sb.h index 93e1155dca6..a25170e3d11 100644 --- a/include/p2sb.h +++ b/include/p2sb.h @@ -10,6 +10,12 @@ /* Port Id lives in bits 23:16 and register offset lives in 15:0 of address */ #define PCR_PORTID_SHIFT 16 +#if !defined(__ACPI__) + +/* These registers contain IOAPIC and HPET devfn */ +#define PCH_P2SB_IBDF 0x6c +#define PCH_P2SB_HBDF 0x70 + /** * struct p2sb_child_platdata - Information about each child of a p2sb device * @@ -164,4 +170,6 @@ int p2sb_get_port_id(struct udevice *dev); */ void *pcr_reg_address(struct udevice *dev, uint offset); +#endif /* !__ACPI__ */ + #endif -- cgit v1.3.1 From da2c1b8fd9db6ffa6a8de6d11380a90feea725b4 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:19 -0600 Subject: x86: apl: Generate required ACPI tables Add support for generating various ACPI tables for Apollo Lake. Add a few S3 definitions that are needed. Signed-off-by: Simon Glass --- arch/x86/cpu/apollolake/Makefile | 1 + arch/x86/cpu/apollolake/acpi.c | 211 ++++++++++++++++++++++++++++ arch/x86/include/asm/arch-apollolake/acpi.h | 18 +++ include/acpi/acpi_s3.h | 4 + 4 files changed, 234 insertions(+) create mode 100644 arch/x86/cpu/apollolake/acpi.c create mode 100644 arch/x86/include/asm/arch-apollolake/acpi.h (limited to 'include') diff --git a/arch/x86/cpu/apollolake/Makefile b/arch/x86/cpu/apollolake/Makefile index 3aa2a556765..2ddf4af62c5 100644 --- a/arch/x86/cpu/apollolake/Makefile +++ b/arch/x86/cpu/apollolake/Makefile @@ -16,6 +16,7 @@ obj-y += fsp_m.o endif endif ifndef CONFIG_SPL_BUILD +obj-y += acpi.o obj-y += fsp_s.o endif diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c new file mode 100644 index 00000000000..69b544f0d98 --- /dev/null +++ b/arch/x86/cpu/apollolake/acpi.c @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Intel Corp. + * Copyright (C) 2017-2019 Siemens AG + * (Written by Lance Zhao for Intel Corp.) + * Copyright 2019 Google LLC + * + * Modified from coreboot apollolake/acpi.c + */ + +#define LOG_CATEGORY LOGC_ACPI + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int arch_read_sci_irq_select(void) +{ + struct acpi_pmc_upriv *upriv; + struct udevice *dev; + int ret; + + ret = uclass_first_device_err(UCLASS_ACPI_PMC, &dev); + if (ret) + return log_msg_ret("pmc", ret); + upriv = dev_get_uclass_priv(dev); + + return readl(upriv->pmc_bar0 + IRQ_REG); +} + +int arch_write_sci_irq_select(uint scis) +{ + struct acpi_pmc_upriv *upriv; + struct udevice *dev; + int ret; + + ret = uclass_first_device_err(UCLASS_ACPI_PMC, &dev); + if (ret) + return log_msg_ret("pmc", ret); + upriv = dev_get_uclass_priv(dev); + writel(scis, upriv->pmc_bar0 + IRQ_REG); + + return 0; +} + +int acpi_create_gnvs(struct acpi_global_nvs *gnvs) +{ + struct udevice *cpu; + int ret; + + /* Clear out GNV */ + memset(gnvs, '\0', sizeof(*gnvs)); + + /* TODO(sjg@chromium.org): Add the console log to gnvs->cbmc */ + +#ifdef CONFIG_CHROMEOS + /* Initialise Verified Boot data */ + chromeos_init_acpi(&gnvs->chromeos); + gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; +#endif + /* Set unknown wake source */ + gnvs->pm1i = ~0ULL; + + /* CPU core count */ + gnvs->pcnt = 1; + ret = uclass_find_first_device(UCLASS_CPU, &cpu); + if (cpu) { + ret = cpu_get_count(cpu); + if (ret > 0) + gnvs->pcnt = ret; + } + + return 0; +} + +uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en) +{ + /* + * WAK_STS bit is set when the system is in one of the sleep states + * (via the SLP_EN bit) and an enabled wake event occurs. Upon setting + * this bit, the PMC will transition the system to the ON state and + * can only be set by hardware and can only be cleared by writing a one + * to this bit position. + */ + generic_pm1_en |= WAK_STS | RTC_EN | PWRBTN_EN; + + return generic_pm1_en; +} + +int arch_madt_sci_irq_polarity(int sci) +{ + return MP_IRQ_POLARITY_LOW; +} + +void fill_fadt(struct acpi_fadt *fadt) +{ + fadt->pm_tmr_blk = IOMAP_ACPI_BASE + PM1_TMR; + + fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; + fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; + + fadt->pm_tmr_len = 4; + fadt->duty_width = 3; + + fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; + + fadt->x_pm_tmr_blk.space_id = 1; + fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; + fadt->x_pm_tmr_blk.addrl = IOMAP_ACPI_BASE + PM1_TMR; +} + +void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, + void *dsdt) +{ + struct acpi_table_header *header = &fadt->header; + + acpi_fadt_common(fadt, facs, dsdt); + intel_acpi_fill_fadt(fadt); + fill_fadt(fadt); + header->checksum = table_compute_checksum(fadt, header->length); +} + +int apl_acpi_fill_dmar(struct acpi_ctx *ctx) +{ + struct udevice *dev, *sa_dev; + u64 gfxvtbar = readq(MCHBAR_REG(GFXVTBAR)) & VTBAR_MASK; + u64 defvtbar = readq(MCHBAR_REG(DEFVTBAR)) & VTBAR_MASK; + bool gfxvten = readl(MCHBAR_REG(GFXVTBAR)) & VTBAR_ENABLED; + bool defvten = readl(MCHBAR_REG(DEFVTBAR)) & VTBAR_ENABLED; + void *tmp; + int ret; + + uclass_find_first_device(UCLASS_VIDEO, &dev); + ret = uclass_first_device_err(UCLASS_NORTHBRIDGE, &sa_dev); + if (ret) + return log_msg_ret("no sa", ret); + + /* IGD has to be enabled, GFXVTBAR set and enabled */ + if (dev && device_active(dev) && gfxvtbar && gfxvten) { + tmp = ctx->current; + + acpi_create_dmar_drhd(ctx, 0, 0, gfxvtbar); + ret = acpi_create_dmar_ds_pci(ctx, PCI_BDF(0, 2, 0)); + if (ret) + return log_msg_ret("ds_pci", ret); + acpi_dmar_drhd_fixup(ctx, tmp); + + /* Add RMRR entry */ + tmp = ctx->current; + acpi_create_dmar_rmrr(ctx->current, 0, sa_get_gsm_base(sa_dev), + sa_get_tolud_base(sa_dev) - 1); + acpi_create_dmar_ds_pci(ctx->current, PCI_BDF(0, 2, 0)); + acpi_dmar_rmrr_fixup(ctx, tmp); + } + + /* DEFVTBAR has to be set and enabled */ + if (defvtbar && defvten) { + struct udevice *p2sb_dev; + u16 ibdf, hbdf; + uint ioapic, hpet; + int ret; + + tmp = ctx->current; + /* + * P2SB may already be hidden. There's no clear rule, when. + * It is needed to get bus, device and function for IOAPIC and + * HPET device which is stored in P2SB device. So unhide it to + * get the info and hide it again when done. + * + * TODO(sjg@chromium.org): p2sb_unhide() ? + */ + ret = uclass_first_device_err(UCLASS_P2SB, &p2sb_dev); + if (ret) + return log_msg_ret("p2sb", ret); + + dm_pci_read_config16(p2sb_dev, PCH_P2SB_IBDF, &ibdf); + ioapic = PCI_TO_BDF(ibdf); + dm_pci_read_config16(p2sb_dev, PCH_P2SB_HBDF, &hbdf); + hpet = PCI_TO_BDF(hbdf); + /* TODO(sjg@chromium.org): p2sb_hide() ? */ + + acpi_create_dmar_drhd(ctx, DRHD_INCLUDE_PCI_ALL, 0, defvtbar); + acpi_create_dmar_ds_ioapic(ctx, 2, ioapic); + acpi_create_dmar_ds_msi_hpet(ctx, 0, hpet); + acpi_dmar_drhd_fixup(tmp, ctx->current); + } + + return 0; +} diff --git a/arch/x86/include/asm/arch-apollolake/acpi.h b/arch/x86/include/asm/arch-apollolake/acpi.h new file mode 100644 index 00000000000..ed852feee03 --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/acpi.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2019 Google LLC + */ + +#ifndef _ASM_ARCH_ACPI_H +#define _ASM_ARCH_ACPI_H + +struct acpi_ctx; + +/** + * apl_acpi_fill_dmar() - Set up the DMAR for APL + * + * @ctx: ACPI context pointer + */ +int apl_acpi_fill_dmar(struct acpi_ctx *ctx); + +#endif /* _ASM_ARCH_CPU_H */ diff --git a/include/acpi/acpi_s3.h b/include/acpi/acpi_s3.h index baa848dcd15..847139baa0c 100644 --- a/include/acpi/acpi_s3.h +++ b/include/acpi/acpi_s3.h @@ -28,6 +28,10 @@ #define SLP_TYP_S4 6 #define SLP_TYP_S5 7 +/* PM1_STS register */ +#define RTC_EN BIT(10) +#define PWRBTN_EN BIT(8) + /* Memory size reserved for S3 resume */ #define S3_RESERVE_SIZE 0x1000 -- cgit v1.3.1 From 9179c3571ce587e96b957d0da8f0e4dcabc8d293 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:32 -0600 Subject: acpi: tpm: Add a TPM2 table This provides information about a v2 TPM in the system. Generate this table if the TPM is present. Signed-off-by: Simon Glass --- arch/x86/lib/acpi_table.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++ include/acpi/acpi_table.h | 11 +++++++ include/bloblist.h | 1 + 3 files changed, 86 insertions(+) (limited to 'include') diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 5876355afe2..c31cc923c9c 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -214,6 +215,64 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg) header->checksum = table_compute_checksum((void *)mcfg, header->length); } +static int get_tpm2_log(void **ptrp, int *sizep) +{ + const int tpm2_default_log_len = 0x10000; + int size; + int ret; + + *sizep = 0; + size = tpm2_default_log_len; + ret = bloblist_ensure_size_ret(BLOBLISTT_TPM2_TCG_LOG, &size, ptrp); + if (ret) + return log_msg_ret("blob", ret); + *sizep = size; + + return 0; +} + +static int acpi_create_tpm2(struct acpi_tpm2 *tpm2) +{ + struct acpi_table_header *header = &tpm2->header; + int tpm2_log_len; + void *lasa; + int ret; + + memset((void *)tpm2, 0, sizeof(struct acpi_tpm2)); + + /* + * Some payloads like SeaBIOS depend on log area to use TPM2. + * Get the memory size and address of TPM2 log area or initialize it. + */ + ret = get_tpm2_log(&lasa, &tpm2_log_len); + if (ret) + return ret; + + /* Fill out header fields. */ + acpi_fill_header(header, "TPM2"); + memcpy(header->aslc_id, ASLC_ID, 4); + + header->length = sizeof(struct acpi_tpm2); + header->revision = acpi_get_table_revision(ACPITAB_TPM2); + + /* Hard to detect for coreboot. Just set it to 0 */ + tpm2->platform_class = 0; + + /* Must be set to 0 for FIFO-interface support */ + tpm2->control_area = 0; + tpm2->start_method = 6; + memset(tpm2->msp, 0, sizeof(tpm2->msp)); + + /* Fill the log area size and start address fields. */ + tpm2->laml = tpm2_log_len; + tpm2->lasa = (uintptr_t)lasa; + + /* Calculate checksum. */ + header->checksum = table_compute_checksum((void *)tpm2, header->length); + + return 0; +} + __weak u32 acpi_fill_csrt(u32 current) { return 0; @@ -499,6 +558,21 @@ ulong write_acpi_tables(ulong start_addr) acpi_inc_align(ctx, mcfg->header.length); acpi_add_table(ctx, mcfg); + if (IS_ENABLED(CONFIG_TPM_V2)) { + struct acpi_tpm2 *tpm2; + int ret; + + debug("ACPI: * TPM2\n"); + tpm2 = (struct acpi_tpm2 *)ctx->current; + ret = acpi_create_tpm2(tpm2); + if (!ret) { + acpi_inc_align(ctx, tpm2->header.length); + acpi_add_table(ctx, tpm2); + } else { + log_warning("TPM2 table creation failed\n"); + } + } + debug("ACPI: * MADT\n"); madt = ctx->current; acpi_create_madt(madt); diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index a2e510cf56e..c7ee8b55da4 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -93,6 +93,17 @@ struct __packed acpi_hpet { u8 attributes; }; +struct __packed acpi_tpm2 { + struct acpi_table_header header; + u16 platform_class; + u8 reserved[2]; + u64 control_area; + u32 start_method; + u8 msp[12]; + u32 laml; + u64 lasa; +}; + /* FADT Preferred Power Management Profile */ enum acpi_pm_profile { ACPI_PM_UNSPECIFIED = 0, diff --git a/include/bloblist.h b/include/bloblist.h index 7d8480548e0..dc7d80bd851 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -33,6 +33,7 @@ enum bloblist_tag_t { */ BLOBLISTT_ACPI_GNVS, BLOBLISTT_INTEL_VBT, /* Intel Video-BIOS table */ + BLOBLISTT_TPM2_TCG_LOG, /* TPM v2 log space */ }; /** -- cgit v1.3.1 From 77bb1c69dfca24e4c14fd6876a68a38118142cae Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:33 -0600 Subject: acpi: tpm: Add a TPM1 table This provides information about a v1 TPM in the system. Generate this table if the TPM is present. Add a required new bloblist type and correct the header order of one header file. Signed-off-by: Simon Glass --- arch/x86/lib/acpi_table.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++- include/acpi/acpi_table.h | 7 ++++++ include/bloblist.h | 1 + 3 files changed, 61 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index c31cc923c9c..10cf3b70945 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -215,6 +215,47 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg) header->checksum = table_compute_checksum((void *)mcfg, header->length); } +/** + * acpi_create_tcpa() - Create a TCPA table + * + * @tcpa: Pointer to place to put table + * + * Trusted Computing Platform Alliance Capabilities Table + * TCPA PC Specific Implementation SpecificationTCPA is defined in the PCI + * Firmware Specification 3.0 + */ +static int acpi_create_tcpa(struct acpi_tcpa *tcpa) +{ + struct acpi_table_header *header = &tcpa->header; + u32 current = (u32)tcpa + sizeof(struct acpi_tcpa); + int size = 0x10000; /* Use this as the default size */ + void *log; + int ret; + + if (!CONFIG_IS_ENABLED(BLOBLIST)) + return -ENXIO; + memset(tcpa, '\0', sizeof(struct acpi_tcpa)); + + /* Fill out header fields */ + acpi_fill_header(header, "TCPA"); + header->length = sizeof(struct acpi_tcpa); + header->revision = 1; + + ret = bloblist_ensure_size_ret(BLOBLISTT_TCPA_LOG, &size, &log); + if (ret) + return log_msg_ret("blob", ret); + + tcpa->platform_class = 0; + tcpa->laml = size; + tcpa->lasa = (ulong)log; + + /* (Re)calculate length and checksum */ + header->length = current - (u32)tcpa; + header->checksum = table_compute_checksum((void *)tcpa, header->length); + + return 0; +} + static int get_tpm2_log(void **ptrp, int *sizep) { const int tpm2_default_log_len = 0x10000; @@ -457,11 +498,13 @@ ulong write_acpi_tables(ulong start_addr) struct acpi_fadt *fadt; struct acpi_table_header *ssdt; struct acpi_mcfg *mcfg; + struct acpi_tcpa *tcpa; struct acpi_madt *madt; struct acpi_csrt *csrt; struct acpi_spcr *spcr; void *start; ulong addr; + int ret; int i; start = map_sysmem(start_addr, 0); @@ -560,7 +603,6 @@ ulong write_acpi_tables(ulong start_addr) if (IS_ENABLED(CONFIG_TPM_V2)) { struct acpi_tpm2 *tpm2; - int ret; debug("ACPI: * TPM2\n"); tpm2 = (struct acpi_tpm2 *)ctx->current; @@ -579,6 +621,16 @@ ulong write_acpi_tables(ulong start_addr) acpi_inc_align(ctx, madt->header.length); acpi_add_table(ctx, madt); + debug("ACPI: * TCPA\n"); + tcpa = (struct acpi_tcpa *)ctx->current; + ret = acpi_create_tcpa(tcpa); + if (ret) { + log_warning("Failed to create TCPA table (err=%d)\n", ret); + } else { + acpi_inc_align(ctx, tcpa->header.length); + acpi_add_table(ctx, tcpa); + } + debug("ACPI: * CSRT\n"); csrt = ctx->current; if (!acpi_create_csrt(csrt)) { diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index c7ee8b55da4..9fba6536f50 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -104,6 +104,13 @@ struct __packed acpi_tpm2 { u64 lasa; }; +struct __packed acpi_tcpa { + struct acpi_table_header header; + u16 platform_class; + u32 laml; + u64 lasa; +}; + /* FADT Preferred Power Management Profile */ enum acpi_pm_profile { ACPI_PM_UNSPECIFIED = 0, diff --git a/include/bloblist.h b/include/bloblist.h index dc7d80bd851..5784c2226e7 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -34,6 +34,7 @@ enum bloblist_tag_t { BLOBLISTT_ACPI_GNVS, BLOBLISTT_INTEL_VBT, /* Intel Video-BIOS table */ BLOBLISTT_TPM2_TCG_LOG, /* TPM v2 log space */ + BLOBLISTT_TCPA_LOG, /* TPM log space */ }; /** -- cgit v1.3.1 From 2a2ebf880cae6d961b8259b7b767d0aa0d34f070 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:39 -0600 Subject: acpi: Use defines for field lengths A few fields have an open-coded length. Use the defines for this purpose instead. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/acpi/acpi_table.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index 9fba6536f50..3a243bf19ce 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -13,6 +13,7 @@ #ifndef __ACPI_TABLE_H__ #define __ACPI_TABLE_H__ +#include #include #define RSDP_SIG "RSD PTR " /* RSDP pointer signature */ @@ -48,7 +49,7 @@ struct acpi_rsdp { /* Generic ACPI header, provided by (almost) all tables */ struct __packed acpi_table_header { - char signature[4]; /* ACPI signature (4 ASCII characters) */ + char signature[ACPI_NAME_LEN]; /* ACPI signature (4 ASCII chars) */ u32 length; /* Table length in bytes (incl. header) */ u8 revision; /* Table version (not ACPI version!) */ volatile u8 checksum; /* To make sum of entire table == 0 */ @@ -263,7 +264,7 @@ struct __packed acpi_fadt { /* FACS (Firmware ACPI Control Structure) */ struct acpi_facs { - char signature[4]; /* "FACS" */ + char signature[ACPI_NAME_LEN]; /* "FACS" */ u32 length; /* Length in bytes (>= 64) */ u32 hardware_signature; /* Hardware signature */ u32 firmware_waking_vector; /* Firmware waking vector */ -- cgit v1.3.1 From ee3cb7c648988aa5f7ae0872ecfb6bdcfa9c6c76 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:41 -0600 Subject: x86: Move include of bitops out of ACPI region At present linux/bitops.h is included in ACPI code. This is not needed and can cause a problem in fls64.h since BITS_PER_LONG is not defined. Move the #include into the part not used by ACPI. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/acpi/acpi_table.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index 3a243bf19ce..abbca6530db 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -14,7 +14,6 @@ #define __ACPI_TABLE_H__ #include -#include #define RSDP_SIG "RSD PTR " /* RSDP pointer signature */ #define OEM_ID "U-BOOT" /* U-Boot */ @@ -29,6 +28,8 @@ #if !defined(__ACPI__) +#include + struct acpi_ctx; /* -- cgit v1.3.1 From 1e4073b8559615509af45f2f826d157c39841fd0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:43 -0600 Subject: acpi: Add more documentation for struct acpi_gpio Add some documentation provided by Andy Shevchenko to describe how to use struct acpi_gpio. Signed-off-by: Simon Glass --- include/acpi/acpi_device.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'include') diff --git a/include/acpi/acpi_device.h b/include/acpi/acpi_device.h index 1b838fcb857..007b7e7caf1 100644 --- a/include/acpi/acpi_device.h +++ b/include/acpi/acpi_device.h @@ -170,6 +170,28 @@ enum acpi_gpio_polarity { * @io_shared; true if GPIO is shared * @io_restrict: I/O restriction setting * @polarity: GPIO polarity + * + * Note that GpioIo doesn't have any means of Active Low / High setting, so a + * _DSD must be provided to mitigate this. + * + * GpioIo doesn't properly communicate the initial state of the output pin, + * thus Linux assumes the simple rule: + * + * Pull Bias Polarity Requested... + * + * Implicit x AS IS (assumed firmware configured for us) + * Explicit x (no _DSD) as Pull Bias (Up == High, Down == Low), + * assuming non-active (Polarity = !Pull Bias) + * + * Down Low as low, assuming active + * Down High as high, assuming non-active + * Up Low as high, assuming non-active + * Up High as high, assuming active + * + * GpioIo() can be used as interrupt and in this case the IoRestriction mustn't + * be OutputOnly. It also requires active_low flag from _DSD in cases where it's + * needed (better to always provide than rely on above assumption made on OS + * level). */ struct acpi_gpio { int pin_count; -- cgit v1.3.1 From 9c6aaf13473b611508e9bc3a5ab851255403c3bf Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 12:45:44 -0600 Subject: acpi: Use I2cSerialBusV2() instead of I2cSerialBus() Use the correct name of the ACPI structure being created. Signed-off-by: Simon Glass --- include/acpi/acpi_device.h | 2 +- lib/acpi/acpi_device.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/acpi/acpi_device.h b/include/acpi/acpi_device.h index 007b7e7caf1..ed4acd912a1 100644 --- a/include/acpi/acpi_device.h +++ b/include/acpi/acpi_device.h @@ -413,7 +413,7 @@ int acpi_device_write_dsm_i2c_hid(struct acpi_ctx *ctx, /** * acpi_device_write_i2c_dev() - Write an I2C device to ACPI * - * This creates a I2cSerialBus descriptor for an I2C device, including + * This creates a I2cSerialBusV2 descriptor for an I2C device, including * information ACPI needs to use it. * * @ctx: ACPI context pointer diff --git a/lib/acpi/acpi_device.c b/lib/acpi/acpi_device.c index 8248664a10a..95dfac583fc 100644 --- a/lib/acpi/acpi_device.c +++ b/lib/acpi/acpi_device.c @@ -530,7 +530,7 @@ int acpi_device_write_dsm_i2c_hid(struct acpi_ctx *ctx, return 0; } -/* ACPI 6.3 section 6.4.3.8.2.1 - I2cSerialBus() */ +/* ACPI 6.3 section 6.4.3.8.2.1 - I2cSerialBusV2() */ static void acpi_device_write_i2c(struct acpi_ctx *ctx, const struct acpi_i2c *i2c) { -- cgit v1.3.1 From 308b1a960e3173148a313dfab29a00349168eced Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 22 Sep 2020 21:16:40 -0600 Subject: x86: video: Show information about each video device At present the 'bdinfo' command shows the framebuffer address, but not the address of the copy framebuffer, if present. Add support for this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- cmd/bdinfo.c | 32 +++++++++++++++++++++++++++++++- include/video.h | 6 ++---- 2 files changed, 33 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index 0229846d3ea..8d8daa6336a 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -8,9 +8,11 @@ #include #include +#include #include #include #include +#include #include #include @@ -34,6 +36,12 @@ static void print_eth(int idx) printf("%-12s= %s\n", name, val); } +static void print_phys_addr(const char *name, phys_addr_t value) +{ + printf("%-12s= 0x%.*llx\n", name, 2 * (int)sizeof(ulong), + (unsigned long long)value); +} + void bdinfo_print_mhz(const char *name, unsigned long hz) { char buf[32]; @@ -58,6 +66,26 @@ __weak void arch_print_bdinfo(void) { } +static void show_video_info(void) +{ + const struct udevice *dev; + struct uclass *uc; + + uclass_id_foreach_dev(UCLASS_VIDEO, dev, uc) { + printf("%-12s= %s %sactive\n", "Video", dev->name, + device_active(dev) ? "" : "in"); + if (device_active(dev)) { + struct video_priv *upriv = dev_get_uclass_priv(dev); + + print_phys_addr("FB base", (ulong)upriv->fb); + if (upriv->copy_fb) + print_phys_addr("FB copy", (ulong)upriv->copy_fb); + printf("%-12s= %dx%dx%d\n", "FB size", upriv->xsize, + upriv->ysize, 1 << upriv->bpix); + } + } +} + int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { struct bd_info *bd = gd->bd; @@ -86,7 +114,9 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) bdinfo_print_num("fdt_blob", (ulong)gd->fdt_blob); bdinfo_print_num("new_fdt", (ulong)gd->new_fdt); bdinfo_print_num("fdt_size", (ulong)gd->fdt_size); -#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO) + if (IS_ENABLED(CONFIG_DM_VIDEO)) + show_video_info(); +#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) bdinfo_print_num("FB base ", gd->fb_base); #endif #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) diff --git a/include/video.h b/include/video.h index 1a0ffd80379..9d09d2409af 100644 --- a/include/video.h +++ b/include/video.h @@ -13,8 +13,6 @@ #ifndef _VIDEO_H_ #define _VIDEO_H_ -#ifdef CONFIG_DM_VIDEO - #include struct udevice; @@ -140,6 +138,7 @@ struct video_ops { */ int video_reserve(ulong *addrp); +#ifdef CONFIG_DM_VIDEO /** * video_clear() - Clear a device's frame buffer to background color. * @@ -147,6 +146,7 @@ int video_reserve(ulong *addrp); * @return 0 */ int video_clear(struct udevice *dev); +#endif /* CONFIG_DM_VIDEO */ /** * video_sync() - Sync a device's frame buffer with its hardware @@ -243,8 +243,6 @@ static inline int video_sync_copy(struct udevice *dev, void *from, void *to) } #endif -#endif /* CONFIG_DM_VIDEO */ - #ifndef CONFIG_DM_VIDEO /* Video functions */ -- cgit v1.3.1