From ad6767b6e9744eb210e9dd815ee68ebdca15151f Mon Sep 17 00:00:00 2001 From: Qianyu Gong Date: Tue, 15 Mar 2016 16:35:57 +0800 Subject: armv8/ls1043a: Update env settings for booting kernel Signed-off-by: Gong Qianyu Reviewed-by: York Sun --- include/configs/ls1043a_common.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index ea25aadbb37..fd243b1c610 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -245,13 +245,13 @@ "ramdisk_size=0x2000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x61200000\0" \ - "kernel_load=0x807f0000\0" \ - "kernel_size=0x1000000\0" \ + "kernel_start=0x61100000\0" \ + "kernel_load=0xa0000000\0" \ + "kernel_size=0x2800000\0" \ "console=ttyAMA0,38400n8\0" #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ - "earlycon=uart8250,0x21c0500,115200" + "earlycon=uart8250,mmio,0x21c0500" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 10 -- cgit v1.3.1 From 3808190af0d753c152633736e953f7ffa3bbc1b2 Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:32 +0530 Subject: armv8: ls2080: Add SFP Configs for LS2080 In LS2080, SFP has version 3.4. It is in little endian. The base address is 0x01e80200. SFP is used in Secure Boot to read fuses. Signed-off-by: Aneesh Bansal Signed-off-by: Saksham Jain Reviewed-by: York Sun --- arch/arm/include/asm/arch-fsl-layerscape/config.h | 4 ++++ arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++ include/fsl_sfp.h | 3 ++- 3 files changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index bfaece2d677..35d59081a53 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -67,6 +67,10 @@ /* SMMU Defintions */ #define SMMU_BASE 0x05000000 /* GR0 Base */ +/* SFP */ +#define CONFIG_SYS_FSL_SFP_VER_3_4 +#define CONFIG_SYS_FSL_SFP_LE + /* Cache Coherent Interconnect */ #define CCI_MN_BASE 0x04000000 #define CCI_MN_RNF_NODEID_LIST 0x180 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 081519aef7e..6f1b1446492 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -73,6 +73,9 @@ #define AHCI_BASE_ADDR1 (CONFIG_SYS_IMMR + 0x02200000) #define AHCI_BASE_ADDR2 (CONFIG_SYS_IMMR + 0x02210000) +/* SFP */ +#define CONFIG_SYS_SFP_ADDR (CONFIG_SYS_IMMR + 0x00e80200) + /* PCIe */ #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) diff --git a/include/fsl_sfp.h b/include/fsl_sfp.h index 353a123ee55..2976a2cbef6 100644 --- a/include/fsl_sfp.h +++ b/include/fsl_sfp.h @@ -32,7 +32,8 @@ /* Number of SRKH registers */ #define NUM_SRKH_REGS 8 -#ifdef CONFIG_SYS_FSL_SFP_VER_3_2 +#if defined(CONFIG_SYS_FSL_SFP_VER_3_2) || \ + defined(CONFIG_SYS_FSL_SFP_VER_3_4) struct ccsr_sfp_regs { u32 ospr; /* 0x200 */ u32 ospr1; /* 0x204 */ -- cgit v1.3.1 From fd6dbc98a73207ff961f1f83ea833654d98354c3 Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:34 +0530 Subject: armv8: fsl-lsch3: Add new header for secure boot For secure boot, a header is used to identify key table, signature and image address. A new header structure is added for lsch3. Currently key extension (IE) feature is not supported. Single key feature is not supported. Keys must be in table format. Hence, SRK (key table) must be present. Max key number has increase from 4 to 8. The 8th key is irrevocable. A new barker Code is used. Signed-off-by: Aneesh Bansal Signed-off-by: Saksham Jain Reviewed-by: York Sun --- arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 +- arch/arm/include/asm/fsl_secure_boot.h | 4 ++ board/freescale/common/fsl_validate.c | 35 +++++++++++-- include/fsl_secboot_err.h | 3 ++ include/fsl_validate.h | 60 ++++++++++++++++++++--- 5 files changed, 91 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 00916f5c71b..cc25811fc1c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -79,7 +79,8 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE - +/* Secure Boot */ +#define CONFIG_ESBC_HDR_LS /* Cache Coherent Interconnect */ #define CCI_MN_BASE 0x04000000 diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index a32a1d72222..4eb3b156c8f 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -35,9 +35,13 @@ * The feature is only applicable in case of NOR boot and is * not applicable in case of RAMBOOT (NAND, SD, SPI). */ +#ifndef CONFIG_ESBC_HDR_LS +/* Current Key EXT feature not available in LS ESBC Header */ #define CONFIG_FSL_ISBC_KEY_EXT #endif +#endif + #ifdef CONFIG_LS1043A /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */ #define CONFIG_ESBC_ADDR_64BIT diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 8fd6dd63b1d..c12b9c927e4 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -35,7 +35,13 @@ static const u8 hash_identifier[] = { 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, }; static u8 hash_val[SHA256_BYTES]; + +#ifdef CONFIG_ESBC_HDR_LS +/* New Barker Code for LS ESBC Header */ +static const u8 barker_code[ESBC_BARKER_LEN] = { 0x12, 0x19, 0x20, 0x01 }; +#else static const u8 barker_code[ESBC_BARKER_LEN] = { 0x68, 0x39, 0x27, 0x81 }; +#endif void branch_to_self(void) __attribute__ ((noreturn)); @@ -157,10 +163,15 @@ static int get_ie_info_addr(u32 *ie_addr) /* This function checks srk_table_flag in header and set/reset srk_flag.*/ static u32 check_srk(struct fsl_secboot_img_priv *img) { +#ifdef CONFIG_ESBC_HDR_LS + /* In LS, No SRK Flag as SRK is always present*/ + return 1; +#else if (img->hdr.len_kr.srk_table_flag & SRK_FLAG) return 1; return 0; +#endif } /* This function returns ospr's key_revoc values.*/ @@ -223,6 +234,7 @@ static u32 read_validate_srk_tbl(struct fsl_secboot_img_priv *img) } #endif +#ifndef CONFIG_ESBC_HDR_LS static u32 read_validate_single_key(struct fsl_secboot_img_priv *img) { struct fsl_secboot_img_hdr *hdr = &img->hdr; @@ -238,6 +250,7 @@ static u32 read_validate_single_key(struct fsl_secboot_img_priv *img) return 0; } +#endif /* CONFIG_ESBC_HDR_LS */ #if defined(CONFIG_FSL_ISBC_KEY_EXT) static u32 read_validate_ie_tbl(struct fsl_secboot_img_priv *img) @@ -388,6 +401,7 @@ void fsl_secboot_handle_error(int error) case ERROR_ESBC_CLIENT_HEADER_SIG_KEY_MOD: case ERROR_ESBC_CLIENT_HEADER_SG_ESBC_EP: case ERROR_ESBC_CLIENT_HEADER_SG_ENTIRES_BAD: + case ERROR_KEY_TABLE_NOT_FOUND: #ifdef CONFIG_KEY_REVOCATION case ERROR_ESBC_CLIENT_HEADER_KEY_REVOKED: case ERROR_ESBC_CLIENT_HEADER_INVALID_SRK_NUM_ENTRY: @@ -536,11 +550,18 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img) if (!key_hash && check_ie(img)) key_hash = 1; #endif - if (!key_hash) +#ifndef CONFIG_ESBC_HDR_LS +/* No single key support in LS ESBC header */ + if (!key_hash) { ret = algo->hash_update(algo, ctx, img->img_key, img->hdr.key_len, 0); + key_hash = 1; + } +#endif if (ret) return ret; + if (!key_hash) + return ERROR_KEY_TABLE_NOT_FOUND; /* Update hash for actual Image */ ret = algo->hash_update(algo, ctx, @@ -626,8 +647,6 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) u8 *k, *s; u32 ret = 0; -#ifdef CONFIG_KEY_REVOCATION -#endif int key_found = 0; /* check barker code */ @@ -671,13 +690,17 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) key_found = 1; } #endif - +#ifndef CONFIG_ESBC_HDR_LS +/* Single Key Feature not available in LS ESBC Header */ if (key_found == 0) { ret = read_validate_single_key(img); if (ret != 0) return ret; key_found = 1; } +#endif + if (!key_found) + return ERROR_KEY_TABLE_NOT_FOUND; /* check signaure */ if (get_key_len(img) == 2 * hdr->sign_len) { @@ -691,10 +714,12 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) } memcpy(&img->img_sign, esbc + hdr->psign, hdr->sign_len); - +/* No SG support in LS-CH3 */ +#ifndef CONFIG_ESBC_HDR_LS /* No SG support */ if (hdr->sg_flag) return ERROR_ESBC_CLIENT_HEADER_SG; +#endif /* modulus most significant bit should be set */ k = (u8 *)&img->img_key; diff --git a/include/fsl_secboot_err.h b/include/fsl_secboot_err.h index afc50a80caf..95d890ba49a 100644 --- a/include/fsl_secboot_err.h +++ b/include/fsl_secboot_err.h @@ -29,6 +29,7 @@ #define ERROR_ESBC_CLIENT_HEADER_INV_IE_ENTRY_KEYLEN 0x18 #define ERROR_IE_TABLE_NOT_FOUND 0x19 #define ERROR_ESBC_CLIENT_HEADER_KEY_LEN_NOT_TWICE_SIG_LEN 0x20 +#define ERROR_KEY_TABLE_NOT_FOUND 0x21 #define ERROR_ESBC_CLIENT_HEADER_KEY_MOD_1 0x40 #define ERROR_ESBC_CLIENT_HEADER_KEY_MOD_2 0x80 #define ERROR_ESBC_CLIENT_HEADER_SIG_KEY_MOD 0x100 @@ -121,6 +122,8 @@ static const struct fsl_secboot_errcode fsl_secboot_errcodes[] = { "Wrong IE public key len in header" }, { ERROR_IE_TABLE_NOT_FOUND, "Information about IE Table missing" }, + { ERROR_KEY_TABLE_NOT_FOUND, + "No Key/ Key Table Found in header"}, { ERROR_ESBC_CLIENT_MAX, "NULL" } }; diff --git a/include/fsl_validate.h b/include/fsl_validate.h index 83efcf49ada..f812c1a1fd0 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -21,14 +21,6 @@ extern struct jobring jr; -#ifdef CONFIG_KEY_REVOCATION -/* Srk table and key revocation check */ -#define SRK_FLAG 0x01 -#define UNREVOCABLE_KEY 4 -#define ALIGN_REVOC_KEY 3 -#define MAX_KEY_ENTRIES 4 -#endif - /* Barker code size in bytes */ #define ESBC_BARKER_LEN 4 /* barker code length in ESBC uboot client */ /* header */ @@ -39,6 +31,47 @@ extern struct jobring jr; /* Maximum number of SG entries allowed */ #define MAX_SG_ENTRIES 8 +/* Different Header Struct for LS-CH3 */ +#ifdef CONFIG_ESBC_HDR_LS +struct fsl_secboot_img_hdr { + u8 barker[ESBC_BARKER_LEN]; /* barker code */ + u32 srk_tbl_off; + struct { + u8 num_srk; + u8 srk_sel; + u8 reserve; + u8 ie_flag; + } len_kr; + + u32 uid_flag; + + u32 psign; /* signature offset */ + u32 sign_len; /* length of the signature in bytes */ + + u64 pimg64; /* 64 bit pointer to ESBC Image */ + u32 img_size; /* ESBC client image size in bytes */ + u32 ie_key_sel; + + u32 fsl_uid_0; + u32 fsl_uid_1; + u32 oem_uid_0; + u32 oem_uid_1; + u32 oem_uid_2; + u32 oem_uid_3; + u32 oem_uid_4; + u32 reserved1[3]; +}; + +#ifdef CONFIG_KEY_REVOCATION +/* Srk table and key revocation check */ +#define UNREVOCABLE_KEY 8 +#define ALIGN_REVOC_KEY 7 +#define MAX_KEY_ENTRIES 8 +#endif + + +#else /* CONFIG_ESBC_HDR_LS */ + /* * ESBC uboot client header structure. * The struct contain the following fields @@ -109,6 +142,17 @@ struct fsl_secboot_img_hdr { u32 ie_key_sel; }; +#ifdef CONFIG_KEY_REVOCATION +/* Srk table and key revocation check */ +#define SRK_FLAG 0x01 +#define UNREVOCABLE_KEY 4 +#define ALIGN_REVOC_KEY 3 +#define MAX_KEY_ENTRIES 4 +#endif + +#endif /* CONFIG_ESBC_HDR_LS */ + + #if defined(CONFIG_FSL_ISBC_KEY_EXT) struct ie_key_table { u32 key_len; -- cgit v1.3.1 From fcfdb6d580ab108f4496f1ef7bd7ed260488ffde Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:35 +0530 Subject: armv8: ls2080rdb: ls2080qds: Add secure boot support Sec_init has been called at the beginning to initialize SEC Block (CAAM) which is used by secure boot validation later for both ls2080a qds and rdb. 64-bit address in ESBC Header has been enabled. Secure boot defconfigs are created for boards (NOR boot). Signed-off-by: Saksham Jain Reviewed-by: York Sun --- arch/arm/include/asm/fsl_secure_boot.h | 9 +++++++-- board/freescale/ls2080aqds/MAINTAINERS | 6 ++++++ board/freescale/ls2080aqds/ls2080aqds.c | 5 ++++- board/freescale/ls2080ardb/MAINTAINERS | 6 ++++++ board/freescale/ls2080ardb/ls2080ardb.c | 5 ++++- configs/ls2080aqds_SECURE_BOOT_defconfig | 20 ++++++++++++++++++++ configs/ls2080ardb_SECURE_BOOT_defconfig | 20 ++++++++++++++++++++ configs/ls2085aqds_SECURE_BOOT_defconfig | 20 ++++++++++++++++++++ configs/ls2085ardb_SECURE_BOOT_defconfig | 20 ++++++++++++++++++++ include/configs/ls2080aqds.h | 2 ++ include/configs/ls2080ardb.h | 2 ++ 11 files changed, 111 insertions(+), 4 deletions(-) create mode 100644 configs/ls2080aqds_SECURE_BOOT_defconfig create mode 100644 configs/ls2080ardb_SECURE_BOOT_defconfig create mode 100644 configs/ls2085aqds_SECURE_BOOT_defconfig create mode 100644 configs/ls2085ardb_SECURE_BOOT_defconfig (limited to 'include') diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 4eb3b156c8f..b745194c737 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -18,7 +18,9 @@ #ifdef CONFIG_CHAIN_OF_TRUST #define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_CMD_BLOB +#define CONFIG_CMD_HASH #define CONFIG_FSL_SEC_MON +#define CONFIG_SHA_HW_ACCEL #define CONFIG_SHA_PROG_HW_ACCEL #define CONFIG_RSA_FREESCALE_EXP @@ -42,8 +44,11 @@ #endif -#ifdef CONFIG_LS1043A -/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */ +#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) ||\ + defined(CONFIG_LS2085A) +/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit + * Similiarly for LS2080 and LS2085 + */ #define CONFIG_ESBC_ADDR_64BIT #endif diff --git a/board/freescale/ls2080aqds/MAINTAINERS b/board/freescale/ls2080aqds/MAINTAINERS index 6f99ad0d912..558cef11905 100644 --- a/board/freescale/ls2080aqds/MAINTAINERS +++ b/board/freescale/ls2080aqds/MAINTAINERS @@ -8,3 +8,9 @@ F: configs/ls2080aqds_defconfig F: configs/ls2080aqds_nand_defconfig F: configs/ls2085aqds_defconfig F: configs/ls2085aqds_nand_defconfig + +LS2080A_SECURE_BOOT BOARD +M: Saksham Jain +S: Maintained +F: configs/ls2080aqds_SECURE_BOOT_defconfig +F: configs/ls2085aqds_SECURE_BOOT_defconfig diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index f3925e25a31..e1a521d0805 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "../common/qixis.h" #include "ls2080aqds_qixis.h" @@ -248,7 +249,9 @@ int arch_misc_init(void) #ifdef CONFIG_FSL_DEBUG_SERVER debug_server_init(); #endif - +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif return 0; } #endif diff --git a/board/freescale/ls2080ardb/MAINTAINERS b/board/freescale/ls2080ardb/MAINTAINERS index c9f3459f785..0817711d089 100644 --- a/board/freescale/ls2080ardb/MAINTAINERS +++ b/board/freescale/ls2080ardb/MAINTAINERS @@ -8,3 +8,9 @@ F: configs/ls2080ardb_defconfig F: configs/ls2080ardb_nand_defconfig F: configs/ls2085ardb_defconfig F: configs/ls2085ardb_nand_defconfig + +LS2080A_SECURE_BOOT BOARD +M: Saksham Jain +S: Maintained +F: configs/ls2080ardb_SECURE_BOOT_defconfig +F: configs/ls2085ardb_SECURE_BOOT_defconfig diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 844d9f5a090..ec4b74c2726 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "../common/qixis.h" #include "ls2080ardb_qixis.h" @@ -218,7 +219,9 @@ int arch_misc_init(void) #ifdef CONFIG_FSL_DEBUG_SERVER debug_server_init(); #endif - +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif return 0; } #endif diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig new file mode 100644 index 00000000000..408d1ee1e7d --- /dev/null +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2080AQDS=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A, SECURE_BOOT" +# CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_SYS_NS16550=y +CONFIG_FSL_DSPI=y +CONFIG_RSA=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig new file mode 100644 index 00000000000..dde33116533 --- /dev/null +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2080ARDB=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A, SECURE_BOOT" +# CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_SYS_NS16550=y +CONFIG_FSL_DSPI=y +CONFIG_RSA=y diff --git a/configs/ls2085aqds_SECURE_BOOT_defconfig b/configs/ls2085aqds_SECURE_BOOT_defconfig new file mode 100644 index 00000000000..f13ee41c771 --- /dev/null +++ b/configs/ls2085aqds_SECURE_BOOT_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2080AQDS=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A, SECURE_BOOT" +# CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_SYS_NS16550=y +CONFIG_FSL_DSPI=y +CONFIG_RSA=y diff --git a/configs/ls2085ardb_SECURE_BOOT_defconfig b/configs/ls2085ardb_SECURE_BOOT_defconfig new file mode 100644 index 00000000000..aa6650849c8 --- /dev/null +++ b/configs/ls2085ardb_SECURE_BOOT_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2080ARDB=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A, SECURE_BOOT" +# CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_SYS_NS16550=y +CONFIG_FSL_DSPI=y +CONFIG_RSA=y diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index dab38208f5a..91fad0a0cdc 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -399,4 +399,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_USB_STORAGE #define CONFIG_CMD_EXT2 +#include + #endif /* __LS2_QDS_H */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 59a3f663104..ce1d90098f7 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -363,4 +363,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PHY_AQUANTIA #endif +#include + #endif /* __LS2_RDB_H */ -- cgit v1.3.1 From 3f701cc50a2e329e8437330bdd7316b48bd06cb8 Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:37 +0530 Subject: armv8: fsl-lsch3: Copy Bootscript and header from NOR to DDR To unify steps for secure boot for xip (eg. NOR) and non-xip memories (eg. NAND, SD), bootscipts and its header are copied to main memory. Validation and execution are performed from there. For other ARM Platforms (ls1043 and ls1020), to avoid disruption of existing users, this copy step is not used for NOR boot. Signed-off-by: Aneesh Bansal Signed-off-by: Saksham Jain Reviewed-by: York Sun --- arch/arm/include/asm/fsl_secure_boot.h | 28 +++++++++++++++++++++++++--- include/config_fsl_chain_trust.h | 11 +++++++---- 2 files changed, 32 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 5575934f028..4d04eea0072 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -57,11 +57,33 @@ "setenv initrd_high 0xcfffffff;" \ "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" -/* The address needs to be modified according to NOR memory map */ +/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from + * Non-XIP Memory (Nand/SD)*/ +#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) ||\ + defined(CONFIG_LS2085A) +#define CONFIG_BOOTSCRIPT_COPY_RAM +#endif +/* The address needs to be modified according to NOR and DDR memory map */ #if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0x583920000 +#define CONFIG_BS_HDR_ADDR_FLASH 0x583920000 +#define CONFIG_BS_ADDR_FLASH 0x583900000 +#define CONFIG_BS_HDR_ADDR_RAM 0xa3920000 +#define CONFIG_BS_ADDR_RAM 0xa3900000 +#else +#define CONFIG_BS_HDR_ADDR_FLASH 0x600a0000 +#define CONFIG_BS_ADDR_FLASH 0x60060000 +#define CONFIG_BS_HDR_ADDR_RAM 0xa0060000 +#define CONFIG_BS_ADDR_RAM 0xa0060000 +#endif + +#ifdef CONFIG_BOOTSCRIPT_COPY_RAM +#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM +#define CONFIG_BS_HDR_SIZE 0x00002000 +#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM +#define CONFIG_BS_SIZE 0x00001000 #else -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0x600a0000 +#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_FLASH +/* BS_HDR_SIZE, BOOTSCRIPT_ADDR and BS_SIZE are not required */ #endif #include diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h index 45dda56bc38..aa222bbde20 100644 --- a/include/config_fsl_chain_trust.h +++ b/include/config_fsl_chain_trust.h @@ -65,8 +65,6 @@ "esbc_halt\0" #endif -/* For secure boot flow, default environment used will be used */ -#if defined(CONFIG_SYS_RAMBOOT) #ifdef CONFIG_BOOTSCRIPT_COPY_RAM #define CONFIG_BS_COPY_ENV \ "setenv bs_hdr_ram " __stringify(CONFIG_BS_HDR_ADDR_RAM)";" \ @@ -76,14 +74,19 @@ "setenv bs_flash " __stringify(CONFIG_BS_ADDR_FLASH)";" \ "setenv bs_size " __stringify(CONFIG_BS_SIZE)";" +/* For secure boot flow, default environment used will be used */ +#if defined(CONFIG_SYS_RAMBOOT) #if defined(CONFIG_RAMBOOT_NAND) #define CONFIG_BS_COPY_CMD \ "nand read $bs_hdr_ram $bs_hdr_flash $bs_hdr_size ;" \ "nand read $bs_ram $bs_flash $bs_size ;" #endif /* CONFIG_RAMBOOT_NAND */ -#endif /* CONFIG_BOOTSCRIPT_COPY_RAM */ - +#else +#define CONFIG_BS_COPY_CMD \ + "cp.b $bs_hdr_flash $bs_hdr_ram $bs_hdr_size ;" \ + "cp.b $bs_flash $bs_ram $bs_size ;" #endif +#endif /* CONFIG_BOOTSCRIPT_COPY_RAM */ #ifndef CONFIG_BS_COPY_ENV #define CONFIG_BS_COPY_ENV -- cgit v1.3.1 From 2bfe4890856c94d939e193999dccdc75afc5c5bd Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:43 +0530 Subject: SECURE_BOOT: Use default bootargs For secure boot, currently we were using fixed bootargs for all SoCs. This is not needed and we can use the bootargs which are used in non-secure boot. Signed-off-by: Aneesh Bansal Signed-off-by: Saksham Jain Reviewed-by: York Sun --- include/config_fsl_chain_trust.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h index aa222bbde20..566fd80a05c 100644 --- a/include/config_fsl_chain_trust.h +++ b/include/config_fsl_chain_trust.h @@ -44,11 +44,18 @@ * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" */ +#ifdef CONFIG_BOOTARGS +#define CONFIG_SET_BOOTARGS "setenv bootargs \'" CONFIG_BOOTARGS" \';" +#else +#define CONFIG_SET_BOOTARGS "setenv bootargs \'root=/dev/ram " \ + "rw console=ttyS0,115200 ramdisk_size=600000\';" +#endif + + #ifdef CONFIG_BOOTSCRIPT_KEY_HASH #define CONFIG_SECBOOT \ "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ - "setenv bootargs \'root=/dev/ram rw console=ttyS0,115200 " \ - "ramdisk_size=600000\';" \ + CONFIG_SET_BOOTARGS \ CONFIG_EXTRA_ENV \ "esbc_validate $bs_hdraddr " \ __stringify(CONFIG_BOOTSCRIPT_KEY_HASH)";" \ @@ -57,8 +64,7 @@ #else #define CONFIG_SECBOOT \ "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ - "setenv bootargs \'root=/dev/ram rw console=ttyS0,115200 " \ - "ramdisk_size=600000\';" \ + CONFIG_SET_BOOTARGS \ CONFIG_EXTRA_ENV \ "esbc_validate $bs_hdraddr;" \ "source $img_addr;" \ -- cgit v1.3.1 From c4666cf6954a28ade5a8550505d5bc25dc7f92d7 Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:44 +0530 Subject: SECURE BOOT: Halt execution when secure boot fail In case of fatal failure during secure boot execution (e.g. header not found), reset is asserted to stop execution. If the RESET_REQ is not tied to HRESET, this allows the execution to continue. Add esbh_halt() after the reset to make sure execution stops. Signed-off-by: Aneesh Bansal Signed-off-by: Saksham Jain Reviewed-by: York Sun --- board/freescale/common/cmd_esbc_validate.c | 2 +- board/freescale/common/fsl_validate.c | 5 +++++ include/fsl_validate.h | 3 +++ 3 files changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c index dfa3e2100ed..375bc249685 100644 --- a/board/freescale/common/cmd_esbc_validate.c +++ b/board/freescale/common/cmd_esbc_validate.c @@ -8,7 +8,7 @@ #include #include -static int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc, +int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { if (fsl_check_boot_mode_secure() == 0) { diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index c12b9c927e4..95059c771fc 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -325,6 +325,8 @@ static void fsl_secboot_header_verification_failure(void) printf("Generating reset request\n"); do_reset(NULL, 0, 0, NULL); + /* If reset doesn't coocur, halt execution */ + do_esbc_halt(NULL, 0, 0, NULL); } /* @@ -355,6 +357,9 @@ static void fsl_secboot_image_verification_failure(void) printf("Generating reset request\n"); do_reset(NULL, 0, 0, NULL); + /* If reset doesn't coocur, halt execution */ + do_esbc_halt(NULL, 0, 0, NULL); + } else { change_sec_mon_state(HPSR_SSM_ST_TRUST, HPSR_SSM_ST_NON_SECURE); diff --git a/include/fsl_validate.h b/include/fsl_validate.h index f812c1a1fd0..ff6f6b75522 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -242,6 +242,9 @@ struct fsl_secboot_img_priv { uint32_t img_size; /* ESBC Image Size */ }; +int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]); + int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, uintptr_t img_loc); int fsl_secboot_blob_encap(cmd_tbl_t *cmdtp, int flag, int argc, -- cgit v1.3.1 From 85bb38965431424d4e4a7b5030cc589a3401a988 Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:45 +0530 Subject: SECURE BOOT: Change fsl_secboot_validate func to pass image addr Use a pointer to pass image address to fsl_secboot_validate(), instead of using environmental variable "img_addr". Signed-off-by: Aneesh Bansal Signed-off-by: Saksham Jain Reviewed-by: York Sun --- board/freescale/common/cmd_esbc_validate.c | 12 +++++++++++- board/freescale/common/fsl_validate.c | 26 +++++++++++++++----------- include/fsl_validate.h | 4 ++-- 3 files changed, 28 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c index 375bc249685..cefe3cc5317 100644 --- a/board/freescale/common/cmd_esbc_validate.c +++ b/board/freescale/common/cmd_esbc_validate.c @@ -29,6 +29,8 @@ static int do_esbc_validate(cmd_tbl_t *cmdtp, int flag, int argc, char *hash_str = NULL; uintptr_t haddr; int ret; + uintptr_t img_addr = 0; + char buf[20]; if (argc < 2) return cmd_usage(cmdtp); @@ -43,7 +45,15 @@ static int do_esbc_validate(cmd_tbl_t *cmdtp, int flag, int argc, * part of header. So, the function is called * by passing this argument as 0. */ - ret = fsl_secboot_validate(haddr, hash_str, 0); + ret = fsl_secboot_validate(haddr, hash_str, &img_addr); + + /* Need to set "img_addr" even if validation failure. + * Required when SB_EN in RCW set and non-fatal error + * to continue U-Boot + */ + sprintf(buf, "%lx", img_addr); + setenv("img_addr", buf); + if (ret) return 1; diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 95059c771fc..64e4e300a57 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -570,7 +570,7 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img) /* Update hash for actual Image */ ret = algo->hash_update(algo, ctx, - (u8 *)img->img_addr, img->img_size, 1); + (u8 *)(*(img->img_addr_ptr)), img->img_size, 1); if (ret) return ret; @@ -646,7 +646,6 @@ static void construct_img_encoded_hash_second(struct fsl_secboot_img_priv *img) */ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) { - char buf[20]; struct fsl_secboot_img_hdr *hdr = &img->hdr; void *esbc = (u8 *)(uintptr_t)img->ehdrloc; u8 *k, *s; @@ -661,17 +660,14 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) /* If Image Address is not passed as argument to function, * then Address and Size must be read from the Header. */ - if (img->img_addr == 0) { + if (*(img->img_addr_ptr) == 0) { #ifdef CONFIG_ESBC_ADDR_64BIT - img->img_addr = hdr->pimg64; + *(img->img_addr_ptr) = hdr->pimg64; #else - img->img_addr = hdr->pimg; + *(img->img_addr_ptr) = hdr->pimg; #endif } - sprintf(buf, "%lx", img->img_addr); - setenv("img_addr", buf); - if (!hdr->img_size) return ERROR_ESBC_CLIENT_HEADER_IMG_SIZE; @@ -814,9 +810,17 @@ static int calculate_cmp_img_sig(struct fsl_secboot_img_priv *img) return 0; } - +/* haddr - Address of the header of image to be validated. + * arg_hash_str - Option hash string. If provided, this + * overides the key hash in the SFP fuses. + * img_addr_ptr - Optional pointer to address of image to be validated. + * If non zero addr, this overides the addr of image in header, + * otherwise updated to image addr in header. + * Acts as both input and output of function. + * This pointer shouldn't be NULL. + */ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, - uintptr_t img_addr) + uintptr_t *img_addr_ptr) { struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); ulong hash[SHA256_BYTES/sizeof(ulong)]; @@ -869,7 +873,7 @@ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, /* Update the information in Private Struct */ hdr = &img->hdr; img->ehdrloc = haddr; - img->img_addr = img_addr; + img->img_addr_ptr = img_addr_ptr; esbc = (u8 *)img->ehdrloc; memcpy(hdr, esbc, sizeof(struct fsl_secboot_img_hdr)); diff --git a/include/fsl_validate.h b/include/fsl_validate.h index ff6f6b75522..a71e1ce2b0e 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -238,7 +238,7 @@ struct fsl_secboot_img_priv { struct fsl_secboot_sg_table sgtbl[MAX_SG_ENTRIES]; /* SG table */ uintptr_t ehdrloc; /* ESBC Header location */ - uintptr_t img_addr; /* ESBC Image Location */ + uintptr_t *img_addr_ptr; /* ESBC Image Location */ uint32_t img_size; /* ESBC Image Size */ }; @@ -246,7 +246,7 @@ int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, - uintptr_t img_loc); + uintptr_t *img_addr_ptr); int fsl_secboot_blob_encap(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int fsl_secboot_blob_decap(cmd_tbl_t *cmdtp, int flag, int argc, -- cgit v1.3.1 From ed2530d0963196a7175058ed9b5e6cbc29822f7f Mon Sep 17 00:00:00 2001 From: Rai Harninder Date: Wed, 23 Mar 2016 17:04:38 +0530 Subject: armv8/ls2080ardb: Enable VID support This patch enable VID support for ls2080ardb platform. It uses the common VID driver. Signed-off-by: Rai Harninder Reviewed-by: York Sun --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++ board/freescale/common/vid.c | 15 ++++++++++++++- board/freescale/ls2080ardb/ls2080ardb.c | 9 +++++++++ include/configs/ls2080ardb.h | 16 ++++++++++++++++ 4 files changed, 43 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 4f0fdfd4b13..1d3b33671f4 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -180,6 +180,10 @@ struct ccsr_gur { u8 res_008[0x20-0x8]; u32 gpporcr1; /* General-purpose POR configuration */ u32 gpporcr2; /* General-purpose POR configuration 2 */ +#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25 +#define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK 0x1F +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 20 +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK 0x1F u32 dcfg_fusesr; /* Fuse status register */ u32 gpporcr3; u32 gpporcr4; diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index a6a132ab191..2f297951373 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -10,6 +10,8 @@ #include #ifdef CONFIG_LS1043A #include +#elif defined(CONFIG_FSL_LSCH3) +#include #else #include #endif @@ -285,7 +287,7 @@ static int set_voltage(int i2caddress, int vdd) int adjust_vdd(ulong vdd_override) { int re_enable = disable_interrupts(); -#ifdef CONFIG_LS1043A +#if defined(CONFIG_LS1043A) || defined(CONFIG_FSL_LSCH3) struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); #else ccsr_gur_t __iomem *gur = @@ -362,7 +364,11 @@ int adjust_vdd(ulong vdd_override) } /* get the voltage ID from fuse status register */ +#ifdef CONFIG_FSL_LSCH3 + fusesr = in_le32(&gur->dcfg_fusesr); +#else fusesr = in_be32(&gur->dcfg_fusesr); +#endif /* * VID is used according to the table below * --------------------------------------- @@ -387,6 +393,13 @@ int adjust_vdd(ulong vdd_override) vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; } +#elif defined(CONFIG_FSL_LSCH3) + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; + if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; + } #else vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index ec4b74c2726..82010481934 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -22,6 +22,7 @@ #include "../common/qixis.h" #include "ls2080ardb_qixis.h" +#include "../common/vid.h" #define PIN_MUX_SEL_SDHC 0x00 #define PIN_MUX_SEL_DSPI 0x0a @@ -123,6 +124,11 @@ int select_i2c_ch_pca9547(u8 ch) return 0; } +int i2c_multiplexer_select_vid_channel(u8 channel) +{ + return select_i2c_ch_pca9547(channel); +} + int config_board_mux(int ctrl_type) { u8 reg5; @@ -189,6 +195,9 @@ int misc_init_r(void) if (hwconfig("sdhc")) config_board_mux(MUX_TYPE_SDHC); + if (adjust_vdd(0)) + printf("Warning: Adjusting core voltage failed.\n"); + return 0; } diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ce1d90098f7..15a11723b0e 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -14,6 +14,22 @@ #define CONFIG_DISPLAY_BOARDINFO +#define I2C_MUX_CH_VOL_MONITOR 0xa +#define I2C_VOL_MONITOR_ADDR 0x38 +#define CONFIG_VOL_MONITOR_IR36021_READ +#define CONFIG_VOL_MONITOR_IR36021_SET + +#define CONFIG_VID_FLS_ENV "ls2080ardb_vdd_mv" +#ifndef CONFIG_SPL_BUILD +#define CONFIG_VID +#endif +/* step the IR regulator in 5mV increments */ +#define IR_VDD_STEP_DOWN 5 +#define IR_VDD_STEP_UP 5 +/* The lowest and highest voltage allowed for LS2080ARDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + #ifndef __ASSEMBLY__ unsigned long get_board_sys_clk(void); #endif -- cgit v1.3.1