From 7dca54f872004a71537500c5d5251ea80a63ae16 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 4 Feb 2013 15:23:17 +0100 Subject: xilinx: zynq: Enable DCC and create new zynq_dcc board Enable DCC driver for arm zynq platform to be compiled. Signed-off-by: Michal Simek --- include/configs/zynq.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 18fd76f47e0..2989e723e04 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -58,6 +58,11 @@ #define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM_BASEADDR0 0xE000B000 +#if defined(CONFIG_ZYNQ_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ +#endif + #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY -- cgit v1.3.1 From c4c25940b9bf61526862ec7f1d2e99141c3a4c0a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 28 Jan 2013 01:41:00 +0000 Subject: mx23evk: Remove CONFIG_SYS_BAUDRATE_TABLE The baudrate is already defined by CONFIG_BAUDRATE and there is no need to keep CONFIG_SYS_BAUDRATE_TABLE. Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador --- include/configs/mx23evk.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index c44a8b80161..31506ff876a 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -112,7 +112,6 @@ #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* DMA */ #define CONFIG_APBH_DMA -- cgit v1.3.1 From 2d7237c92f11242cc0c9d7aee84f2852c25c419b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 28 Jan 2013 01:41:01 +0000 Subject: mx23evk: Turn on caches It is safe to turn on data and instruction caches for mx23. Signed-off-by: Fabio Estevam --- include/configs/mx23evk.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 31506ff876a..d206c95b8e0 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -33,8 +33,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_MX23EVK #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_MISC_INIT -- cgit v1.3.1 From bec0160e9f5adab1d451ded3a95b0114b14e1970 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Fri, 1 Feb 2013 08:08:45 +0000 Subject: i.MX6Q: mx6qsabre*: Configure to allow CONFIG_SYS_ALT_MEMTEST In order to use the more thorough memory test, the macro CONFIG_SYS_MEMTEST_SCRATCH must be defined with a usable address. Signed-off-by: Eric Nelson --- include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index d76357c70f7..f7e8779b40c 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -171,6 +171,7 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 752f0981d2c..c8c3ccc9265 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -241,6 +241,7 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 -- cgit v1.3.1 From 78ed94c8bc743b0a52060388fc9a1439606b71ac Mon Sep 17 00:00:00 2001 From: Tomas Novotny Date: Fri, 1 Feb 2013 06:44:06 +0000 Subject: da8xx: ea20: Add the configuration define for the exact SoC variant Signed-off-by: Tomas Novotny Cc: Tom Rini Cc: Stefano Babic Acked-by: Stefano Babic --- include/configs/ea20.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/ea20.h b/include/configs/ea20.h index d3eb5969dc9..03dfe0af2d0 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -42,6 +42,7 @@ #define CONFIG_MACH_DAVINCI_DA850_EVM #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SOC_DA850 /* TI DA850 SoC */ #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -- cgit v1.3.1 From c0e66793c4af8f6a50fa236ab14ff4de7e31d01a Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 5 Feb 2013 11:36:26 +0000 Subject: am335x_evm: enable support for booting via USB This adds necessary config options and a new build target, am335x_evm_usbspl, to enable usb booting and fixes board_eth_init() function to take into account that we may have USB ether support in SPL now. This uses the same MAC for both cpsw and USB, in order to match ROM behavior. The usbspl build target does not contain UART SPL, CPSW SPL or extra environment settings, so that we may fit within our binary size constraint. Signed-off-by: Ilya Yanok Signed-off-by: Tom Rini --- board/ti/am335x/board.c | 38 +++++++++++++++++++++----------------- include/configs/am335x_evm.h | 14 ++++++++++++++ 2 files changed, 35 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 48e68967e59..441758fdf00 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -389,7 +389,8 @@ int board_late_init(void) } #endif -#ifdef CONFIG_DRIVER_TI_CPSW +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) static void cpsw_control(int enabled) { /* VTP can be added here */ @@ -434,26 +435,26 @@ static struct cpsw_platform_data cpsw_data = { int board_eth_init(bd_t *bis) { int rv, n = 0; -#ifdef CONFIG_DRIVER_TI_CPSW uint8_t mac_addr[6]; uint32_t mac_hi, mac_lo; - if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { - printf(" not set. Reading from E-fuse\n"); - /* try reading mac address from efuse */ - mac_lo = readl(&cdev->macid0l); - mac_hi = readl(&cdev->macid0h); - mac_addr[0] = mac_hi & 0xFF; - mac_addr[1] = (mac_hi & 0xFF00) >> 8; - mac_addr[2] = (mac_hi & 0xFF0000) >> 16; - mac_addr[3] = (mac_hi & 0xFF000000) >> 24; - mac_addr[4] = mac_lo & 0xFF; - mac_addr[5] = (mac_lo & 0xFF00) >> 8; + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) + if (!getenv("ethaddr")) { + printf(" not set. Validating first E-fuse MAC\n"); if (is_valid_ether_addr(mac_addr)) eth_setenv_enetaddr("ethaddr", mac_addr); - else - goto try_usbether; } if (board_is_bone() || board_is_bone_lt() || board_is_idk()) { @@ -494,8 +495,11 @@ int board_eth_init(bd_t *bis) AR8051_RGMII_TX_CLK_DLY); } #endif -try_usbether: -#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_USB_ETHER) && \ + (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT)) + if (is_valid_ether_addr(mac_addr)) + eth_setenv_enetaddr("usbnet_devaddr", mac_addr); + rv = usb_eth_initialize(bis); if (rv < 0) printf("Error %d registering USB_ETHER\n", rv); diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 33ee2c49d5b..45491906a6b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -239,6 +239,7 @@ #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 +#define CONFIG_SPL_MUSB_NEW_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT @@ -312,8 +313,21 @@ #ifdef CONFIG_MUSB_GADGET #define CONFIG_USB_ETHER #define CONFIG_USB_ETH_RNDIS +#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" #endif /* CONFIG_MUSB_GADGET */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) +/* disable host part of MUSB in SPL */ +#undef CONFIG_MUSB_HOST +/* + * Disable UART, CPSW ethernet support and extra environment settings so we + * will fit within 101KiB. + */ +#undef CONFIG_SPL_ETH_SUPPORT +#undef CONFIG_SPL_YMODEM_SUPPORT +#undef CONFIG_EXTRA_ENV_SETTINGS +#endif + /* Unsupported features */ #undef CONFIG_USE_IRQ -- cgit v1.3.1 From aa127df60ecf5ab1450936902e3374d5a92bd0fb Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Thu, 7 Feb 2013 00:40:05 +0000 Subject: OMAP3: igep00x0: add missing include mach-types.h Current '#if' directives (used in igep00x0.h config file) comparing MACH_TYPE values in igep00x0.h doesn't work as expected. The comparision between CONFIG_MACH_TYPE and MACH_TYPE_IGEP0020 is always true independent of the IGEP machine configured. For example, following directive if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) define something endif Is always evaluated true although we configure u-boot for MACH_TYPE_IGEP0030. The build doesn't shows any error so looks that both defines had always the same value. Including the mach-types.h file sets properly the value of MACH_TYPE_IGEPxxxx. Signed-off-by: Enric Balletbo i Serra --- include/configs/igep00x0.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index 0e7f9247c8f..0e539ef9011 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -36,6 +36,7 @@ #include #include +#include /* * Display CPU and Board information -- cgit v1.3.1 From d9aacf4190136225763407a4c1ce2dccd30edf5e Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Thu, 7 Feb 2013 00:40:06 +0000 Subject: OMAP3: igep00x0: Add new IGEP COM PROTON. The IGEP COM PROTON is a new ultra compact module design with an on-board ethernet controller. Signed-off-by: Enric Balletbo i Serra --- MAINTAINERS | 1 + board/isee/igep00x0/igep00x0.h | 3 +++ boards.cfg | 1 + include/configs/igep00x0.h | 6 +++++- 4 files changed, 10 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index 45e2dd45411..175bbe26669 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -607,6 +607,7 @@ Enric Balletbo i Serra igep0020 ARM ARMV7 (OMAP3xx SoC) igep0030 ARM ARMV7 (OMAP3xx SoC) + igep0032 ARM ARMV7 (OMAP3xx SoC) Eric Benard diff --git a/board/isee/igep00x0/igep00x0.h b/board/isee/igep00x0/igep00x0.h index 9fcaab5dec5..5ef22aeda42 100644 --- a/board/isee/igep00x0/igep00x0.h +++ b/board/isee/igep00x0/igep00x0.h @@ -39,6 +39,9 @@ const omap3_sysinfo sysinfo = { #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) "IGEP COM MODULE/ELECTRON", #endif +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032) + "IGEP COM PROTON", +#endif #if defined(CONFIG_ENV_IS_IN_ONENAND) "ONENAND", #else diff --git a/boards.cfg b/boards.cfg index b1319aace0f..beefb53412e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -262,6 +262,7 @@ igep0020 arm armv7 igep00x0 isee igep0020_nand arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND igep0030 arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND igep0030_nand arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND +igep0032 arm armv7 igep00x0 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0032,BOOT_ONENAND am3517_evm arm armv7 am3517evm logicpd omap3 mt_ventoux arm armv7 mt_ventoux teejet omap3 omap3_zoom1 arm armv7 zoom1 logicpd omap3 diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index 0e539ef9011..559e3759def 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -87,7 +87,10 @@ #define CONFIG_DOS_PARTITION 1 /* define to enable boot progress via leds */ +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ + (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) #define CONFIG_SHOW_BOOT_PROGRESS +#endif /* USB */ #define CONFIG_MUSB_UDC 1 @@ -119,7 +122,8 @@ #ifdef CONFIG_BOOT_NAND #define CONFIG_CMD_NAND #endif -#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ + (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032) #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #endif #define CONFIG_CMD_DHCP -- cgit v1.3.1 From 661bb0f8f49303891b8460149943e32337544e03 Mon Sep 17 00:00:00 2001 From: Howard Gray Date: Thu, 7 Feb 2013 23:53:35 +0000 Subject: omap3: mvblx: change console to ttyO0 and make silent by default. Also, change bootdelay to 0 but allow pressing 'S' to stop at U-Boot prompt. Signed-off-by: Michael Jones Signed-off-by: Howard Gray Signed-off-by: Michael Jones --- include/configs/omap3_mvblx.h | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h index 07de56567d3..99f0d4b51fc 100644 --- a/include/configs/omap3_mvblx.h +++ b/include/configs/omap3_mvblx.h @@ -90,9 +90,9 @@ /* * select serial console configuration */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 +#define CONFIG_SERIAL1 1 /* UART1 */ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ @@ -102,6 +102,10 @@ #define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 +/* silent console by default */ +#define CONFIG_SYS_DEVICE_NULLDEV 1 +#define CONFIG_SILENT_CONSOLE 1 + /* USB */ #define CONFIG_MUSB_UDC 1 #define CONFIG_USB_OMAP3 1 @@ -152,12 +156,16 @@ /* Environment information */ #undef CONFIG_ENV_OVERWRITE /* disallow overwriting serial# and ethaddr */ -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 0 +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_STOP_STR "S" #define CONFIG_EXTRA_ENV_SETTINGS \ + "silent=true\0" \ "loadaddr=0x82000000\0" \ "usbtty=cdc_acm\0" \ - "console=ttyO2,115200n8\0" \ + "console=ttyO0,115200n8\0" \ "mpurate=600\0" \ "vram=12M\0" \ "dvimode=1024x768-24@60\0" \ -- cgit v1.3.1 From 71c4ae3f6db39b888497923573bff215b64a36bd Mon Sep 17 00:00:00 2001 From: Michael Jones Date: Thu, 7 Feb 2013 23:53:36 +0000 Subject: omap3: mvblx: select fpgafilename according to orientation Rather than load the FPGA file from the FAT partition, look at entry in system EEPROM to decide which file to retrieve directly from the EXT3 partition. Signed-off-by: Michael Jones --- board/matrix_vision/mvblx/sys_eeprom.c | 24 ++++++++++++++++++++++++ include/configs/omap3_mvblx.h | 6 +++--- 2 files changed, 27 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/board/matrix_vision/mvblx/sys_eeprom.c b/board/matrix_vision/mvblx/sys_eeprom.c index 945a36dfe66..15269c6d7a1 100644 --- a/board/matrix_vision/mvblx/sys_eeprom.c +++ b/board/matrix_vision/mvblx/sys_eeprom.c @@ -326,10 +326,28 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +static inline int is_portrait(void) +{ + int i; + unsigned int orient_index = 0; /* idx of char which determines orientation */ + + for (i = sizeof(e.id)/sizeof(*e.id) - 1; i>=0; i--) { + if (e.id[i] == '-') { + orient_index = i+1; + break; + } + } + + return (orient_index && + (e.id[orient_index] >= '5') && (e.id[orient_index] <= '8')); +} + int mac_read_from_eeprom(void) { u32 crc, crc_offset = offsetof(struct eeprom, crc); u32 *crcp; /* Pointer to the CRC in the data read from the EEPROM */ +#define FILENAME_LANDSCAPE "mvBlueLynx_X.rbf" +#define FILENAME_PORTRAIT "mvBlueLynx_X_sensor_cd.rbf" if (read_eeprom()) { printf("EEPROM Read failed.\n"); @@ -374,6 +392,12 @@ int mac_read_from_eeprom(void) setenv("serial#", serial_num); } + /* decide which fpga file to load depending on orientation */ + if (is_portrait()) + setenv("fpgafilename", FILENAME_PORTRAIT); + else + setenv("fpgafilename", FILENAME_LANDSCAPE); + /* TODO should I calculate CRC here? */ return 0; } diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h index 99f0d4b51fc..7bb05ca0a42 100644 --- a/include/configs/omap3_mvblx.h +++ b/include/configs/omap3_mvblx.h @@ -170,9 +170,9 @@ "vram=12M\0" \ "dvimode=1024x768-24@60\0" \ "defaultdisplay=dvi\0" \ - "fpgafilename=mvbluelynx_x.rbf\0" \ - "loadfpga=if fatload mmc ${mmcdev} ${loadaddr} ${fpgafilename}; then " \ - "fpga load 0 ${loadaddr} ${filesize}; " \ + "loadfpga=if ext2load mmc ${mmcdev}:2 ${loadaddr} "\ + "/lib/firmware/mvblx/${fpgafilename}; then " \ + "fpga load 0 ${loadaddr} ${filesize}; " \ "fi;\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ -- cgit v1.3.1 From bb4d46455c017e40e2c5d78ad78465a270565f9e Mon Sep 17 00:00:00 2001 From: Michael Jones Date: Thu, 7 Feb 2013 23:53:37 +0000 Subject: omap3: mvblx: pass FPGA version to the kernel Extract FPGA version from the .rbf and pass this info to the kernel. Signed-off-by: Michael Jones --- board/matrix_vision/mvblx/fpga.c | 14 +++++++++++++- include/configs/omap3_mvblx.h | 1 + 2 files changed, 14 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/matrix_vision/mvblx/fpga.c b/board/matrix_vision/mvblx/fpga.c index dacc13845dc..3fcf9685e95 100644 --- a/board/matrix_vision/mvblx/fpga.c +++ b/board/matrix_vision/mvblx/fpga.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "fpga.h" #ifdef FPGA_DEBUG @@ -209,9 +210,20 @@ int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie) { unsigned char *data = (unsigned char *) buf; int i; + int headerlen = len - cyclone2.size; + + if (headerlen < 0) + return FPGA_FAIL; + else if (headerlen == sizeof(uint32_t)) { + const unsigned int fpgavers_len = 11; /* '0x' + 8 hex digits + \0 */ + char fpgavers_str[fpgavers_len]; + snprintf(fpgavers_str, fpgavers_len, "0x%08x", + be32_to_cpup((uint32_t*)data)); + setenv("fpgavers", fpgavers_str); + } fpga_debug("fpga_wr: buf %p / size %d\n", buf, len); - for (i = 0; i < len; i++) + for (i = headerlen; i < len; i++) _write_fpga(data[i]); fpga_debug("-%s\n", __func__); diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h index 7bb05ca0a42..376a3d031ed 100644 --- a/include/configs/omap3_mvblx.h +++ b/include/configs/omap3_mvblx.h @@ -185,6 +185,7 @@ "omapdss.def_disp=${defaultdisplay} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype} " \ + "mvfw.fpgavers=${fpgavers} " \ "${cmdline_suffix}\0" \ "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ "importbootenv=echo Importing environment from mmc ...; " \ -- cgit v1.3.1 From 73c1f4aff04dd468963457250e36048fb6ec2e14 Mon Sep 17 00:00:00 2001 From: Chase Maupin Date: Fri, 8 Feb 2013 11:20:11 +0000 Subject: am335x_evm: Add NAND environment variables * Added support to the default environment variables for NAND boot. * Add nandboot to the default bootcmd. Signed-off-by: Chase Maupin Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 45491906a6b..77bd734e959 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -61,12 +61,20 @@ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 ro\0" \ "mmcrootfstype=ext4 rootwait\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandsrcaddr=0x280000\0" \ + "nandimgsize=0x500000\0" \ "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ "ramrootfstype=ext2\0" \ "mmcargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ "bootenv=uEnv.txt\0" \ "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ @@ -81,6 +89,10 @@ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \ + "bootm ${loadaddr}\0" \ "ramboot=echo Booting from ramdisk ...; " \ "run ramargs; " \ "bootm ${loadaddr}\0" \ @@ -106,6 +118,8 @@ "if run loaduimage; then " \ "run mmcboot;" \ "fi;" \ + "else " \ + "run nandboot;" \ "fi;" \ /* Clock Defines */ -- cgit v1.3.1 From 63ba7c66d9f56e6e9ab82dab9b8e819c3a1f6f22 Mon Sep 17 00:00:00 2001 From: Chase Maupin Date: Fri, 8 Feb 2013 11:20:12 +0000 Subject: am335x_evm: Add SPI environment variables * Added variables to support SPI booting * Note that the first 512KiB are reserved for 4 copies of SPL. Signed-off-by: Chase Maupin Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 77bd734e959..54707d45d3a 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -75,6 +75,15 @@ "${optargs} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ + "spiroot=/dev/mtdblock4 rw\0" \ + "spirootfstype=jffs2\0" \ + "spisrcaddr=0xe0000\0" \ + "spiimgsize=0x362000\0" \ + "spibusno=0\0" \ + "spiargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${spiroot} " \ + "rootfstype=${spirootfstype}\0" \ "bootenv=uEnv.txt\0" \ "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ @@ -93,6 +102,11 @@ "run nandargs; " \ "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \ "bootm ${loadaddr}\0" \ + "spiboot=echo Booting from spi ...; " \ + "run spiargs; " \ + "sf probe ${spibusno}:0; " \ + "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ + "bootm ${loadaddr}\0" \ "ramboot=echo Booting from ramdisk ...; " \ "run ramargs; " \ "bootm ${loadaddr}\0" \ -- cgit v1.3.1 From abdd178dc348df193470e19b431affec9a457987 Mon Sep 17 00:00:00 2001 From: Chase Maupin Date: Fri, 8 Feb 2013 11:20:13 +0000 Subject: am335x_evm: Add NET environment variables * Add environment variables to support network booting Signed-off-by: Chase Maupin Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 54707d45d3a..259d01ee7ba 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -65,6 +65,10 @@ "nandrootfstype=ubifs rootwait=1\0" \ "nandsrcaddr=0x280000\0" \ "nandimgsize=0x500000\0" \ + "rootpath=/export/rootfs\0" \ + "nfsopts=nolock\0" \ + "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ + "::off\0" \ "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ "ramrootfstype=ext2\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -84,6 +88,11 @@ "${optargs} " \ "root=${spiroot} " \ "rootfstype=${spirootfstype}\0" \ + "netargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=/dev/nfs " \ + "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ + "ip=dhcp\0" \ "bootenv=uEnv.txt\0" \ "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ @@ -107,6 +116,12 @@ "sf probe ${spibusno}:0; " \ "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ "bootm ${loadaddr}\0" \ + "netboot=echo Booting from network ...; " \ + "setenv autoload no; " \ + "dhcp; " \ + "tftp ${loadaddr} ${bootfile}; " \ + "run netargs; " \ + "bootm ${loadaddr}\0" \ "ramboot=echo Booting from ramdisk ...; " \ "run ramargs; " \ "bootm ${loadaddr}\0" \ -- cgit v1.3.1 From 4adfcd68cc10449e2fda0f9fac8b09f2b5c09a02 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 8 Feb 2013 11:20:15 +0000 Subject: am335x evm: Add am335x_evm_spiboot target This target will move the environment into SPI flash and documents the expected layout. We correct the SPL define for where U-Boot is and remove an unused define. Signed-off-by: Tom Rini --- boards.cfg | 1 + include/configs/am335x_evm.h | 25 +++++++++++++++++++++++-- 2 files changed, 24 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/boards.cfg b/boards.cfg index beefb53412e..5766f865735 100644 --- a/boards.cfg +++ b/boards.cfg @@ -233,6 +233,7 @@ integratorap_cm946es arm arm946es integrator armltd integratorcp_cm946es arm arm946es integrator armltd - integratorcp:CM946ES ca9x4_ct_vxp arm armv7 vexpress armltd am335x_evm arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1 +am335x_evm_spiboot arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT am335x_evm_uart1 arm armv7 am335x ti am33xx am335x_evm:SERIAL2,CONS_INDEX=2 am335x_evm_uart2 arm armv7 am335x ti am33xx am335x_evm:SERIAL3,CONS_INDEX=3 am335x_evm_uart3 arm armv7 am335x ti am33xx am335x_evm:SERIAL4,CONS_INDEX=4 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 259d01ee7ba..0dc2a504082 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -280,8 +280,7 @@ #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 #define CONFIG_SPL_MUSB_NEW_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" @@ -371,6 +370,26 @@ #undef CONFIG_EXTRA_ENV_SETTINGS #endif +/* + * Default to using SPI for environment, etc. We have multiple copies + * of SPL as the ROM will check these locations. + * 0x0 - 0x20000 : First copy of SPL + * 0x20000 - 0x40000 : Second copy of SPL + * 0x40000 - 0x60000 : Third copy of SPL + * 0x60000 - 0x80000 : Fourth copy of SPL + * 0x80000 - 0xDF000 : U-Boot + * 0xDF000 - 0xE0000 : U-Boot Environment + * 0xE0000 - 0x442000 : Linux Kernel + * 0x442000 - 0x800000 : Userland + */ +#if defined(CONFIG_SPI_BOOT) +# undef CONFIG_ENV_IS_NOWHERE +# define CONFIG_ENV_IS_IN_SPI_FLASH +# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +# define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ +# define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ +#endif /* SPI support */ + /* Unsupported features */ #undef CONFIG_USE_IRQ @@ -403,10 +422,12 @@ /* CS0 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#if !defined(CONFIG_SPI_BOOT) #undef CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ #endif +#endif #endif /* ! __CONFIG_AM335X_EVM_H */ -- cgit v1.3.1 From 8495faf525be9a8c7c8d608200e8795c2f7b9290 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Tue, 29 Jan 2013 15:43:26 +0000 Subject: ARM: atmel: add at91sam9g20ek_2mmc nand boot support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add at91sam9g20_2mmc nand boot support. on this board, there is no dataflash, so disable it change one commet for at91sam9g20ek board Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- board/atmel/at91sam9260ek/at91sam9260ek.c | 7 ++++++- boards.cfg | 1 + include/configs/at91sam9260ek.h | 2 ++ 3 files changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 25556725242..3aa394a4bb0 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -157,12 +157,17 @@ int board_early_init_f(void) int board_init(void) { +#ifdef CONFIG_AT91SAM9G20EK_2MMC + /* arch number of AT91SAM9G20EK_2MMC-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK_2MMC; +#else #ifdef CONFIG_AT91SAM9G20EK - /* arch number of AT91SAM9260EK-Board */ + /* arch number of AT91SAM9G20EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK; #else /* arch number of AT91SAM9260EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK; +#endif #endif /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; diff --git a/boards.cfg b/boards.cfg index b1319aace0f..32b0ccfac56 100644 --- a/boards.cfg +++ b/boards.cfg @@ -95,6 +95,7 @@ at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91sam9g20ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0 at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1 at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH +at91sam9g20ek_2mmc_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH at91sam9m10g45ek_nandflash arm arm926ejs at91sam9m10g45ek atmel at91 at91sam9m10g45ek:AT91SAM9M10G45,SYS_USE_NANDFLASH at91sam9rlek_dataflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH at91sam9rlek_nandflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index f921fac64d0..02696b30a85 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -126,6 +126,7 @@ #endif /* DataFlash */ +#ifndef CONFIG_AT91SAM9G20EK_2MMC #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) @@ -133,6 +134,7 @@ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ #define AT91_SPI_CLK 15000000 +#endif #ifdef CONFIG_AT91SAM9G20EK #define DATAFLASH_TCSS (0x22 << 16) -- cgit v1.3.1 From 4cfc611b4a4ce009cfad46804bec2a1caad8e329 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 29 Nov 2012 02:53:29 +0000 Subject: ARM: ns9750dev: remove remainders of dead board Commit 8b710b1 started removing code for the unmaintained "ns9750dev" board; the board support is still broken, and not included anywhere in the Makefile or boards.cfg. Remove the remaining dead code. Signed-off-by: Wolfgang Denk --- board/ns9750dev/Makefile | 45 ---- board/ns9750dev/config.mk | 16 -- board/ns9750dev/flash.c | 474 ---------------------------------------- board/ns9750dev/led.c | 46 ---- board/ns9750dev/lowlevel_init.S | 298 ------------------------- board/ns9750dev/ns9750dev.c | 125 ----------- doc/README.ns9750dev | 36 --- doc/README.scrapyard | 1 + doc/driver-model/UDM-serial.txt | 2 +- drivers/serial/Makefile | 1 - drivers/serial/ns9750_serial.c | 218 ------------------ drivers/serial/serial.c | 2 - include/configs/ns9750dev.h | 187 ---------------- include/ns9750_bbus.h | 125 ----------- include/ns9750_mem.h | 172 --------------- include/ns9750_ser.h | 202 ----------------- include/ns9750_sys.h | 215 ------------------ 17 files changed, 2 insertions(+), 2163 deletions(-) delete mode 100644 board/ns9750dev/Makefile delete mode 100644 board/ns9750dev/config.mk delete mode 100644 board/ns9750dev/flash.c delete mode 100644 board/ns9750dev/led.c delete mode 100644 board/ns9750dev/lowlevel_init.S delete mode 100644 board/ns9750dev/ns9750dev.c delete mode 100644 doc/README.ns9750dev delete mode 100644 drivers/serial/ns9750_serial.c delete mode 100644 include/configs/ns9750dev.h delete mode 100644 include/ns9750_bbus.h delete mode 100644 include/ns9750_mem.h delete mode 100644 include/ns9750_ser.h delete mode 100644 include/ns9750_sys.h (limited to 'include') diff --git a/board/ns9750dev/Makefile b/board/ns9750dev/Makefile deleted file mode 100644 index 0d082c56965..00000000000 --- a/board/ns9750dev/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := ns9750dev.o flash.o led.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/ns9750dev/config.mk b/board/ns9750dev/config.mk deleted file mode 100644 index e5d87029d38..00000000000 --- a/board/ns9750dev/config.mk +++ /dev/null @@ -1,16 +0,0 @@ -####################################################################### -# -# Copyright (C) 2004 by FS Forth-Systeme GmbH. -# Markus Pietrek -# -# @TODO -# Linux-Kernel is expected to be at 0000'8000, entry 0000'8000 -# optionally with a ramdisk at 0080'0000 -# -# we load ourself to 0078'0000 -# -# download area is 0060'0000 -# - - -CONFIG_SYS_TEXT_BASE = 0x00780000 diff --git a/board/ns9750dev/flash.c b/board/ns9750dev/flash.c deleted file mode 100644 index 185bc2d73a1..00000000000 --- a/board/ns9750dev/flash.c +++ /dev/null @@ -1,474 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */ -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Board support for 1 or 2 flash devices */ -#undef FLASH_PORT_WIDTH32 -#define FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -#define FLASH_PORT_WIDTH ushort -#define FLASH_PORT_WIDTHV vu_short -#define SWAP(x) __swab16(x) -#else -#define FLASH_PORT_WIDTH ulong -#define FLASH_PORT_WIDTHV vu_long -#define SWAP(x) __swab32(x) -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - - -/* Flash Organization Structure */ -typedef struct OrgDef { - unsigned int sector_number; - unsigned int sector_size; -} OrgDef; - - -/* Flash Organizations */ -OrgDef OrgIntel_28F256L18T[] = { - {4, 32 * 1024}, /* 4 * 32kBytes sectors */ - {255, 128 * 1024}, /* 255 * 128kBytes sectors */ -}; - - -/*----------------------------------------------------------------------- - * Functions - */ -unsigned long flash_init (void); -static ulong flash_get_size (FPW * addr, flash_info_t * info); -static int write_data (flash_info_t * info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t * info); -void inline spin_wheel (void); -void flash_print_info (flash_info_t * info); -void flash_unprotect_sectors (FPWV * addr); -int flash_erase (flash_info_t * info, int s_first, int s_last); -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); - break; - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t * info) -{ - int i; - OrgDef *pOrgDef; - - pOrgDef = OrgIntel_28F256L18T; - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - if (i > 255) { - info->start[i] = base + (i * 0x8000); - info->protect[i] = 0; - } else { - info->start[i] = base + - (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F256L18T: - printf ("FLASH 28F256L18T\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW * addr, flash_info_t * info) -{ - volatile FPW value; - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW) 0x00AA00AA; - addr[0x2AAA] = (FPW) 0x00550055; - addr[0x5555] = (FPW) 0x00900090; - - mb (); - value = addr[0]; - - switch (value) { - - case (FPW) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb (); - value = addr[1]; /* device ID */ - switch (value) { - - case (FPW) (INTEL_ID_28F256L18T): - info->flash_id += FLASH_28F256L18T; - info->sector_count = 259; - info->size = 0x02000000; - break; /* => 32 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - - return (info->size); -} - - -/* unprotects a sector for write and erase - * on some intel parts, this unprotects the entire chip, but it - * wont hurt to call this additional times per sector... - */ -void flash_unprotect_sectors (FPWV * addr) -{ -#define PD_FINTEL_WSMS_READY_MASK 0x0080 - - *addr = (FPW) 0x00500050; /* clear status register */ - - /* this sends the clear lock bit command */ - *addr = (FPW) 0x00600060; - *addr = (FPW) 0x00D000D0; -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag, prot, sect; - ulong type, start; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *) (info->start[sect]); - FPW status; - - printf ("Erasing sector %2d ... ", sect); - - flash_unprotect_sectors (addr); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - *addr = (FPW) 0x00500050;/* clear status register */ - *addr = (FPW) 0x00200020;/* erase setup */ - *addr = (FPW) 0x00D000D0;/* erase confirm */ - - while (((status = - *addr) & (FPW) 0x00800080) != - (FPW) 0x00800080) { - if (get_timer(start) > - CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - /* suspend erase */ - *addr = (FPW) 0x00B000B0; - /* reset to read mode */ - *addr = (FPW) 0x00FF00FF; - rcode = 1; - break; - } - } - - /* clear status register cmd. */ - *addr = (FPW) 0x00500050; - *addr = (FPW) 0x00FF00FF;/* resest to read mode */ - printf (" done\n"); - } - } - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 - wp = (addr & ~1); - port_width = 2; -#else - wp = (addr & ~3); - port_width = 4; -#endif - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data (info, wp, SWAP (data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t * info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *) dest; - ulong status; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); - return (2); - } - flash_unprotect_sectors (addr); - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - *addr = (FPW) 0x00400040; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (1); - } - } - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/ns9750dev/led.c b/board/ns9750dev/led.c deleted file mode 100644 index b85c869d85b..00000000000 --- a/board/ns9750dev/led.c +++ /dev/null @@ -1,46 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id: led.c,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ - * @Author: Markus Pietrek - * @Descr: Defines helper functions for toggeling LEDs - * @Usage: - * @References: [1] - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ***********************************************************************/ - -#ifdef CONFIG_STATUS_LED - -#include - -static inline void __led_init( led_id_t mask, int state ) -{ - XXXX; -} - -static inline void __led_toggle( led_id_t mask ) -{ -} - -static inline void __led_set( led_id_t mask, int state ) -{ -} - -#endif /* CONFIG_STATUS_LED */ diff --git a/board/ns9750dev/lowlevel_init.S b/board/ns9750dev/lowlevel_init.S deleted file mode 100644 index ba5ff8124eb..00000000000 --- a/board/ns9750dev/lowlevel_init.S +++ /dev/null @@ -1,298 +0,0 @@ -/* - * Board specific setup info - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * Modified for the NS9750 DevBoard by - * (C) Copyright 2004 by FS Forth-Systeme GmbH. - * Markus Pietrek - * @References: [1] NS9750 Hardware Reference/December 2003 - * [2] ns9750_a.cmd from MAJIC configuration - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#if defined(CONFIG_NS9750DEV) -# ifndef CONFIG_SKIP_LOWLEVEL_INIT -# include <./ns9750_sys.h> -# include <./ns9750_mem.h> -# endif -#endif - -/*********************************************************************** - * @Function: write_register_block - * @Return: nothing - * @Descr: Copies the register block of register_offset:register value to - * the registers at base r0. The block is assumed to start in RAM at r1 - * and end at r2. The linked RAM base address of U-Boot is assumed to be - * in r5 while the ROM base address we are running from is r6 - * Uses r3 and r4 as tempory registers - ***********************************************************************/ - -.macro write_register_block - @@ map the addresses to high memory - sub r1, r1, r5 - add r1, r1, r6 - sub r2, r2, r5 - add r2, r2, r6 - - @@ copy all -1: - @@ Write register/value pair starting at [r1] to register base r0 - ldr r3, [r1], #4 - ldr r4, [r1], #4 - str r4, [r0,r3] - cmp r1, r2 - blt 1b -.endm - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE @ sdram load addr from config.mk -_PHYS_FLASH: - .word PHYS_FLASH_1 @ real flash address (without mirroring) -_CAS_LATENCY: - .word 0x00022000 @ for CAS2 latency - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT -.globl lowlevel_init -lowlevel_init: - - /* U-Boot may be linked to RAM at 0x780000. But this code will run in - flash from 0x0. But in order to enable RAM we have to disable the - mirror bit, therefore we have to jump to our real flash address - beginning at PHYS_FLASH_1 (CS4 Base). Therefore, - _run_at_real_flash_address may be 0x500003b0 while be linked to - 0x7803b0. So we must modify our linked addresses */ - - @@ branch to high memory address, away from 0x0 - ldr r5, _TEXT_BASE - ldr r6, _PHYS_FLASH - ldr r0, =_run_at_real_flash_address - sub r0, r0, r5 - add r0, r0, r6 - mov pc, r0 - nop @ for pipelining - -_run_at_real_flash_address: - @@ now we are running > PHYS_FLASH_1, safe to enable memory controller - - @@ Write Memory Configuration Registers - - ldr r0, _NS9750_MEM_MODULE_BASE - ldr r1, =_MEM_CONFIG_START - ldr r2, =_MEM_CONFIG_END - - write_register_block - - @@ Give SDRAM some time to settle - @@ @TODO. According to [2] it should be 2 AHB cycles. Check - - ldr r1, =0x50 -_sdram_settle: - subs r1, r1, #1 - bne _sdram_settle - -_enable_mappings: - @@ Enable SDRAM Mode - - ldr r1, =_MEM_MODE_START - ldr r2, =_MEM_MODE_END - - write_register_block - - ldr r3, _CAS_LATENCY @ perform one read from SDRAM - ldr r3, [r3] - - @@ Enable SDRAM and memory mappings - - ldr r1, =_MEM_ENABLE_START - ldr r2, =_MEM_ENABLE_END - - write_register_block - - @@ Activate AHB monitor - - ldr r0, =NS9750_SYS_MODULE_BASE - ldr r1, =_AHB_MONITOR_START - ldr r2, =_AHB_MONITOR_END - - write_register_block -_relocate_lr: - /* lr and ip (from cpu_init_crit) are still based on 0x0, relocate it to - PHYS_FLASH. */ - mov r1, ip - add r1, r1, r6 - mov ip, r1 - - mov r1, lr - add r1, r1, r6 - mov lr, r1 - - @@ back to arch calling code - mov pc, lr - - .ltorg - -_NS9750_MEM_MODULE_BASE: - .word NS9750_MEM_MODULE_BASE - -_MEM_CONFIG_START: - /* Table of 2 32bit entries. First word is register address offset - relative to NS9750_MEM_MODULE_BASE, second one is value. They are - written in order of appearance */ - - @@ Register values taken from [2] - .word NS9750_MEM_CTRL - .word NS9750_MEM_CTRL_E - - .word NS9750_MEM_DYN_REFRESH - .word (0x6 & NS9750_MEM_DYN_REFRESH_MA) - - .word NS9750_MEM_DYN_READ_CFG - .word (0x1 & NS9750_MEM_DYN_READ_CFG_MA) - - .word NS9750_MEM_DYN_TRP - .word (0x1 & NS9750_MEM_DYN_TRP_MA) - - .word NS9750_MEM_DYN_TRAS - .word (0x4 & NS9750_MEM_DYN_TRAS_MA) - - .word NS9750_MEM_DYN_TAPR - .word (0x1 & NS9750_MEM_DYN_TRAS_MA) - - .word NS9750_MEM_DYN_TDAL - .word (0x5 & NS9750_MEM_DYN_TDAL_MA) - - .word NS9750_MEM_DYN_TWR - .word (0x1 & NS9750_MEM_DYN_TWR_MA) - - .word NS9750_MEM_DYN_TRC - .word (0x6 & NS9750_MEM_DYN_TRC_MA) - - .word NS9750_MEM_DYN_TRFC - .word (0x6 & NS9750_MEM_DYN_TRFC_MA) - - .word NS9750_MEM_DYN_TRRD - .word (0x1 & NS9750_MEM_DYN_TRRD_MA) - - .word NS9750_MEM_DYN_TMRD - .word (0x1 & NS9750_MEM_DYN_TMRD_MA) - - @@ CS 4 - .word NS9750_MEM_DYN_CFG(0) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(0) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - @@ CS 5 - .word NS9750_MEM_DYN_CFG(1) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(1) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - @@ CS 6 - .word NS9750_MEM_DYN_CFG(2) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(2) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - @@ CS 7 - .word NS9750_MEM_DYN_CFG(3) - .word (NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - .word NS9750_MEM_DYN_RAS_CAS(3) - .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \ - (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA)) - - .word NS9750_MEM_DYN_CTRL - .word (NS9750_MEM_DYN_CTRL_I_PALL | \ - NS9750_MEM_DYN_CTRL_SR | \ - NS9750_MEM_DYN_CTRL_CE ) - - .word NS9750_MEM_DYN_REFRESH - .word (0x1 & NS9750_MEM_DYN_REFRESH_MA) - @@ No further register settings after refresh -_MEM_CONFIG_END: - -_MEM_MODE_START: - .word NS9750_MEM_DYN_REFRESH - .word (0x30 & NS9750_MEM_DYN_REFRESH_MA) - - .word NS9750_MEM_DYN_CTRL - .word (NS9750_MEM_DYN_CTRL_I_MODE | \ - NS9750_MEM_DYN_CTRL_SR | \ - NS9750_MEM_DYN_CTRL_CE ) -_MEM_MODE_END: - -_MEM_ENABLE_START: - .word NS9750_MEM_DYN_CTRL - .word (NS9750_MEM_DYN_CTRL_I_NORMAL | \ - NS9750_MEM_DYN_CTRL_SR | \ - NS9750_MEM_DYN_CTRL_CE ) - - @@ CS 4 - .word NS9750_MEM_DYN_CFG(0) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - @@ CS 5 - .word NS9750_MEM_DYN_CFG(1) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - @@ CS 6 - .word NS9750_MEM_DYN_CFG(2) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) - - @@ CS 7 - .word NS9750_MEM_DYN_CFG(3) - .word (NS9750_MEM_DYN_CFG_BDMC | \ - NS9750_MEM_DYN_CFG_AM | \ - (0x280 & NS9750_MEM_DYN_CFG_AM_MA)) -_MEM_ENABLE_END: - -_AHB_MONITOR_START: - .word NS9750_SYS_AHB_TIMEOUT - .word 0x01000100 @ @TODO not calculated yet - - .word NS9750_SYS_AHB_MON - .word (NS9750_SYS_AHB_MON_BMTC_GEN_IRQ | \ - NS9750_SYS_AHB_MON_BATC_GEN_IRQ) -_AHB_MONITOR_END: - -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/board/ns9750dev/ns9750dev.c b/board/ns9750dev/ns9750dev.c deleted file mode 100644 index fc46244c74f..00000000000 --- a/board/ns9750dev/ns9750dev.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * Markus Pietrek - * derived from omap1610innovator.c - * @References: [1] NS9750 Hardware Reference/December 2003 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#if defined(CONFIG_NS9750DEV) -# include <./configs/ns9750dev.h> -# include <./ns9750_bbus.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -void flash__init( void ); -void ether__init( void ); - -static inline void delay( unsigned long loops ) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); -} - - -/*********************************************************************** - * @Function: board_init - * @Return: 0 - * @Descr: Enables BBUS modules and other devices - ***********************************************************************/ - -int board_init( void ) -{ - /* Active BBUS modules */ - *get_bbus_reg_addr( NS9750_BBUS_MASTER_RESET ) = 0; - -#warning Please register your machine at http://www.arm.linux.org.uk/developer/machines/?action=new - /* arch number of OMAP 1510-Board */ - /* to be changed for OMAP 1610 Board */ - gd->bd->bi_arch_number = 234; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x10000100; - - -/* this speeds up your boot a quite a bit. However to make it - * work, you need make sure your kernel startup flush bug is fixed. - * ... rkw ... - */ - icache_enable(); - - flash__init(); - ether__init(); - return 0; -} - - -int misc_init_r (void) -{ - /* currently empty */ - return (0); -} - -/****************************** - Routine: - Description: -******************************/ -void flash__init (void) -{ -} -/************************************************************* - Routine:ether__init - Description: take the Ethernet controller out of reset and wait - for the EEPROM load to complete. -*************************************************************/ -void ether__init (void) -{ -} - -/****************************** - Routine: - Description: -******************************/ -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - -#if CONFIG_NR_DRAM_BANKS > 1 - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif - return 0; -} diff --git a/doc/README.ns9750dev b/doc/README.ns9750dev deleted file mode 100644 index 29914406bac..00000000000 --- a/doc/README.ns9750dev +++ /dev/null @@ -1,36 +0,0 @@ -U-Boot Port to the NS9750 DevKit from NetSilicon - -1 Overview -2 Board Configuration -3 Installation - - -1 Overview ----------- - -This port supports these NS9750 features. - -o one UART - -2 Board Configuration ---------------------- - -Switches: -SW10: 4 -SW11: 6,7 -SW16: 6,7,8 -SW17-SW20: 1 -SW4: 3, 6 -SW 1: 1 -SW2: 4 -SW3: 3 -SW8: 3 (rotated by 180 degree!!!!) - -Serial Console is Port B (bottom right port) - -3 Installation --------------- - -Have fun, --- -Markus Pietrek diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 185bd0eef19..e9ca96cba7c 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for... Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= +ns9750dev arm arm926ejs - - Markus Pietrek AMX860 powerpc mpc860 1b0757e 2012-10-28 Wolfgang Denk c2mon powerpc mpc855 1b0757e 2012-10-28 Wolfgang Denk ETX094 powerpc mpc850 1b0757e 2012-10-28 Wolfgang Denk diff --git a/doc/driver-model/UDM-serial.txt b/doc/driver-model/UDM-serial.txt index c6a8ab05212..ef71fea2b8c 100644 --- a/doc/driver-model/UDM-serial.txt +++ b/doc/driver-model/UDM-serial.txt @@ -86,7 +86,7 @@ III) Analysis of in-tree drivers 7) ns9750_serial.c ------------------ - No support for CONFIG_SERIAL_MULTI. Simple conversion possible. + Unmaintained port. Code got removed. 8) opencores_yanu.c ------------------- diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 5e8b64873d9..de3f4719964 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -33,7 +33,6 @@ COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o COBJS-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o COBJS-$(CONFIG_MCFUART) += mcfuart.o -COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o COBJS-$(CONFIG_SYS_NS16550) += ns16550.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o diff --git a/drivers/serial/ns9750_serial.c b/drivers/serial/ns9750_serial.c deleted file mode 100644 index 85fc68a0760..00000000000 --- a/drivers/serial/ns9750_serial.c +++ /dev/null @@ -1,218 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id: ns9750_serial.c,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ - * @Author: Markus Pietrek - * @Descr: Serial driver for the NS9750. Only one UART is supported yet. - * @References: [1] NS9750 Hardware Reference/December 2003 - * @TODO: Implement Character GAP Timer when chip is fixed for PLL bypass - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ***********************************************************************/ - -#include - -#include "ns9750_bbus.h" /* for GPIOs */ -#include "ns9750_ser.h" /* for serial configuration */ - -DECLARE_GLOBAL_DATA_PTR; - -#if !defined(CONFIG_CONS_INDEX) -#error "No console index specified." -#endif - -#define CONSOLE CONFIG_CONS_INDEX - -static unsigned int calcBitrateRegister( void ); -static unsigned int calcRxCharGapRegister( void ); - -static char cCharsAvailable; /* Numbers of chars in unCharCache */ -static unsigned int unCharCache; /* unCharCache is only valid if - * cCharsAvailable > 0 */ - -/*********************************************************************** - * @Function: serial_init - * @Return: 0 - * @Descr: configures GPIOs and UART. Requires BBUS Master Reset turned off - ***********************************************************************/ - -static int ns9750_serial_init(void) -{ - unsigned int aunGPIOTxD[] = { 0, 8, 40, 44 }; - unsigned int aunGPIORxD[] = { 1, 9, 41, 45 }; - - cCharsAvailable = 0; - - /* configure TxD and RxD pins for their special function */ - set_gpio_cfg_reg_val( aunGPIOTxD[ CONSOLE ], - NS9750_GPIO_CFG_FUNC_0 | NS9750_GPIO_CFG_OUTPUT ); - set_gpio_cfg_reg_val( aunGPIORxD[ CONSOLE ], - NS9750_GPIO_CFG_FUNC_0 | NS9750_GPIO_CFG_INPUT ); - - /* configure serial engine */ - *get_ser_reg_addr_channel( NS9750_SER_CTRL_A, CONSOLE ) = - NS9750_SER_CTRL_A_CE | - NS9750_SER_CTRL_A_STOP | - NS9750_SER_CTRL_A_WLS_8; - - serial_setbrg(); - - *get_ser_reg_addr_channel( NS9750_SER_CTRL_B, CONSOLE ) = - NS9750_SER_CTRL_B_RCGT; - - return 0; -} - -/*********************************************************************** - * @Function: serial_putc - * @Return: n/a - * @Descr: writes one character to the FIFO. Blocks until FIFO is not full - ***********************************************************************/ - -static void ns9750_serial_putc(const char c) -{ - if (c == '\n') - serial_putc( '\r' ); - - while (!(*get_ser_reg_addr_channel( NS9750_SER_STAT_A, CONSOLE) & - NS9750_SER_STAT_A_TRDY ) ) { - /* do nothing, wait for characters in FIFO sent */ - } - - *(volatile char*) get_ser_reg_addr_channel( NS9750_SER_FIFO, - CONSOLE) = c; -} - -/*********************************************************************** - * @Function: serial_getc - * @Return: the character read - * @Descr: performs only 8bit accesses to the FIFO. No error handling - ***********************************************************************/ - -static int ns9750_serial_getc(void) -{ - int i; - - while (!serial_tstc() ) { - /* do nothing, wait for incoming characters */ - } - - /* at least one character in unCharCache */ - i = (int) (unCharCache & 0xff); - - unCharCache >>= 8; - cCharsAvailable--; - - return i; -} - -/*********************************************************************** - * @Function: serial_tstc - * @Return: 0 if no input available, otherwise != 0 - * @Descr: checks for incoming FIFO not empty. Stores the incoming chars in - * unCharCache and the numbers of characters in cCharsAvailable - ***********************************************************************/ - -static int ns9750_serial_tstc(void) -{ - unsigned int unRegCache; - - if ( cCharsAvailable ) - return 1; - - unRegCache = *get_ser_reg_addr_channel( NS9750_SER_STAT_A,CONSOLE ); - if( unRegCache & NS9750_SER_STAT_A_RBC ) { - *get_ser_reg_addr_channel( NS9750_SER_STAT_A, CONSOLE ) = - NS9750_SER_STAT_A_RBC; - unRegCache = *get_ser_reg_addr_channel( NS9750_SER_STAT_A, - CONSOLE ); - } - - if ( unRegCache & NS9750_SER_STAT_A_RRDY ) { - cCharsAvailable = (unRegCache & NS9750_SER_STAT_A_RXFDB_MA)>>20; - if ( !cCharsAvailable ) - cCharsAvailable = 4; - - unCharCache = *get_ser_reg_addr_channel( NS9750_SER_FIFO, - CONSOLE ); - return 1; - } - - /* no chars available */ - return 0; -} - -static void ns9750_serial_setbrg(void) -{ - *get_ser_reg_addr_channel( NS9750_SER_BITRATE, CONSOLE ) = - calcBitrateRegister(); - *get_ser_reg_addr_channel( NS9750_SER_RX_CHAR_TIMER, CONSOLE ) = - calcRxCharGapRegister(); -} - -/*********************************************************************** - * @Function: calcBitrateRegister - * @Return: value for the serial bitrate register - * @Descr: register value depends on clock frequency and baudrate - ***********************************************************************/ - -static unsigned int calcBitrateRegister( void ) -{ - return ( NS9750_SER_BITRATE_EBIT | - NS9750_SER_BITRATE_CLKMUX_BCLK | - NS9750_SER_BITRATE_TMODE | - NS9750_SER_BITRATE_TCDR_16 | - NS9750_SER_BITRATE_RCDR_16 | - ( ( ( ( CONFIG_SYS_CLK_FREQ / 8 ) / /* BBUS clock,[1] Fig. 38 */ - ( gd->baudrate * 16 ) ) - 1 ) & - NS9750_SER_BITRATE_N_MA ) ); -} - -/*********************************************************************** - * @Function: calcRxCharGapRegister - * @Return: value for the character gap timer register - * @Descr: register value depends on clock frequency and baudrate. Currently 0 - * is used as there is a bug with the gap timer in PLL bypass mode. - ***********************************************************************/ - -static unsigned int calcRxCharGapRegister( void ) -{ - return NS9750_SER_RX_CHAR_TIMER_TRUN; -} - -static struct serial_device ns9750_serial_drv = { - .name = "ns9750_serial", - .start = ns9750_serial_init, - .stop = NULL, - .setbrg = ns9750_serial_setbrg, - .putc = ns9750_serial_putc, - .puts = default_serial_puts, - .getc = ns9750_serial_getc, - .tstc = ns9750_serial_tstc, -}; - -void ns9750_serial_initialize(void) -{ - serial_register(&ns9750_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &ns9750_serial_drv; -} diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 1f8955a0fdb..7922bf0669a 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -164,7 +164,6 @@ serial_initfunc(altera_serial_initialize); serial_initfunc(atmel_serial_initialize); serial_initfunc(lpc32xx_serial_initialize); serial_initfunc(mcf_serial_initialize); -serial_initfunc(ns9750_serial_initialize); serial_initfunc(oc_serial_initialize); serial_initfunc(s3c64xx_serial_initialize); serial_initfunc(sandbox_serial_initialize); @@ -259,7 +258,6 @@ void serial_initialize(void) atmel_serial_initialize(); lpc32xx_serial_initialize(); mcf_serial_initialize(); - ns9750_serial_initialize(); oc_serial_initialize(); s3c64xx_serial_initialize(); sandbox_serial_initialize(); diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h deleted file mode 100644 index 3f49c6f0b13..00000000000 --- a/include/configs/ns9750dev.h +++ /dev/null @@ -1,187 +0,0 @@ -/* - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * Markus Pietrek - * - * Configuation settings for the NetSilicon NS9750 DevBoard - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#define CONFIG_NS9750 1 /* in an NetSilicon NS9750 SoC */ -#define CONFIG_NS9750DEV 1 /* on an NetSilicon NS9750 DevBoard */ - -/* input clock of PLL */ -#define CONFIG_SYS_CLK_FREQ 324403200 /* Don't use PLL. SW11-4 off */ - -#define CPU_CLK_FREQ (CONFIG_SYS_CLK_FREQ/2) -#define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4) -#define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8) - -/*@TODO #define CONFIG_STATUS_LED*/ -#define CONFIG_USE_IRQ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_NS9750_UART 1 /* use on-chip UART */ - -/* - * select serial console configuration - */ -#define CONFIG_CONS_INDEX 1 /* Port B */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 38400 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ - -#define CONFIG_CMD_BDI -#define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_PING - - -#define CONFIG_BOOTDELAY 3 -/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */ - -#define CONFIG_ETHADDR 00:04:f3:ff:ff:fb /*@TODO unset */ -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.42.30 -#define CONFIG_SERVERIP 192.168.42.1 - -/*#define CONFIG_BOOTFILE "elinos-lart" */ -/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -/* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "NS9750DEV # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */ - -#define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */ - -#define CONFIG_SYS_HZ (CPU_CLK_FREQ/64) - -#define NS9750_ETH_PHY_ADDRESS (0x0000) - -/*----------------------------------------------------------------------- - * Stack sizes - */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -/* TODO */ -#define CONFIG_NR_DRAM_BANKS 2 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */ -#define PHYS_SDRAM_2 0x10000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */ - -#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* @TODO*/ -#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */ -#if 0 -#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ -#endif - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#ifdef CONFIG_AMD_LV800 -#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ -#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ -#endif -#ifdef CONFIG_AMD_LV400 -#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ -#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */ -#endif - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -/* @TODO */ -/*#define CONFIG_ENV_IS_IN_FLASH 1*/ -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ - -#ifdef CONFIG_STATUS_LED - -extern void __led_init(led_id_t mask, int state); -extern void __led_toggle(led_id_t mask); -extern void __led_set(led_id_t mask, int state); - -#endif /* CONFIG_STATUS_LED */ - -#endif /* __CONFIG_H */ diff --git a/include/ns9750_bbus.h b/include/ns9750_bbus.h deleted file mode 100644 index 9485338f734..00000000000 --- a/include/ns9750_bbus.h +++ /dev/null @@ -1,125 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id: ns9750_bbus.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ - * @Author: Markus Pietrek - * @Descr: Definitions for BBus usage - * @References: [1] NS9750 Hardware Reference Manual/December 2003 Chap. 10 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * - ***********************************************************************/ - -#ifndef FS_NS9750_BBUS_H -#define FS_NS9750_BBUS_H - -#define NS9750_BBUS_MODULE_BASE (0x90600000) - -#define get_bbus_reg_addr(c) \ - ((volatile unsigned int *)(NS9750_BBUS_MODULE_BASE+(unsigned int) (c))) - -/* We have support for 50 GPIO pins */ - -#define get_gpio_cfg_reg_addr(pin) \ - get_bbus_reg_addr( NS9750_BBUS_GPIO_CFG_BASE + (((pin) >> 3) * 4) ) - -/* To Read/Modify/Write a pin configuration register, use it like - set_gpio_cfg_reg_val( 12, NS9750_GPIO_CFG_FUNC_GPIO|NS9750_GPIO_CFG_OUTPUT ); - They should be wrapped by cli()/sti() */ -#define set_gpio_cfg_reg_val(pin,cfg) \ - *get_gpio_cfg_reg_addr(pin)=(*get_gpio_cfg_reg_addr((pin)) & \ - ~NS9750_GPIO_CFG_MASK((pin))) |\ - NS9750_GPIO_CFG_VAL((pin),(cfg)); - -#define NS9750_GPIO_CFG_MASK(pin) (NS9750_GPIO_CFG_VAL(pin, \ - NS9750_GPIO_CFG_MA)) -#define NS9750_GPIO_CFG_VAL(pin,cfg) ((cfg) << (((pin) % 8) * 4)) - -#define NS9750_GPIO_CFG_MA (0x0F) -#define NS9750_GPIO_CFG_INPUT (0x00) -#define NS9750_GPIO_CFG_OUTPUT (0x08) -#define NS9750_GPIO_CFG_FUNC_GPIO (0x03) -#define NS9750_GPIO_CFG_FUNC_2 (0x02) -#define NS9750_GPIO_CFG_FUNC_1 (0x01) -#define NS9750_GPIO_CFG_FUNC_0 (0x00) - -/* the register addresses */ - -#define NS9750_BBUS_MASTER_RESET (0x00) -#define NS9750_BBUS_GPIO_CFG_BASE (0x10) -#define NS9750_BBUS_GPIO_CTRL_BASE (0x30) -#define NS9750_BBUS_GPIO_STAT_BASE (0x40) -#define NS9750_BBUS_MONITOR (0x50) -#define NS9750_BBUS_DMA_INT_STAT (0x60) -#define NS9750_BBUS_DMA_INT_ENABLE (0x64) -#define NS9750_BBUS_USB_CFG (0x70) -#define NS9750_BBUS_ENDIAN_CFG (0x80) -#define NS9750_BBUS_ARM_WAKE_UP (0x90) - -/* register bit fields */ - -#define NS9750_BBUS_MASTER_RESET_UTIL (0x00000100) -#define NS9750_BBUS_MASTER_RESET_I2C (0x00000080) -#define NS9750_BBUS_MASTER_RESET_1284 (0x00000040) -#define NS9750_BBUS_MASTER_RESET_SER4 (0x00000020) -#define NS9750_BBUS_MASTER_RESET_SER3 (0x00000010) -#define NS9750_BBUS_MASTER_RESET_SER2 (0x00000008) -#define NS9750_BBUS_MASTER_RESET_SER1 (0x00000004) -#define NS9750_BBUS_MASTER_RESET_USB (0x00000002) -#define NS9750_BBUS_MASTER_RESET_DMA (0x00000001) - -/* BS9750_BBUS_DMA_INT_BINT* are valid for *DMA_INT_STAT and *DMA_INT_ENABLE */ - -#define NS9750_BBUS_DMA_INT_BINT16 (0x00010000) -#define NS9750_BBUS_DMA_INT_BINT15 (0x00008000) -#define NS9750_BBUS_DMA_INT_BINT14 (0x00004000) -#define NS9750_BBUS_DMA_INT_BINT13 (0x00002000) -#define NS9750_BBUS_DMA_INT_BINT12 (0x00001000) -#define NS9750_BBUS_DMA_INT_BINT11 (0x00000800) -#define NS9750_BBUS_DMA_INT_BINT10 (0x00000400) -#define NS9750_BBUS_DMA_INT_BINT9 (0x00000200) -#define NS9750_BBUS_DMA_INT_BINT8 (0x00000100) -#define NS9750_BBUS_DMA_INT_BINT7 (0x00000080) -#define NS9750_BBUS_DMA_INT_BINT6 (0x00000040) -#define NS9750_BBUS_DMA_INT_BINT5 (0x00000020) -#define NS9750_BBUS_DMA_INT_BINT4 (0x00000010) -#define NS9750_BBUS_DMA_INT_BINT3 (0x00000008) -#define NS9750_BBUS_DMA_INT_BINT2 (0x00000004) -#define NS9750_BBUS_DMA_INT_BINT1 (0x00000002) -#define NS9750_BBUS_DMA_INT_BINT0 (0x00000001) - -#define NS9750_BBUS_USB_CFG_OUTEN (0x00000008) -#define NS9750_BBUS_USB_CFG_SPEED (0x00000004) -#define NS9750_BBUS_USB_CFG_CFG_MA (0x00000003) -#define NS9750_BBUS_USB_CFG_CFG_HOST_SOFT (0x00000003) -#define NS9750_BBUS_USB_CFG_CFG_DEVICE (0x00000002) -#define NS9750_BBUS_USB_CFG_CFG_HOST (0x00000001) -#define NS9750_BBUS_USB_CFG_CFG_DIS (0x00000000) - -#define NS9750_BBUS_ENDIAN_CFG_AHBM (0x00001000) -#define NS9750_BBUS_ENDIAN_CFG_I2C (0x00000080) -#define NS9750_BBUS_ENDIAN_CFG_IEEE1284 (0x00000040) -#define NS9750_BBUS_ENDIAN_CFG_SER4 (0x00000020) -#define NS9750_BBUS_ENDIAN_CFG_SER3 (0x00000010) -#define NS9750_BBUS_ENDIAN_CFG_SER2 (0x00000008) -#define NS9750_BBUS_ENDIAN_CFG_SER1 (0x00000004) -#define NS9750_BBUS_ENDIAN_CFG_USB (0x00000002) -#define NS9750_BBUS_ENDIAN_CFG_DMA (0x00000001) - -#endif /* FS_NS9750_BBUS_H */ diff --git a/include/ns9750_mem.h b/include/ns9750_mem.h deleted file mode 100644 index 666e4127c8f..00000000000 --- a/include/ns9750_mem.h +++ /dev/null @@ -1,172 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id: ns9750_mem.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ - * @Author: Markus Pietrek - * @Descr: Definitions for Memory Control Module - * @References: [1] NS9750 Hardware Reference Manual/December 2003 Chap. 5 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ***********************************************************************/ - -#ifndef FS_NS9750_MEM_H -#define FS_NS9750_SYS_H - -#define NS9750_MEM_MODULE_BASE (0xA0700000) - -#define get_mem_reg_addr(c) \ - ((volatile unsigned int *)(NS9750_MEM_MODULE_BASE+(unsigned int) (c))) - -/* the register addresses */ - -#define NS9750_MEM_CTRL (0x0000) -#define NS9750_MEM_STATUS (0x0004) -#define NS9750_MEM_CFG (0x0008) -#define NS9750_MEM_DYN_CTRL (0x0020) -#define NS9750_MEM_DYN_REFRESH (0x0024) -#define NS9750_MEM_DYN_READ_CFG (0x0028) -#define NS9750_MEM_DYN_TRP (0x0030) -#define NS9750_MEM_DYN_TRAS (0x0034) -#define NS9750_MEM_DYN_TSREX (0x0038) -#define NS9750_MEM_DYN_TAPR (0x003C) -#define NS9750_MEM_DYN_TDAL (0x0040) -#define NS9750_MEM_DYN_TWR (0x0044) -#define NS9750_MEM_DYN_TRC (0x0048) -#define NS9750_MEM_DYN_TRFC (0x004C) -#define NS9750_MEM_DYN_TXSR (0x0050) -#define NS9750_MEM_DYN_TRRD (0x0054) -#define NS9750_MEM_DYN_TMRD (0x0058) -#define NS9750_MEM_STAT_EXT_WAIT (0x0080) -#define NS9750_MEM_DYN_CFG_BASE (0x0100) -#define NS9750_MEM_DYN_RAS_CAS_BASE (0x0104) -#define NS9750_MEM_STAT_CFG_BASE (0x0200) -#define NS9750_MEM_STAT_WAIT_WEN_BASE (0x0204) -#define NS9750_MEM_STAT_WAIT_OEN_BASE (0x0208) -#define NS9750_MEM_STAT_WAIT_RD_BASE (0x020C) -#define NS9750_MEM_STAT_WAIT_PAGE_BASE (0x0210) -#define NS9750_MEM_STAT_WAIR_WR_BASE (0x0214) -#define NS9750_MEM_STAT_WAIT_TURN_BASE (0x0218) - -/* the vectored register addresses */ - -#define NS9750_MEM_DYN_CFG(c) (NS9750_MEM_DYN_CFG_BASE + (c)*0x20) -#define NS9750_MEM_DYN_RAS_CAS(c) (NS9750_MEM_DYN_RAS_CAS_BASE + (c)*0x20) -#define NS9750_MEM_STAT_CFG(c) (NS9750_MEM_STAT_CFG_BASE + (c)*0x20) -#define NS9750_MEM_STAT_WAIT_WEN(c) (NS9750_MEM_STAT_WAIT_WEN_BASE+(c)*0x20) -#define NS9750_MEM_STAT_WAIT_OEN(c) (NS9750_MEM_STAT_WAIT_OEN_BASE+(c)*0x20) -#define NS9750_MEM_STAT_RD(c) (NS9750_MEM_STAT_WAIT_RD_BASE+(c)*0x20) -#define NS9750_MEM_STAT_PAGE(c) (NS9750_MEM_STAT_WAIT_PAGE_BASE+(c)*0x20) -#define NS9750_MEM_STAT_WR(c) (NS9750_MEM_STAT_WAIT_WR_BASE+(c)*0x20) -#define NS9750_MEM_STAT_TURN(c) (NS9750_MEM_STAT_WAIT_TURN_BASE+(c)*0x20) - -/* register bit fields */ - -#define NS9750_MEM_CTRL_L (0x00000004) -#define NS9750_MEM_CTRL_M (0x00000002) -#define NS9750_MEM_CTRL_E (0x00000001) - -#define NS9750_MEM_STAT_SA (0x00000004) -#define NS9750_MEM_STAT_S (0x00000002) -#define NS9750_MEM_STAT_B (0x00000001) - -#define NS9750_MEM_CFG_CLK (0x00000010) -#define NS9750_MEM_CFG_N (0x00000001) - -#define NS9750_MEM_DYN_CTRL_NRP (0x00004000) -#define NS9750_MEM_DYN_CTRL_DP (0x00002000) -#define NS9750_MEM_DYN_CTRL_I_MA (0x00000180) -#define NS9750_MEM_DYN_CTRL_I_NORMAL (0x00000000) -#define NS9750_MEM_DYN_CTRL_I_MODE (0x00000080) -#define NS9750_MEM_DYN_CTRL_I_PALL (0x00000100) -#define NS9750_MEM_DYN_CTRL_I_NOP (0x00000180) -#define NS9750_MEM_DYN_CTRL_SR (0x00000002) -#define NS9750_MEM_DYN_CTRL_CE (0x00000001) - - -#define NS9750_MEM_DYN_REFRESH_MA (0x000007FF) - -#define NS9750_MEM_DYN_READ_CFG_MA (0x00000003) -#define NS9750_MEM_DYN_READ_CFG_DELAY0 (0x00000001) -#define NS9750_MEM_DYN_READ_CFG_DELAY1 (0x00000002) -#define NS9750_MEM_DYN_READ_CFG_DELAY2 (0x00000003) - -#define NS9750_MEM_DYN_TRP_MA (0x0000000F) - -#define NS9750_MEM_DYN_TRAS_MA (0x0000000F) - -#define NS9750_MEM_DYN_TSREX_MA (0x0000000F) - -#define NS9750_MEM_DYN_TAPR_MA (0x0000000F) - -#define NS9750_MEM_DYN_TDAL_MA (0x0000000F) - -#define NS9750_MEM_DYN_TWR_MA (0x0000000F) - -#define NS9750_MEM_DYN_TRC_MA (0x0000001F) - -#define NS9750_MEM_DYN_TRFC_MA (0x0000001F) - -#define NS9750_MEM_DYN_TXSR_MA (0x0000001F) - -#define NS9750_MEM_DYN_TRRD_MA (0x0000000F) - -#define NS9750_MEM_DYN_TMRD_MA (0x0000000F) - -#define NS9750_MEM_STAT_EXTW_WAIT_MA (0x0000003F) - -#define NS9750_MEM_DYN_CFG_P (0x00100000) -#define NS9750_MEM_DYN_CFG_BDMC (0x00080000) -#define NS9750_MEM_DYN_CFG_AM (0x00004000) -#define NS9750_MEM_DYN_CFG_AM_MA (0x00001F80) -#define NS9750_MEM_DYN_CFG_MD (0x00000018) - -#define NS9750_MEM_DYN_RAS_CAS_CAS_MA (0x00000300) -#define NS9750_MEM_DYN_RAS_CAS_CAS_1 (0x00000100) -#define NS9750_MEM_DYN_RAS_CAS_CAS_2 (0x00000200) -#define NS9750_MEM_DYN_RAS_CAS_CAS_3 (0x00000300) -#define NS9750_MEM_DYN_RAS_CAS_RAS_MA (0x00000003) -#define NS9750_MEM_DYN_RAS_CAS_RAS_1 (0x00000001) -#define NS9750_MEM_DYN_RAS_CAS_RAS_2 (0x00000002) -#define NS9750_MEM_DYN_RAS_CAS_RAS_3 (0x00000003) - -#define NS9750_MEM_STAT_CFG_PSMC (0x00100000) -#define NS9750_MEM_STAT_CFG_BSMC (0x00080000) -#define NS9750_MEM_STAT_CFG_EW (0x00000100) -#define NS9750_MEM_STAT_CFG_PB (0x00000080) -#define NS9750_MEM_STAT_CFG_PC (0x00000040) -#define NS9750_MEM_STAT_CFG_PM (0x00000008) -#define NS9750_MEM_STAT_CFG_MW_MA (0x00000003) -#define NS9750_MEM_STAT_CFG_MW_8 (0x00000000) -#define NS9750_MEM_STAT_CFG_MW_16 (0x00000001) -#define NS9750_MEM_STAT_CFG_MW_32 (0x00000002) - -#define NS9750_MEM_STAT_WAIT_WEN_MA (0x0000000F) - -#define NS9750_MEM_STAT_WAIT_OEN_MA (0x0000000F) - -#define NS9750_MEM_STAT_WAIT_RD_MA (0x0000001F) - -#define NS9750_MEM_STAT_WAIT_PAGE_MA (0x0000001F) - -#define NS9750_MEM_STAT_WAIT_WR_MA (0x0000001F) - -#define NS9750_MEM_STAT_WAIT_TURN_MA (0x0000000F) - - -#endif /* FS_NS9750_MEM_H */ diff --git a/include/ns9750_ser.h b/include/ns9750_ser.h deleted file mode 100644 index b5c297e436c..00000000000 --- a/include/ns9750_ser.h +++ /dev/null @@ -1,202 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id: ns9750_ser.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ - * @Author: Markus Pietrek - * @References: [1] NS9750 Hardware Reference, December 2003 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ***********************************************************************/ - -#ifndef FS_NS9750_SER_H -#define FS_NS9750_SER_H - -#define NS9750_SER_MODULE_BASE (0x90200000) - -#define get_ser_reg_addr(c) \ - ((volatile unsigned int *)(NS9750_SER_MODULE_BASE+(unsigned int) (c))) - -#define get_ser_reg_addr_channel(reg,chan) \ - get_ser_reg_addr((reg)+(((chan)<2)?0:0x00100000)+(((chan)&1)?0x40:0)) - -/* the register addresses */ - -#define NS9750_SER_CTRL_A (0x00) -#define NS9750_SER_CTRL_B (0x04) -#define NS9750_SER_STAT_A (0x08) -#define NS9750_SER_BITRATE (0x0C) -#define NS9750_SER_FIFO (0x10) -#define NS9750_SER_RX_BUF_TIMER (0x14) -#define NS9750_SER_RX_CHAR_TIMER (0x18) -#define NS9750_SER_RX_MATCH (0x1C) -#define NS9750_SER_RX_MATCH_MASK (0x20) -#define NS9750_SER_FLOW_CTRL (0x34) -#define NS9750_SER_FLOW_CTRL_FORCE (0x38) - -/* register bit fields */ - -/* control A register */ - -#define NS9750_SER_CTRL_A_CE (0x80000000) -#define NS9750_SER_CTRL_A_BRK (0x40000000) -#define NS9750_SER_CTRL_A_STICKP (0x20000000) -#define NS9750_SER_CTRL_A_EPS (0x10000000) -#define NS9750_SER_CTRL_A_PE (0x08000000) -#define NS9750_SER_CTRL_A_STOP (0x04000000) -#define NS9750_SER_CTRL_A_WLS_MA (0x03000000) -#define NS9750_SER_CTRL_A_WLS_5 (0x00000000) -#define NS9750_SER_CTRL_A_WLS_6 (0x01000000) -#define NS9750_SER_CTRL_A_WLS_7 (0x02000000) -#define NS9750_SER_CTRL_A_WLS_8 (0x03000000) -#define NS9750_SER_CTRL_A_CTSTX (0x00800000) -#define NS9750_SER_CTRL_A_RTSRX (0x00400000) -#define NS9750_SER_CTRL_A_RL (0x00200000) -#define NS9750_SER_CTRL_A_LL (0x00100000) -#define NS9750_SER_CTRL_A_RES (0x000CF000) -#define NS9750_SER_CTRL_A_DTR (0x00020000) -#define NS9750_SER_CTRL_A_RTS (0x00010000) -#define NS9750_SER_CTRL_A_RIE_MA (0x00000E00) -#define NS9750_SER_CTRL_A_ERXDMA (0x00000100) -#define NS9750_SER_CTRL_A_RIC_MA (0x000000E0) -#define NS9750_SER_CTRL_A_TIC_MA (0x0000001E) -#define NS9750_SER_CTRL_A_ETXDMA (0x00000001) - -/* control B register */ - -#define NS9750_SER_CTRL_B_RDM1 (0x80000000) -#define NS9750_SER_CTRL_B_RDM2 (0x40000000) -#define NS9750_SER_CTRL_B_RDM3 (0x20000000) -#define NS9750_SER_CTRL_B_RDM4 (0x10000000) -#define NS9750_SER_CTRL_B_RBGT (0x08000000) -#define NS9750_SER_CTRL_B_RCGT (0x04000000) -#define NS9750_SER_CTRL_B_MODE_MA (0x00300000) -#define NS9750_SER_CTRL_B_MODE_UART (0x00000000) -#define NS9750_SER_CTRL_B_MODE_HDLC (0x00100000) -#define NS9750_SER_CTRL_B_MODE_SPI_M (0x00200000) -#define NS9750_SER_CTRL_B_MODE_SPI_S (0x00300000) -#define NS9750_SER_CTRL_B_BITORDR (0x00080000) -#define NS9750_SER_CTRL_B_RES (0x0007703F) -#define NS9750_SER_CTRL_B_RTSTX (0x00008000) -#define NS9750_SER_CTRL_B_ENDEC_MA (0x00000FC0) - -/* status A register */ - -#define NS9750_SER_STAT_A_MATCH1 (0x80000000) -#define NS9750_SER_STAT_A_MATCH2 (0x40000000) -#define NS9750_SER_STAT_A_MATCH3 (0x20000000) -#define NS9750_SER_STAT_A_MATCH4 (0x10000000) -#define NS9750_SER_STAT_A_BGAP (0x08000000) -#define NS9750_SER_STAT_A_CGAP (0x04000000) -#define NS9750_SER_STAT_A_RXFDB_MA (0x00300000) -#define NS9750_SER_STAT_A_RXFDB_FULL (0x00000000) -#define NS9750_SER_STAT_A_RXFDB_1 (0x00100000) -#define NS9750_SER_STAT_A_RXFDB_2 (0x00200000) -#define NS9750_SER_STAT_A_RXFDB_3 (0x00300000) -#define NS9750_SER_STAT_A_DCD (0x00080000) -#define NS9750_SER_STAT_A_RI (0x00040000) -#define NS9750_SER_STAT_A_DSR (0x00020000) -#define NS9750_SER_STAT_A_CTS (0x00010000) -#define NS9750_SER_STAT_A_RBRK (0x00008000) -#define NS9750_SER_STAT_A_RFE (0x00004000) -#define NS9750_SER_STAT_A_RPE (0x00002000) -#define NS9750_SER_STAT_A_ROVER (0x00001000) -#define NS9750_SER_STAT_A_RRDY (0x00000800) -#define NS9750_SER_STAT_A_RHALF (0x00000400) -#define NS9750_SER_STAT_A_RBC (0x00000200) -#define NS9750_SER_STAT_A_RFULL (0x00000100) -#define NS9750_SER_STAT_A_DCDI (0x00000080) -#define NS9750_SER_STAT_A_RII (0x00000040) -#define NS9750_SER_STAT_A_DSRI (0x00000020) -#define NS9750_SER_STAT_A_CTSI (0x00000010) -#define NS9750_SER_STAT_A_TRDY (0x00000008) -#define NS9750_SER_STAT_A_THALF (0x00000004) -#define NS9750_SER_STAT_A_TBC (0x00000002) -#define NS9750_SER_STAT_A_TEMPTY (0x00000001) - -#define NS9750_SER_STAT_A_RX_COND_ERR ( NS9750_SER_STAT_A_RFE | \ - NS9750_SER_STAT_A_ROVER | \ - NS9750_SER_STAT_A_RPE ) -#define NS9750_SER_STAT_A_RX_COND_ALL ( NS9750_SER_STAT_A_RX_COND_ERR | \ - NS9750_SER_STAT_A_RBRK | \ - NS9750_SER_STAT_A_RRDY | \ - NS9750_SER_STAT_A_RHALF | \ - NS9750_SER_STAT_A_RBC | \ - NS9750_SER_STAT_A_DCDI | \ - NS9750_SER_STAT_A_RII | \ - NS9750_SER_STAT_A_DSRI | \ - NS9750_SER_STAT_A_CTSI ) -#define NS9750_SER_STAT_A_TX_COND_ALL ( NS9750_SER_STAT_A_TRDY | \ - NS9750_SER_STAT_A_THALF | \ - NS9750_SER_STAT_A_TBC | \ - NS9750_SER_STAT_A_TEMPTY ) -/* bit rate register */ - -#define NS9750_SER_BITRATE_EBIT (0x80000000) -#define NS9750_SER_BITRATE_TMODE (0x40000000) -#define NS9750_SER_BITRATE_RXSRC (0x20000000) -#define NS9750_SER_BITRATE_TXSRC (0x10000000) -#define NS9750_SER_BITRATE_RXEXT (0x08000000) -#define NS9750_SER_BITRATE_TXEXT (0x04000000) -#define NS9750_SER_BITRATE_CLKMUX_MA (0x03000000) -#define NS9750_SER_BITRATE_CLKMUX_XTAL (0x00000000) -#define NS9750_SER_BITRATE_CLKMUX_BCLK (0x01000000) -#define NS9750_SER_BITRATE_CLKMUX_OUT1 (0x02000000) -#define NS9750_SER_BITRATE_CLKMUX_OUT2 (0x03000000) -#define NS9750_SER_BITRATE_TXCINV (0x00800000) -#define NS9750_SER_BITRATE_RXCINV (0x00400000) -#define NS9750_SER_BITRATE_TCDR_MA (0x00180000) -#define NS9750_SER_BITRATE_TCDR_1 (0x00000000) -#define NS9750_SER_BITRATE_TCDR_8 (0x00080000) -#define NS9750_SER_BITRATE_TCDR_16 (0x00100000) -#define NS9750_SER_BITRATE_TCDR_32 (0x00180000) -#define NS9750_SER_BITRATE_RCDR_MA (0x00070000) -#define NS9750_SER_BITRATE_RCDR_1 (0x00000000) -#define NS9750_SER_BITRATE_RCDR_8 (0x00020000) -#define NS9750_SER_BITRATE_RCDR_16 (0x00040000) -#define NS9750_SER_BITRATE_RCDR_32 (0x00060000) -#define NS9750_SER_BITRATE_TICS (0x00010000) -#define NS9750_SER_BITRATE_RICS (0x00008000) -#define NS9750_SER_BITRATE_N_MA (0x00007FFF) - -/* receive buffer gap timer */ - -#define NS9750_SER_RX_BUF_TIMER_TRUN (0x80000000) /* UART and SPI */ -#define NS9750_SER_RX_BUF_TIMER_BT_MA (0x0000FFFF) /* UART and SPI */ -#define NS9750_SER_RX_BUF_TIMER_MAXLEN_MA (0x0000FFFF) /* HDLC only */ - -/* receive character gap timer */ - -#define NS9750_SER_RX_CHAR_TIMER_TRUN (0x80000000) -#define NS9750_SER_RX_CHAR_TIMER_CT_MA (0x000FFFFF) - -/* receive match */ - -#define NS9750_SER_RX_MATCH_RDMB1_MA (0xFF000000) -#define NS9750_SER_RX_MATCH_RDMB2_MA (0x00FF0000) -#define NS9750_SER_RX_MATCH_RDMB3_MA (0x0000FF00) -#define NS9750_SER_RX_MATCH_RDMB4_MA (0x000000FF) - -/* receive match mask */ - -#define NS9750_SER_RX_MATCH_MASK_RDMB1_MA (0xFF000000) -#define NS9750_SER_RX_MATCH_MASK_RDMB2_MA (0x00FF0000) -#define NS9750_SER_RX_MATCH_MASK_RDMB3_MA (0x0000FF00) -#define NS9750_SER_RX_MATCH_MASK_RDMB4_MA (0x000000FF) - -#endif /* FS_NS9750_SER_H */ diff --git a/include/ns9750_sys.h b/include/ns9750_sys.h deleted file mode 100644 index f1dc2b23820..00000000000 --- a/include/ns9750_sys.h +++ /dev/null @@ -1,215 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2004 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id: ns9750_sys.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ - * @Author: Markus Pietrek - * @Descr: Definitions for SYS Control Module - * @References: [1] NS9750 Hardware Reference Manual/December 2003 Chap. 4 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ***********************************************************************/ - -#ifndef FS_NS9750_SYS_H -#define FS_NS9750_SYS_H - -#define NS9750_SYS_MODULE_BASE (0xA0900000) - -#define get_sys_reg_addr(c) \ - ((volatile unsigned int *)(NS9750_SYS_MODULE_BASE+(unsigned int) (c))) - -/* the register addresses */ - -#define NS9750_SYS_AHB_GEN (0x0000) -#define NS9750_SYS_BRC_BASE (0x0004) -#define NS9750_SYS_AHB_TIMEOUT (0x0014) -#define NS9750_SYS_AHB_ERROR1 (0x0018) -#define NS9750_SYS_AHB_ERROR2 (0x001C) -#define NS9750_SYS_AHB_MON (0x0020) -#define NS9750_SYS_TIMER_COUNT_BASE (0x0044) -#define NS9750_SYS_TIMER_READ_BASE (0x0084) -#define NS9750_SYS_INT_VEC_ADR_BASE (0x00C4) -#define NS9750_SYS_INT_CFG_BASE (0x0144) -#define NS9750_SYS_ISRADDR (0x0164) -#define NS9750_SYS_INT_STAT_ACTIVE (0x0168) -#define NS9750_SYS_INT_STAT_RAW (0x016C) -#define NS9750_SYS_TIMER_INT_STAT (0x0170) -#define NS9750_SYS_SW_WDOG_CFG (0x0174) -#define NS9750_SYS_SW_WDOG_TIMER (0x0178) -#define NS9750_SYS_CLOCK (0x017C) -#define NS9750_SYS_RESET (0x0180) -#define NS9750_SYS_MISC (0x0184) -#define NS9750_SYS_PLL (0x0188) -#define NS9750_SYS_ACT_INT_STAT (0x018C) -#define NS9750_SYS_TIMER_CTRL_BASE (0x0190) -#define NS9750_SYS_CS_DYN_BASE_BASE (0x01D0) -#define NS9750_SYS_CS_DYN_MASK_BASE (0x01D4) -#define NS9750_SYS_CS_STATIC_BASE_BASE (0x01F0) -#define NS9750_SYS_CS_STATIC_MASK_BASE (0x01F4) -#define NS9750_SYS_GEN_ID (0x0210) -#define NS9750_SYS_EXT_INT_CTRL_BASE (0x0214) - -/* the vectored register addresses */ - -#define NS9750_SYS_TIMER_COUNT(c) (NS9750_SYS_TIMER_COUNT_BASE + (c)) -#define NS9750_SYS_TIMER_READ(c) (NS9750_SYS_TIMER_READ_BASE + (c)) -#define NS9750_SYS_INT_VEC_ADR(c) (NS9750_SYS_INT_VEC_ADR_BASE + (c)) -#define NS9750_SYS_TIMER_CTRL(c) (NS9750_SYS_TIMER_CTRL_BASE + (c)) -/* CS_DYN start with 4 */ -#define NS9750_SYS_CS_DYN_BASE(c) (NS9750_SYS_CS_DYN_BASE_BASE + ((c)-4)*2) -#define NS9750_SYS_CS_DYN_MASK(c) (NS9750_SYS_CS_DYN_MASK_BASE + ((c)-4)*2) -/* CS_STATIC start with 0 */ -#define NS9750_SYS_CS_STATIC_BASE(c) (NS9750_SYS_CS_STATIC_BASE_BASE + (c)*2) -#define NS9750_SYS_CS_STATIC_MASK(c) (NS9750_SYS_CS_STATIC_MASK_BASE + (c)*2) -#define NS9750_SYS_EXT_INT_CTRL(c) (NS9750_SYS_EXT_INT_CTRL + (c)) - -/* register bit fields */ - -#define NS9750_SYS_AHB_GEN_EXMAM (0x00000001) - -/* need to be n*8bit to BRC channel */ -#define NS9750_SYS_BRC_CEB (0x00000080) -#define NS9750_SYS_BRC_BRF_MA (0x00000030) -#define NS9750_SYS_BRC_BRF_100 (0x00000000) -#define NS9750_SYS_BRC_BRF_75 (0x00000010) -#define NS9750_SYS_BRC_BRF_50 (0x00000020) -#define NS9750_SYS_BRC_BRF_25 (0x00000030) - -#define NS9750_SYS_AHB_TIMEOUT_BAT_MA (0xFFFF0000) -#define NS9750_SYS_AHB_TIMEOUT_BMT_MA (0x0000FFFF) - -#define NS9750_SYS_AHB_ERROR2_ABL (0x00040000) -#define NS9750_SYS_AHB_ERROR2_AER (0x00020000) -#define NS9750_SYS_AHB_ERROR2_ABM (0x00010000) -#define NS9750_SYS_AHB_ERROR2_ABA (0x00008000) -#define NS9750_SYS_AHB_ERROR2_HWRT (0x00004000) -#define NS9750_SYS_AHB_ERROR2_HMID_MA (0x00003C00) -#define NS9750_SYS_AHB_ERROR2_HTPC_MA (0x000003C0) -#define NS9750_SYS_AHB_ERROR2_HSZ_MA (0x00000038) -#define NS9750_SYS_AHB_ERROR2_RR_MA (0x00000007) - -#define NS9750_SYS_AHB_MON_EIC (0x00800000) -#define NS9750_SYS_AHB_MON_MBII (0x00400000) -#define NS9750_SYS_AHB_MON_MBL_MA (0x003FFFC0) -#define NS9750_SYS_AHB_MON_MBLDC (0x00000020) -#define NS9750_SYS_AHB_MON_SERDC (0x00000010) -#define NS9750_SYS_AHB_MON_BMTC_MA (0x0000000C) -#define NS9750_SYS_AHB_MON_BMTC_RECORD (0x00000000) -#define NS9750_SYS_AHB_MON_BMTC_GEN_IRQ (0x00000004) -#define NS9750_SYS_AHB_MON_BMTC_GEN_RES (0x00000008) -#define NS9750_SYS_AHB_MON_BATC_MA (0x00000003) -#define NS9750_SYS_AHB_MON_BATC_RECORD (0x00000000) -#define NS9750_SYS_AHB_MON_BATC_GEN_IRQ (0x00000001) -#define NS9750_SYS_AHB_MON_BATC_GEN_RES (0x00000002) - -/* need to be n*8bit to Int Level */ - -#define NS9750_SYS_INT_CFG_IE (0x00000080) -#define NS9750_SYS_INT_CFG_IT (0x00000020) -#define NS9750_SYS_INT_CFG_IAD_MA (0x0000001F) - -#define NS9750_SYS_TIMER_INT_STAT_MA (0x0000FFFF) - -#define NS9750_SYS_SW_WDOG_CFG_SWWE (0x00000080) -#define NS9750_SYS_SW_WDOG_CFG_SWWI (0x00000020) -#define NS9750_SYS_SW_WDOG_CFG_SWWIC (0x00000010) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_MA (0x00000007) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_2 (0x00000000) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_4 (0x00000001) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_8 (0x00000002) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_16 (0x00000003) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_32 (0x00000004) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_64 (0x00000005) - -#define NS9750_SYS_CLOCK_LPCS_MA (0x00000380) -#define NS9750_SYS_CLOCK_LPCS_1 (0x00000000) -#define NS9750_SYS_CLOCK_LPCS_2 (0x00000080) -#define NS9750_SYS_CLOCK_LPCS_4 (0x00000100) -#define NS9750_SYS_CLOCK_LPCS_8 (0x00000180) -#define NS9750_SYS_CLOCK_LPCS_EXT (0x00000200) -#define NS9750_SYS_CLOCK_BBC (0x00000040) -#define NS9750_SYS_CLOCK_LCC (0x00000020) -#define NS9750_SYS_CLOCK_MCC (0x00000010) -#define NS9750_SYS_CLOCK_PARBC (0x00000008) -#define NS9750_SYS_CLOCK_PC (0x00000004) -#define NS9750_SYS_CLOCK_MACC (0x00000001) - -#define NS9750_SYS_RESET_SR (0x80000000) -#define NS9750_SYS_RESET_I2CW (0x00100000) -#define NS9750_SYS_RESET_CSE (0x00080000) -#define NS9750_SYS_RESET_SMWE (0x00040000) -#define NS9750_SYS_RESET_EWE (0x00020000) -#define NS9750_SYS_RESET_PI3WE (0x00010000) -#define NS9750_SYS_RESET_BBT (0x00000040) -#define NS9750_SYS_RESET_LCDC (0x00000020) -#define NS9750_SYS_RESET_MEMC (0x00000010) -#define NS9750_SYS_RESET_PCIAR (0x00000008) -#define NS9750_SYS_RESET_PCIM (0x00000004) -#define NS9750_SYS_RESET_MACM (0x00000001) - -#define NS9750_SYS_MISC_REV_MA (0xFF000000) -#define NS9750_SYS_MISC_PCIA (0x00002000) -#define NS9750_SYS_MISC_VDIS (0x00001000) -#define NS9750_SYS_MISC_BMM (0x00000800) -#define NS9750_SYS_MISC_CS1DB (0x00000400) -#define NS9750_SYS_MISC_CS1DW_MA (0x00000300) -#define NS9750_SYS_MISC_MCCM (0x00000080) -#define NS9750_SYS_MISC_PMSS (0x00000040) -#define NS9750_SYS_MISC_CS1P (0x00000020) -#define NS9750_SYS_MISC_ENDM (0x00000008) -#define NS9750_SYS_MISC_MBAR (0x00000004) -#define NS9750_SYS_MISC_IRAM0 (0x00000001) - -#define NS9750_SYS_PLL_PLLBS (0x02000000) -#define NS9750_SYS_PLL_PLLFS_MA (0x01800000) -#define NS9750_SYS_PLL_PLLIS_MA (0x00600000) -#define NS9750_SYS_PLL_PLLND_MA (0x001F0000) -#define NS9750_SYS_PLL_PLLSW (0x00008000) -#define NS9750_SYS_PLL_PLLBSSW (0x00000200) -#define NS9750_SYS_PLL_FSEL_MA (0x00000180) -#define NS9750_SYS_PLL_CPCC_MA (0x00000060) -#define NS9750_SYS_PLL_NDSW_MA (0x0000001F) - -#define NS9750_SYS_ACT_INT_STAT_MA (0x0000FFFF) - -#define NS9750_SYS_TIMER_CTRL_TEN (0x00008000) -#define NS9750_SYS_TIMER_CTRL_INTC (0x00000200) -#define NS9750_SYS_TIMER_CTRL_TLCS_MA (0x000001C0) -#define NS9750_SYS_TIMER_CTRL_TLCS_1 (0x00000000) -#define NS9750_SYS_TIMER_CTRL_TLCS_2 (0x00000040) -#define NS9750_SYS_TIMER_CTRL_TLCS_4 (0x00000080) -#define NS9750_SYS_TIMER_CTRL_TLCS_8 (0x000000C0) -#define NS9750_SYS_TIMER_CTRL_TLCS_16 (0x00000100) -#define NS9750_SYS_TIMER_CTRL_TLCS_32 (0x00000140) -#define NS9750_SYS_TIMER_CTRL_TLCS_64 (0x00000180) -#define NS9750_SYS_TIMER_CTRL_TLCS_EXT (0x000001C0) -#define NS9750_SYS_TIMER_CTRL_TM_MA (0x00000030) -#define NS9750_SYS_TIMER_CTRL_TM_INT (0x00000000) -#define NS9750_SYS_TIMER_CTRL_TM_LOW (0x00000010) -#define NS9750_SYS_TIMER_CTRL_TM_HIGH (0x00000020) -#define NS9750_SYS_TIMER_CTRL_INTS (0x00000008) -#define NS9750_SYS_TIMER_CTRL_UDS (0x00000004) -#define NS9750_SYS_TIMER_CTRL_TSZ (0x00000002) -#define NS9750_SYS_TIMER_CTRL_REN (0x00000001) - -#define NS9750_SYS_EXT_INT_CTRL_STS (0x00000008) -#define NS9750_SYS_EXT_INT_CTRL_CLR (0x00000004) -#define NS9750_SYS_EXT_INT_CTRL_PLTY (0x00000002) -#define NS9750_SYS_EXT_INT_CTRL_LVEDG (0x00000001) - -#endif /* FS_NS9750_SYS_H */ -- cgit v1.3.1 From d3f26a27003d55ce17ca54e84799fa18b965c3dc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 23 Feb 2013 02:43:00 +0000 Subject: mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLE The CONFIG_MXS_SPI_DMA_ENABLE is no longer relevant as the SPI DMA has proven to work correctly. Remove this configuration option. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- drivers/spi/mxs_spi.c | 16 ---------------- include/configs/m28evk.h | 1 - include/configs/mx28evk.h | 1 - 3 files changed, 18 deletions(-) (limited to 'include') diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index b5b32dc5cc0..ffa3c1d693b 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -40,17 +40,6 @@ #define MXSSSP_SMALL_TRANSFER 512 -/* - * CONFIG_MXS_SPI_DMA_ENABLE: Experimental mixed PIO/DMA support for MXS SPI - * host. Use with utmost caution! - * - * Enabling this is not yet recommended since this - * still doesn't support transfers to/from unaligned - * addresses. Therefore this driver will not work - * for example with saving environment. This is - * caused by DMA alignment constraints on MXS. - */ - struct mxs_spi_slave { struct spi_slave slave; uint32_t max_khz; @@ -347,12 +336,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, char dummy; int write = 0; char *data = NULL; - -#ifdef CONFIG_MXS_SPI_DMA_ENABLE int dma = 1; -#else - int dma = 0; -#endif if (bitlen == 0) { if (flags & SPI_XFER_END) { diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 1b51fe2dc51..59a7be931d9 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -244,7 +244,6 @@ #ifdef CONFIG_CMD_SPI #define CONFIG_HARD_SPI #define CONFIG_MXS_SPI -#define CONFIG_MXS_SPI_DMA_ENABLE #define CONFIG_SPI_HALF_DUPLEX #define CONFIG_DEFAULT_SPI_BUS 2 #define CONFIG_DEFAULT_SPI_CS 0 diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 71447d910ea..6a46f3c08ae 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -202,7 +202,6 @@ #ifdef CONFIG_CMD_SPI #define CONFIG_HARD_SPI #define CONFIG_MXS_SPI -#define CONFIG_MXS_SPI_DMA_ENABLE #define CONFIG_SPI_HALF_DUPLEX #define CONFIG_DEFAULT_SPI_BUS 2 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 -- cgit v1.3.1 From afa872109942b37fce291b592d6f2f02f55a4021 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 23 Feb 2013 02:43:02 +0000 Subject: mxs: Make ehci-mxs multiport capable Rework ehci-mxs so it supports both ports on MX28. It was necessary to wrap the per-port configuration into struct ehci_mxs_port and pull out the clock configuration function. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- drivers/usb/host/ehci-mxs.c | 149 +++++++++++++++++++++++-------------------- include/configs/apx4devkit.h | 3 +- include/configs/m28evk.h | 4 +- include/configs/mx28evk.h | 3 +- include/configs/sc_sps_1.h | 3 +- 5 files changed, 90 insertions(+), 72 deletions(-) (limited to 'include') diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index 0ca7545a349..f320d3eb5d0 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -22,86 +22,106 @@ #include #include #include +#include #include "ehci.h" -#if (CONFIG_EHCI_MXS_PORT != 0) && (CONFIG_EHCI_MXS_PORT != 1) -#error "MXS EHCI: Invalid port selected!" -#endif - -#ifndef CONFIG_EHCI_MXS_PORT -#error "MXS EHCI: Please define correct port using CONFIG_EHCI_MXS_PORT!" -#endif +/* This DIGCTL register ungates clock to USB */ +#define HW_DIGCTL_CTRL 0x8001c000 +#define HW_DIGCTL_CTRL_USB0_CLKGATE (1 << 2) +#define HW_DIGCTL_CTRL_USB1_CLKGATE (1 << 16) -static struct ehci_mxs { - struct mxs_usb_regs *usb_regs; +struct ehci_mxs_port { + uint32_t usb_regs; struct mxs_usbphy_regs *phy_regs; -} ehci_mxs; -int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int port) + struct mxs_register_32 *pll; + uint32_t pll_en_bits; + uint32_t pll_dis_bits; + uint32_t gate_bits; +}; + +static const struct ehci_mxs_port mxs_port[] = { +#ifdef CONFIG_EHCI_MXS_PORT0 + { + MXS_USBCTRL0_BASE, + (struct mxs_usbphy_regs *)MXS_USBPHY0_BASE, + (struct mxs_register_32 *)(MXS_CLKCTRL_BASE + + offsetof(struct mxs_clkctrl_regs, + hw_clkctrl_pll0ctrl0_reg)), + CLKCTRL_PLL0CTRL0_EN_USB_CLKS | CLKCTRL_PLL0CTRL0_POWER, + CLKCTRL_PLL0CTRL0_EN_USB_CLKS, + HW_DIGCTL_CTRL_USB0_CLKGATE, + }, +#endif +#ifdef CONFIG_EHCI_MXS_PORT1 + { + MXS_USBCTRL1_BASE, + (struct mxs_usbphy_regs *)MXS_USBPHY1_BASE, + (struct mxs_register_32 *)(MXS_CLKCTRL_BASE + + offsetof(struct mxs_clkctrl_regs, + hw_clkctrl_pll1ctrl0_reg)), + CLKCTRL_PLL1CTRL0_EN_USB_CLKS | CLKCTRL_PLL1CTRL0_POWER, + CLKCTRL_PLL1CTRL0_EN_USB_CLKS, + HW_DIGCTL_CTRL_USB1_CLKGATE, + }, +#endif +}; + +static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable) { - uint32_t usb_base, phy_base; - switch (port) { - case 0: - usb_base = MXS_USBCTRL0_BASE; - phy_base = MXS_USBPHY0_BASE; - break; - case 1: - usb_base = MXS_USBCTRL1_BASE; - phy_base = MXS_USBPHY1_BASE; - break; - default: - printf("CONFIG_EHCI_MXS_PORT (port = %d)\n", port); - return -1; + struct mxs_register_32 *digctl_ctrl = + (struct mxs_register_32 *)HW_DIGCTL_CTRL; + int pll_offset, dig_offset; + + if (enable) { + pll_offset = offsetof(struct mxs_register_32, reg_set); + dig_offset = offsetof(struct mxs_register_32, reg_clr); + writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); + writel(port->pll_en_bits, (u32)port->pll + pll_offset); + } else { + pll_offset = offsetof(struct mxs_register_32, reg_clr); + dig_offset = offsetof(struct mxs_register_32, reg_set); + writel(port->pll_dis_bits, (u32)port->pll + pll_offset); + writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); } - mxs_usb->usb_regs = (struct mxs_usb_regs *)usb_base; - mxs_usb->phy_regs = (struct mxs_usbphy_regs *)phy_base; return 0; } -/* This DIGCTL register ungates clock to USB */ -#define HW_DIGCTL_CTRL 0x8001c000 -#define HW_DIGCTL_CTRL_USB0_CLKGATE (1 << 2) -#define HW_DIGCTL_CTRL_USB1_CLKGATE (1 << 16) - int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { int ret; uint32_t usb_base, cap_base; - struct mxs_register_32 *digctl_ctrl = - (struct mxs_register_32 *)HW_DIGCTL_CTRL; - struct mxs_clkctrl_regs *clkctrl_regs = - (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; + const struct ehci_mxs_port *port; - ret = mxs_ehci_get_port(&ehci_mxs, CONFIG_EHCI_MXS_PORT); - if (ret) - return ret; + if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { + printf("Invalid port index (index = %d)!\n", index); + return -EINVAL; + } + + port = &mxs_port[index]; /* Reset the PHY block */ - writel(USBPHY_CTRL_SFTRST, &ehci_mxs.phy_regs->hw_usbphy_ctrl_set); + writel(USBPHY_CTRL_SFTRST, &port->phy_regs->hw_usbphy_ctrl_set); udelay(10); writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE, - &ehci_mxs.phy_regs->hw_usbphy_ctrl_clr); + &port->phy_regs->hw_usbphy_ctrl_clr); /* Enable USB clock */ - writel(CLKCTRL_PLL0CTRL0_EN_USB_CLKS | CLKCTRL_PLL0CTRL0_POWER, - &clkctrl_regs->hw_clkctrl_pll0ctrl0_set); - writel(CLKCTRL_PLL1CTRL0_EN_USB_CLKS | CLKCTRL_PLL1CTRL0_POWER, - &clkctrl_regs->hw_clkctrl_pll1ctrl0_set); - - writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE, - &digctl_ctrl->reg_clr); + ret = ehci_mxs_toggle_clock(port, 1); + if (ret) + return ret; /* Start USB PHY */ - writel(0, &ehci_mxs.phy_regs->hw_usbphy_pwd); + writel(0, &port->phy_regs->hw_usbphy_pwd); /* Enable UTMI+ Level 2 and Level 3 compatibility */ writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1, - &ehci_mxs.phy_regs->hw_usbphy_ctrl_set); + &port->phy_regs->hw_usbphy_ctrl_set); - usb_base = ((uint32_t)ehci_mxs.usb_regs) + 0x100; + usb_base = port->usb_regs + 0x100; *hccr = (struct ehci_hccr *)usb_base; cap_base = ehci_readl(&(*hccr)->cr_capbase); @@ -114,19 +134,19 @@ int ehci_hcd_stop(int index) { int ret; uint32_t usb_base, cap_base, tmp; - struct mxs_register_32 *digctl_ctrl = - (struct mxs_register_32 *)HW_DIGCTL_CTRL; - struct mxs_clkctrl_regs *clkctrl_regs = - (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; struct ehci_hccr *hccr; struct ehci_hcor *hcor; + const struct ehci_mxs_port *port; - ret = mxs_ehci_get_port(&ehci_mxs, CONFIG_EHCI_MXS_PORT); - if (ret) - return ret; + if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { + printf("Invalid port index (index = %d)!\n", index); + return -EINVAL; + } + + port = &mxs_port[index]; /* Stop the USB port */ - usb_base = ((uint32_t)ehci_mxs.usb_regs) + 0x100; + usb_base = port->usb_regs + 0x100; hccr = (struct ehci_hccr *)usb_base; cap_base = ehci_readl(&hccr->cr_capbase); hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base)); @@ -140,17 +160,10 @@ int ehci_hcd_stop(int index) USBPHY_PWD_RXPWD1PT1 | USBPHY_PWD_RXPWDENV | USBPHY_PWD_TXPWDV2I | USBPHY_PWD_TXPWDIBIAS | USBPHY_PWD_TXPWDFS; - writel(tmp, &ehci_mxs.phy_regs->hw_usbphy_pwd); + writel(tmp, &port->phy_regs->hw_usbphy_pwd); /* Disable USB clock */ - writel(CLKCTRL_PLL0CTRL0_EN_USB_CLKS, - &clkctrl_regs->hw_clkctrl_pll0ctrl0_clr); - writel(CLKCTRL_PLL1CTRL0_EN_USB_CLKS, - &clkctrl_regs->hw_clkctrl_pll1ctrl0_clr); + ret = ehci_mxs_toggle_clock(port, 0); - /* Gate off the USB clock */ - writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE, - &digctl_ctrl->reg_set); - - return 0; + return ret; } diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h index 73c66af06d5..18c42413735 100644 --- a/include/configs/apx4devkit.h +++ b/include/configs/apx4devkit.h @@ -182,7 +182,8 @@ #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MXS -#define CONFIG_EHCI_MXS_PORT 1 +#define CONFIG_EHCI_MXS_PORT1 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_STORAGE #endif diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 59a7be931d9..f2725cc87fb 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -233,7 +233,9 @@ #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MXS -#define CONFIG_EHCI_MXS_PORT 1 +#define CONFIG_EHCI_MXS_PORT0 +#define CONFIG_EHCI_MXS_PORT1 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_STORAGE #endif diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 6a46f3c08ae..0d918a153d8 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -181,7 +181,8 @@ #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MXS -#define CONFIG_EHCI_MXS_PORT 1 +#define CONFIG_EHCI_MXS_PORT1 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index decf8d9dec8..349497f67a2 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -170,7 +170,8 @@ #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MXS -#define CONFIG_EHCI_MXS_PORT 0 +#define CONFIG_EHCI_MXS_PORT0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_STORAGE #endif -- cgit v1.3.1 From 36c7c9250d7c4717808a637da74e59a29a235848 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Sat, 23 Feb 2013 02:43:09 +0000 Subject: mx23_olinuxino: Add support for status LED This allow user to know if the bootloader is running, even without a serial console. Signed-off-by: Otavio Salvador --- board/olimex/mx23_olinuxino/mx23_olinuxino.c | 7 +++++++ board/olimex/mx23_olinuxino/spl_boot.c | 4 ++++ include/configs/mx23_olinuxino.h | 14 ++++++++++++++ 3 files changed, 25 insertions(+) (limited to 'include') diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c index 6a6053b3855..25014176130 100644 --- a/board/olimex/mx23_olinuxino/mx23_olinuxino.c +++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c @@ -28,6 +28,9 @@ #include #include #include +#ifdef CONFIG_STATUS_LED +#include +#endif DECLARE_GLOBAL_DATA_PTR; @@ -67,5 +70,9 @@ int board_init(void) /* Adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; +#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) + status_led_set(STATUS_LED_BOOT, STATUS_LED_STATE); +#endif + return 0; } diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c index 7def8bc3e9a..3bbf5ad7a36 100644 --- a/board/olimex/mx23_olinuxino/spl_boot.c +++ b/board/olimex/mx23_olinuxino/spl_boot.c @@ -84,6 +84,10 @@ const iomux_cfg_t iomux_setup[] = { MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, + /* Green LED */ + MX23_PAD_SSP1_DETECT__GPIO_2_1 | + (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL), + /* MMC 0 */ MX23_PAD_SSP1_CMD__SSP1_CMD | MUX_CONFIG_SSP, MX23_PAD_SSP1_DATA0__SSP1_DATA0 | MUX_CONFIG_SSP, diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 7983c5d55f6..d01994400a4 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -19,6 +19,8 @@ #ifndef __MX23_OLINUXINO_CONFIG_H__ #define __MX23_OLINUXINO_CONFIG_H__ +#include + /* * SoC configurations */ @@ -56,6 +58,7 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_GPIO +#define CONFIG_CMD_LED #define CONFIG_CMD_MMC /* @@ -111,6 +114,17 @@ #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ +/* + * Status LED + */ +#define CONFIG_STATUS_LED +#define CONFIG_GPIO_LED +#define CONFIG_BOARD_SPECIFIC_LED +#define STATUS_LED_BOOT 0 +#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1 +#define STATUS_LED_STATE STATUS_LED_ON +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) + /* * MMC Driver */ -- cgit v1.3.1 From e895aa45b93a2d27e6720c40f869c01854d3ca09 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Sat, 2 Mar 2013 05:17:28 +0000 Subject: mx23evk: Enable USB support This enabled USB support for the mx23evk board. Signed-off-by: Otavio Salvador --- include/configs/mx23evk.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index d206c95b8e0..e5a15a451cc 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -58,6 +58,7 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_GPIO #define CONFIG_CMD_MMC +#define CONFIG_CMD_USB #define CONFIG_CMD_BOOTZ /* Memory configurations */ @@ -122,6 +123,16 @@ #define CONFIG_MXS_MMC #endif +/* USB */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MXS +#define CONFIG_EHCI_MXS_PORT0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + /* Boot Linux */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -- cgit v1.3.1 From ebe1d17006001adfa375335acdd56f326264aeb8 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Sat, 2 Mar 2013 05:17:29 +0000 Subject: mx23_olinuxino: Enable USB support This enabled USB support for the mx23_olinuxino board. Signed-off-by: Otavio Salvador --- board/olimex/mx23_olinuxino/mx23_olinuxino.c | 5 +++++ board/olimex/mx23_olinuxino/spl_boot.c | 4 ++++ include/configs/mx23_olinuxino.h | 11 +++++++++++ 3 files changed, 20 insertions(+) (limited to 'include') diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c index 25014176130..92527177ca4 100644 --- a/board/olimex/mx23_olinuxino/mx23_olinuxino.c +++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c @@ -45,6 +45,11 @@ int board_early_init_f(void) /* SSP0 clock at 96MHz */ mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); +#ifdef CONFIG_CMD_USB + /* Enable LAN9512 */ + gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 1); +#endif + return 0; } diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c index 3bbf5ad7a36..a96c293c0ae 100644 --- a/board/olimex/mx23_olinuxino/spl_boot.c +++ b/board/olimex/mx23_olinuxino/spl_boot.c @@ -95,6 +95,10 @@ const iomux_cfg_t iomux_setup[] = { MX23_PAD_SSP1_DATA2__SSP1_DATA2 | MUX_CONFIG_SSP, MX23_PAD_SSP1_DATA3__SSP1_DATA3 | MUX_CONFIG_SSP, MX23_PAD_SSP1_SCK__SSP1_SCK | MUX_CONFIG_SSP, + + /* Ethernet */ + MX23_PAD_GPMI_ALE__GPIO_0_17 | + (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), }; void board_init_ll(void) diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index d01994400a4..90dda01448c 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -60,6 +60,7 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_LED #define CONFIG_CMD_MMC +#define CONFIG_CMD_USB /* * Memory configurations @@ -140,6 +141,16 @@ */ #define CONFIG_APBH_DMA +/* USB */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MXS +#define CONFIG_EHCI_MXS_PORT0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + /* * Boot Linux */ -- cgit v1.3.1 From b8bd75af77e125133f004a26cbc3b008f7feea52 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Sat, 2 Mar 2013 05:17:30 +0000 Subject: mx23_olinuxino: Add ethernet support This adds support to the LAN9512 chip included in the board and extend the environment to easy netboot use. Signed-off-by: Otavio Salvador --- include/configs/mx23_olinuxino.h | 39 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 90dda01448c..03893d744d7 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -55,11 +55,13 @@ #define CONFIG_DOS_PARTITION #define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_CMD_GPIO #define CONFIG_CMD_LED #define CONFIG_CMD_MMC +#define CONFIG_CMD_NET #define CONFIG_CMD_USB /* @@ -151,6 +153,12 @@ #define CONFIG_USB_STORAGE #endif +/* Ethernet */ +#ifdef CONFIG_CMD_NET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#endif + /* * Boot Linux */ @@ -192,6 +200,7 @@ "fdt_file=imx23-olinuxino.dtb\0" \ "fdt_addr=0x41000000\0" \ "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ "mmcdev=0\0" \ "mmcpart=2\0" \ "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \ @@ -217,6 +226,31 @@ "fi; " \ "else " \ "bootm; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console_mainline},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "usb start; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${uimage}; " \ + "if test ${boot_fdt} = yes; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootm ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootm; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi;" \ + "fi; " \ + "else " \ + "bootm; " \ "fi;\0" #define CONFIG_BOOTCOMMAND \ @@ -226,10 +260,9 @@ "else " \ "if run loaduimage; then " \ "run mmcboot; " \ - "else " \ - "echo ERR: Fail to boot from MMC; " \ + "else run netboot; " \ "fi; " \ "fi; " \ - "else exit; fi" + "else run netboot; fi" #endif /* __MX23_OLINUXINO_CONFIG_H__ */ -- cgit v1.3.1 From 8f3937761bf260e71e7c199cf6547535ae7e90b9 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 26 Feb 2013 12:28:29 +0000 Subject: ARM: mx6: use common CPU errata config options Now that U-Boot has common CONFIG_ options to work around some ARM CPU errata, enable the relevant options on MX6, and remove the custom lowlevel_init.S, since it's just duplicated code now. Signed-off-by: Stephen Warren Reviewed-by: Fabio Estevam Acked-by: Jason Liu --- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/mx6/Makefile | 1 - arch/arm/cpu/armv7/mx6/lowlevel_init.S | 35 ---------------------------------- arch/arm/cpu/armv7/mx6/soc.c | 4 ++++ include/configs/mx6_common.h | 23 ++++++++++++++++++++++ include/configs/mx6qarm2.h | 3 +++ include/configs/mx6qsabre_common.h | 3 +++ include/configs/mx6qsabrelite.h | 3 +++ 8 files changed, 37 insertions(+), 37 deletions(-) delete mode 100644 arch/arm/cpu/armv7/mx6/lowlevel_init.S create mode 100644 include/configs/mx6_common.h (limited to 'include') diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index ee8c2b3fa57..4668b3cf2fe 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -32,7 +32,7 @@ COBJS += cache_v7.o COBJS += cpu.o COBJS += syslib.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6),) SOBJS += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile index cbce411cca6..4f9ca6890c8 100644 --- a/arch/arm/cpu/armv7/mx6/Makefile +++ b/arch/arm/cpu/armv7/mx6/Makefile @@ -28,7 +28,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o COBJS = soc.o clock.o -SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S deleted file mode 100644 index 7b60ca7454b..00000000000 --- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -.section ".text.init", "x" - -#include - -.macro init_arm_errata - /* ARM erratum ID #743622 */ - mrc p15, 0, r10, c15, c0, 1 /* read diagnostic register */ - orr r10, r10, #1 << 6 /* set bit #6 */ - /* ARM erratum ID #751472 */ - orr r10, r10, #1 << 11 /* set bit #11 */ - mcr p15, 0, r10, c15, c0, 1 /* write diagnostic register */ -.endm - -ENTRY(lowlevel_init) - init_arm_errata - mov pc, lr -ENDPROC(lowlevel_init) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index efe4136bc3b..193ba1240fb 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -205,3 +205,7 @@ const struct boot_mode soc_boot_modes[] = { {"esdhc4", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, {NULL, 0}, }; + +void s_init(void) +{ +} diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h new file mode 100644 index 00000000000..b333937827a --- /dev/null +++ b/include/configs/mx6_common.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __MX6_COMMON_H +#define __MX6_COMMON_H + +#define CONFIG_ARM_ERRATA_743622 +#define CONFIG_ARM_ERRATA_751472 + +#endif diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 138e4601807..bd52cde56ba 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -24,6 +24,9 @@ #define CONFIG_MX6 #define CONFIG_MX6Q + +#include "mx6_common.h" + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index f7e8779b40c..9eda9ed91a4 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -19,6 +19,9 @@ #define CONFIG_MX6 #define CONFIG_MX6Q + +#include "mx6_common.h" + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index c8c3ccc9265..5dc8255cec2 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -24,6 +24,9 @@ #define CONFIG_MX6 #define CONFIG_MX6Q + +#include "mx6_common.h" + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -- cgit v1.3.1 From a32f42f65d30fc2ac15fb14e00779db5bc780153 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 26 Feb 2013 13:08:53 -0500 Subject: am335x_evm: Never set CONFIG_EXTRA_ENV_SETTINGS in SPL Because of our support for network-based SPL, we don't discard all of the environment related functions. We however never make use of the default CONFIG_EXTRA_ENV_SETTINGS items and as this variable grows, it brings us closer to (or with some toolchains, over) our SPL size limit. Never set this in the case of SPL. Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 0dc2a504082..630cd4841db 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -49,6 +49,7 @@ #define CONFIG_BOOTDELAY 1 #define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ "fdtaddr=0x80F80000\0" \ @@ -133,6 +134,8 @@ "if test $board_name = A335X_SK; then " \ "setenv fdtfile am335x-evmsk.dtb; fi\0" \ +#endif + #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev}; if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ @@ -367,7 +370,6 @@ */ #undef CONFIG_SPL_ETH_SUPPORT #undef CONFIG_SPL_YMODEM_SUPPORT -#undef CONFIG_EXTRA_ENV_SETTINGS #endif /* -- cgit v1.3.1 From 98bc1228c800005e7addf95632e23079a236e5f5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 26 Feb 2013 15:43:22 -0500 Subject: am335x_evm: Add am335x_evm_usbspl build target We add USB (RNDIS gadget) SPL support as a separate target. We need to pull out YMODEM support in order to be a small enough target binary. Signed-off-by: Tom Rini --- board/ti/am335x/board.c | 2 +- boards.cfg | 1 + include/configs/am335x_evm.h | 4 +--- 3 files changed, 3 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 441758fdf00..f4b972b3e99 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -73,7 +73,7 @@ static inline int board_is_idk(void) return !strncmp(header.config, "SKU#02", 6); } -static int board_is_gp_evm(void) +static int __maybe_unused board_is_gp_evm(void) { return !strncmp("A33515BB", header.name, 8); } diff --git a/boards.cfg b/boards.cfg index 7a0b79dd072..c117368cdbf 100644 --- a/boards.cfg +++ b/boards.cfg @@ -239,6 +239,7 @@ am335x_evm_uart2 arm armv7 am335x ti am335x_evm_uart3 arm armv7 am335x ti am33xx am335x_evm:SERIAL4,CONS_INDEX=4 am335x_evm_uart4 arm armv7 am335x ti am33xx am335x_evm:SERIAL5,CONS_INDEX=5 am335x_evm_uart5 arm armv7 am335x ti am33xx am335x_evm:SERIAL6,CONS_INDEX=6 +am335x_evm_usbspl arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,SPL_USBETH_SUPPORT pcm051 arm armv7 pcm051 phytec am33xx pcm051 highbank arm armv7 highbank - highbank mx51_efikamx arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 630cd4841db..35a71ca680e 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -365,11 +365,9 @@ /* disable host part of MUSB in SPL */ #undef CONFIG_MUSB_HOST /* - * Disable UART, CPSW ethernet support and extra environment settings so we - * will fit within 101KiB. + * Disable CPSW SPL support so we fit within the 101KiB limit. */ #undef CONFIG_SPL_ETH_SUPPORT -#undef CONFIG_SPL_YMODEM_SUPPORT #endif /* -- cgit v1.3.1 From d23d8d7e069c3aca071b7f68d9c15d11f8d4c84d Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Mon, 3 Dec 2012 02:19:46 +0000 Subject: mmc: add support for write protection Add generic mmc write protection functionality. Signed-off-by: Nikita Kiryanov Signed-off-by: Igor Grinberg --- common/cmd_mmc.c | 7 +++++++ drivers/mmc/arm_pl180_mmci.c | 1 + drivers/mmc/bfin_sdh.c | 1 + drivers/mmc/davinci_mmc.c | 1 + drivers/mmc/fsl_esdhc.c | 1 + drivers/mmc/ftsdc010_esdhc.c | 1 + drivers/mmc/gen_atmel_mci.c | 1 + drivers/mmc/mmc.c | 17 +++++++++++++++++ drivers/mmc/mmc_spi.c | 1 + drivers/mmc/mxcmmc.c | 1 + drivers/mmc/mxsmmc.c | 1 + drivers/mmc/omap_hsmmc.c | 1 + drivers/mmc/sdhci.c | 1 + drivers/mmc/sh_mmcif.c | 1 + drivers/mmc/tegra_mmc.c | 1 + include/mmc.h | 2 ++ 16 files changed, 39 insertions(+) (limited to 'include') diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 7dacd5114ce..8c53a10315e 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -282,6 +282,13 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) mmc_init(mmc); + if ((state == MMC_WRITE || state == MMC_ERASE)) { + if (mmc_getwp(mmc) == 1) { + printf("Error: card is write protected!\n"); + return 1; + } + } + switch (state) { case MMC_READ: n = mmc->block_dev.block_read(curr_device, blk, diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index af1380a4550..ab2e81e5d43 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -377,6 +377,7 @@ int arm_pl180_mmci_init(struct pl180_mmc_host *host) dev->set_ios = host_set_ios; dev->init = mmc_host_reset; dev->getcd = NULL; + dev->getwp = NULL; dev->host_caps = host->caps; dev->voltages = host->voltages; dev->f_min = host->clock_min; diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c index 8d59d46c646..81d8e5432f9 100644 --- a/drivers/mmc/bfin_sdh.c +++ b/drivers/mmc/bfin_sdh.c @@ -251,6 +251,7 @@ int bfin_mmc_init(bd_t *bis) mmc->set_ios = bfin_sdh_set_ios; mmc->init = bfin_sdh_init; mmc->getcd = NULL; + mmc->getwp = NULL; mmc->host_caps = MMC_MODE_4BIT; mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c index ee8f2614de5..e2379e326ee 100644 --- a/drivers/mmc/davinci_mmc.c +++ b/drivers/mmc/davinci_mmc.c @@ -388,6 +388,7 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host) mmc->set_ios = dmmc_set_ios; mmc->init = dmmc_init; mmc->getcd = NULL; + mmc->getwp = NULL; mmc->f_min = 200000; mmc->f_max = 25000000; diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index b90f3e77698..54b5363169b 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -552,6 +552,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc->set_ios = esdhc_set_ios; mmc->init = esdhc_init; mmc->getcd = esdhc_getcd; + mmc->getwp = NULL; voltage_caps = 0; caps = regs->hostcapblt; diff --git a/drivers/mmc/ftsdc010_esdhc.c b/drivers/mmc/ftsdc010_esdhc.c index f1702fe33be..42f0e0ce55b 100644 --- a/drivers/mmc/ftsdc010_esdhc.c +++ b/drivers/mmc/ftsdc010_esdhc.c @@ -666,6 +666,7 @@ int ftsdc010_mmc_init(int dev_index) mmc->set_ios = ftsdc010_set_ios; mmc->init = ftsdc010_core_init; mmc->getcd = NULL; + mmc->getwp = NULL; mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index 67b2dbe8d4c..70a9f91c8d9 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -349,6 +349,7 @@ int atmel_mci_init(void *regs) mmc->set_ios = mci_set_ios; mmc->init = mci_init; mmc->getcd = NULL; + mmc->getwp = NULL; /* need to be able to pass these in on a board by board basis */ mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 72e8ce6da42..7b5fdd9f66e 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -40,6 +40,23 @@ static struct list_head mmc_devices; static int cur_dev_num = -1; +int __weak board_mmc_getwp(struct mmc *mmc) +{ + return -1; +} + +int mmc_getwp(struct mmc *mmc) +{ + int wp; + + wp = board_mmc_getwp(mmc); + + if ((wp < 0) && mmc->getwp) + wp = mmc->getwp(mmc); + + return wp; +} + int __board_mmc_getcd(struct mmc *mmc) { return -1; } diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index 11ba532b0c6..fe6a5a166de 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -273,6 +273,7 @@ struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode) mmc->set_ios = mmc_spi_set_ios; mmc->init = mmc_spi_init_p; mmc->getcd = NULL; + mmc->getwp = NULL; mmc->host_caps = MMC_MODE_SPI; mmc->voltages = MMC_SPI_VOLTAGE; diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c index d58c18bc2a5..4f99617b9a9 100644 --- a/drivers/mmc/mxcmmc.c +++ b/drivers/mmc/mxcmmc.c @@ -499,6 +499,7 @@ static int mxcmci_initialize(bd_t *bis) mmc->set_ios = mxcmci_set_ios; mmc->init = mxcmci_init; mmc->getcd = NULL; + mmc->getwp = NULL; mmc->host_caps = MMC_MODE_4BIT; host->base = (struct mxcmci_regs *)CONFIG_MXC_MCI_REGS_BASE; diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index a72f66cc7aa..a87529dfc5d 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -432,6 +432,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) mmc->set_ios = mxsmmc_set_ios; mmc->init = mxsmmc_init; mmc->getcd = NULL; + mmc->getwp = NULL; mmc->priv = priv; mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index cb1a7bdd654..fcbd1330d42 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -590,6 +590,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio) mmc->set_ios = mmc_set_ios; mmc->init = mmc_init_setup; mmc->getcd = omap_mmc_getcd; + mmc->getwp = NULL; mmc->priv = priv_data; switch (dev_index) { diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index b9cbe34f1f1..daca0ea4f70 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -438,6 +438,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) mmc->set_ios = sdhci_set_ios; mmc->init = sdhci_init; mmc->getcd = NULL; + mmc->getwp = NULL; caps = sdhci_readl(host, SDHCI_CAPABILITIES); #ifdef CONFIG_MMC_SDMA diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 4588568a6db..011d4f3e638 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -599,6 +599,7 @@ int mmcif_mmc_init(void) mmc->set_ios = sh_mmcif_set_ios; mmc->init = sh_mmcif_init; mmc->getcd = NULL; + mmc->getwp = NULL; host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR; host->clk = CONFIG_SH_MMCIF_CLK; mmc->priv = host; diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index d749ab095e3..72586193ca5 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -563,6 +563,7 @@ int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) mmc->set_ios = mmc_set_ios; mmc->init = mmc_core_init; mmc->getcd = tegra_mmc_getcd; + mmc->getwp = NULL; mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; mmc->host_caps = 0; diff --git a/include/mmc.h b/include/mmc.h index a13e2bdcf16..de6d497d530 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -259,6 +259,7 @@ struct mmc { void (*set_ios)(struct mmc *mmc); int (*init)(struct mmc *mmc); int (*getcd)(struct mmc *mmc); + int (*getwp)(struct mmc *mmc); uint b_max; }; @@ -274,6 +275,7 @@ int get_mmc_num(void); int board_mmc_getcd(struct mmc *mmc); int mmc_switch_part(int dev_num, unsigned int part_num); int mmc_getcd(struct mmc *mmc); +int mmc_getwp(struct mmc *mmc); void spl_mmc_load(void) __noreturn; #ifdef CONFIG_GENERIC_MMC -- cgit v1.3.1 From 581bb41980a38c6ddac40f07ec1c8dcd37aca8f6 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 30 Jan 2013 21:39:57 +0000 Subject: lcd: add option for board specific splash screen preparation Currently there is no logical place to put the code that prepares the splash image data. The splash image data should be ready in memory before bmp_display() is called, and after the environment is ready (since lcd.c looks for the splash image in an address specified by the environment variable "splashimage"). Our window of opportunity in board_init_r() is therefore: between env_relocate() and bmp_display(), and from the available options only the lcd related functions in drv_lcd_init() seem appropriate for such lcd oriented code. Add the option to prepare the splash image data in lcd_logo() right before it is sent to be displayed. Cc: Anatolij Gustschin Cc: Jeroen Hofstee Signed-off-by: Nikita Kiryanov Signed-off-by: Igor Grinberg --- README | 8 ++++++++ common/lcd.c | 15 +++++++++++++++ include/lcd.h | 1 + 3 files changed, 24 insertions(+) (limited to 'include') diff --git a/README b/README index d8cb3940d4f..b8ed1f13db2 100644 --- a/README +++ b/README @@ -1550,6 +1550,14 @@ CBFS (Coreboot Filesystem) support => vertically centered image at x = dspWidth - bmpWidth - 9 + CONFIG_SPLASH_SCREEN_PREPARE + + If this option is set then the board_splash_screen_prepare() + function, which must be defined in your code, is called as part + of the splash screen display sequence. It gives the board an + opportunity to prepare the splash image data before it is + processed and sent to the frame buffer by U-Boot. + - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP If this option is set, additionally to standard BMP diff --git a/common/lcd.c b/common/lcd.c index 66d4f94f9ea..ba6975be2f8 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -1034,6 +1034,18 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) } #endif +#ifdef CONFIG_SPLASH_SCREEN_PREPARE +static inline int splash_screen_prepare(void) +{ + return board_splash_screen_prepare(); +} +#else +static inline int splash_screen_prepare(void) +{ + return 0; +} +#endif + static void *lcd_logo(void) { #ifdef CONFIG_SPLASH_SCREEN @@ -1045,6 +1057,9 @@ static void *lcd_logo(void) int x = 0, y = 0; do_splash = 0; + if (splash_screen_prepare()) + return (void *)gd->fb_base; + addr = simple_strtoul (s, NULL, 16); #ifdef CONFIG_SPLASH_SCREEN_ALIGN s = getenv("splashpos"); diff --git a/include/lcd.h b/include/lcd.h index c24164a9de0..4ac4ddd1e0e 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -47,6 +47,7 @@ extern struct vidinfo panel_info; extern void lcd_ctrl_init (void *lcdbase); extern void lcd_enable (void); +extern int board_splash_screen_prepare(void); /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */ extern void lcd_setcolreg (ushort regno, -- cgit v1.3.1 From 7878ca51f2d6e2c131c96451e8727fda247d794e Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 30 Jan 2013 21:39:58 +0000 Subject: cm-t35: add support for dvi displays Add support for dvi displays with user selectable dvi presets. Cc: Wolfgang Denk Cc: Jeroen Hofstee Cc: Anatolij Gustschin Signed-off-by: Nikita Kiryanov Signed-off-by: Igor Grinberg --- board/cm_t35/Makefile | 1 + board/cm_t35/cm_t35.c | 3 + board/cm_t35/display.c | 220 +++++++++++++++++++++++++++++++++++++++++++++++ include/configs/cm_t35.h | 7 ++ 4 files changed, 231 insertions(+) create mode 100644 board/cm_t35/display.c (limited to 'include') diff --git a/board/cm_t35/Makefile b/board/cm_t35/Makefile index 894fa097e1b..bde56e61f41 100644 --- a/board/cm_t35/Makefile +++ b/board/cm_t35/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o +COBJS-$(CONFIG_LCD) += display.o COBJS := cm_t35.o leds.o $(COBJS-y) diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c index e470d96da99..e0e8235d738 100644 --- a/board/cm_t35/cm_t35.c +++ b/board/cm_t35/cm_t35.c @@ -217,6 +217,9 @@ static void cm_t3x_set_common_muxconf(void) /* SB-T35 Ethernet */ MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/ + /* DVI enable */ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | DIS | M4));/*GPMC_nCS3*/ + /* CM-T3x Ethernet */ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M0)); /*GPMC_nCS5*/ MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M4)); /*GPIO_59*/ diff --git a/board/cm_t35/display.c b/board/cm_t35/display.c new file mode 100644 index 00000000000..43f06282d4f --- /dev/null +++ b/board/cm_t35/display.c @@ -0,0 +1,220 @@ +/* + * (C) Copyright 2012 CompuLab, Ltd. + * + * Authors: Nikita Kiryanov + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +enum display_type { + NONE, + DVI, +}; + +#define CMAP_ADDR 0x80100000 + +/* + * The frame buffer is allocated before we have the chance to parse user input. + * To make sure enough memory is allocated for all resolutions, we define + * vl_{col | row} to the maximal resolution supported by OMAP3. + */ +vidinfo_t panel_info = { + .vl_col = 1400, + .vl_row = 1050, + .vl_bpix = LCD_BPP, + .cmap = (ushort *)CMAP_ADDR, +}; + +static struct panel_config panel_cfg; +static enum display_type lcd_def; + +/* + * A note on DVI presets; + * U-Boot can convert 8 bit BMP data to 16 bit BMP data, and OMAP DSS can + * convert 16 bit data into 24 bit data. Thus, GFXFORMAT_RGB16 allows us to + * support two BMP types with one setting. + */ +static const struct panel_config preset_dvi_640X480 = { + .lcd_size = PANEL_LCD_SIZE(640, 480), + .timing_h = DSS_HBP(48) | DSS_HFP(16) | DSS_HSW(96), + .timing_v = DSS_VBP(33) | DSS_VFP(10) | DSS_VSW(2), + .divisor = 12 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_800X600 = { + .lcd_size = PANEL_LCD_SIZE(800, 600), + .timing_h = DSS_HBP(88) | DSS_HFP(40) | DSS_HSW(128), + .timing_v = DSS_VBP(23) | DSS_VFP(1) | DSS_VSW(4), + .divisor = 8 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1024X768 = { + .lcd_size = PANEL_LCD_SIZE(1024, 768), + .timing_h = DSS_HBP(160) | DSS_HFP(24) | DSS_HSW(136), + .timing_v = DSS_VBP(29) | DSS_VFP(3) | DSS_VSW(6), + .divisor = 5 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1152X864 = { + .lcd_size = PANEL_LCD_SIZE(1152, 864), + .timing_h = DSS_HBP(256) | DSS_HFP(64) | DSS_HSW(128), + .timing_v = DSS_VBP(32) | DSS_VFP(1) | DSS_VSW(3), + .divisor = 3 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1280X960 = { + .lcd_size = PANEL_LCD_SIZE(1280, 960), + .timing_h = DSS_HBP(312) | DSS_HFP(96) | DSS_HSW(112), + .timing_v = DSS_VBP(36) | DSS_VFP(1) | DSS_VSW(3), + .divisor = 3 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +static const struct panel_config preset_dvi_1280X1024 = { + .lcd_size = PANEL_LCD_SIZE(1280, 1024), + .timing_h = DSS_HBP(248) | DSS_HFP(48) | DSS_HSW(112), + .timing_v = DSS_VBP(38) | DSS_VFP(1) | DSS_VSW(3), + .divisor = 3 | (1 << 16), + .data_lines = LCD_INTERFACE_24_BIT, + .panel_type = ACTIVE_DISPLAY, + .load_mode = 2, + .gfx_format = GFXFORMAT_RGB16, +}; + +/* + * set_resolution_params() + * + * Due to usage of multiple display related APIs resolution data is located in + * more than one place. This function updates them all. + */ +static void set_resolution_params(int x, int y) +{ + panel_cfg.lcd_size = PANEL_LCD_SIZE(x, y); + panel_info.vl_col = x; + panel_info.vl_row = y; + lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8; +} + +static void set_preset(const struct panel_config preset, int x_res, int y_res) +{ + panel_cfg = preset; + set_resolution_params(x_res, y_res); +} + +static enum display_type set_dvi_preset(const struct panel_config preset, + int x_res, int y_res) +{ + set_preset(preset, x_res, y_res); + return DVI; +} + +/* + * env_parse_displaytype() - parse display type. + * + * Parses the environment variable "displaytype", which contains the + * name of the display type or preset, in which case it applies its + * configurations. + * + * Returns the type of display that was specified. + */ +static enum display_type env_parse_displaytype(char *displaytype) +{ + if (!strncmp(displaytype, "dvi640x480", 10)) + return set_dvi_preset(preset_dvi_640X480, 640, 480); + else if (!strncmp(displaytype, "dvi800x600", 10)) + return set_dvi_preset(preset_dvi_800X600, 800, 600); + else if (!strncmp(displaytype, "dvi1024x768", 11)) + return set_dvi_preset(preset_dvi_1024X768, 1024, 768); + else if (!strncmp(displaytype, "dvi1152x864", 11)) + return set_dvi_preset(preset_dvi_1152X864, 1152, 864); + else if (!strncmp(displaytype, "dvi1280x960", 11)) + return set_dvi_preset(preset_dvi_1280X960, 1280, 960); + else if (!strncmp(displaytype, "dvi1280x1024", 12)) + return set_dvi_preset(preset_dvi_1280X1024, 1280, 1024); + + return NONE; +} + +int lcd_line_length; +int lcd_color_fg; +int lcd_color_bg; +void *lcd_base; +short console_col; +short console_row; +void *lcd_console_address; + +void lcd_ctrl_init(void *lcdbase) +{ + struct prcm *prcm = (struct prcm *)PRCM_BASE; + char *displaytype = getenv("displaytype"); + + if (displaytype == NULL) + return; + + lcd_def = env_parse_displaytype(displaytype); + if (lcd_def == NONE) + return; + + panel_cfg.frame_buffer = lcdbase; + omap3_dss_panel_config(&panel_cfg); + /* + * Pixel clock is defined with many divisions and only few + * multiplications of the system clock. Since DSS FCLK divisor is set + * to 16 by default, we need to set it to a smaller value, like 3 + * (chosen via trial and error). + */ + clrsetbits_le32(&prcm->clksel_dss, 0xF, 3); +} + +void lcd_enable(void) +{ + if (lcd_def == DVI) { + gpio_direction_output(54, 0); /* Turn on DVI */ + omap3_dss_enable(); + } +} + +void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) {} diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 943b65841c6..e6aef7b5957 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -336,4 +336,11 @@ #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ #endif +/* Display Configuration */ +#define CONFIG_OMAP3_GPIO_2 +#define CONFIG_VIDEO_OMAP3 +#define LCD_BPP LCD_COLOR16 + +#define CONFIG_LCD + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 6000992e265f507a18b0dcbcf2a89179822b42c4 Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Thu, 7 Feb 2013 23:14:48 +0000 Subject: SPL: ONENAND: Support SPL to boot u-boot from OneNAND. This patch will allow use SPL to boot an u-boot from the OneNAND. Tested with IGEPv2 board with a OneNAND from Numonyx Signed-off-by: Enric Balletbo i Serra [trini: Add hunk to fix warning] Signed-off-by: Tom Rini --- common/spl/Makefile | 1 + common/spl/spl.c | 5 +++++ common/spl/spl_onenand.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ include/spl.h | 3 +++ 4 files changed, 56 insertions(+) create mode 100644 common/spl/spl_onenand.c (limited to 'include') diff --git a/common/spl/Makefile b/common/spl/Makefile index 5698a2335a9..da2afc11b35 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -18,6 +18,7 @@ COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o COBJS-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o +COBJS-$(CONFIG_SPL_ONENAND_SUPPORT) += spl_onenand.o COBJS-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o endif diff --git a/common/spl/spl.c b/common/spl/spl.c index 6a5a1365a14..6715e0d203a 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -197,6 +197,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_nand_load_image(); break; #endif +#ifdef CONFIG_SPL_ONENAND_SUPPORT + case BOOT_DEVICE_ONENAND: + spl_onenand_load_image(); + break; +#endif #ifdef CONFIG_SPL_NOR_SUPPORT case BOOT_DEVICE_NOR: spl_nor_load_image(); diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c new file mode 100644 index 00000000000..43493035651 --- /dev/null +++ b/common/spl/spl_onenand.c @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2013 + * ISEE 2007 SL - Enric Balletbo i Serra + * + * Based on common/spl/spl_nand.c + * Copyright (C) 2011 + * Corscience GmbH & Co. KG - Simon Schwarz + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include +#include +#include +#include +#include + +void spl_onenand_load_image(void) +{ + struct image_header *header; + + debug("spl: onenand\n"); + + /*use CONFIG_SYS_TEXT_BASE as temporary storage area */ + header = (struct image_header *)(CONFIG_SYS_TEXT_BASE); + /* Load u-boot */ + onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS, + CONFIG_SYS_ONENAND_PAGE_SIZE, (void *)header); + spl_parse_image_header(header); + onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS, + spl_image.size, (void *)spl_image.load_addr); +} diff --git a/include/spl.h b/include/spl.h index b02f36fa941..b40be8039c0 100644 --- a/include/spl.h +++ b/include/spl.h @@ -59,6 +59,9 @@ void spl_display_print(void); /* NAND SPL functions */ void spl_nand_load_image(void); +/* OneNAND SPL functions */ +void spl_onenand_load_image(void); + /* NOR SPL functions */ void spl_nor_load_image(void); -- cgit v1.3.1 From d446c9038396abec9d68cfda76924c3c3e260851 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 19 Feb 2013 11:18:15 +0000 Subject: am335x_evm: Enable CONFIG_CMD_BOOTZ With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Signed-off-by: Tom Rini Acked-by: Peter Korsgaard --- include/configs/am335x_evm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 35a71ca680e..709c1f33735 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -35,6 +35,7 @@ #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -- cgit v1.3.1 From fe8f1372cdf7b45becc01e5b1dbe09af4929fd95 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 19 Feb 2013 11:18:16 +0000 Subject: omap5_evm: Enable CONFIG_CMD_BOOTZ With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Cc: Sricharan R Signed-off-by: Tom Rini Reviewed-by: R Sricharan --- include/configs/omap5_evm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index 623da777faa..85ea88b99dd 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -55,6 +55,7 @@ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS -- cgit v1.3.1 From 03a2075a2154daf8fa0a058ee4b2b4fca89b631f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 19 Feb 2013 11:18:17 +0000 Subject: omap3_beagle: Enable CONFIG_CMD_BOOTZ With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Signed-off-by: Tom Rini --- include/configs/omap3_beagle.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 59255c4e267..48ce4c05f5a 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -53,7 +53,8 @@ #define CONFIG_MISC_INIT_R -#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 -- cgit v1.3.1 From f0617d4b52fef0d539e7d08045f30237fdf141f7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 19 Feb 2013 11:18:18 +0000 Subject: omap4_common: Enable CONFIG_CMD_BOOTZ With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Cc: Sricharan R Signed-off-by: Tom Rini Reviewed-by: R Sricharan --- include/configs/omap4_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index 180cb24f388..6ae6a0f4355 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -52,7 +52,7 @@ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT 1 - +#define CONFIG_CMD_BOOTZ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 -- cgit v1.3.1 From c08804853361bb7c6e2f9e0cdcdc0b327f71fe35 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Sun, 24 Feb 2013 21:28:43 +0000 Subject: lcd: implement a callback for splashimage On some architectures certain values of splashimage will lead to a data abort exception. Document the problem, and implement a callback for splashimage to reject such values. Cc: Anatolij Gustschin Cc: Wolfgang Denk Signed-off-by: Nikita Kiryanov Acked-by: Igor Grinberg --- README | 11 +++++++++++ common/lcd.c | 26 ++++++++++++++++++++++++++ doc/README.displaying-bmps | 27 +++++++++++++++++++++++++++ include/env_callback.h | 7 +++++++ 4 files changed, 71 insertions(+) create mode 100644 doc/README.displaying-bmps (limited to 'include') diff --git a/README b/README index b8ed1f13db2..398d70d67c2 100644 --- a/README +++ b/README @@ -1530,6 +1530,17 @@ CBFS (Coreboot Filesystem) support allows for a "silent" boot where a splash screen is loaded very quickly after power-on. + CONFIG_SPLASHIMAGE_GUARD + + If this option is set, then U-Boot will prevent the environment + variable "splashimage" from being set to a problematic address + (see README.displaying-bmps and README.arm-unaligned-accesses). + This option is useful for targets where, due to alignment + restrictions, an improperly aligned BMP image will cause a data + abort. If you think you will not have problems with unaligned + accesses (for example because your toolchain prevents them) + there is no need to set this option. + CONFIG_SPLASH_SCREEN_ALIGN If this option is set the splash image can be freely positioned diff --git a/common/lcd.c b/common/lcd.c index ba6975be2f8..590bbb9301f 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -33,6 +33,8 @@ #include #include #include +#include +#include #include #include #if defined(CONFIG_POST) @@ -1099,6 +1101,30 @@ static void *lcd_logo(void) #endif /* CONFIG_LCD_LOGO && !CONFIG_LCD_INFO_BELOW_LOGO */ } +#ifdef CONFIG_SPLASHIMAGE_GUARD +static int on_splashimage(const char *name, const char *value, enum env_op op, + int flags) +{ + ulong addr; + int aligned; + + if (op == env_op_delete) + return 0; + + addr = simple_strtoul(value, NULL, 16); + /* See README.displaying-bmps */ + aligned = (addr % 4 == 2); + if (!aligned) { + printf("Invalid splashimage value. Value must be 16 bit aligned, but not 32 bit aligned\n"); + return -1; + } + + return 0; +} + +U_BOOT_ENV_CALLBACK(splashimage, on_splashimage); +#endif + void lcd_position_cursor(unsigned col, unsigned row) { console_col = min(col, CONSOLE_COLS - 1); diff --git a/doc/README.displaying-bmps b/doc/README.displaying-bmps new file mode 100644 index 00000000000..331154166d9 --- /dev/null +++ b/doc/README.displaying-bmps @@ -0,0 +1,27 @@ +If you are experiencing hangups/data-aborts when trying to display a BMP image, +the following might be relevant to your situation... + +Some architectures cannot handle unaligned memory accesses, and an attempt to +perform one will lead to a data abort. On such architectures it is necessary to +make sure all data is properly aligned, and in many situations simply choosing +a 32 bit aligned address is enough to ensure proper alignment. This is not +always the case when dealing with data that has an internal layout such as a +BMP image: + +BMP images have a header that starts with 2 byte-size fields followed by mostly +32 bit fields. The packed struct that represents this header can be seen below: + +typedef struct bmp_header { + /* Header */ + char signature[2]; + __u32 file_size; + __u32 reserved; + __u32 data_offset; + ... etc +} __attribute__ ((packed)) bmp_header_t; + +When placed in an aligned address such as 0x80a00000, char signature offsets +the __u32 fields into unaligned addresses (in our example 0x80a00002, +0x80a00006, and so on...). When these fields are accessed by U-Boot, a 32 bit +access is generated at a non-32-bit-aligned address, causing a data abort. +The proper alignment for BMP images is therefore: 32-bit-aligned-address + 2. diff --git a/include/env_callback.h b/include/env_callback.h index c583120c1c4..62428d1e0c2 100644 --- a/include/env_callback.h +++ b/include/env_callback.h @@ -41,6 +41,12 @@ #define SILENT_CALLBACK #endif +#ifdef CONFIG_SPLASHIMAGE_GUARD +#define SPLASHIMAGE_CALLBACK "splashimage:splashimage," +#else +#define SPLASHIMAGE_CALLBACK +#endif + /* * This list of callback bindings is static, but may be overridden by defining * a new association in the ".callbacks" environment variable. @@ -51,6 +57,7 @@ "bootfile:bootfile," \ "loadaddr:loadaddr," \ SILENT_CALLBACK \ + SPLASHIMAGE_CALLBACK \ "stdin:console,stdout:console,stderr:console," \ CONFIG_ENV_CALLBACK_LIST_STATIC -- cgit v1.3.1 From 60e6bdcc948f99e6b24d198c1b9136b0cb4e376b Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Sun, 24 Feb 2013 06:19:23 +0000 Subject: cm_t35: prevent splashimage from being set to a bad value Define CONFIG_SPLASHIMAGE_GUARD to prevent splashimage from being set to a value that will cause U-Boot to hang while displaying a splash screen. Signed-off-by: Nikita Kiryanov Acked-by: Igor Grinberg --- include/configs/cm_t35.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index e6aef7b5957..8d79ffd48a4 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -331,6 +331,8 @@ #define STATUS_LED_BOOT STATUS_LED_BIT #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ +#define CONFIG_SPLASHIMAGE_GUARD + /* GPIO banks */ #ifdef CONFIG_STATUS_LED #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ -- cgit v1.3.1 From 3fcdd4a5f8ba0e0fac4b2afdb5e90efac9f7f301 Mon Sep 17 00:00:00 2001 From: SRICHARAN R Date: Mon, 4 Feb 2013 04:22:02 +0000 Subject: ARM: OMAP4+: Clean up the pmic code The pmic code is duplicated for OMAP 4 and 5. Instead move the data to Soc specific place and share the code. Signed-off-by: R Sricharan Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini --- arch/arm/cpu/armv7/omap-common/clocks-common.c | 83 +++++++++++------ arch/arm/cpu/armv7/omap4/Makefile | 1 - arch/arm/cpu/armv7/omap4/clocks.c | 123 ------------------------- arch/arm/cpu/armv7/omap4/hw_data.c | 70 ++++++++++++++ arch/arm/cpu/armv7/omap5/Makefile | 1 - arch/arm/cpu/armv7/omap5/clocks.c | 98 -------------------- arch/arm/cpu/armv7/omap5/hw_data.c | 43 +++++++++ arch/arm/include/asm/arch-omap4/clocks.h | 5 - arch/arm/include/asm/arch-omap4/omap.h | 3 +- arch/arm/include/asm/arch-omap5/clocks.h | 4 - arch/arm/include/asm/arch-omap5/omap.h | 3 +- arch/arm/include/asm/omap_common.h | 24 +++++ include/configs/omap5_evm.h | 1 + 13 files changed, 199 insertions(+), 260 deletions(-) delete mode 100644 arch/arm/cpu/armv7/omap4/clocks.c delete mode 100644 arch/arm/cpu/armv7/omap5/clocks.c (limited to 'include') diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index 2becc4aff5c..88e5336850c 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -443,44 +443,45 @@ static void setup_non_essential_dplls(void) } #endif -void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv) +u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic) { - u32 step; - int ret = 0; - - /* See if we can first get the GPIO if needed */ - if (gpio >= 0) - ret = gpio_request(gpio, "TPS62361_VSEL0_GPIO"); - if (ret < 0) { - printf("%s: gpio %d request failed %d\n", __func__, gpio, ret); - gpio = -1; - } - - /* Pull the GPIO low to select SET0 register, while we program SET1 */ - if (gpio >= 0) - gpio_direction_output(gpio, 0); + u32 offset_code; - step = volt_mv - TPS62361_BASE_VOLT_MV; - step /= 10; + volt_offset -= pmic->base_offset; - debug("do_scale_tps62361: volt - %d step - 0x%x\n", volt_mv, step); - if (omap_vc_bypass_send_value(TPS62361_I2C_SLAVE_ADDR, reg, step)) - puts("Scaling voltage failed for vdd_mpu from TPS\n"); + offset_code = (volt_offset + pmic->step - 1) / pmic->step; - /* Pull the GPIO high to select SET1 register */ - if (gpio >= 0) - gpio_direction_output(gpio, 1); + /* + * Offset codes 1-6 all give the base voltage in Palmas + * Offset code 0 switches OFF the SMPS + */ + return offset_code + pmic->start_code; } -void do_scale_vcore(u32 vcore_reg, u32 volt_mv) +void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) { u32 offset_code; u32 offset = volt_mv; + int ret = 0; + + /* See if we can first get the GPIO if needed */ + if (pmic->gpio_en) + ret = gpio_request(pmic->gpio, "PMIC_GPIO"); + + if (ret < 0) { + printf("%s: gpio %d request failed %d\n", __func__, + pmic->gpio, ret); + return; + } + + /* Pull the GPIO low to select SET0 register, while we program SET1 */ + if (pmic->gpio_en) + gpio_direction_output(pmic->gpio, 0); /* convert to uV for better accuracy in the calculations */ offset *= 1000; - offset_code = get_offset_code(offset); + offset_code = get_offset_code(offset, pmic); debug("do_scale_vcore: volt - %d offset_code - 0x%x\n", volt_mv, offset_code); @@ -488,6 +489,36 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv) if (omap_vc_bypass_send_value(SMPS_I2C_SLAVE_ADDR, vcore_reg, offset_code)) printf("Scaling voltage failed for 0x%x\n", vcore_reg); + + if (pmic->gpio_en) + gpio_direction_output(pmic->gpio, 1); +} + +/* + * Setup the voltages for vdd_mpu, vdd_core, and vdd_iva + * We set the maximum voltages allowed here because Smart-Reflex is not + * enabled in bootloader. Voltage initialization in the kernel will set + * these to the nominal values after enabling Smart-Reflex + */ +void scale_vcores(struct vcores_data const *vcores) +{ + omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ); + + do_scale_vcore(vcores->core.addr, vcores->core.value, + vcores->core.pmic); + + do_scale_vcore(vcores->mpu.addr, vcores->mpu.value, + vcores->mpu.pmic); + + do_scale_vcore(vcores->mm.addr, vcores->mm.value, + vcores->mm.pmic); + + if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) { + /* Configure LDO SRAM "magic" bits */ + writel(2, (*prcm)->prm_sldo_core_setup); + writel(2, (*prcm)->prm_sldo_mpu_setup); + writel(2, (*prcm)->prm_sldo_mm_setup); + } } static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode) @@ -656,7 +687,7 @@ void prcm_init(void) case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR: case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH: enable_basic_clocks(); - scale_vcores(); + scale_vcores(*omap_vcores); setup_dplls(); #ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL setup_non_essential_dplls(); diff --git a/arch/arm/cpu/armv7/omap4/Makefile b/arch/arm/cpu/armv7/omap4/Makefile index 03651489588..40808d18ff0 100644 --- a/arch/arm/cpu/armv7/omap4/Makefile +++ b/arch/arm/cpu/armv7/omap4/Makefile @@ -27,7 +27,6 @@ LIB = $(obj)lib$(SOC).o COBJS += sdram_elpida.o COBJS += hwinit.o -COBJS += clocks.o COBJS += emif.o COBJS += prcm-regs.o COBJS += hw_data.o diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c deleted file mode 100644 index 4772743947f..00000000000 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * - * Clock initialization for OMAP4 - * - * (C) Copyright 2010 - * Texas Instruments, - * - * Aneesh V - * - * Based on previous work by: - * Santosh Shilimkar - * Rajendra Nayak - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include -#include -#include -#include -#include -#include -#include - -#ifndef CONFIG_SPL_BUILD -/* - * printing to console doesn't work unless - * this code is executed from SPL - */ -#define printf(fmt, args...) -#define puts(s) -#endif /* !CONFIG_SPL_BUILD */ - -/* - * Setup the voltages for vdd_mpu, vdd_core, and vdd_iva - * We set the maximum voltages allowed here because Smart-Reflex is not - * enabled in bootloader. Voltage initialization in the kernel will set - * these to the nominal values after enabling Smart-Reflex - */ -void scale_vcores(void) -{ - u32 volt, omap_rev; - - omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ); - - omap_rev = omap_revision(); - - /* - * Scale Voltage rails: - * 1. VDD_CORE - * 3. VDD_MPU - * 3. VDD_IVA - */ - if (omap_rev < OMAP4460_ES1_0) { - /* - * OMAP4430: - * VDD_CORE = TWL6030 VCORE3 - * VDD_MPU = TWL6030 VCORE1 - * VDD_IVA = TWL6030 VCORE2 - */ - volt = 1200; - do_scale_vcore(SMPS_REG_ADDR_VCORE3, volt); - - /* - * note on VDD_MPU: - * Setting a high voltage for Nitro mode as smart reflex is not - * enabled. We use the maximum possible value in the AVS range - * because the next higher voltage in the discrete range - * (code >= 0b111010) is way too high. - */ - volt = 1325; - do_scale_vcore(SMPS_REG_ADDR_VCORE1, volt); - volt = 1200; - do_scale_vcore(SMPS_REG_ADDR_VCORE2, volt); - - } else { - /* - * OMAP4460: - * VDD_CORE = TWL6030 VCORE1 - * VDD_MPU = TPS62361 - * VDD_IVA = TWL6030 VCORE2 - */ - volt = 1200; - do_scale_vcore(SMPS_REG_ADDR_VCORE1, volt); - /* TPS62361 */ - volt = 1203; - do_scale_tps62361(TPS62361_VSEL0_GPIO, - TPS62361_REG_ADDR_SET1, volt); - /* VCORE 2 - supplies vdd_iva */ - volt = 1200; - do_scale_vcore(SMPS_REG_ADDR_VCORE2, volt); - } -} - -u32 get_offset_code(u32 offset) -{ - u32 offset_code, step = 12660; /* 12.66 mV represented in uV */ - - if (omap_revision() == OMAP4430_ES1_0) - offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV; - else - offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV; - - offset_code = (offset + step - 1) / step; - - /* The code starts at 1 not 0 */ - return ++offset_code; -} diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c b/arch/arm/cpu/armv7/omap4/hw_data.c index 6ae3986d733..18efa6c828a 100644 --- a/arch/arm/cpu/armv7/omap4/hw_data.c +++ b/arch/arm/cpu/armv7/omap4/hw_data.c @@ -30,12 +30,15 @@ #include #include #include +#include #include struct prcm_regs const **prcm = (struct prcm_regs const **) OMAP_SRAM_SCRATCH_PRCM_PTR; struct dplls const **dplls_data = (struct dplls const **) OMAP_SRAM_SCRATCH_DPLLS_PTR; +struct vcores_data const **omap_vcores = + (struct vcores_data const **) OMAP_SRAM_SCRATCH_VCORES_PTR; /* * The M & N values in the following tables are created using the @@ -194,6 +197,70 @@ struct dplls omap4460_dplls = { .usb = usb_dpll_params_1920mhz }; +struct pmic_data twl6030_4430es1 = { + .base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV, + .step = 12660, /* 10 mV represented in uV */ + /* The code starts at 1 not 0 */ + .start_code = 1, +}; + +struct pmic_data twl6030 = { + .base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV, + .step = 12660, /* 10 mV represented in uV */ + /* The code starts at 1 not 0 */ + .start_code = 1, +}; + +struct pmic_data tps62361 = { + .base_offset = TPS62361_BASE_VOLT_MV, + .step = 10000, /* 10 mV represented in uV */ + .start_code = 0, + .gpio = TPS62361_VSEL0_GPIO, + .gpio_en = 1 +}; + +struct vcores_data omap4430_volts_es1 = { + .mpu.value = 1325, + .mpu.addr = SMPS_REG_ADDR_VCORE1, + .mpu.pmic = &twl6030_4430es1, + + .core.value = 1200, + .core.addr = SMPS_REG_ADDR_VCORE3, + .core.pmic = &twl6030_4430es1, + + .mm.value = 1200, + .mm.addr = SMPS_REG_ADDR_VCORE2, + .mm.pmic = &twl6030_4430es1, +}; + +struct vcores_data omap4430_volts = { + .mpu.value = 1325, + .mpu.addr = SMPS_REG_ADDR_VCORE1, + .mpu.pmic = &twl6030, + + .core.value = 1200, + .core.addr = SMPS_REG_ADDR_VCORE3, + .core.pmic = &twl6030, + + .mm.value = 1200, + .mm.addr = SMPS_REG_ADDR_VCORE2, + .mm.pmic = &twl6030, +}; + +struct vcores_data omap4460_volts = { + .mpu.value = 1203, + .mpu.addr = TPS62361_REG_ADDR_SET1, + .mpu.pmic = &tps62361, + + .core.value = 1200, + .core.addr = SMPS_REG_ADDR_VCORE1, + .core.pmic = &tps62361, + + .mm.value = 1200, + .mm.addr = SMPS_REG_ADDR_VCORE2, + .mm.pmic = &tps62361, +}; + /* * Enable essential clock domains, modules and * do some additional special settings needed @@ -382,6 +449,7 @@ void hw_data_init(void) case OMAP4430_ES1_0: *dplls_data = &omap4430_dplls_es1; + *omap_vcores = &omap4430_volts_es1; break; case OMAP4430_ES2_0: @@ -389,11 +457,13 @@ void hw_data_init(void) case OMAP4430_ES2_2: case OMAP4430_ES2_3: *dplls_data = &omap4430_dplls; + *omap_vcores = &omap4430_volts; break; case OMAP4460_ES1_0: case OMAP4460_ES1_1: *dplls_data = &omap4460_dplls; + *omap_vcores = &omap4460_volts; break; default: diff --git a/arch/arm/cpu/armv7/omap5/Makefile b/arch/arm/cpu/armv7/omap5/Makefile index 81625f6e687..ce00e2c3c5d 100644 --- a/arch/arm/cpu/armv7/omap5/Makefile +++ b/arch/arm/cpu/armv7/omap5/Makefile @@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o COBJS += hwinit.o -COBJS += clocks.o COBJS += emif.o COBJS += sdram.o COBJS += prcm-regs.o diff --git a/arch/arm/cpu/armv7/omap5/clocks.c b/arch/arm/cpu/armv7/omap5/clocks.c deleted file mode 100644 index da5b3acf1e1..00000000000 --- a/arch/arm/cpu/armv7/omap5/clocks.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * - * Clock initialization for OMAP5 - * - * (C) Copyright 2010 - * Texas Instruments, - * - * Aneesh V - * Sricharan R - * - * Based on previous work by: - * Santosh Shilimkar - * Rajendra Nayak - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include -#include -#include -#include -#include -#include -#include - -#ifndef CONFIG_SPL_BUILD -/* - * printing to console doesn't work unless - * this code is executed from SPL - */ -#define printf(fmt, args...) -#define puts(s) -#endif - -/* - * Setup the voltages for vdd_mpu, vdd_core, and vdd_iva - * We set the maximum voltages allowed here because Smart-Reflex is not - * enabled in bootloader. Voltage initialization in the kernel will set - * these to the nominal values after enabling Smart-Reflex - */ -void scale_vcores(void) -{ - u32 volt_core, volt_mpu, volt_mm; - - omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ); - - /* Palmas settings */ - if (omap_revision() != OMAP5432_ES1_0) { - volt_core = VDD_CORE; - volt_mpu = VDD_MPU; - volt_mm = VDD_MM; - } else { - volt_core = VDD_CORE_5432; - volt_mpu = VDD_MPU_5432; - volt_mm = VDD_MM_5432; - } - - do_scale_vcore(SMPS_REG_ADDR_8_CORE, volt_core); - do_scale_vcore(SMPS_REG_ADDR_12_MPU, volt_mpu); - do_scale_vcore(SMPS_REG_ADDR_45_IVA, volt_mm); - - if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) { - /* Configure LDO SRAM "magic" bits */ - writel(2, (*prcm)->prm_sldo_core_setup); - writel(2, (*prcm)->prm_sldo_mpu_setup); - writel(2, (*prcm)->prm_sldo_mm_setup); - } -} - -u32 get_offset_code(u32 volt_offset) -{ - u32 offset_code, step = 10000; /* 10 mV represented in uV */ - - volt_offset -= PALMAS_SMPS_BASE_VOLT_UV; - - offset_code = (volt_offset + step - 1) / step; - - /* - * Offset codes 1-6 all give the base voltage in Palmas - * Offset code 0 switches OFF the SMPS - */ - return offset_code + 6; -} diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index df375f99a6f..13e618d3427 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -30,12 +30,15 @@ #include #include #include +#include #include struct prcm_regs const **prcm = (struct prcm_regs const **) OMAP_SRAM_SCRATCH_PRCM_PTR; struct dplls const **dplls_data = (struct dplls const **) OMAP_SRAM_SCRATCH_DPLLS_PTR; +struct vcores_data const **omap_vcores = + (struct vcores_data const **) OMAP_SRAM_SCRATCH_VCORES_PTR; static const struct dpll_params mpu_dpll_params_1_5ghz[NUM_SYS_CLKS] = { {125, 0, 1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */ @@ -179,6 +182,44 @@ struct dplls omap5_dplls_es1 = { .usb = usb_dpll_params_1920mhz }; +struct pmic_data palmas = { + .base_offset = PALMAS_SMPS_BASE_VOLT_UV, + .step = 10000, /* 10 mV represented in uV */ + /* + * Offset codes 1-6 all give the base voltage in Palmas + * Offset code 0 switches OFF the SMPS + */ + .start_code = 6, +}; + +struct vcores_data omap5430_volts = { + .mpu.value = VDD_MPU, + .mpu.addr = SMPS_REG_ADDR_12_MPU, + .mpu.pmic = &palmas, + + .core.value = VDD_CORE, + .core.addr = SMPS_REG_ADDR_8_CORE, + .core.pmic = &palmas, + + .mm.value = VDD_MM, + .mm.addr = SMPS_REG_ADDR_45_IVA, + .mm.pmic = &palmas, +}; + +struct vcores_data omap5432_volts = { + .mpu.value = VDD_MPU_5432, + .mpu.addr = SMPS_REG_ADDR_12_MPU, + .mpu.pmic = &palmas, + + .core.value = VDD_CORE_5432, + .core.addr = SMPS_REG_ADDR_8_CORE, + .core.pmic = &palmas, + + .mm.value = VDD_MM_5432, + .mm.addr = SMPS_REG_ADDR_45_IVA, + .mm.pmic = &palmas, +}; + /* * Enable essential clock domains, modules and * do some additional special settings needed @@ -380,11 +421,13 @@ void hw_data_init(void) case OMAP5430_ES1_0: *prcm = &omap5_es1_prcm; *dplls_data = &omap5_dplls_es1; + *omap_vcores = &omap5430_volts; break; case OMAP5432_ES1_0: *prcm = &omap5_es1_prcm; *dplls_data = &omap5_dplls_es1; + *omap_vcores = &omap5432_volts; break; default: diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h index ceb33674497..ed7a1c8be7a 100644 --- a/arch/arm/include/asm/arch-omap4/clocks.h +++ b/arch/arm/include/asm/arch-omap4/clocks.h @@ -242,11 +242,6 @@ #define DPLL_NO_LOCK 0 #define DPLL_LOCK 1 -void scale_vcores(void); -void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv); -u32 get_offset_code(u32 offset); -void do_scale_vcore(u32 vcore_reg, u32 volt_mv); - struct omap4_scrm_regs { u32 revision; /* 0x0000 */ u32 pad00[63]; diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index 1c0ce9b38be..73edd9d9608 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -180,7 +180,8 @@ struct control_lpddr2io_regs { #define OMAP4_SRAM_SCRATCH_EMIF_T_DEN (SRAM_SCRATCH_SPACE_ADDR + 0x10) #define OMAP_SRAM_SCRATCH_PRCM_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x14) #define OMAP_SRAM_SCRATCH_DPLLS_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x18) -#define OMAP4_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x1C) +#define OMAP_SRAM_SCRATCH_VCORES_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x1C) +#define OMAP4_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x20) /* ROM code defines */ /* Boot device */ diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h index 063347f69e6..15362ae560a 100644 --- a/arch/arm/include/asm/arch-omap5/clocks.h +++ b/arch/arm/include/asm/arch-omap5/clocks.h @@ -234,8 +234,4 @@ #define DPLL_NO_LOCK 0 #define DPLL_LOCK 1 -void scale_vcores(void); -void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv); -u32 get_offset_code(u32 offset); -void do_scale_vcore(u32 vcore_reg, u32 volt_mv); #endif /* _CLOCKS_OMAP5_H_ */ diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 71236940459..4bf555ae408 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -273,7 +273,8 @@ struct omap_sys_ctrl_regs { #define OMAP5_SRAM_SCRATCH_EMIF_T_DEN (SRAM_SCRATCH_SPACE_ADDR + 0x10) #define OMAP_SRAM_SCRATCH_PRCM_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x14) #define OMAP_SRAM_SCRATCH_DPLLS_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x18) -#define OMAP5_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x1C) +#define OMAP_SRAM_SCRATCH_VCORES_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x1C) +#define OMAP5_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x20) /* Silicon revisions */ #define OMAP4430_SILICON_ID_INVALID 0xFFFFFFFF diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index c2d8388b32c..eee6893d643 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -364,10 +364,31 @@ struct dplls { const struct dpll_params *usb; }; +struct pmic_data { + u32 base_offset; + u32 step; + u32 start_code; + unsigned gpio; + int gpio_en; +}; + +struct volts { + u32 value; + u32 addr; + struct pmic_data *pmic; +}; + +struct vcores_data { + struct volts mpu; + struct volts core; + struct volts mm; +}; + extern struct prcm_regs const **prcm; extern struct prcm_regs const omap5_es1_prcm; extern struct prcm_regs const omap4_prcm; extern struct dplls const **dplls_data; +extern struct vcores_data const **omap_vcores; extern const u32 sys_clk_array[8]; void hw_data_init(void); @@ -391,6 +412,9 @@ u32 get_sys_clk_index(void); void enable_basic_clocks(void); void enable_basic_uboot_clocks(void); void enable_non_essential_clocks(void); +void scale_vcores(struct vcores_data const *); +u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic); +void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic); /* Max value for DPLL multiplier M */ #define OMAP_DPLL_MAX_N 127 diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index 85ea88b99dd..0f11d344a0e 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -265,5 +265,6 @@ #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x84100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SPL_GPIO_SUPPORT #endif /* __CONFIG_H */ -- cgit v1.3.1 From 3ef5ebeb86d1ef76277ab738fa663dfca1ce9599 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Sun, 17 Feb 2013 23:34:35 +0000 Subject: arm: dra7xx: Add dra7xx_evm build support Adding the build support for dra7xx_evm. Reusing omap5_evm.h config by moving it to omap5_common.h Signed-off-by: Lokesh Vutla Signed-off-by: R Sricharan --- boards.cfg | 1 + include/configs/dra7xx_evm.h | 36 ++++++ include/configs/omap5_common.h | 262 +++++++++++++++++++++++++++++++++++++++++ include/configs/omap5_evm.h | 242 +------------------------------------ 4 files changed, 305 insertions(+), 236 deletions(-) create mode 100644 include/configs/dra7xx_evm.h create mode 100644 include/configs/omap5_common.h (limited to 'include') diff --git a/boards.cfg b/boards.cfg index c117368cdbf..efe137d8b07 100644 --- a/boards.cfg +++ b/boards.cfg @@ -285,6 +285,7 @@ nokia_rx51 arm armv7 rx51 nokia omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 omap5_evm arm armv7 omap5_evm ti omap5 +dra7xx_evm arm armv7 dra7xx ti omap5 s5p_goni arm armv7 goni samsung s5pc1xx smdkc100 arm armv7 smdkc100 samsung s5pc1xx origen arm armv7 origen samsung exynos diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h new file mode 100644 index 00000000000..10a493995fa --- /dev/null +++ b/include/configs/dra7xx_evm.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2013 + * Texas Instruments Incorporated. + * Lokesh Vutla + * + * Configuration settings for the TI DRA7XX board. + * See omap5_common.h for omap5 common settings. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_DRA7XX_EVM_H +#define __CONFIG_DRA7XX_EVM_H + +#include + +#define CONFIG_DRA7XX /* in a TI DRA7XX core */ +#define CONFIG_SYS_PROMPT "DRA752 EVM # " + +#endif /* __CONFIG_DRA7XX_EVM_H */ diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h new file mode 100644 index 00000000000..af975640112 --- /dev/null +++ b/include/configs/omap5_common.h @@ -0,0 +1,262 @@ +/* + * (C) Copyright 2013 + * Texas Instruments Incorporated. + * Sricharan R + * + * Derived from OMAP4 done by: + * Aneesh V + * + * TI OMAP5 AND DRA7XX common configuration settings + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_OMAP5_COMMON_H +#define __CONFIG_OMAP5_COMMON_H + +/* + * High Level Configuration Options + */ +#define CONFIG_OMAP /* in a TI OMAP core */ +#define CONFIG_OMAP54XX /* which is a 54XX */ +#define CONFIG_OMAP_GPIO + +/* Get CPU defs */ +#include +#include + +/* Display CPU and Board Info */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Clock Defines */ +#define V_OSCK 19200000 /* Clock output from T2 */ +#define V_SCLK V_OSCK + +#define CONFIG_MISC_INIT_R + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +/* + * Size of malloc() pool + * Total Size Environment - 128k + * Malloc - add 256k + */ +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) +/* Vector Base */ +#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE + +/* + * Hardware drivers + */ + +/* + * serial port - NS16550 compatible + */ +#define V_NS16550_CLK 48000000 + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 UART3_BASE + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +/* I2C */ +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_DRIVER_OMAP34XX_I2C +#define CONFIG_I2C_MULTI_BUS + + +/* MMC */ +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_DOS_PARTITION + +/* MMC ENV related defines */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ +#define CONFIG_ENV_OFFSET 0xE0000 +#define CONFIG_CMD_SAVEENV + +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +/* Flash */ +#define CONFIG_SYS_NO_FLASH + +/* Cache */ +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_CACHELINE_SHIFT 6 + +/* commands to include */ +#include + +/* Enabled commands */ +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_SAVEENV + +/* Disabled commands */ +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_IMLS /* List all found images */ + +/* + * Environment setup + */ + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x82000000\0" \ + "console=ttyO2,115200n8\0" \ + "usbtty=cdc_acm\0" \ + "vram=16M\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 rw\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "vram=${vram} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ + "source ${loadaddr}\0" \ + "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ + "mmcboot=echo Booting from mmc${mmcdev} ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loaduimage; then " \ + "run mmcboot; " \ + "fi; " \ + "fi; " \ + "fi" + +#define CONFIG_AUTO_COMPLETE 1 + +/* + * Miscellaneous configurable options + */ + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_CBSIZE 256 +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +/* + * memtest setup + */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) + +/* Default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x80000000 + +/* Use General purpose timer 1 */ +#define CONFIG_SYS_TIMERBASE GPT2_BASE +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * SDRAM Memory Map + * Even though we use two CS all the memory + * is mapped to one contiguous block + */ +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ + GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS + +/* Defines for SDRAM init */ +#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION +#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS +#endif + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x40300350 +#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */ +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SPL_DISPLAY_PRINT + +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +/* + * 64 bytes before this address should be set aside for u-boot.img's + * header. That is 80E7FFC0--0x80E80000 should not be used for any + * other needs. + */ +#define CONFIG_SYS_TEXT_BASE 0x80E80000 + +/* + * BSS and malloc area 64MB into memory to allow enough + * space for the kernel at the beginning of memory + */ +#define CONFIG_SPL_BSS_START_ADDR 0x84000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x84100000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SPL_GPIO_SUPPORT + +#endif /* __CONFIG_OMAP5_COMMON_H */ diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index 0f11d344a0e..22a8e13f48c 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -1,12 +1,10 @@ /* - * (C) Copyright 2010 + * (C) Copyright 2013 * Texas Instruments Incorporated. * Sricharan R * - * Derived from OMAP4 done by: - * Aneesh V - * * Configuration settings for the TI EVM5430 board. + * See omap5_common.h for omap5 common settings. * * See file CREDITS for list of people who contributed to this * project. @@ -27,244 +25,16 @@ * MA 02111-1307 USA */ -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - */ -#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ -#define CONFIG_OMAP /* in a TI OMAP core */ -#define CONFIG_OMAP54XX /* which is a 54XX */ -#define CONFIG_OMAP5430 /* which is in a 5430 */ -#define CONFIG_5430EVM /* working with EVM */ -#define CONFIG_OMAP_GPIO - -/* Get CPU defs */ -#include -#include - -/* Display CPU and Board Info */ -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - -/* Clock Defines */ -#define V_OSCK 19200000 /* Clock output from T2 */ -#define V_SCLK V_OSCK - -#define CONFIG_MISC_INIT_R - -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -/* - * Size of malloc() pool - * Total Size Environment - 128k - * Malloc - add 256k - */ -#define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) -/* Vector Base */ -#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE - -/* - * Hardware drivers - */ - -/* - * serial port - NS16550 compatible - */ -#define V_NS16550_CLK 48000000 - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 UART3_BASE +#ifndef __CONFIG_OMAP5_EVM_H +#define __CONFIG_OMAP5_EVM_H -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} -/* I2C */ -#define CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_DRIVER_OMAP34XX_I2C -#define CONFIG_I2C_MULTI_BUS +#include /* TWL6035 */ #ifndef CONFIG_SPL_BUILD #define CONFIG_TWL6035_POWER #endif -/* MMC */ -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_OMAP_HSMMC -#define CONFIG_DOS_PARTITION - -/* MMC ENV related defines */ -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ -#define CONFIG_ENV_OFFSET 0xE0000 -#define CONFIG_CMD_SAVEENV - -#define CONFIG_SYS_CONSOLE_IS_IN_ENV - -/* Flash */ -#define CONFIG_SYS_NO_FLASH - -/* Cache */ -#define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_CACHELINE_SHIFT 6 - -/* commands to include */ -#include - -/* Enabled commands */ -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_SAVEENV - -/* Disabled commands */ -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMLS /* List all found images */ - -/* - * Environment setup - */ - -#define CONFIG_BOOTDELAY 3 - -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "console=ttyO2,115200n8\0" \ - "usbtty=cdc_acm\0" \ - "vram=16M\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "vram=${vram} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ - "source ${loadaddr}\0" \ - "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ - "mmcboot=echo Booting from mmc${mmcdev} ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi" - -#define CONFIG_AUTO_COMPLETE 1 - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ #define CONFIG_SYS_PROMPT "OMAP5430 EVM # " -#define CONFIG_SYS_CBSIZE 256 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -/* - * memtest setup - */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) - -/* Default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x80000000 - -/* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT2_BASE -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 - -/* - * SDRAM Memory Map - * Even though we use two CS all the memory - * is mapped to one contiguous block - */ -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS - -/* Defines for SDRAM init */ -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - -/* Defines for SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_TEXT_BASE 0x40300350 -#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */ -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SPL_DISPLAY_PRINT - -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" - -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" - -/* - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 80E7FFC0--0x80E80000 should not be used for any - * other needs. - */ -#define CONFIG_SYS_TEXT_BASE 0x80E80000 - -/* - * BSS and malloc area 64MB into memory to allow enough - * space for the kernel at the beginning of memory - */ -#define CONFIG_SPL_BSS_START_ADDR 0x84000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x84100000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ -#define CONFIG_SPL_GPIO_SUPPORT -#endif /* __CONFIG_H */ +#endif /* __CONFIG_OMAP5_EVM_H */ -- cgit v1.3.1 From 36873e7d96f05ba53ff1d21e2fabf45e131856a7 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Wed, 20 Feb 2013 00:16:23 +0000 Subject: arm: at91/configs: add libfdt to configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit support to boot device tree Linux kernel Signed-off-by: Nicolas Ferre [Add libftd for at91rm9200, at91sam9263, at91sam9rl] Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- include/configs/at91rm9200ek.h | 2 ++ include/configs/at91sam9260ek.h | 2 ++ include/configs/at91sam9263ek.h | 2 ++ include/configs/at91sam9rlek.h | 2 ++ 4 files changed, 8 insertions(+) (limited to 'include') diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index bf20065afda..4b526c24691 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -75,6 +75,8 @@ #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_OF_LIBFDT + /* * Memory Configuration */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 02696b30a85..3db6cc8eecf 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -62,6 +62,8 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_OF_LIBFDT + /* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ #define CONFIG_AT91_GPIO diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 35038229ad5..005d1af787e 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -62,6 +62,8 @@ #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_OF_LIBFDT + /* * Hardware drivers */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 8178b32a847..be084b2a4be 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -48,6 +48,8 @@ #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_OF_LIBFDT + #define CONFIG_ATMEL_LEGACY #define CONFIG_AT91_GPIO 1 #define CONFIG_AT91_GPIO_PULLUP 1 -- cgit v1.3.1 From f9129fe33852ce98c15704aff954045606582b40 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Wed, 20 Feb 2013 00:16:24 +0000 Subject: arm: at91/configs: add bootz to configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Support to boot zImage Signed-off-by: Nicolas Ferre [Add bootz for at91rm9200, at91sam9263, at91sam9rl] Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- include/configs/at91rm9200ek.h | 1 + include/configs/at91sam9260ek.h | 1 + include/configs/at91sam9263ek.h | 1 + include/configs/at91sam9m10g45ek.h | 1 + include/configs/at91sam9rlek.h | 1 + include/configs/at91sam9x5ek.h | 1 + 6 files changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 4b526c24691..73521132669 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -75,6 +75,7 @@ #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT /* diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 3db6cc8eecf..392a818de76 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -62,6 +62,7 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT /* general purpose I/O */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 005d1af787e..da2a93111b5 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -62,6 +62,7 @@ #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT /* diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index e988d814107..f1a4db30c87 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -47,6 +47,7 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT /* general purpose I/O */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index be084b2a4be..aa359b13dbb 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -48,6 +48,7 @@ #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT #define CONFIG_ATMEL_LEGACY diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 6fac5ac4eb8..1bc56a5b78e 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -42,6 +42,7 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT /* general purpose I/O */ -- cgit v1.3.1 From 0c58cfa9dd84176a26a64be258a554a38ce654e2 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Wed, 20 Feb 2013 00:16:25 +0000 Subject: ARM: at91: change nand flash table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change nand flash partition table according to www.at91.com/linux4sam more information: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted#Linux4SAM_NandFlash_demo_Memory Signed-off-by: Bo Shen [minor commit message changes] Signed-off-by: Andreas Bießmann --- include/configs/at91sam9260ek.h | 18 +++++++++--------- include/configs/at91sam9261ek.h | 19 +++++++++---------- include/configs/at91sam9263ek.h | 17 +++++++++-------- include/configs/at91sam9m10g45ek.h | 16 ++++++++-------- include/configs/at91sam9x5ek.h | 11 ++++++----- 5 files changed, 41 insertions(+), 40 deletions(-) (limited to 'include') diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 392a818de76..ebcc69afa3e 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -215,16 +215,16 @@ /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock5 " \ - "mtdparts=atmel_nand:128k(bootstrap)ro," \ - "256k(uboot)ro,128k(env1)ro," \ - "128k(env2)ro,2M(linux),-(root) " \ - "rw rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 earlyprintk " \ + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ + "256k(env),256k(env_redundant),256k(spare)," \ + "512k(dtb),6M(kernel)ro,-(rootfs) " \ + "root=/dev/mtdblock7 rw rootfstype=jffs2" #endif diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 611e3e25329..cabff9a9fe3 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -212,17 +212,16 @@ /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock5 " \ - "mtdparts=atmel_nand:128k(bootstrap)ro," \ - "256k(uboot)ro,128k(env1)ro," \ - "128k(env2)ro,2M(linux),-(root) " \ - "rw rootfstype=jffs2" - +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 earlyprintk " \ + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ + "256k(env),256k(env_redundant),256k(spare)," \ + "512k(dtb),6M(kernel)ro,-(rootfs) " \ + "root=/dev/mtdblock7 rw rootfstype=jffs2" #endif #define CONFIG_SYS_PROMPT "U-Boot> " diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index da2a93111b5..1ab9c304887 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -327,15 +327,16 @@ /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock5 " \ - "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ - "rw rootfstype=jffs2" - +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 earlyprintk " \ + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ + "256k(env),256k(env_redundant),256k(spare)," \ + "512k(dtb),6M(kernel)ro,-(rootfs) " \ + "root=/dev/mtdblock7 rw rootfstype=jffs2" #endif #define CONFIG_SYS_PROMPT "U-Boot> " diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index f1a4db30c87..07e1c9f890f 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -150,19 +150,19 @@ /* bootstrap + u-boot + env in nandflash */ #define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_BOOTCOMMAND "nand read 0x70000000 0x100000 0x200000;" \ +#define CONFIG_BOOTCOMMAND \ + "nand read 0x70000000 0x200000 0x300000;" \ "bootm 0x70000000" #define CONFIG_BOOTARGS \ "console=ttyS0,115200 earlyprintk " \ - "root=/dev/mtdblock5 " \ - "mtdparts=atmel_nand:128k(bootstrap)ro," \ - "256k(uboot)ro,128k(env1)ro,128k(env2)ro," \ - "2M@1M(linux),-(root) " \ - "rw rootfstype=jffs2" + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ + "256k(env),256k(env_redundant),256k(spare)," \ + "512k(dtb),6M(kernel)ro,-(rootfs) " \ + "root=/dev/mtdblock7 rw rootfstype=jffs2" #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 1bc56a5b78e..ee6e3fcdecd 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -232,11 +232,12 @@ "root=/dev/mmcblk0p2 " \ "rw rootfstype=ext4 rootwait" #else -#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ - "mtdparts=atmel_nand:" \ - "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ - "root=/dev/mtdblock1 rw " \ - "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 earlyprintk " \ + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ + "256k(env),256k(env_redundant),256k(spare)," \ + "512k(dtb),6M(kernel)ro,-(rootfs) " \ + "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw" #endif #define CONFIG_BAUDRATE 115200 -- cgit v1.3.1 From 65cdd6430ed026484bfb9dc67fcc587b85212eb4 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Mon, 25 Feb 2013 00:58:58 +0000 Subject: Remove linker lists (LGAs) from SPL linker scripts Many SPL linker scripts needlessly include linker lists (aka LGAs). Remove them whenever possible; keep it only in the seven am335x_evm variants (am335x_evm, am335x_evm_uart[1-5], am335x_evm_spiboot), where there is actual content in output section .u_boot_list. This commit keeps all u-boot.bin and u-boot-spl.bin in ARM targets byte-identical. Signed-off-by: Albert ARIBAUD --- arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 6 -- arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds | 6 -- arch/arm/cpu/armv7/am33xx/u-boot-spl.lds | 67 +++++++++++++++++++ arch/arm/cpu/armv7/omap-common/u-boot-spl.lds | 4 -- arch/arm/cpu/u-boot-spl.lds | 93 ++++++++++++++++++++++++++ board/ait/cam_enc_4xx/u-boot-spl.lds | 4 -- board/davinci/da8xxevm/u-boot-spl-da850evm.lds | 5 -- board/davinci/da8xxevm/u-boot-spl-hawk.lds | 5 -- board/vpac270/u-boot-spl.lds | 4 -- include/configs/am335x_evm.h | 2 +- include/configs/pcm051.h | 2 +- spl/Makefile | 8 +-- 12 files changed, 164 insertions(+), 42 deletions(-) create mode 100644 arch/arm/cpu/armv7/am33xx/u-boot-spl.lds create mode 100644 arch/arm/cpu/u-boot-spl.lds (limited to 'include') diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds index 6dc681a3139..0f3222c76a4 100644 --- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds +++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds @@ -51,12 +51,6 @@ SECTIONS . = ALIGN(4); - .u_boot_list : { - #include - } - - . = ALIGN(4); - .rel.dyn : { __rel_dyn_start = .; *(.rel*) diff --git a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds index f3bd5e73675..0af3e0a2315 100644 --- a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds +++ b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds @@ -51,12 +51,6 @@ SECTIONS . = ALIGN(4); - .u_boot_list : { - #include - } - - . = ALIGN(4); - .rel.dyn : { __rel_dyn_start = .; *(.rel*) diff --git a/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds b/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds new file mode 100644 index 00000000000..1c3deefa7da --- /dev/null +++ b/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds @@ -0,0 +1,67 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, + * + * (C) Copyright 2010 + * Texas Instruments, + * Aneesh V + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ + LENGTH = CONFIG_SPL_MAX_SIZE } +MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ + LENGTH = CONFIG_SPL_BSS_MAX_SIZE } + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + .text : + { + __start = .; + arch/arm/cpu/armv7/start.o (.text) + *(.text*) + } >.sram + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram + + . = ALIGN(4); + .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram + + .u_boot_list : { + #include + } >.sram + + . = ALIGN(4); + __image_copy_end = .; + _end = .; + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.bss*) + . = ALIGN(4); + __bss_end__ = .; + } >.sdram +} diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds index 67556289541..88f40698b67 100644 --- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds +++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds @@ -48,10 +48,6 @@ SECTIONS . = ALIGN(4); .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram - .u_boot_list : { - #include - } > .sram - . = ALIGN(4); __image_copy_end = .; _end = .; diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds new file mode 100644 index 00000000000..8321afb959a --- /dev/null +++ b/arch/arm/cpu/u-boot-spl.lds @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2004-2008 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + __image_copy_start = .; + CPUDIR/start.o (.text*) + *(.text*) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { + *(.data*) + } + + . = ALIGN(4); + + . = .; + + __image_copy_end = .; + + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } + + .dynsym : { + __dynsym_start = .; + *(.dynsym) + } + + _end = .; + + /* + * Deprecated: this MMU section is used by pxa at present but + * should not be used by new boards/CPUs. + */ + . = ALIGN(4096); + .mmutable : { + *(.mmutable) + } + + .bss __rel_dyn_start (OVERLAY) : { + __bss_start = .; + *(.bss*) + . = ALIGN(4); + __bss_end__ = .; + } + + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } +} + +#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big"); +#endif diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds b/board/ait/cam_enc_4xx/u-boot-spl.lds index 656b2fbf890..52c986e8a9e 100644 --- a/board/ait/cam_enc_4xx/u-boot-spl.lds +++ b/board/ait/cam_enc_4xx/u-boot-spl.lds @@ -48,10 +48,6 @@ SECTIONS . = ALIGN(4); .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { - #include - } >.sram - . = ALIGN(4); .rel.dyn : { __rel_dyn_start = .; *(.rel*) diff --git a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds index c5fd93c0f73..dd5f266127e 100644 --- a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds +++ b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds @@ -48,11 +48,6 @@ SECTIONS . = ALIGN(4); .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram - . = ALIGN(4); - .u_boot_list : { - #include - } >.sram - . = ALIGN(4); .rel.dyn : { __rel_dyn_start = .; diff --git a/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/board/davinci/da8xxevm/u-boot-spl-hawk.lds index 86dc172ee24..b3a41afc42d 100644 --- a/board/davinci/da8xxevm/u-boot-spl-hawk.lds +++ b/board/davinci/da8xxevm/u-boot-spl-hawk.lds @@ -57,11 +57,6 @@ SECTIONS *(.data.rel.ro) } - . = ALIGN(4); - .u_boot_list : { - #include - } - . = ALIGN(4); __rel_dyn_start = .; __rel_dyn_end = .; diff --git a/board/vpac270/u-boot-spl.lds b/board/vpac270/u-boot-spl.lds index 20161a46a64..1958c2fb903 100644 --- a/board/vpac270/u-boot-spl.lds +++ b/board/vpac270/u-boot-spl.lds @@ -57,10 +57,6 @@ SECTIONS *(.data) } - .u_boot_list : { - #include - } - . = ALIGN(4); .rel.dyn : { diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 709c1f33735..9eada95c04f 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -286,7 +286,7 @@ #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 #define CONFIG_SPL_MUSB_NEW_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_AM33XX_BCH diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index aa90ba9c5d0..63ab12329b4 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -234,7 +234,7 @@ #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM diff --git a/spl/Makefile b/spl/Makefile index aac614686e8..14095c8df7a 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -119,7 +119,7 @@ ifeq ($(wildcard $(LDSCRIPT)),) LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-spl.lds endif ifeq ($(wildcard $(LDSCRIPT)),) - LDSCRIPT := $(TOPDIR)/arch/$(ARCH)/cpu/u-boot.lds + LDSCRIPT := $(TOPDIR)/arch/$(ARCH)/cpu/u-boot-spl.lds endif ifeq ($(wildcard $(LDSCRIPT)),) $(error could not find linker script) @@ -177,11 +177,7 @@ $(START): depend $(LIBS): depend $(MAKE) -C $(SRCTREE)$(dir $(subst $(SPLTREE),,$@)) -# The following line expands into whole rule which generates u-boot.lst, -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(obj)u-boot.lst, $(LIBS))) -$(obj)u-boot-spl.lds: $(LDSCRIPT) $(obj)u-boot.lst depend +$(obj)u-boot-spl.lds: $(LDSCRIPT) depend $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(obj). -ansi -D__ASSEMBLY__ -P - < $< > $@ depend: $(obj).depend -- cgit v1.3.1 From ef123c525370463254a6f8e67563fdb0b0b46412 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Mon, 25 Feb 2013 00:59:00 +0000 Subject: Refactor linker-generated arrays Refactor linker-generated array code so that symbols which were previously linker-generated are now compiler- generated. This causes relocation records of type R_ARM_ABS32 to become R_ARM_RELATIVE, which makes code which uses LGA able to run before relocation as well as after. Note: this affects more than ARM targets, as linker- lists span possibly all target architectures, notably PowerPC. Conflicts: arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds arch/arm/cpu/armv7/omap-common/u-boot-spl.lds board/ait/cam_enc_4xx/u-boot-spl.lds board/davinci/da8xxevm/u-boot-spl-da850evm.lds board/davinci/da8xxevm/u-boot-spl-hawk.lds board/vpac270/u-boot-spl.lds Signed-off-by: Albert ARIBAUD --- .gitignore | 1 - Makefile | 13 +- arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 2 +- arch/arm/cpu/armv7/am33xx/u-boot-spl.lds | 2 +- arch/arm/cpu/ixp/u-boot.lds | 2 +- arch/arm/cpu/u-boot.lds | 2 +- arch/avr32/cpu/u-boot.lds | 2 +- arch/blackfin/cpu/u-boot.lds | 2 +- arch/microblaze/cpu/u-boot.lds | 2 +- arch/mips/cpu/u-boot.lds | 2 +- arch/nds32/cpu/n1213/u-boot.lds | 2 +- arch/nios2/cpu/u-boot.lds | 2 +- arch/powerpc/cpu/74xx_7xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc512x/u-boot.lds | 2 +- arch/powerpc/cpu/mpc5xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds | 2 +- arch/powerpc/cpu/mpc5xxx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc8220/u-boot.lds | 2 +- arch/powerpc/cpu/mpc824x/u-boot.lds | 2 +- arch/powerpc/cpu/mpc8260/u-boot.lds | 2 +- arch/powerpc/cpu/mpc83xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc86xx/u-boot.lds | 2 +- arch/powerpc/cpu/ppc4xx/u-boot.lds | 2 +- arch/sandbox/cpu/u-boot.lds | 2 +- arch/sh/cpu/sh2/u-boot.lds | 2 +- arch/sh/cpu/sh3/u-boot.lds | 2 +- arch/sh/cpu/sh4/u-boot.lds | 2 +- arch/x86/cpu/u-boot.lds | 2 +- board/BuS/eb_cpu5282/u-boot.lds | 2 +- board/LEOX/elpt860/u-boot.lds | 2 +- board/RPXClassic/u-boot.lds | 2 +- board/RPXClassic/u-boot.lds.debug | 2 +- board/RPXlite/u-boot.lds | 2 +- board/RPXlite/u-boot.lds.debug | 2 +- board/RPXlite_dw/u-boot.lds | 2 +- board/RPXlite_dw/u-boot.lds.debug | 2 +- board/RRvision/u-boot.lds | 2 +- board/actux1/u-boot.lds | 2 +- board/actux2/u-boot.lds | 2 +- board/actux3/u-boot.lds | 2 +- board/adder/u-boot.lds | 2 +- board/altera/nios2-generic/u-boot.lds | 2 +- board/amcc/acadia/u-boot-nand.lds | 2 +- board/amcc/bamboo/u-boot-nand.lds | 2 +- board/amcc/canyonlands/u-boot-nand.lds | 2 +- board/amcc/kilauea/u-boot-nand.lds | 2 +- board/amcc/sequoia/u-boot-nand.lds | 2 +- board/amcc/sequoia/u-boot-ram.lds | 2 +- board/astro/mcf5373l/u-boot.lds | 2 +- board/cobra5272/u-boot.lds | 2 +- board/cogent/u-boot.lds | 2 +- board/cogent/u-boot.lds.debug | 2 +- board/cray/L1/u-boot.lds.debug | 2 +- board/dave/PPChameleonEVB/u-boot.lds | 2 +- board/dvlhost/u-boot.lds | 2 +- board/eltec/mhpc/u-boot.lds | 2 +- board/eltec/mhpc/u-boot.lds.debug | 2 +- board/emk/top860/u-boot.lds | 2 +- board/ep88x/u-boot.lds | 2 +- board/esd/dasa_sim/u-boot.lds | 2 +- board/esd/pmc440/u-boot-nand.lds | 2 +- board/esd/tasreg/u-boot.lds | 2 +- board/esteem192e/u-boot.lds | 2 +- board/evb64260/u-boot.lds | 2 +- board/fads/u-boot.lds | 2 +- board/flagadm/u-boot.lds | 2 +- board/flagadm/u-boot.lds.debug | 2 +- board/freescale/m5208evbe/u-boot.lds | 2 +- board/freescale/m52277evb/u-boot.lds | 2 +- board/freescale/m5235evb/u-boot.lds | 2 +- board/freescale/m5249evb/u-boot.lds | 2 +- board/freescale/m5253demo/u-boot.lds | 2 +- board/freescale/m5253evbe/u-boot.lds | 2 +- board/freescale/m5271evb/u-boot.lds | 2 +- board/freescale/m5272c3/u-boot.lds | 2 +- board/freescale/m5275evb/u-boot.lds | 2 +- board/freescale/m5282evb/u-boot.lds | 2 +- board/freescale/m53017evb/u-boot.lds | 2 +- board/freescale/m5329evb/u-boot.lds | 2 +- board/freescale/m5373evb/u-boot.lds | 2 +- board/freescale/m54418twr/u-boot.lds | 2 +- board/freescale/m54451evb/u-boot.lds | 2 +- board/freescale/m54455evb/u-boot.lds | 2 +- board/freescale/m547xevb/u-boot.lds | 2 +- board/freescale/m548xevb/u-boot.lds | 2 +- board/freescale/mx31ads/u-boot.lds | 2 +- board/gaisler/gr_cpci_ax2000/u-boot.lds | 2 +- board/gaisler/gr_ep2s60/u-boot.lds | 2 +- board/gaisler/gr_xc3s_1500/u-boot.lds | 2 +- board/gaisler/grsim/u-boot.lds | 2 +- board/gaisler/grsim_leon2/u-boot.lds | 2 +- board/gen860t/u-boot-flashenv.lds | 2 +- board/gen860t/u-boot.lds | 2 +- board/genietv/u-boot.lds | 2 +- board/genietv/u-boot.lds.debug | 2 +- board/hermes/u-boot.lds | 2 +- board/hermes/u-boot.lds.debug | 2 +- board/hymod/u-boot.lds | 2 +- board/hymod/u-boot.lds.debug | 2 +- board/icu862/u-boot.lds | 2 +- board/icu862/u-boot.lds.debug | 2 +- board/idmr/u-boot.lds | 2 +- board/ip860/u-boot.lds | 2 +- board/ip860/u-boot.lds.debug | 2 +- board/ivm/u-boot.lds | 2 +- board/ivm/u-boot.lds.debug | 2 +- board/korat/u-boot-F7FC.lds | 2 +- board/kup/kup4k/u-boot.lds | 2 +- board/kup/kup4k/u-boot.lds.debug | 2 +- board/kup/kup4x/u-boot.lds | 2 +- board/kup/kup4x/u-boot.lds.debug | 2 +- board/lwmon/u-boot.lds | 2 +- board/lwmon/u-boot.lds.debug | 2 +- board/manroland/uc100/u-boot.lds | 2 +- board/matrix_vision/mvsmr/u-boot.lds | 2 +- board/mbx8xx/u-boot.lds | 2 +- board/mbx8xx/u-boot.lds.debug | 2 +- board/mousse/u-boot.lds | 2 +- board/mpl/pip405/u-boot.lds.debug | 2 +- board/mvblue/u-boot.lds | 2 +- board/netphone/u-boot.lds | 2 +- board/netphone/u-boot.lds.debug | 2 +- board/netta/u-boot.lds | 2 +- board/netta/u-boot.lds.debug | 2 +- board/netta2/u-boot.lds | 2 +- board/netta2/u-boot.lds.debug | 2 +- board/netvia/u-boot.lds | 2 +- board/netvia/u-boot.lds.debug | 2 +- board/nx823/u-boot.lds | 2 +- board/nx823/u-boot.lds.debug | 2 +- board/openrisc/openrisc-generic/u-boot.lds | 2 +- board/quantum/u-boot.lds | 2 +- board/r360mpi/u-boot.lds | 2 +- board/rbc823/u-boot.lds | 2 +- board/renesas/sh7752evb/u-boot.lds | 2 +- board/renesas/sh7757lcr/u-boot.lds | 2 +- board/rsdproto/u-boot.lds | 2 +- board/samsung/smdk5250/smdk5250-uboot-spl.lds | 2 +- board/samsung/smdk6400/u-boot-nand.lds | 2 +- board/sandburst/karef/u-boot.lds.debug | 2 +- board/sandburst/metrobox/u-boot.lds.debug | 2 +- board/sandpoint/u-boot.lds | 2 +- board/sixnet/u-boot.lds | 2 +- board/snmc/qs850/u-boot.lds | 2 +- board/snmc/qs860t/u-boot.lds | 2 +- board/spc1920/u-boot.lds | 2 +- board/spd8xx/u-boot.lds | 2 +- board/spd8xx/u-boot.lds.debug | 2 +- board/stx/stxxtc/u-boot.lds | 2 +- board/stx/stxxtc/u-boot.lds.debug | 2 +- board/svm_sc8xx/u-boot.lds | 2 +- board/tqc/tqm8xx/u-boot.lds | 2 +- board/v37/u-boot.lds | 2 +- board/w7o/u-boot.lds.debug | 2 +- board/xes/xpedite1000/u-boot.lds.debug | 2 +- common/cmd_help.c | 2 +- config.mk | 2 - doc/README.commands | 18 +- helper.mk | 64 ------ include/command.h | 2 +- include/env_callback.h | 2 +- include/linker_lists.h | 252 ++++++++++++++++++----- nand_spl/board/freescale/mpc8536ds/Makefile | 7 +- nand_spl/board/freescale/mpc8569mds/Makefile | 7 +- nand_spl/board/freescale/mpc8572ds/Makefile | 7 +- nand_spl/board/freescale/mx31pdk/Makefile | 7 +- nand_spl/board/freescale/mx31pdk/u-boot.lds | 2 +- nand_spl/board/freescale/p1010rdb/Makefile | 7 +- nand_spl/board/freescale/p1023rds/Makefile | 7 +- nand_spl/board/freescale/p1_p2_rdb/Makefile | 7 +- nand_spl/board/karo/tx25/Makefile | 7 +- nand_spl/board/karo/tx25/u-boot.lds | 2 +- nand_spl/board/samsung/smdk6400/u-boot.lds | 2 +- spl/.gitignore | 1 - 177 files changed, 380 insertions(+), 351 deletions(-) delete mode 100644 helper.mk (limited to 'include') diff --git a/.gitignore b/.gitignore index e40eb7b6690..be09894a0b6 100644 --- a/.gitignore +++ b/.gitignore @@ -44,7 +44,6 @@ /u-boot.dtb /u-boot.sb /u-boot.geany -/include/u-boot.lst # # Generated files diff --git a/Makefile b/Makefile index 55bd55c8c09..6a4e364664f 100644 --- a/Makefile +++ b/Makefile @@ -556,10 +556,8 @@ GEN_UBOOT = \ $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map -o u-boot else GEN_UBOOT = \ - UNDEF_LST=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \ - sed -n -e 's/.*\($(SYM_PREFIX)_u_boot_list_.*\)/-u\1/p'|sort|uniq`;\ cd $(LNDIR) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) \ - $$UNDEF_LST $(__OBJS) \ + $(__OBJS) \ --start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \ -Map u-boot.map -o u-boot endif @@ -592,11 +590,7 @@ $(SUBDIR_EXAMPLES): $(obj)u-boot $(LDSCRIPT): depend $(MAKE) -C $(dir $@) $(notdir $@) -# The following line expands into whole rule which generates u-boot.lst, -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(obj)include/u-boot.lst, $(LIBBOARD) $(LIBS))) -$(obj)u-boot.lds: $(LDSCRIPT) $(obj)include/u-boot.lst +$(obj)u-boot.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$< >$@ nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend @@ -832,7 +826,6 @@ clean: $(obj)board/matrix_vision/*/bootscript.img \ $(obj)board/voiceblue/eeprom \ $(obj)u-boot.lds \ - $(obj)include/u-boot.lst \ $(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs] \ $(obj)arch/blackfin/cpu/init.{lds,elf} @rm -f $(obj)include/bmp_logo.h @@ -870,7 +863,7 @@ clobber: tidy @rm -f $(obj)nand_spl/{u-boot.{lds,lst},System.map} @rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map} @rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.map} - @rm -f $(obj)spl/{u-boot-spl.lds,u-boot.lst} + @rm -f $(obj)spl/u-boot-spl.lds @rm -f $(obj)MLO MLO.byteswap @rm -f $(obj)SPL @rm -f $(obj)tools/xway-swap-bytes diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds index 008ae891caf..c19285d2108 100644 --- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds +++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds @@ -51,7 +51,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds b/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds index 1c3deefa7da..69f6d48dab1 100644 --- a/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds +++ b/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds @@ -49,7 +49,7 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } >.sram . = ALIGN(4); diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds index bba91d5d246..5e66dd142ce 100644 --- a/arch/arm/cpu/ixp/u-boot.lds +++ b/arch/arm/cpu/ixp/u-boot.lds @@ -49,7 +49,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e1bc8e7a417..d4ad3529b25 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/arch/avr32/cpu/u-boot.lds b/arch/avr32/cpu/u-boot.lds index 0b16d2a883d..4a3fc2a1c65 100644 --- a/arch/avr32/cpu/u-boot.lds +++ b/arch/avr32/cpu/u-boot.lds @@ -50,7 +50,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/arch/blackfin/cpu/u-boot.lds b/arch/blackfin/cpu/u-boot.lds index 58db838fb02..77f48c1a127 100644 --- a/arch/blackfin/cpu/u-boot.lds +++ b/arch/blackfin/cpu/u-boot.lds @@ -114,7 +114,7 @@ SECTIONS .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } >ram_data .text_l1 : diff --git a/arch/microblaze/cpu/u-boot.lds b/arch/microblaze/cpu/u-boot.lds index fe3d97dad88..1ae4184fb04 100644 --- a/arch/microblaze/cpu/u-boot.lds +++ b/arch/microblaze/cpu/u-boot.lds @@ -54,7 +54,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } .bss ALIGN(0x4): diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds index 10513abd2c5..ca18d463e9b 100644 --- a/arch/mips/cpu/u-boot.lds +++ b/arch/mips/cpu/u-boot.lds @@ -64,7 +64,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/arch/nds32/cpu/n1213/u-boot.lds b/arch/nds32/cpu/n1213/u-boot.lds index cef19c51ee5..57909481a96 100644 --- a/arch/nds32/cpu/n1213/u-boot.lds +++ b/arch/nds32/cpu/n1213/u-boot.lds @@ -55,7 +55,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/arch/nios2/cpu/u-boot.lds b/arch/nios2/cpu/u-boot.lds index d0eb80de0e9..f937396233e 100644 --- a/arch/nios2/cpu/u-boot.lds +++ b/arch/nios2/cpu/u-boot.lds @@ -48,7 +48,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } /* INIT DATA sections - "Small" data (see the gcc -G option) diff --git a/arch/powerpc/cpu/74xx_7xx/u-boot.lds b/arch/powerpc/cpu/74xx_7xx/u-boot.lds index ecee439579e..c58d9797573 100644 --- a/arch/powerpc/cpu/74xx_7xx/u-boot.lds +++ b/arch/powerpc/cpu/74xx_7xx/u-boot.lds @@ -65,7 +65,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc512x/u-boot.lds b/arch/powerpc/cpu/mpc512x/u-boot.lds index 7faefba5558..a34501b6315 100644 --- a/arch/powerpc/cpu/mpc512x/u-boot.lds +++ b/arch/powerpc/cpu/mpc512x/u-boot.lds @@ -60,7 +60,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc5xx/u-boot.lds b/arch/powerpc/cpu/mpc5xx/u-boot.lds index c91e146d262..0d87c8cf1e5 100644 --- a/arch/powerpc/cpu/mpc5xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc5xx/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds b/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds index ac7844dcf46..cdb36c08846 100644 --- a/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds +++ b/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds @@ -68,7 +68,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/arch/powerpc/cpu/mpc5xxx/u-boot.lds b/arch/powerpc/cpu/mpc5xxx/u-boot.lds index 1f46eadb5d0..6bd646b93ee 100644 --- a/arch/powerpc/cpu/mpc5xxx/u-boot.lds +++ b/arch/powerpc/cpu/mpc5xxx/u-boot.lds @@ -63,7 +63,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc8220/u-boot.lds b/arch/powerpc/cpu/mpc8220/u-boot.lds index c1479544f95..6e9967cf879 100644 --- a/arch/powerpc/cpu/mpc8220/u-boot.lds +++ b/arch/powerpc/cpu/mpc8220/u-boot.lds @@ -62,7 +62,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc824x/u-boot.lds b/arch/powerpc/cpu/mpc824x/u-boot.lds index a7130125c7c..699fb85857b 100644 --- a/arch/powerpc/cpu/mpc824x/u-boot.lds +++ b/arch/powerpc/cpu/mpc824x/u-boot.lds @@ -63,7 +63,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc8260/u-boot.lds b/arch/powerpc/cpu/mpc8260/u-boot.lds index 42385fcc192..2709f376671 100644 --- a/arch/powerpc/cpu/mpc8260/u-boot.lds +++ b/arch/powerpc/cpu/mpc8260/u-boot.lds @@ -62,7 +62,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc83xx/u-boot.lds b/arch/powerpc/cpu/mpc83xx/u-boot.lds index d699def9ddf..905823cb9a3 100644 --- a/arch/powerpc/cpu/mpc83xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc83xx/u-boot.lds @@ -61,7 +61,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds index f7c4a22d29b..3bb757231b4 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds @@ -72,7 +72,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds index 46dbaed1e06..87522b83d00 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds @@ -54,7 +54,7 @@ SECTIONS _edata = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(8); diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 4a40a1f51be..8c6e66ec1b5 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -80,7 +80,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/arch/powerpc/cpu/mpc86xx/u-boot.lds b/arch/powerpc/cpu/mpc86xx/u-boot.lds index 8bfadf28dc2..81804e357c8 100644 --- a/arch/powerpc/cpu/mpc86xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc86xx/u-boot.lds @@ -67,7 +67,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds index a96ddd5577b..2cadcc94d5a 100644 --- a/arch/powerpc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -81,7 +81,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/arch/sandbox/cpu/u-boot.lds b/arch/sandbox/cpu/u-boot.lds index 1b781ebf6ac..94c26f1aad0 100644 --- a/arch/sandbox/cpu/u-boot.lds +++ b/arch/sandbox/cpu/u-boot.lds @@ -27,7 +27,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } __u_boot_sandbox_option_start = .; diff --git a/arch/sh/cpu/sh2/u-boot.lds b/arch/sh/cpu/sh2/u-boot.lds index 17f8091ea4e..9bf1d856219 100644 --- a/arch/sh/cpu/sh2/u-boot.lds +++ b/arch/sh/cpu/sh2/u-boot.lds @@ -74,7 +74,7 @@ SECTIONS .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } PROVIDE (reloc_dst_end = .); diff --git a/arch/sh/cpu/sh3/u-boot.lds b/arch/sh/cpu/sh3/u-boot.lds index c8319610c2f..29352ad821d 100644 --- a/arch/sh/cpu/sh3/u-boot.lds +++ b/arch/sh/cpu/sh3/u-boot.lds @@ -80,7 +80,7 @@ SECTIONS .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } PROVIDE (reloc_dst_end = .); diff --git a/arch/sh/cpu/sh4/u-boot.lds b/arch/sh/cpu/sh4/u-boot.lds index 0ecafcf5d94..cf3da0db147 100644 --- a/arch/sh/cpu/sh4/u-boot.lds +++ b/arch/sh/cpu/sh4/u-boot.lds @@ -77,7 +77,7 @@ SECTIONS .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } PROVIDE (reloc_dst_end = .); diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds index 54f2fb76f7b..ef5aa951c95 100644 --- a/arch/x86/cpu/u-boot.lds +++ b/arch/x86/cpu/u-boot.lds @@ -36,7 +36,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/board/BuS/eb_cpu5282/u-boot.lds b/board/BuS/eb_cpu5282/u-boot.lds index 0c92d31f616..43bd9b74ac9 100644 --- a/board/BuS/eb_cpu5282/u-boot.lds +++ b/board/BuS/eb_cpu5282/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds index 2bb876d689e..3ff38713f01 100644 --- a/board/LEOX/elpt860/u-boot.lds +++ b/board/LEOX/elpt860/u-boot.lds @@ -89,7 +89,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/RPXClassic/u-boot.lds b/board/RPXClassic/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/RPXClassic/u-boot.lds +++ b/board/RPXClassic/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/RPXClassic/u-boot.lds.debug b/board/RPXClassic/u-boot.lds.debug index dc8c4e958f1..e88bd977d9e 100644 --- a/board/RPXClassic/u-boot.lds.debug +++ b/board/RPXClassic/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/RPXlite/u-boot.lds b/board/RPXlite/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/RPXlite/u-boot.lds +++ b/board/RPXlite/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/RPXlite/u-boot.lds.debug b/board/RPXlite/u-boot.lds.debug index dc8c4e958f1..e88bd977d9e 100644 --- a/board/RPXlite/u-boot.lds.debug +++ b/board/RPXlite/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/RPXlite_dw/u-boot.lds b/board/RPXlite_dw/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/RPXlite_dw/u-boot.lds +++ b/board/RPXlite_dw/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/RPXlite_dw/u-boot.lds.debug b/board/RPXlite_dw/u-boot.lds.debug index b43a1e4281f..88c410cd928 100644 --- a/board/RPXlite_dw/u-boot.lds.debug +++ b/board/RPXlite_dw/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds index 748e5113ef6..f9d2ec2aa98 100644 --- a/board/RRvision/u-boot.lds +++ b/board/RRvision/u-boot.lds @@ -74,7 +74,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds index 572bcea5d01..7cf5b46b885 100644 --- a/board/actux1/u-boot.lds +++ b/board/actux1/u-boot.lds @@ -57,7 +57,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN (4); diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds index 6272a10d1cb..e9b5547b7af 100644 --- a/board/actux2/u-boot.lds +++ b/board/actux2/u-boot.lds @@ -57,7 +57,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN (4); diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds index 488e1e7e5b5..b79ea3ce2fd 100644 --- a/board/actux3/u-boot.lds +++ b/board/actux3/u-boot.lds @@ -57,7 +57,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN (4); diff --git a/board/adder/u-boot.lds b/board/adder/u-boot.lds index 73e2f3f9cfd..5e0ed002ec9 100644 --- a/board/adder/u-boot.lds +++ b/board/adder/u-boot.lds @@ -65,7 +65,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/altera/nios2-generic/u-boot.lds b/board/altera/nios2-generic/u-boot.lds index 289386b35c8..900fe65dc28 100644 --- a/board/altera/nios2-generic/u-boot.lds +++ b/board/altera/nios2-generic/u-boot.lds @@ -49,7 +49,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } /* INIT DATA sections - "Small" data (see the gcc -G option) diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds index beba978f838..3861b67a01a 100644 --- a/board/amcc/acadia/u-boot-nand.lds +++ b/board/amcc/acadia/u-boot-nand.lds @@ -74,7 +74,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds index 2dd00d7f420..6308d49c1dc 100644 --- a/board/amcc/bamboo/u-boot-nand.lds +++ b/board/amcc/bamboo/u-boot-nand.lds @@ -75,7 +75,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds index 8ac51162960..5fc906277b9 100644 --- a/board/amcc/canyonlands/u-boot-nand.lds +++ b/board/amcc/canyonlands/u-boot-nand.lds @@ -75,7 +75,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds index beba978f838..3861b67a01a 100644 --- a/board/amcc/kilauea/u-boot-nand.lds +++ b/board/amcc/kilauea/u-boot-nand.lds @@ -74,7 +74,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds index 18266efd094..b4600de6953 100644 --- a/board/amcc/sequoia/u-boot-nand.lds +++ b/board/amcc/sequoia/u-boot-nand.lds @@ -75,7 +75,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds index 6b02784926f..521d12a56f8 100644 --- a/board/amcc/sequoia/u-boot-ram.lds +++ b/board/amcc/sequoia/u-boot-ram.lds @@ -66,7 +66,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/astro/mcf5373l/u-boot.lds b/board/astro/mcf5373l/u-boot.lds index bc40fd649d6..5ee8fcc50bf 100644 --- a/board/astro/mcf5373l/u-boot.lds +++ b/board/astro/mcf5373l/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/cobra5272/u-boot.lds b/board/cobra5272/u-boot.lds index d054f20bce0..7421eeca67c 100644 --- a/board/cobra5272/u-boot.lds +++ b/board/cobra5272/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds index 2a6027f814d..357f59da7ed 100644 --- a/board/cogent/u-boot.lds +++ b/board/cogent/u-boot.lds @@ -73,7 +73,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/cogent/u-boot.lds.debug b/board/cogent/u-boot.lds.debug index dc8c4e958f1..e88bd977d9e 100644 --- a/board/cogent/u-boot.lds.debug +++ b/board/cogent/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/cray/L1/u-boot.lds.debug b/board/cray/L1/u-boot.lds.debug index d7a2e560084..99cbed4b471 100644 --- a/board/cray/L1/u-boot.lds.debug +++ b/board/cray/L1/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/dave/PPChameleonEVB/u-boot.lds b/board/dave/PPChameleonEVB/u-boot.lds index 8a306d6076f..987b52d25cc 100644 --- a/board/dave/PPChameleonEVB/u-boot.lds +++ b/board/dave/PPChameleonEVB/u-boot.lds @@ -77,7 +77,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/dvlhost/u-boot.lds b/board/dvlhost/u-boot.lds index 6dc26c87275..eb83b6f2ce3 100644 --- a/board/dvlhost/u-boot.lds +++ b/board/dvlhost/u-boot.lds @@ -57,7 +57,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN (4); diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds index c8d38942c96..bd74d746a36 100644 --- a/board/eltec/mhpc/u-boot.lds +++ b/board/eltec/mhpc/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/eltec/mhpc/u-boot.lds.debug b/board/eltec/mhpc/u-boot.lds.debug index 92796e67444..614bbb20b63 100644 --- a/board/eltec/mhpc/u-boot.lds.debug +++ b/board/eltec/mhpc/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds index 22626d392ae..ea04eca3aac 100644 --- a/board/emk/top860/u-boot.lds +++ b/board/emk/top860/u-boot.lds @@ -70,7 +70,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/ep88x/u-boot.lds b/board/ep88x/u-boot.lds index 1dcc22a1918..e5fa63edd66 100644 --- a/board/ep88x/u-boot.lds +++ b/board/ep88x/u-boot.lds @@ -65,7 +65,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds index 7eca18390b1..cca527f26a8 100644 --- a/board/esd/dasa_sim/u-boot.lds +++ b/board/esd/dasa_sim/u-boot.lds @@ -76,7 +76,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/esd/pmc440/u-boot-nand.lds b/board/esd/pmc440/u-boot-nand.lds index ca7df4592ea..4469b80dc95 100644 --- a/board/esd/pmc440/u-boot-nand.lds +++ b/board/esd/pmc440/u-boot-nand.lds @@ -104,7 +104,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/esd/tasreg/u-boot.lds b/board/esd/tasreg/u-boot.lds index 0d6a0f3a3b2..7642bba7eef 100644 --- a/board/esd/tasreg/u-boot.lds +++ b/board/esd/tasreg/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds index fe5cf095fcb..357a794e696 100644 --- a/board/esteem192e/u-boot.lds +++ b/board/esteem192e/u-boot.lds @@ -77,7 +77,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds index eac9c070e3a..e2cfcfefec0 100644 --- a/board/evb64260/u-boot.lds +++ b/board/evb64260/u-boot.lds @@ -73,7 +73,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/fads/u-boot.lds b/board/fads/u-boot.lds index 6022dbce722..450103d377b 100644 --- a/board/fads/u-boot.lds +++ b/board/fads/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds index c8d38942c96..bd74d746a36 100644 --- a/board/flagadm/u-boot.lds +++ b/board/flagadm/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/flagadm/u-boot.lds.debug b/board/flagadm/u-boot.lds.debug index 92796e67444..614bbb20b63 100644 --- a/board/flagadm/u-boot.lds.debug +++ b/board/flagadm/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/freescale/m5208evbe/u-boot.lds b/board/freescale/m5208evbe/u-boot.lds index 2c151f20f57..f3c9ed8c613 100644 --- a/board/freescale/m5208evbe/u-boot.lds +++ b/board/freescale/m5208evbe/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m52277evb/u-boot.lds b/board/freescale/m52277evb/u-boot.lds index dbd6f6ab201..ae0a48dfbba 100644 --- a/board/freescale/m52277evb/u-boot.lds +++ b/board/freescale/m52277evb/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5235evb/u-boot.lds b/board/freescale/m5235evb/u-boot.lds index 00932ae68de..603858bc0ca 100644 --- a/board/freescale/m5235evb/u-boot.lds +++ b/board/freescale/m5235evb/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5249evb/u-boot.lds b/board/freescale/m5249evb/u-boot.lds index d054f20bce0..7421eeca67c 100644 --- a/board/freescale/m5249evb/u-boot.lds +++ b/board/freescale/m5249evb/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5253demo/u-boot.lds b/board/freescale/m5253demo/u-boot.lds index f8116f601ee..6838247a8b3 100644 --- a/board/freescale/m5253demo/u-boot.lds +++ b/board/freescale/m5253demo/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5253evbe/u-boot.lds b/board/freescale/m5253evbe/u-boot.lds index d054f20bce0..7421eeca67c 100644 --- a/board/freescale/m5253evbe/u-boot.lds +++ b/board/freescale/m5253evbe/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5271evb/u-boot.lds b/board/freescale/m5271evb/u-boot.lds index 133ec01036b..e222e80f82b 100644 --- a/board/freescale/m5271evb/u-boot.lds +++ b/board/freescale/m5271evb/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5272c3/u-boot.lds b/board/freescale/m5272c3/u-boot.lds index d054f20bce0..7421eeca67c 100644 --- a/board/freescale/m5272c3/u-boot.lds +++ b/board/freescale/m5272c3/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5275evb/u-boot.lds b/board/freescale/m5275evb/u-boot.lds index fc68de1ba15..c18758a9114 100644 --- a/board/freescale/m5275evb/u-boot.lds +++ b/board/freescale/m5275evb/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5282evb/u-boot.lds b/board/freescale/m5282evb/u-boot.lds index ad49874c5ab..20f6c47bed9 100644 --- a/board/freescale/m5282evb/u-boot.lds +++ b/board/freescale/m5282evb/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m53017evb/u-boot.lds b/board/freescale/m53017evb/u-boot.lds index d25a36f6518..15dfa7dd7cf 100644 --- a/board/freescale/m53017evb/u-boot.lds +++ b/board/freescale/m53017evb/u-boot.lds @@ -74,7 +74,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5329evb/u-boot.lds b/board/freescale/m5329evb/u-boot.lds index 6616594e7b0..5013ff4a696 100644 --- a/board/freescale/m5329evb/u-boot.lds +++ b/board/freescale/m5329evb/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m5373evb/u-boot.lds b/board/freescale/m5373evb/u-boot.lds index bc40fd649d6..5ee8fcc50bf 100644 --- a/board/freescale/m5373evb/u-boot.lds +++ b/board/freescale/m5373evb/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m54418twr/u-boot.lds b/board/freescale/m54418twr/u-boot.lds index 36a4c264b92..2df386bcb06 100644 --- a/board/freescale/m54418twr/u-boot.lds +++ b/board/freescale/m54418twr/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m54451evb/u-boot.lds b/board/freescale/m54451evb/u-boot.lds index 91328a4af66..4440d611b75 100644 --- a/board/freescale/m54451evb/u-boot.lds +++ b/board/freescale/m54451evb/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m54455evb/u-boot.lds b/board/freescale/m54455evb/u-boot.lds index 36a4c264b92..2df386bcb06 100644 --- a/board/freescale/m54455evb/u-boot.lds +++ b/board/freescale/m54455evb/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m547xevb/u-boot.lds b/board/freescale/m547xevb/u-boot.lds index de4d0eb9077..269bf8a9e56 100644 --- a/board/freescale/m547xevb/u-boot.lds +++ b/board/freescale/m547xevb/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/m548xevb/u-boot.lds b/board/freescale/m548xevb/u-boot.lds index fbbe0c5dc5a..68bdad4a46c 100644 --- a/board/freescale/m548xevb/u-boot.lds +++ b/board/freescale/m548xevb/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds index 12d7c1256f4..2d08fea5224 100644 --- a/board/freescale/mx31ads/u-boot.lds +++ b/board/freescale/mx31ads/u-boot.lds @@ -60,7 +60,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = ALIGN(4); diff --git a/board/gaisler/gr_cpci_ax2000/u-boot.lds b/board/gaisler/gr_cpci_ax2000/u-boot.lds index 774c494f035..dac87db6207 100644 --- a/board/gaisler/gr_cpci_ax2000/u-boot.lds +++ b/board/gaisler/gr_cpci_ax2000/u-boot.lds @@ -88,7 +88,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } .data : diff --git a/board/gaisler/gr_ep2s60/u-boot.lds b/board/gaisler/gr_ep2s60/u-boot.lds index f6d13014f31..78e0e2df6c4 100644 --- a/board/gaisler/gr_ep2s60/u-boot.lds +++ b/board/gaisler/gr_ep2s60/u-boot.lds @@ -88,7 +88,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } .data : diff --git a/board/gaisler/gr_xc3s_1500/u-boot.lds b/board/gaisler/gr_xc3s_1500/u-boot.lds index 7df6e833926..87ea473b0a9 100644 --- a/board/gaisler/gr_xc3s_1500/u-boot.lds +++ b/board/gaisler/gr_xc3s_1500/u-boot.lds @@ -88,7 +88,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } .data : diff --git a/board/gaisler/grsim/u-boot.lds b/board/gaisler/grsim/u-boot.lds index b241cbc1d04..e854a169a86 100644 --- a/board/gaisler/grsim/u-boot.lds +++ b/board/gaisler/grsim/u-boot.lds @@ -87,7 +87,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } .data : diff --git a/board/gaisler/grsim_leon2/u-boot.lds b/board/gaisler/grsim_leon2/u-boot.lds index 63c15b9117a..f247e56b0a2 100644 --- a/board/gaisler/grsim_leon2/u-boot.lds +++ b/board/gaisler/grsim_leon2/u-boot.lds @@ -87,7 +87,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } .data : diff --git a/board/gen860t/u-boot-flashenv.lds b/board/gen860t/u-boot-flashenv.lds index 1cbe7e32bad..b06144196f4 100644 --- a/board/gen860t/u-boot-flashenv.lds +++ b/board/gen860t/u-boot-flashenv.lds @@ -73,7 +73,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/gen860t/u-boot.lds b/board/gen860t/u-boot.lds index dd89c70f56f..9e9449d1a13 100644 --- a/board/gen860t/u-boot.lds +++ b/board/gen860t/u-boot.lds @@ -74,7 +74,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds index 124b1835164..958dd8482e2 100644 --- a/board/genietv/u-boot.lds +++ b/board/genietv/u-boot.lds @@ -83,7 +83,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/genietv/u-boot.lds.debug b/board/genietv/u-boot.lds.debug index e1cf2496506..a3aeb604cc3 100644 --- a/board/genietv/u-boot.lds.debug +++ b/board/genietv/u-boot.lds.debug @@ -110,7 +110,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds index f02eb1c2aa1..b2bb50d596e 100644 --- a/board/hermes/u-boot.lds +++ b/board/hermes/u-boot.lds @@ -75,7 +75,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/hermes/u-boot.lds.debug b/board/hermes/u-boot.lds.debug index e84cc7991e7..4383c492c3b 100644 --- a/board/hermes/u-boot.lds.debug +++ b/board/hermes/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds index 7afae0a6257..3133c55a086 100644 --- a/board/hymod/u-boot.lds +++ b/board/hymod/u-boot.lds @@ -113,7 +113,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/hymod/u-boot.lds.debug b/board/hymod/u-boot.lds.debug index dc8c4e958f1..e88bd977d9e 100644 --- a/board/hymod/u-boot.lds.debug +++ b/board/hymod/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/icu862/u-boot.lds b/board/icu862/u-boot.lds index 6778eb13add..40f4a38f55c 100644 --- a/board/icu862/u-boot.lds +++ b/board/icu862/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/icu862/u-boot.lds.debug b/board/icu862/u-boot.lds.debug index 3e075a85bd1..99952885173 100644 --- a/board/icu862/u-boot.lds.debug +++ b/board/icu862/u-boot.lds.debug @@ -110,7 +110,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/idmr/u-boot.lds b/board/idmr/u-boot.lds index 0d6a0f3a3b2..6d138313e28 100644 --- a/board/idmr/u-boot.lds +++ b/board/idmr/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/ip860/u-boot.lds +++ b/board/ip860/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/ip860/u-boot.lds.debug b/board/ip860/u-boot.lds.debug index e47aff0fa79..0b341775316 100644 --- a/board/ip860/u-boot.lds.debug +++ b/board/ip860/u-boot.lds.debug @@ -110,7 +110,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds index 4cca6527481..dcd53ec9af0 100644 --- a/board/ivm/u-boot.lds +++ b/board/ivm/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/ivm/u-boot.lds.debug b/board/ivm/u-boot.lds.debug index 53a19b29473..bae9fb28ee1 100644 --- a/board/ivm/u-boot.lds.debug +++ b/board/ivm/u-boot.lds.debug @@ -110,7 +110,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/korat/u-boot-F7FC.lds b/board/korat/u-boot-F7FC.lds index 033cff42d9b..b6fa79f0a21 100644 --- a/board/korat/u-boot-F7FC.lds +++ b/board/korat/u-boot-F7FC.lds @@ -110,7 +110,7 @@ SECTIONS . = .; .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/kup/kup4k/u-boot.lds b/board/kup/kup4k/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/kup/kup4k/u-boot.lds +++ b/board/kup/kup4k/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/kup/kup4k/u-boot.lds.debug b/board/kup/kup4k/u-boot.lds.debug index b43a1e4281f..88c410cd928 100644 --- a/board/kup/kup4k/u-boot.lds.debug +++ b/board/kup/kup4k/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/kup/kup4x/u-boot.lds b/board/kup/kup4x/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/kup/kup4x/u-boot.lds +++ b/board/kup/kup4x/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/kup/kup4x/u-boot.lds.debug b/board/kup/kup4x/u-boot.lds.debug index b43a1e4281f..88c410cd928 100644 --- a/board/kup/kup4x/u-boot.lds.debug +++ b/board/kup/kup4x/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds index bc71b0d2c1f..30523dca469 100644 --- a/board/lwmon/u-boot.lds +++ b/board/lwmon/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/lwmon/u-boot.lds.debug b/board/lwmon/u-boot.lds.debug index 0a3e6466a9c..1d1b76ad7c0 100644 --- a/board/lwmon/u-boot.lds.debug +++ b/board/lwmon/u-boot.lds.debug @@ -110,7 +110,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/manroland/uc100/u-boot.lds b/board/manroland/uc100/u-boot.lds index e32ae37ea49..8c75dea0fd0 100644 --- a/board/manroland/uc100/u-boot.lds +++ b/board/manroland/uc100/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/matrix_vision/mvsmr/u-boot.lds b/board/matrix_vision/mvsmr/u-boot.lds index 5a3a9eabbfd..57077701cab 100644 --- a/board/matrix_vision/mvsmr/u-boot.lds +++ b/board/matrix_vision/mvsmr/u-boot.lds @@ -77,7 +77,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/mbx8xx/u-boot.lds +++ b/board/mbx8xx/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/mbx8xx/u-boot.lds.debug b/board/mbx8xx/u-boot.lds.debug index 4155b604fb8..063f2cc92fa 100644 --- a/board/mbx8xx/u-boot.lds.debug +++ b/board/mbx8xx/u-boot.lds.debug @@ -110,7 +110,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds index 43f91f1a3cc..080829b4360 100644 --- a/board/mousse/u-boot.lds +++ b/board/mousse/u-boot.lds @@ -63,7 +63,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/mpl/pip405/u-boot.lds.debug b/board/mpl/pip405/u-boot.lds.debug index d7a2e560084..99cbed4b471 100644 --- a/board/mpl/pip405/u-boot.lds.debug +++ b/board/mpl/pip405/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/mvblue/u-boot.lds b/board/mvblue/u-boot.lds index c378564f6da..e186ee6657f 100644 --- a/board/mvblue/u-boot.lds +++ b/board/mvblue/u-boot.lds @@ -73,7 +73,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netphone/u-boot.lds b/board/netphone/u-boot.lds index cdc1fdac2c4..ddb5a72b2ba 100644 --- a/board/netphone/u-boot.lds +++ b/board/netphone/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netphone/u-boot.lds.debug b/board/netphone/u-boot.lds.debug index 900da648595..e1fe052c374 100644 --- a/board/netphone/u-boot.lds.debug +++ b/board/netphone/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netta/u-boot.lds b/board/netta/u-boot.lds index cdc1fdac2c4..ddb5a72b2ba 100644 --- a/board/netta/u-boot.lds +++ b/board/netta/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netta/u-boot.lds.debug b/board/netta/u-boot.lds.debug index 900da648595..e1fe052c374 100644 --- a/board/netta/u-boot.lds.debug +++ b/board/netta/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netta2/u-boot.lds b/board/netta2/u-boot.lds index cdc1fdac2c4..ddb5a72b2ba 100644 --- a/board/netta2/u-boot.lds +++ b/board/netta2/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netta2/u-boot.lds.debug b/board/netta2/u-boot.lds.debug index 900da648595..e1fe052c374 100644 --- a/board/netta2/u-boot.lds.debug +++ b/board/netta2/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds index cdc1fdac2c4..ddb5a72b2ba 100644 --- a/board/netvia/u-boot.lds +++ b/board/netvia/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/netvia/u-boot.lds.debug b/board/netvia/u-boot.lds.debug index 6cbf4dc66e3..3243fc0f36c 100644 --- a/board/netvia/u-boot.lds.debug +++ b/board/netvia/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds index c8d38942c96..bd74d746a36 100644 --- a/board/nx823/u-boot.lds +++ b/board/nx823/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/nx823/u-boot.lds.debug b/board/nx823/u-boot.lds.debug index 92796e67444..614bbb20b63 100644 --- a/board/nx823/u-boot.lds.debug +++ b/board/nx823/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/openrisc/openrisc-generic/u-boot.lds b/board/openrisc/openrisc-generic/u-boot.lds index 4cffacbd46a..9024f30b30f 100644 --- a/board/openrisc/openrisc-generic/u-boot.lds +++ b/board/openrisc/openrisc-generic/u-boot.lds @@ -29,7 +29,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } .rodata : { diff --git a/board/quantum/u-boot.lds b/board/quantum/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/quantum/u-boot.lds +++ b/board/quantum/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/r360mpi/u-boot.lds b/board/r360mpi/u-boot.lds index 3ef0d9e0b7a..9262aa55fb0 100644 --- a/board/r360mpi/u-boot.lds +++ b/board/r360mpi/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/rbc823/u-boot.lds b/board/rbc823/u-boot.lds index a86b568f6eb..c6560c60da4 100644 --- a/board/rbc823/u-boot.lds +++ b/board/rbc823/u-boot.lds @@ -80,7 +80,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = .; diff --git a/board/renesas/sh7752evb/u-boot.lds b/board/renesas/sh7752evb/u-boot.lds index 28449b677ae..5bbb63f853c 100644 --- a/board/renesas/sh7752evb/u-boot.lds +++ b/board/renesas/sh7752evb/u-boot.lds @@ -78,7 +78,7 @@ SECTIONS PROVIDE (_egot = .); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } PROVIDE (reloc_dst_end = .); diff --git a/board/renesas/sh7757lcr/u-boot.lds b/board/renesas/sh7757lcr/u-boot.lds index cf406ce966f..0717d041ca8 100644 --- a/board/renesas/sh7757lcr/u-boot.lds +++ b/board/renesas/sh7757lcr/u-boot.lds @@ -79,7 +79,7 @@ SECTIONS .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } PROVIDE (reloc_dst_end = .); diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds index ff950294f3f..46625462b45 100644 --- a/board/rsdproto/u-boot.lds +++ b/board/rsdproto/u-boot.lds @@ -100,7 +100,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/samsung/smdk5250/smdk5250-uboot-spl.lds b/board/samsung/smdk5250/smdk5250-uboot-spl.lds index 951d8cec1d8..4ef6a519766 100644 --- a/board/samsung/smdk5250/smdk5250-uboot-spl.lds +++ b/board/samsung/smdk5250/smdk5250-uboot-spl.lds @@ -49,7 +49,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } >.sram . = ALIGN(4); diff --git a/board/samsung/smdk6400/u-boot-nand.lds b/board/samsung/smdk6400/u-boot-nand.lds index fbb442a02ba..ae32b1625e2 100644 --- a/board/samsung/smdk6400/u-boot-nand.lds +++ b/board/samsung/smdk6400/u-boot-nand.lds @@ -50,7 +50,7 @@ SECTIONS . = align(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } . = align(4); diff --git a/board/sandburst/karef/u-boot.lds.debug b/board/sandburst/karef/u-boot.lds.debug index 7a0757f1462..6b99f135ada 100644 --- a/board/sandburst/karef/u-boot.lds.debug +++ b/board/sandburst/karef/u-boot.lds.debug @@ -118,7 +118,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/sandburst/metrobox/u-boot.lds.debug b/board/sandburst/metrobox/u-boot.lds.debug index 07bd6fe19fb..0b4192e8675 100644 --- a/board/sandburst/metrobox/u-boot.lds.debug +++ b/board/sandburst/metrobox/u-boot.lds.debug @@ -118,7 +118,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/sandpoint/u-boot.lds b/board/sandpoint/u-boot.lds index ae3afa11306..ca13619659d 100644 --- a/board/sandpoint/u-boot.lds +++ b/board/sandpoint/u-boot.lds @@ -71,7 +71,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/sixnet/u-boot.lds b/board/sixnet/u-boot.lds index 6cf7a017386..fa4de9d9c5c 100644 --- a/board/sixnet/u-boot.lds +++ b/board/sixnet/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/snmc/qs850/u-boot.lds b/board/snmc/qs850/u-boot.lds index f57f8a0258d..5929335bf52 100644 --- a/board/snmc/qs850/u-boot.lds +++ b/board/snmc/qs850/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/snmc/qs860t/u-boot.lds b/board/snmc/qs860t/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/snmc/qs860t/u-boot.lds +++ b/board/snmc/qs860t/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/spc1920/u-boot.lds b/board/spc1920/u-boot.lds index 18f962cfa58..c2ec827dc78 100644 --- a/board/spc1920/u-boot.lds +++ b/board/spc1920/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/spd8xx/u-boot.lds b/board/spd8xx/u-boot.lds index f69e39d583d..b2ad3434fdc 100644 --- a/board/spd8xx/u-boot.lds +++ b/board/spd8xx/u-boot.lds @@ -78,7 +78,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/spd8xx/u-boot.lds.debug b/board/spd8xx/u-boot.lds.debug index 4155b604fb8..063f2cc92fa 100644 --- a/board/spd8xx/u-boot.lds.debug +++ b/board/spd8xx/u-boot.lds.debug @@ -110,7 +110,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/stx/stxxtc/u-boot.lds b/board/stx/stxxtc/u-boot.lds index cdc1fdac2c4..ddb5a72b2ba 100644 --- a/board/stx/stxxtc/u-boot.lds +++ b/board/stx/stxxtc/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/stx/stxxtc/u-boot.lds.debug b/board/stx/stxxtc/u-boot.lds.debug index 900da648595..e1fe052c374 100644 --- a/board/stx/stxxtc/u-boot.lds.debug +++ b/board/stx/stxxtc/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/svm_sc8xx/u-boot.lds b/board/svm_sc8xx/u-boot.lds index 163587512ba..ebfa890211b 100644 --- a/board/svm_sc8xx/u-boot.lds +++ b/board/svm_sc8xx/u-boot.lds @@ -86,7 +86,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/tqc/tqm8xx/u-boot.lds b/board/tqc/tqm8xx/u-boot.lds index e1e1ccd4827..bab452cc69f 100644 --- a/board/tqc/tqm8xx/u-boot.lds +++ b/board/tqc/tqm8xx/u-boot.lds @@ -82,7 +82,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds index fd2d72e8ae0..9504fcd9f4b 100644 --- a/board/v37/u-boot.lds +++ b/board/v37/u-boot.lds @@ -69,7 +69,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/w7o/u-boot.lds.debug b/board/w7o/u-boot.lds.debug index 2ce5a9a71c9..18b77520542 100644 --- a/board/w7o/u-boot.lds.debug +++ b/board/w7o/u-boot.lds.debug @@ -109,7 +109,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/board/xes/xpedite1000/u-boot.lds.debug b/board/xes/xpedite1000/u-boot.lds.debug index c4e5706543b..c02581d9820 100644 --- a/board/xes/xpedite1000/u-boot.lds.debug +++ b/board/xes/xpedite1000/u-boot.lds.debug @@ -114,7 +114,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + KEEP(*(SORT(.u_boot_list*))); } diff --git a/common/cmd_help.c b/common/cmd_help.c index f832a96971e..d9bdc4d17b4 100644 --- a/common/cmd_help.c +++ b/common/cmd_help.c @@ -41,7 +41,7 @@ U_BOOT_CMD( ); /* This does not use the U_BOOT_CMD macro as ? can't be used in symbol names */ -ll_entry_declare(cmd_tbl_t, question_mark, cmd, cmd) = { +ll_entry_declare(cmd_tbl_t, question_mark, cmd) = { "?", CONFIG_SYS_MAXARGS, 1, do_help, "alias for 'help'", #ifdef CONFIG_SYS_LONGHELP diff --git a/config.mk b/config.mk index b7cd4814fe7..bb5c69a15d9 100644 --- a/config.mk +++ b/config.mk @@ -23,8 +23,6 @@ ######################################################################### -include $(TOPDIR)/helper.mk - ifeq ($(CURDIR),$(SRCTREE)) dir := else diff --git a/doc/README.commands b/doc/README.commands index 923418b1a45..9eb367104fd 100644 --- a/doc/README.commands +++ b/doc/README.commands @@ -15,24 +15,22 @@ help: Long description. This is a string **** Behind the scene ****** -The structure created is named with a special prefix (__u_boot_list_cmd_) -and placed by the linker in a special section. +The structure created is named with a special prefix and placed by +the linker in a special section using the linker lists mechanism +(see include/linker_lists.h) This makes it possible for the final link to extract all commands compiled into any object code and construct a static array so the -command can be found in an array starting at _u_boot_list_cmd__start. +command array can be iterated over using the linker lists macros. -To ensure that the linker does not discard these symbols when linking -full U-Boot we generate a list of all the commands we have built (based -on the sections mentioned above) and use that to force the linker to -first enter the symbol as undefined in the output object so that there -is then a need for the symbol to be kept (this is the UNDEF_SYM logic in -the Makefile). +The linker lists feature ensures that the linker does not discard +these symbols when linking full U-Boot even though they are not +referenced in the source code as such. If a new board is defined do not forget to define the command section by writing in u-boot.lds ($(TOPDIR)/board/boardname/u-boot.lds) these 3 lines: .u_boot_list : { - #include "u-boot.lst"; + KEEP(*(SORT(.u_boot_list*))); } diff --git a/helper.mk b/helper.mk deleted file mode 100644 index 79a1da01e3a..00000000000 --- a/helper.mk +++ /dev/null @@ -1,64 +0,0 @@ -# -# Copyright (C) 2012 Marek Vasut -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -######################################################################### - -## -# make_u_boot_list - Generate contents of u_boot_list section -# 1: The name of the resulting file (usually u-boot.lst) -# 2: Files to analyze for possible u_boot_list entries -# -# This function generates the contents of the u_boot_list section, -# including all the border symbols for it's subsections. The operation -# of this function is as follows, numbering goes per lines: -# -# 1) Dump the ELF header sections from all files supplied via $(2) -# 2) Filter out all other stuff that does not belong into .u_boot_list -# section. -# 3) Fix up the lines so that the resulting output is is in format -# ".u_boot_list.*". -# 4) Remove the last .something$, since that only contains the name -# of the variable to be put into a subsection. This name is irelevant -# for generation of border symbols, thus of no interest, remove it. -# 5) Take each line and for every dot "." in that line, print the whole -# line until that dot "." . This is important so that we have all -# parent border symbols generated as well. -# 6) Load every line and firstly append "\a" at the end and print the -# line. Next, append "@" at the end and print the line. Finally, -# append "~" at the end of line. This will make sense in conjunction -# with 6) and 7). -# 7) Sort the lines. It is imperative to use LC_COLLATE=C here because -# with this, the "\a" symbol is first and "~" symbol is last. Any -# other symbols fall inbetween. Symbols like "@", which marks the -# end of current line (representing current section) and ".", which -# means the line continues and thus represents subsection. -# 8) With such ordering, all lines ending with "\a" will float at the -# begining of all lines with the same prefix. Thus it is easy to -# replace "\a" with __start and make it the __start border symbol. -# Very similarly for "~", which will be always at the bottom and so -# can be replaced by "__end" and made into the __end border symbol. -# Finally, every line ending with "@" symbol will be transformed -# into " *(SORT(${line}*)); " format, which in the linker parlance -# will allow it to trap all symbols relevant to the subsection. -# -define make_u_boot_list -$(1): $(2) - $(OBJDUMP) -h $(2) | \ - sed -n -e '/.*\.u_boot_list[^ ]\+/ ! {d;n}' \ - -e 's/.*\(\.u_boot_list[^ ]\+\).*$$$$/\1/' \ - -e 's/\.[^\.]\+$$$$//' \ - -e ':s /^.\+$$$$/ { p;s/^\(.*\)\.[^\.]*$$$$/\1/;b s }' | \ - sed -n -e 'h;s/$$$$/\a/p;g;s/$$$$/@/p;g;s/$$$$/~/p;' | \ - LC_COLLATE=C sort -u | \ - sed -n -e '/\a$$$$/ { s/\./_/g;s/\a$$$$/__start = .;/p; }'\ - -e '/~$$$$/ { s/\./_/g;s/~$$$$/__end = .;/p; }'\ - -e '/@$$$$/ { s/\(.*\)@$$$$/*(SORT(\1.*));/p }' > $(1) -endef diff --git a/include/command.h b/include/command.h index 3785eb987f4..65692fd2a69 100644 --- a/include/command.h +++ b/include/command.h @@ -175,7 +175,7 @@ int cmd_process(int flag, int argc, char * const argv[], _usage, _help, NULL) #define U_BOOT_CMD_COMPLETE(_name, _maxargs, _rep, _cmd, _usage, _help, _comp) \ - ll_entry_declare(cmd_tbl_t, _name, cmd, cmd) = \ + ll_entry_declare(cmd_tbl_t, _name, cmd) = \ U_BOOT_CMD_MKENT_COMPLETE(_name, _maxargs, _rep, _cmd, \ _usage, _help, _comp); diff --git a/include/env_callback.h b/include/env_callback.h index 62428d1e0c2..e89b6dadc94 100644 --- a/include/env_callback.h +++ b/include/env_callback.h @@ -83,7 +83,7 @@ void env_callback_init(ENTRY *var_entry); } #else #define U_BOOT_ENV_CALLBACK(name, callback) \ - ll_entry_declare(struct env_clbk_tbl, name, env_clbk, env_clbk) = \ + ll_entry_declare(struct env_clbk_tbl, name, env_clbk) = \ {#name, callback} #endif diff --git a/include/linker_lists.h b/include/linker_lists.h index 0b405d78ea3..6c28bf961b0 100644 --- a/include/linker_lists.h +++ b/include/linker_lists.h @@ -13,6 +13,96 @@ * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. */ + +/* + * There is no use in including this from ASM files, but that happens + * anyway, e.g. PPC kgdb.S includes command.h which incluse us. + * So just don't define anything when included from ASM. + */ + +#if !defined(__ASSEMBLY__) + +/** + * A linker list is constructed by grouping together linker input + * sections, each containning one entry of the list. Each input section + * contains a constant initialized variable which holds the entry's + * content. Linker list input sections are constructed from the list + * and entry names, plus a prefix which allows grouping all lists + * together. Assuming _list and _entry are the list and entry names, + * then the corresponding input section name is + * + * _u_boot_list + _2_ + @_list + _2_ + @_entry + * + * and the C variable name is + * + * .u_boot_list_ + 2_ + @_list + _2_ + @_entry + * + * This ensures uniqueness for both input section and C variable name. + * + * Note that the names differ only in the first character, "." for the + * setion and "_" for the variable, so that the linker cannot confuse + * section and symbol names. From now on, both names will be referred + * to as + * + * %u_boot_list_ + 2_ + @_list + _2_ + @_entry + * + * Entry variables need never be referred to directly. + * + * The naming scheme for input sections allows grouping all linker lists + * into a single linker output section and grouping all entries for a + * single list. + * + * Note the two '_2_' constant components in the names: their presence + * allows putting a start and end symbols around a list, by mapping + * these symbols to sections names with components "1" (before) and + * "3" (after) instead of "2" (within). + * Start and end symbols for a list can generally be defined as + * + * %u_boot_list_2_ + @_list + _1_... + * %u_boot_list_2_ + @_list + _3_... + * + * Start and end symbols for the whole of the linker lists area can be + * defined as + * + * %u_boot_list_1_... + * %u_boot_list_3_... + * + * Here is an example of the sorted sections which result from a list + * "array" made up of three entries : "first", "second" and "third", + * iterated at least once. + * + * .u_boot_list_2_array_1 + * .u_boot_list_2_array_2_first + * .u_boot_list_2_array_2_second + * .u_boot_list_2_array_2_third + * .u_boot_list_2_array_3 + * + * If lists must be divided into sublists (e.g. for iterating only on + * part of a list), one can simply give the list a name of the form + * 'outer_2_inner', where 'outer' is the global list name and 'inner' + * is the sub-list name. Iterators for the whole list should use the + * global list name ("outer"); iterators for only a sub-list should use + * the full sub-list name ("outer_2_inner"). + * + * Here is an example of the sections generated from a global list + * named "drivers", two sub-lists named "i2c" and "pci", and iterators + * defined for the whole list and each sub-list: + * + * %u_boot_list_2_drivers_1 + * %u_boot_list_2_drivers_2_i2c_1 + * %u_boot_list_2_drivers_2_i2c_2_first + * %u_boot_list_2_drivers_2_i2c_2_first + * %u_boot_list_2_drivers_2_i2c_2_second + * %u_boot_list_2_drivers_2_i2c_2_third + * %u_boot_list_2_drivers_2_i2c_3 + * %u_boot_list_2_drivers_2_pci_1 + * %u_boot_list_2_drivers_2_pci_2_first + * %u_boot_list_2_drivers_2_pci_2_second + * %u_boot_list_2_drivers_2_pci_2_third + * %u_boot_list_2_drivers_2_pci_3 + * %u_boot_list_2_drivers_3 + */ + #ifndef __LINKER_LISTS_H__ #define __LINKER_LISTS_H__ @@ -20,43 +110,28 @@ * ll_entry_declare() - Declare linker-generated array entry * @_type: Data type of the entry * @_name: Name of the entry - * @_section_u: Subsection of u_boot_list in which this entry is placed - * (with underscores instead of dots, for name concatenation) - * @_section_d: Subsection of u_boot_list in which this entry is placed - * (with dots, for section concatenation) + * @_list: name of the list. Should contain only characters allowed + * in a C variable name! * * This macro declares a variable that is placed into a linker-generated * array. This is a basic building block for more advanced use of linker- * generated arrays. The user is expected to build their own macro wrapper * around this one. * - * A variable declared using this macro must be compile-time initialized - * and is as such placed into subsection of special section, .u_boot_list. - * The subsection is specified by the _section_[u,d] parameter, see below. - * The base name of the variable is _name, yet the actual variable is - * declared as concatenation of - * - * %_u_boot_list_ + @_section_u + _ + @_name - * - * which ensures name uniqueness. This variable shall never be refered - * directly though. + * A variable declared using this macro must be compile-time initialized. * * Special precaution must be made when using this macro: - * 1) The _type must not contain the "static" keyword, otherwise the entry - * is not generated. * - * 2) The @_section_u and @_section_d variables must match, the only difference - * is that in @_section_u is every dot "." character present in @_section_d - * replaced by a single underscore "_" character in @_section_u. The actual - * purpose of these parameters is to select proper subsection in the global - * .u_boot_list section. + * 1) The _type must not contain the "static" keyword, otherwise the + * entry is generated and can be iterated but is listed in the map + * file and cannot be retrieved by name. * - * 3) In case a section is declared that contains some array elements AND a - * subsection of this section is declared and contains some elements, it is - * imperative that the elements are of the same type. + * 2) In case a section is declared that contains some array elements AND + * a subsection of this section is declared and contains some elements, + * it is imperative that the elements are of the same type. * * 4) In case an outer section is declared that contains some array elements - * AND am inner subsection of this section is declared and contains some + * AND an inner subsection of this section is declared and contains some * elements, then when traversing the outer section, even the elements of * the inner sections are present in the array. * @@ -66,39 +141,71 @@ * .y = 4, * }; */ -#define ll_entry_declare(_type, _name, _section_u, _section_d) \ - _type _u_boot_list_##_section_u##_##_name __attribute__(( \ - unused, aligned(4), \ - section(".u_boot_list."#_section_d"."#_name))) +#define ll_entry_declare(_type, _name, _list) \ + _type _u_boot_list_2_##_list##_2_##_name __aligned(4) \ + __attribute__((unused, \ + section(".u_boot_list_2_"#_list"_2_"#_name))) + +/** + * We need a 0-byte-size type for iterator symbols, and the compiler + * does not allow defining objects of C type 'void'. Using an empty + * struct is allowed by the compiler, but causes gcc versions 4.4 and + * below to complain about aliasing. Therefore we use the next best + * thing: zero-sized arrays, which are both 0-byte-size and exempt from + * aliasing warnings. + */ /** * ll_entry_start() - Point to first entry of linker-generated array * @_type: Data type of the entry - * @_section_u: Subsection of u_boot_list in which this entry is placed - * (with underscores instead of dots) + * @_list: Name of the list in which this entry is placed * * This function returns (_type *) pointer to the very first entry of a * linker-generated array placed into subsection of .u_boot_list section - * specified by _section_u argument. + * specified by _list argument. + * + * Since this macro defines an array start symbol, its leftmost index + * must be 2 and its rightmost index must be 1. * * Example: * struct my_sub_cmd *msc = ll_entry_start(struct my_sub_cmd, cmd_sub); */ -#define ll_entry_start(_type, _section_u) \ - ({ \ - extern _type _u_boot_list_##_section_u##__start; \ - _type *_ll_result = &_u_boot_list_##_section_u##__start;\ - _ll_result; \ - }) +#define ll_entry_start(_type, _list) \ +({ \ + static char start[0] __aligned(4) __attribute__((unused, \ + section(".u_boot_list_2_"#_list"_1"))); \ + (_type *)&start; \ +}) /** - * ll_entry_count() - Return the number of elements in linker-generated array + * ll_entry_end() - Point after last entry of linker-generated array * @_type: Data type of the entry - * @_section_u: Subsection of u_boot_list in which this entry is placed + * @_list: Name of the list in which this entry is placed * (with underscores instead of dots) * + * This function returns (_type *) pointer after the very last entry of + * a linker-generated array placed into subsection of .u_boot_list + * section specified by _list argument. + * + * Since this macro defines an array end symbol, its leftmost index + * must be 2 and its rightmost index must be 3. + * + * Example: + * struct my_sub_cmd *msc = ll_entry_end(struct my_sub_cmd, cmd_sub); + */ +#define ll_entry_end(_type, _list) \ +({ \ + static char end[0] __aligned(4) __attribute__((unused, \ + section(".u_boot_list_2_"#_list"_3"))); \ + (_type *)&end; \ +}) +/** + * ll_entry_count() - Return the number of elements in linker-generated array + * @_type: Data type of the entry + * @_list: Name of the list of which the number of elements is computed + * * This function returns the number of elements of a linker-generated array - * placed into subsection of .u_boot_list section specified by _section_u + * placed into subsection of .u_boot_list section specified by _list * argument. The result is of an unsigned int type. * * Example: @@ -108,23 +215,19 @@ * for (i = 0; i < count; i++, msc++) * printf("Entry %i, x=%i y=%i\n", i, msc->x, msc->y); */ -#define ll_entry_count(_type, _section_u) \ +#define ll_entry_count(_type, _list) \ ({ \ - extern _type _u_boot_list_##_section_u##__start; \ - extern _type _u_boot_list_##_section_u##__end; \ - unsigned int _ll_result = \ - &_u_boot_list_##_section_u##__end - \ - &_u_boot_list_##_section_u##__start; \ + _type *start = ll_entry_start(_type, _list); \ + _type *end = ll_entry_end(_type, _list); \ + unsigned int _ll_result = end - start; \ _ll_result; \ }) - /** * ll_entry_get() - Retrieve entry from linker-generated array by name * @_type: Data type of the entry * @_name: Name of the entry - * @_section_u: Subsection of u_boot_list in which this entry is placed - * (with underscores instead of dots) + * @_list: Name of the list in which this entry is placed * * This function returns a pointer to a particular entry in LG-array * identified by the subsection of u_boot_list where the entry resides @@ -138,11 +241,54 @@ * ... * struct my_sub_cmd *c = ll_entry_get(struct my_sub_cmd, my_sub_cmd, cmd_sub); */ -#define ll_entry_get(_type, _name, _section_u) \ +#define ll_entry_get(_type, _name, _list) \ ({ \ - extern _type _u_boot_list_##_section_u##_##_name; \ - _type *_ll_result = &_u_boot_list_##_section_u##_##_name;\ + extern _type _u_boot_list_2_##_list##_2_##_name; \ + _type *_ll_result = \ + &_u_boot_list_2_##_list##_2_##_name; \ _ll_result; \ }) +/** + * ll_start() - Point to first entry of first linker-generated array + * @_type: Data type of the entry + * + * This function returns (_type *) pointer to the very first entry of + * the very first linker-generated array. + * + * Since this macro defines the start of the linker-generated arrays, + * its leftmost index must be 1. + * + * Example: + * struct my_sub_cmd *msc = ll_start(struct my_sub_cmd); + */ +#define ll_start(_type) \ +({ \ + static char start[0] __aligned(4) __attribute__((unused, \ + section(".u_boot_list_1"))); \ + (_type *)&start; \ +}) + +/** + * ll_entry_end() - Point after last entry of last linker-generated array + * @_type: Data type of the entry + * + * This function returns (_type *) pointer after the very last entry of + * the very last linker-generated array. + * + * Since this macro defines the end of the linker-generated arrays, + * its leftmost index must be 3. + * + * Example: + * struct my_sub_cmd *msc = ll_end(struct my_sub_cmd); + */ +#define ll_end(_type) \ +({ \ + static char end[0] __aligned(4) __attribute__((unused, \ + section(".u_boot_list_3"))); \ + (_type *)&end; \ +}) + +#endif /* __ASSEMBLY__ */ + #endif /* __LINKER_LISTS_H__ */ diff --git a/nand_spl/board/freescale/mpc8536ds/Makefile b/nand_spl/board/freescale/mpc8536ds/Makefile index 9c778261b6f..3a2a2d4b17e 100644 --- a/nand_spl/board/freescale/mpc8536ds/Makefile +++ b/nand_spl/board/freescale/mpc8536ds/Makefile @@ -32,7 +32,6 @@ include $(TOPDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ $(LDFLAGS) $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_NAND_SPL @@ -62,11 +61,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds -Map $(nandobj)u-boot-spl.map \ -o $(nandobj)u-boot-spl -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/freescale/mpc8569mds/Makefile b/nand_spl/board/freescale/mpc8569mds/Makefile index 9c778261b6f..3a2a2d4b17e 100644 --- a/nand_spl/board/freescale/mpc8569mds/Makefile +++ b/nand_spl/board/freescale/mpc8569mds/Makefile @@ -32,7 +32,6 @@ include $(TOPDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ $(LDFLAGS) $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_NAND_SPL @@ -62,11 +61,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds -Map $(nandobj)u-boot-spl.map \ -o $(nandobj)u-boot-spl -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/freescale/mpc8572ds/Makefile b/nand_spl/board/freescale/mpc8572ds/Makefile index 9c778261b6f..3a2a2d4b17e 100644 --- a/nand_spl/board/freescale/mpc8572ds/Makefile +++ b/nand_spl/board/freescale/mpc8572ds/Makefile @@ -32,7 +32,6 @@ include $(TOPDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ $(LDFLAGS) $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_NAND_SPL @@ -62,11 +61,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds -Map $(nandobj)u-boot-spl.map \ -o $(nandobj)u-boot-spl -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile index fd0dfc19d86..3d57059f508 100644 --- a/nand_spl/board/freescale/mx31pdk/Makefile +++ b/nand_spl/board/freescale/mx31pdk/Makefile @@ -6,7 +6,6 @@ include $(TOPDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \ $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL @@ -38,11 +37,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds -Map $(nandobj)u-boot-spl.map \ -o $@ -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/freescale/mx31pdk/u-boot.lds b/nand_spl/board/freescale/mx31pdk/u-boot.lds index a26110f393d..06561769309 100644 --- a/nand_spl/board/freescale/mx31pdk/u-boot.lds +++ b/nand_spl/board/freescale/mx31pdk/u-boot.lds @@ -49,7 +49,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + *(SORT(.u_boot_list*)); } . = ALIGN(4); diff --git a/nand_spl/board/freescale/p1010rdb/Makefile b/nand_spl/board/freescale/p1010rdb/Makefile index c3495ec0dff..f7bdf9207d1 100644 --- a/nand_spl/board/freescale/p1010rdb/Makefile +++ b/nand_spl/board/freescale/p1010rdb/Makefile @@ -32,7 +32,6 @@ include $(TOPDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) $(LDFLAGS) \ $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_NAND_SPL @@ -62,11 +61,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds -Map $(nandobj)u-boot-spl.map \ -o $(nandobj)u-boot-spl -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/freescale/p1023rds/Makefile b/nand_spl/board/freescale/p1023rds/Makefile index 9b2c0d7f357..fb7d5612a1c 100644 --- a/nand_spl/board/freescale/p1023rds/Makefile +++ b/nand_spl/board/freescale/p1023rds/Makefile @@ -27,7 +27,6 @@ include $(TOPDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ $(LDFLAGS) $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_NAND_SPL @@ -57,11 +56,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds -Map $(nandobj)u-boot-spl.map \ -o $(nandobj)u-boot-spl -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/freescale/p1_p2_rdb/Makefile b/nand_spl/board/freescale/p1_p2_rdb/Makefile index 9c778261b6f..3a2a2d4b17e 100644 --- a/nand_spl/board/freescale/p1_p2_rdb/Makefile +++ b/nand_spl/board/freescale/p1_p2_rdb/Makefile @@ -32,7 +32,6 @@ include $(TOPDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ $(LDFLAGS) $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_NAND_SPL @@ -62,11 +61,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds -Map $(nandobj)u-boot-spl.map \ -o $(nandobj)u-boot-spl -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/karo/tx25/Makefile b/nand_spl/board/karo/tx25/Makefile index 82489d2405e..9f9c5893cf0 100644 --- a/nand_spl/board/karo/tx25/Makefile +++ b/nand_spl/board/karo/tx25/Makefile @@ -27,7 +27,6 @@ include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk nandobj := $(OBJTREE)/nand_spl/ LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \ $(LDFLAGS_FINAL) AFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL @@ -59,11 +58,7 @@ $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds -Map $(nandobj)u-boot-spl.map \ -o $@ -# The following line expands into whole rule which generates $(LSTSCRIPT), -# the file containing u-boots LG-array linker section. This is included into -# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file. -$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) -$(nandobj)u-boot.lds: $(LDSCRIPT) $(LSTSCRIPT) +$(nandobj)u-boot.lds: $(LDSCRIPT) $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ -ansi -D__ASSEMBLY__ -P - <$< >$@ diff --git a/nand_spl/board/karo/tx25/u-boot.lds b/nand_spl/board/karo/tx25/u-boot.lds index ee361314fda..ea84d64f3f1 100644 --- a/nand_spl/board/karo/tx25/u-boot.lds +++ b/nand_spl/board/karo/tx25/u-boot.lds @@ -49,7 +49,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + *(SORT(.u_boot_list*)); } . = ALIGN(4); diff --git a/nand_spl/board/samsung/smdk6400/u-boot.lds b/nand_spl/board/samsung/smdk6400/u-boot.lds index 2ed646630c9..66b412e4aa9 100644 --- a/nand_spl/board/samsung/smdk6400/u-boot.lds +++ b/nand_spl/board/samsung/smdk6400/u-boot.lds @@ -53,7 +53,7 @@ SECTIONS . = ALIGN(4); .u_boot_list : { - #include + *(SORT(.u_boot_list*)); } . = ALIGN(4); diff --git a/spl/.gitignore b/spl/.gitignore index 8cf487e5c8f..7c8814709f6 100644 --- a/spl/.gitignore +++ b/spl/.gitignore @@ -2,4 +2,3 @@ u-boot-spl u-boot-spl.bin u-boot-spl.lds u-boot-spl.map -u-boot.lst -- cgit v1.3.1 From d67b0d97b156f9ec2fc4c838d84b1e510d6e49b4 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Mon, 11 Mar 2013 08:44:53 +0000 Subject: Add Boundary Devices Nitrogen6X boards Signed-off-by: Eric Nelson --- MAINTAINERS | 8 + board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg | 58 ++ board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg | 58 ++ board/boundary/nitrogen6x/6x_bootscript.txt | 63 ++ .../boundary/nitrogen6x/6x_bootscript_android.txt | 64 ++ .../nitrogen6x/6x_bootscript_android_recovery.txt | 64 ++ board/boundary/nitrogen6x/6x_upgrade.txt | 45 ++ board/boundary/nitrogen6x/800mhz_2x128mx16.cfg | 58 ++ board/boundary/nitrogen6x/800mhz_2x256mx16.cfg | 58 ++ board/boundary/nitrogen6x/800mhz_4x128mx16.cfg | 57 ++ board/boundary/nitrogen6x/800mhz_4x256mx16.cfg | 58 ++ board/boundary/nitrogen6x/Makefile | 41 + board/boundary/nitrogen6x/README | 92 +++ board/boundary/nitrogen6x/clocks.cfg | 46 ++ board/boundary/nitrogen6x/ddr-setup.cfg | 112 +++ board/boundary/nitrogen6x/nitrogen6dl.cfg | 45 ++ board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 45 ++ board/boundary/nitrogen6x/nitrogen6q.cfg | 45 ++ board/boundary/nitrogen6x/nitrogen6q2g.cfg | 45 ++ board/boundary/nitrogen6x/nitrogen6s.cfg | 45 ++ board/boundary/nitrogen6x/nitrogen6s1g.cfg | 45 ++ board/boundary/nitrogen6x/nitrogen6x.c | 895 +++++++++++++++++++++ boards.cfg | 6 + include/configs/nitrogen6x.h | 285 +++++++ 24 files changed, 2338 insertions(+) create mode 100644 board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg create mode 100644 board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg create mode 100644 board/boundary/nitrogen6x/6x_bootscript.txt create mode 100644 board/boundary/nitrogen6x/6x_bootscript_android.txt create mode 100644 board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt create mode 100644 board/boundary/nitrogen6x/6x_upgrade.txt create mode 100644 board/boundary/nitrogen6x/800mhz_2x128mx16.cfg create mode 100644 board/boundary/nitrogen6x/800mhz_2x256mx16.cfg create mode 100644 board/boundary/nitrogen6x/800mhz_4x128mx16.cfg create mode 100644 board/boundary/nitrogen6x/800mhz_4x256mx16.cfg create mode 100644 board/boundary/nitrogen6x/Makefile create mode 100644 board/boundary/nitrogen6x/README create mode 100644 board/boundary/nitrogen6x/clocks.cfg create mode 100644 board/boundary/nitrogen6x/ddr-setup.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6dl.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6dl2g.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6q.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6q2g.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6s.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6s1g.cfg create mode 100644 board/boundary/nitrogen6x/nitrogen6x.c create mode 100644 include/configs/nitrogen6x.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index 175bbe26669..f490d62fb81 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1037,6 +1037,14 @@ Pali Rohár nokia_rx51 ARM ARMV7 (OMAP34xx SoC) +Eric Nelson + nitrogen6dl i.MX6DL 1GB + nitrogen6dl2g i.MX6DL 2GB + nitrogen6q i.MX6Q/6D 1GB + nitrogen6q2g i.MX6Q/6D 2GB + nitrogen6s i.MX6S 512MB + nitrogen6s1g i.MX6S 1GB + ------------------------------------------------------------------------- Unknown / orphaned boards: diff --git a/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg b/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg new file mode 100644 index 00000000000..16a37d0ced3 --- /dev/null +++ b/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + */ +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7974 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42720306 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026F0266 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4273030A +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02740240 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45393B3E +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x403A3747 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40434541 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x473E4A3B +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0011000E +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x000E001B +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00190015 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00070018 +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg b/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg new file mode 100644 index 00000000000..0607703825a --- /dev/null +++ b/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + */ +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43040319 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03040279 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43040321 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03030251 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4d434248 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c4d +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x34424543 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x49324933 +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001a0017 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00170027 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000a001f +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nitrogen6x/6x_bootscript.txt b/board/boundary/nitrogen6x/6x_bootscript.txt new file mode 100644 index 00000000000..061b3a44b5a --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript.txt @@ -0,0 +1,63 @@ +setenv bootargs enable_wait_mode=off +setenv nextcon 0; + +if hdmidet ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 1024x600 display"; +fi + +if i2c probe 0x48 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 800x480 display"; +fi + +while test "3" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda1" ; +else + setenv "bootargs $bootargs root=/dev/mmcblk0p1" ; +fi +${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage && bootm 10800000 ; +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript_android.txt b/board/boundary/nitrogen6x/6x_bootscript_android.txt new file mode 100644 index 00000000000..0982cf80543 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript_android.txt @@ -0,0 +1,64 @@ +${dtype} dev ${disk} + +setenv bootargs enable_wait_mode=off +setenv nextcon 0; +setenv bootargs $bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 ; + +i2c dev 2 + +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=10M"; + else + setenv fbcon ${fbcon},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=10M"; + else + setenv fbcon ${fbcon},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 1024x600 display"; +fi + +if i2c probe 0x48 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=10M"; + else + setenv fbcon ${fbcon},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 800x480 display"; +fi + +if hdmidet ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=28M"; + else + setenv fbcon ${fbcon},28M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +while test "3" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs fbcon=$fbcon +${fs}load ${dtype} ${disk}:1 10800000 uImage && ${fs}load ${dtype} ${disk}:1 12800000 uramdisk.img && bootm 10800000 12800000 +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt b/board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt new file mode 100644 index 00000000000..0982cf80543 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript_android_recovery.txt @@ -0,0 +1,64 @@ +${dtype} dev ${disk} + +setenv bootargs enable_wait_mode=off +setenv nextcon 0; +setenv bootargs $bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 ; + +i2c dev 2 + +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=10M"; + else + setenv fbcon ${fbcon},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=10M"; + else + setenv fbcon ${fbcon},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 1024x600 display"; +fi + +if i2c probe 0x48 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=10M"; + else + setenv fbcon ${fbcon},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 800x480 display"; +fi + +if hdmidet ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + if test "0" -eq $nextcon; then + setenv fbcon "fbcon=28M"; + else + setenv fbcon ${fbcon},28M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +while test "3" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs fbcon=$fbcon +${fs}load ${dtype} ${disk}:1 10800000 uImage && ${fs}load ${dtype} ${disk}:1 12800000 uramdisk.img && bootm 10800000 12800000 +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_upgrade.txt b/board/boundary/nitrogen6x/6x_upgrade.txt new file mode 100644 index 00000000000..0d8e8e542bd --- /dev/null +++ b/board/boundary/nitrogen6x/6x_upgrade.txt @@ -0,0 +1,45 @@ +setenv stdout serial,vga +echo "check U-Boot" ; +setenv offset 0x400 +if ${fs}load ${dtype} ${disk}:1 12000000 u-boot.imx || ${fs}load ${dtype} ${disk}:1 12000000 u-boot.nopadding ; then + echo "read $filesize bytes from SD card" ; + if sf probe || sf probe || \ + sf probe 1 27000000 || sf probe 1 27000000 ; then + echo "probed SPI ROM" ; + if sf read 0x12400000 $offset $filesize ; then + if cmp.b 0x12000000 0x12400000 $filesize ; then + echo "------- U-Boot versions match" ; + else + echo "Need U-Boot upgrade" ; + echo "Program in 5 seconds" ; + for n in 5 4 3 2 1 ; do + echo $n ; + sleep 1 ; + done + echo "erasing" ; + sf erase 0 0x50000 ; + # two steps to prevent bricking + echo "programming" ; + sf write 0x12000000 $offset $filesize ; + echo "verifying" ; + if sf read 0x12400000 $offset $filesize ; then + if cmp.b 0x12000000 0x12400000 $filesize ; then + while echo "---- U-Boot upgraded. reset" ; do + sleep 120 + done + else + echo "Read verification error" ; + fi + else + echo "Error re-reading EEPROM" ; + fi + fi + else + echo "Error reading boot loader from EEPROM" ; + fi + else + echo "Error initializing EEPROM" ; + fi ; +else + echo "No U-Boot image found on SD card" ; +fi diff --git a/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg b/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg new file mode 100644 index 00000000000..de33e650a1a --- /dev/null +++ b/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + */ +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x00431023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D +DATA 4, MX6_MMDC_P0_MDASP, 0x00000017 +DATA 4, MX6_MMDC_P0_MDCTL, 0x83190000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035 +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg b/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg new file mode 100644 index 00000000000..19707cfe22a --- /dev/null +++ b/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + */ +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x006C1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +DATA 4, MX6_MMDC_P0_MDCTL, 0x84190000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035 +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg b/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg new file mode 100644 index 00000000000..dd6a423205a --- /dev/null +++ b/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + */ +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x00431023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x420F020F +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x01760175 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x41640171 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x015E0160 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45464B4A +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x49484A46 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40402E32 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3A3A3231 +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x003A003A +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0030002F +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x002F0038 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00270039 +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg b/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg new file mode 100644 index 00000000000..d5d06e2686c --- /dev/null +++ b/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + */ +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x006C1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42350231 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021A0218 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x42350231 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x021A0218 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B4B4E49 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4B4B4E49 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3035 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3F3F3035 +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0040003C +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0032003E +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0040003C +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nitrogen6x/Makefile b/board/boundary/nitrogen6x/Makefile new file mode 100644 index 00000000000..fe1e5e0c2ea --- /dev/null +++ b/board/boundary/nitrogen6x/Makefile @@ -0,0 +1,41 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := nitrogen6x.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/boundary/nitrogen6x/README b/board/boundary/nitrogen6x/README new file mode 100644 index 00000000000..50490931e02 --- /dev/null +++ b/board/boundary/nitrogen6x/README @@ -0,0 +1,92 @@ +U-Boot for the Boundary Devices Nitrogen6X and +Freescale i.MX6Q SabreLite boards + +This file contains information for the port of +U-Boot to the Boundary Devices Nitrogen6X and +Freescale i.MX6Q SabreLite boards. + +1. Boot source, boot from SPI NOR +--------------------------------- +The configuration in this directory supports both the +Nitrogen6X and Freescale SabreLite board, but in a +different fashion from Freescale's implementation in +board/freescale/mx6qsabrelite. + +In particular, this image supports booting from SPI NOR +and saving the environment to SPI NOR. + +It does not support 'boot from SD' at offset 0x400 +except through the 'bmode' command. + http://lists.denx.de/pipermail/u-boot/2012-August/131151.html + +2. Boots using 6x_bootscript on SATA or SD card +----------------------------------------------- +The default bootcmd for these boards is configured +to look for and source a boot script named '6x_bootscript' +in the root of the first partition of the following +devices: + + sata 0 + mmc 0 + mmc 1 + +They're searched in the order listed above, trying both the +ext2 and fat filesystems. + +2. Maintaining the SPI NOR +-------------------------- +A couple of convenience commands + + clearenv - clear environment to factory default + upgradeu - look and source a boot script named + '6x_upgrade' to upgrade the U-Boot version + in SPI NOR. The search is the same as for + 6x_bootscript described above. + +3. Display support +------------------ +U-Boot support for the following displays is configured by +default: + + HDMI - 1024 x 768 for maximum compatibility + Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1) + wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600) + wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480) + +Since the ipuv3_fb display driver currently supports only a single display, +this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect +or the I2C touch controller of the LVDS and RGB displays in the priority +listed above. + +Setting 'panel' environment variable to one of the names above will +override auto-detection and force activation of the specified panel. + +4. Building +------------ + +To build U-Boot for one of the Nitrogen6x or SabreLite board: + + make nitrogen6x_config + make u-boot.imx + +Note that 'nitrogen6x' is a placeholder. The complete list of supported +board configurations is shown in tha MAINTAINERS file: + nitrogen6q i.MX6Q/6D 1GB + nitrogen6dl i.MX6DL 1GB + nitrogen6s i.MX6S 512MB + nitrogen6q2g i.MX6Q/6D 2GB + nitrogen6dl2g i.MX6DL 2GB + nitrogen6s1g i.MX6S 1GB + +The -6q variants support either the i.MX6Quad or i.MX6Dual processors +and are configured for a 64-bit memory bus at 1066 MHz. + +The -6dl variants also use a 64-bit memory bus, operated at 800MHz. + +The -6s variants use a 32-bit memory bus at 800MHz. + +If you place the u-boot.imx into a single-partition SD card +along with a binary version of the boot script 6x_upgrade.txt, +you can program it using 'upgradeu': + + U-Boot> run upgradeu diff --git a/board/boundary/nitrogen6x/clocks.cfg b/board/boundary/nitrogen6x/clocks.cfg new file mode 100644 index 00000000000..e7d1f86cdb1 --- /dev/null +++ b/board/boundary/nitrogen6x/clocks.cfg @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F diff --git a/board/boundary/nitrogen6x/ddr-setup.cfg b/board/boundary/nitrogen6x/ddr-setup.cfg new file mode 100644 index 00000000000..c3158120a40 --- /dev/null +++ b/board/boundary/nitrogen6x/ddr-setup.cfg @@ -0,0 +1,112 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x000e0030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00081740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/nitrogen6x/nitrogen6dl.cfg b/board/boundary/nitrogen6x/nitrogen6dl.cfg new file mode 100644 index 00000000000..d6da96c5e88 --- /dev/null +++ b/board/boundary/nitrogen6x/nitrogen6dl.cfg @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "800mhz_4x128mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg new file mode 100644 index 00000000000..0b1c35c3144 --- /dev/null +++ b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "800mhz_4x256mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/nitrogen6x/nitrogen6q.cfg b/board/boundary/nitrogen6x/nitrogen6q.cfg new file mode 100644 index 00000000000..680a853683b --- /dev/null +++ b/board/boundary/nitrogen6x/nitrogen6q.cfg @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_4x128mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/nitrogen6x/nitrogen6q2g.cfg b/board/boundary/nitrogen6x/nitrogen6q2g.cfg new file mode 100644 index 00000000000..f57ab0eedff --- /dev/null +++ b/board/boundary/nitrogen6x/nitrogen6q2g.cfg @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_4x256mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/nitrogen6x/nitrogen6s.cfg b/board/boundary/nitrogen6x/nitrogen6s.cfg new file mode 100644 index 00000000000..b5af5cc1b52 --- /dev/null +++ b/board/boundary/nitrogen6x/nitrogen6s.cfg @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "800mhz_2x128mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/nitrogen6x/nitrogen6s1g.cfg b/board/boundary/nitrogen6x/nitrogen6s1g.cfg new file mode 100644 index 00000000000..5aeefc8783c --- /dev/null +++ b/board/boundary/nitrogen6x/nitrogen6s1g.cfg @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "800mhz_2x256mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c new file mode 100644 index 00000000000..0dbb6d26bfb --- /dev/null +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -0,0 +1,895 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +int dram_init(void) +{ + gd->ram_size = CONFIG_DDR_MB * 1024 * 1024; + + return 0; +} + +iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO_3_21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO_3_28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO_4_12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO_4_13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO_1_5 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO_7_11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO_7_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO_2_6 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO_6_30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO_6_25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO_6_27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO_6_28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO_6_29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO_6_24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO_3_23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO_1_27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +/* wl1271 pads on nitrogen6x */ +iomux_v3_cfg_t const wl12xx_pads[] = { + (MX6_PAD_NANDF_CS1__GPIO_6_14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), + (MX6_PAD_NANDF_CS2__GPIO_6_15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_CS3__GPIO_6_16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +}; +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) +#define WL12XX_WL_ENABLE_GP IMX_GPIO_NR(6, 15) +#define WL12XX_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + +/* Button assignments for J14 */ +static iomux_v3_cfg_t const button_pads[] = { + /* Menu */ + MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Back */ + MX6_PAD_NANDF_D2__GPIO_2_2 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Labelled Search (mapped to Power under Android) */ + MX6_PAD_NANDF_D3__GPIO_2_3 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Home */ + MX6_PAD_NANDF_D4__GPIO_2_4 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Down */ + MX6_PAD_GPIO_19__GPIO_4_5 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Up */ + MX6_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* SABRE Lite PHY rst */ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* Nitrogen6X PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* SABRE Lite PHY reset */ + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* Nitrogen6X PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); +} + +iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret; + + if (cfg->esdhc_base == USDHC3_BASE_ADDR) { + gpio_direction_input(IMX_GPIO_NR(7, 0)); + ret = !gpio_get_value(IMX_GPIO_NR(7, 0)); + } else { + gpio_direction_input(IMX_GPIO_NR(2, 6)); + ret = !gpio_get_value(IMX_GPIO_NR(2, 6)); + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +u32 get_board_rev(void) +{ + return 0x63000; +} + +#ifdef CONFIG_MXC_SPI +iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +void setup_spi(void) +{ + gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + return 0; +} + +static void setup_buttons(void) +{ + imx_iomux_v3_setup_multiple_pads(button_pads, + ARRAY_SIZE(button_pads)); +} + +#ifdef CONFIG_CMD_SATA + +int setup_sata(void) +{ + struct iomuxc_base_regs *const iomuxc_regs + = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR; + int ret = enable_sata_clock(); + if (ret) + return ret; + + clrsetbits_le32(&iomuxc_regs->gpr[13], + IOMUXC_GPR13_SATA_MASK, + IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB + |IOMUXC_GPR13_SATA_PHY_7_SATA2M + |IOMUXC_GPR13_SATA_SPEED_3G + |(3<phy_stat0) & HDMI_PHY_HPD; +} + +static void enable_hdmi(struct display_info_t const *dev) +{ + struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; + u8 reg; + printf("%s: setup HDMI monitor\n", __func__); + reg = readb(&hdmi->phy_conf0); + reg |= HDMI_PHY_CONF0_PDZ_MASK; + writeb(reg, &hdmi->phy_conf0); + + udelay(3000); + reg |= HDMI_PHY_CONF0_ENTMDS_MASK; + writeb(reg, &hdmi->phy_conf0); + udelay(3000); + reg |= HDMI_PHY_CONF0_GEN2_TXPWRON_MASK; + writeb(reg, &hdmi->phy_conf0); + writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz); +} + +static int detect_i2c(struct display_info_t const *dev) +{ + return ((0 == i2c_set_bus_num(dev->bus)) + && + (0 == i2c_probe(dev->addr))); +} + +static void enable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *) + IOMUXC_BASE_ADDR; + u32 reg = readl(&iomux->gpr[2]); + reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; + writel(reg, &iomux->gpr[2]); + gpio_direction_output(LVDS_BACKLIGHT_GP, 1); +} + +static void enable_rgb(struct display_info_t const *dev) +{ + imx_iomux_v3_setup_multiple_pads( + rgb_pads, + ARRAY_SIZE(rgb_pads)); + gpio_direction_output(RGB_BACKLIGHT_GP, 1); +} + +static struct display_info_t const displays[] = {{ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = 2, + .addr = 0x4, + .pixfmt = IPU_PIX_FMT_LVDS666, + .detect = detect_i2c, + .enable = enable_lvds, + .mode = { + .name = "Hannstar-XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = 2, + .addr = 0x38, + .pixfmt = IPU_PIX_FMT_LVDS666, + .detect = detect_i2c, + .enable = enable_lvds, + .mode = { + .name = "wsvga-lvds", + .refresh = 60, + .xres = 1024, + .yres = 600, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = 2, + .addr = 0x48, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = detect_i2c, + .enable = enable_rgb, + .mode = { + .name = "wvga-rgb", + .refresh = 57, + .xres = 800, + .yres = 480, + .pixclock = 37037, + .left_margin = 40, + .right_margin = 60, + .upper_margin = 10, + .lower_margin = 10, + .hsync_len = 20, + .vsync_len = 10, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +} } }; + +int board_video_skip(void) +{ + int i; + int ret; + char const *panel = getenv("panel"); + if (!panel) { + for (i = 0; i < ARRAY_SIZE(displays); i++) { + struct display_info_t const *dev = displays+i; + if (dev->detect(dev)) { + panel = dev->mode.name; + printf("auto-detected panel %s\n", panel); + break; + } + } + if (!panel) { + panel = displays[0].mode.name; + printf("No panel detected: default to %s\n", panel); + } + } else { + for (i = 0; i < ARRAY_SIZE(displays); i++) { + if (!strcmp(panel, displays[i].mode.name)) + break; + } + } + if (i < ARRAY_SIZE(displays)) { + ret = ipuv3_fb_init(&displays[i].mode, 0, + displays[i].pixfmt); + if (!ret) { + displays[i].enable(displays+i); + printf("Display: %s (%ux%u)\n", + displays[i].mode.name, + displays[i].mode.xres, + displays[i].mode.yres); + } else + printf("LCD %s cannot be configured: %d\n", + displays[i].mode.name, ret); + } else { + printf("unsupported panel %s\n", panel); + ret = -EINVAL; + } + return (0 != ret); +} + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; + + int reg; + + /* Turn on LDB0,IPU,IPU DI0 clocks */ + reg = __raw_readl(&mxc_ccm->CCGR3); + reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET + |MXC_CCM_CCGR3_LDB_DI0_MASK; + writel(reg, &mxc_ccm->CCGR3); + + /* Turn on HDMI PHY clock */ + reg = __raw_readl(&mxc_ccm->CCGR2); + reg |= MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_MASK + |MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_MASK; + writel(reg, &mxc_ccm->CCGR2); + + /* clear HDMI PHY reset */ + writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz); + + /* set PFD1_FRAC to 0x13 == 455 MHz (480*18)/0x13 */ + writel(ANATOP_PFD_480_PFD1_FRAC_MASK, &anatop->pfd_480_clr); + writel(0x13<pfd_480_set); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK + |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3<cs2cdr); + + reg = readl(&mxc_ccm->cscmr2); + reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; + writel(reg, &mxc_ccm->cscmr2); + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + <chsccdr); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES + |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH + |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW + |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG + |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT + |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG + |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT + |IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED + |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK) + | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 + <gpr[3]); + + /* backlights off until needed */ + imx_iomux_v3_setup_multiple_pads(backlight_pads, + ARRAY_SIZE(backlight_pads)); + gpio_direction_input(LVDS_BACKLIGHT_GP); + gpio_direction_input(RGB_BACKLIGHT_GP); +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + /* Disable wl1271 For Nitrogen6w */ + gpio_direction_input(WL12XX_WL_IRQ_GP); + gpio_direction_output(WL12XX_WL_ENABLE_GP, 0); + gpio_direction_output(WL12XX_BT_ENABLE_GP, 0); + + imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); + setup_buttons(); + +#if defined(CONFIG_VIDEO_IPUV3) + setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + +int checkboard(void) +{ + if (gpio_get_value(WL12XX_WL_IRQ_GP)) + puts("Board: Nitrogen6X\n"); + else + puts("Board: SABRE Lite\n"); + + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"back", IMX_GPIO_NR(2, 2), 'B'}, + {"home", IMX_GPIO_NR(2, 4), 'H'}, + {"menu", IMX_GPIO_NR(2, 1), 'M'}, + {"search", IMX_GPIO_NR(2, 3), 'S'}, + {"volup", IMX_GPIO_NR(7, 13), 'V'}, + {"voldown", IMX_GPIO_NR(4, 5), 'v'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} diff --git a/boards.cfg b/boards.cfg index 7a0b79dd072..fb3b197eef1 100644 --- a/boards.cfg +++ b/boards.cfg @@ -255,6 +255,12 @@ mx6qsabreauto arm armv7 mx6qsabreauto freesca mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg eco5pk arm armv7 eco5pk 8dtech omap3 +nitrogen6dl arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024 +nitrogen6dl2g arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048 +nitrogen6q arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024 +nitrogen6q2g arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048 +nitrogen6s arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 +nitrogen6s1g arm armv7 nitrogen6x boundary mx6 nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,SDRAM_MB=1024 cm_t35 arm armv7 cm_t35 - omap3 omap3_overo arm armv7 overo - omap3 omap3_pandora arm armv7 pandora - omap3 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h new file mode 100644 index 00000000000..93e7fe4e628 --- /dev/null +++ b/include/configs/nitrogen6x.h @@ -0,0 +1,285 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6X + * and Freescale i.MX6Q Sabre Lite boards. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* OCOTP Configs */ +#define CONFIG_CMD_IMXOTP +#ifdef CONFIG_CMD_IMXOTP +#define CONFIG_IMX_OTP +#define IMX_OTP_BASE OCOTP_BASE_ADDR +#define IMX_OTP_ADDR_MAX 0x7F +#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA +#define IMX_OTPWRITE_ENABLED +#endif + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial\0" \ + "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#define CONFIG_SYS_DCACHE_OFF + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_SYS_ALT_MEMTEST + +#endif /* __CONFIG_H */ -- cgit v1.3.1 From c44bb3a30f5a1332176edce1a91c0e2cf666ee8f Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 26 Feb 2013 12:28:28 +0000 Subject: ARM: tegra: enable some CPU errata workarounds Tegra20 has a Cortex A9 r1p1, and Tegra30 has a Cortex A9 r2p9. As such, some CPU errata exist, and must be worked around. These must be worked around in the bootloader, since in general, the kernel (especially a multi-platform kernel) needs to support being launched in non-secure mode (normal world), and hence may not be able to write to the CP15 register to enable these workarounds. Signed-off-by: Stephen Warren --- include/configs/tegra20-common.h | 6 ++++++ include/configs/tegra30-common.h | 6 ++++++ 2 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 33e5f524f16..186e0233643 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -25,6 +25,12 @@ #define _TEGRA20_COMMON_H_ #include "tegra-common.h" +/* + * Errata configuration + */ +#define CONFIG_ARM_ERRATA_742230 +#define CONFIG_ARM_ERRATA_751472 + /* * NS16550 Configuration */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 04517e14092..f6c07c6ecc7 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -25,6 +25,12 @@ #define _TEGRA30_COMMON_H_ #include "tegra-common.h" +/* + * Errata configuration + */ +#define CONFIG_ARM_ERRATA_743622 +#define CONFIG_ARM_ERRATA_751472 + /* * NS16550 Configuration */ -- cgit v1.3.1 From e32624ef820f821b94333402788e79979681eb29 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Fri, 8 Feb 2013 07:25:30 +0000 Subject: Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren Acked-by: Laxman Dewangan --- arch/arm/include/asm/arch-tegra/tegra_i2c.h | 6 +++++ drivers/i2c/tegra_i2c.c | 42 +++++++++++++++++++++++++---- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 4 files changed, 45 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h index 26507447185..853e59bb6e6 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h @@ -105,6 +105,7 @@ struct i2c_ctlr { u32 sl_delay_count; /* 3C: I2C_I2C_SL_DELAY_COUNT */ u32 reserved_2[4]; /* 40: */ struct i2c_control control; /* 50 ~ 68 */ + u32 clk_div; /* 6C: I2C_I2C_CLOCK_DIVISOR */ }; /* bit fields definitions for IO Packet Header 1 format */ @@ -154,6 +155,11 @@ struct i2c_ctlr { #define I2C_INT_ARBITRATION_LOST_SHIFT 2 #define I2C_INT_ARBITRATION_LOST_MASK (1 << I2C_INT_ARBITRATION_LOST_SHIFT) +/* I2C_CLK_DIVISOR_REGISTER */ +#define CLK_DIV_STD_FAST_MODE 0x19 +#define CLK_DIV_HS_MODE 1 +#define CLK_MULT_STD_FAST_MODE 8 + /** * Returns the bus number of the DVC controller * diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index efc77fa910f..ca71cd3ee4c 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -46,6 +46,7 @@ struct i2c_bus { struct i2c_control *control; struct i2c_ctlr *regs; int is_dvc; /* DVC type, rather than I2C */ + int is_scs; /* single clock source (T114+) */ int inited; /* bus is inited */ }; @@ -88,7 +89,28 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus) * 16 to get the right frequency. */ clock_start_periph_pll(i2c_bus->periph_id, CLOCK_ID_PERIPH, - i2c_bus->speed * 2 * 8); + i2c_bus->speed * 2 * 8); + + if (i2c_bus->is_scs) { + /* + * T114 I2C went to a single clock source for standard/fast and + * HS clock speeds. The new clock rate setting calculation is: + * SCL = CLK_SOURCE.I2C / + * (CLK_MULT_STD_FAST_MODE * (I2C_CLK_DIV_STD_FAST_MODE+1) * + * I2C FREQUENCY DIVISOR) as per the T114 TRM (sec 30.3.1). + * + * NOTE: We do this here, after the initial clock/pll start, + * because if we read the clk_div reg before the controller + * is running, we hang, and we need it for the new calc. + */ + int clk_div_stdfst_mode = readl(&i2c_bus->regs->clk_div) >> 16; + debug("%s: CLK_DIV_STD_FAST_MODE setting = %d\n", __func__, + clk_div_stdfst_mode); + + clock_start_periph_pll(i2c_bus->periph_id, CLOCK_ID_PERIPH, + CLK_MULT_STD_FAST_MODE * (clk_div_stdfst_mode + 1) * + i2c_bus->speed * 2); + } /* Reset I2C controller. */ i2c_reset_controller(i2c_bus); @@ -352,10 +374,11 @@ static int i2c_get_config(const void *blob, int node, struct i2c_bus *i2c_bus) * @param node_list list of nodes to process (any <=0 are ignored) * @param count number of nodes to process * @param is_dvc 1 if these are DVC ports, 0 if standard I2C + * @param is_scs 1 if this HW uses a single clock source (T114+) * @return 0 if ok, -1 on error */ static int process_nodes(const void *blob, int node_list[], int count, - int is_dvc) + int is_dvc, int is_scs) { struct i2c_bus *i2c_bus; int i; @@ -375,6 +398,8 @@ static int process_nodes(const void *blob, int node_list[], int count, return -1; } + i2c_bus->is_scs = is_scs; + i2c_bus->is_dvc = is_dvc; if (is_dvc) { i2c_bus->control = @@ -403,18 +428,25 @@ void i2c_init_board(void) const void *blob = gd->fdt_blob; int count; - /* First get the normal i2c ports */ + /* First check for newer (T114+) I2C ports */ + count = fdtdec_find_aliases_for_id(blob, "i2c", + COMPAT_NVIDIA_TEGRA114_I2C, node_list, + TEGRA_I2C_NUM_CONTROLLERS); + if (process_nodes(blob, node_list, count, 0, 1)) + return; + + /* Now get the older (T20/T30) normal I2C ports */ count = fdtdec_find_aliases_for_id(blob, "i2c", COMPAT_NVIDIA_TEGRA20_I2C, node_list, TEGRA_I2C_NUM_CONTROLLERS); - if (process_nodes(blob, node_list, count, 0)) + if (process_nodes(blob, node_list, count, 0, 0)) return; /* Now look for dvc ports */ count = fdtdec_add_aliases_for_id(blob, "i2c", COMPAT_NVIDIA_TEGRA20_DVC, node_list, TEGRA_I2C_NUM_CONTROLLERS); - if (process_nodes(blob, node_list, count, 1)) + if (process_nodes(blob, node_list, count, 1, 0)) return; } diff --git a/include/fdtdec.h b/include/fdtdec.h index 77f244f4171..c7a92d553ed 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -62,6 +62,7 @@ struct fdt_memory { enum fdt_compat_id { COMPAT_UNKNOWN, COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */ + COMPAT_NVIDIA_TEGRA114_I2C, /* Tegra114 I2C w/single clock source */ COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra20 i2c */ COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra20 dvc (really just i2c) */ COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 3ae348dd307..7c7fc833a60 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -37,6 +37,7 @@ DECLARE_GLOBAL_DATA_PTR; static const char * const compat_names[COMPAT_COUNT] = { COMPAT(UNKNOWN, ""), COMPAT(NVIDIA_TEGRA20_USB, "nvidia,tegra20-ehci"), + COMPAT(NVIDIA_TEGRA114_I2C, "nvidia,tegra114-i2c"), COMPAT(NVIDIA_TEGRA20_I2C, "nvidia,tegra20-i2c"), COMPAT(NVIDIA_TEGRA20_DVC, "nvidia,tegra20-i2c-dvc"), COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), -- cgit v1.3.1 From a7f8b5e616e49a2bb819eeb96b5438039307e7b6 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Fri, 8 Feb 2013 07:25:32 +0000 Subject: Tegra114: I2C: Enable I2C driver on Dalmore E1611 eval board Tested all 5 'buses', i2c probe enumerates device addresses on bus 0, 1 and 2. Signed-off-by: Tom Warren Acked-by: Laxman Dewangan --- include/configs/dalmore.h | 9 +++++++++ include/configs/tegra114-common.h | 3 +++ 2 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index ce32c8030b9..b1a6e34ebad 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -41,6 +41,15 @@ #define CONFIG_MACH_TYPE MACH_TYPE_DALMORE #define CONFIG_BOARD_EARLY_INIT_F + +/* I2C */ +#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_CMD_I2C + #define CONFIG_ENV_IS_NOWHERE #define MACH_TYPE_DALMORE 4304 /* not yet in mach-types.h */ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 003353040e2..c2986d83092 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -76,4 +76,7 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/tegra114/u-boot-spl.lds" +/* Total I2C ports on Tegra114 */ +#define TEGRA_I2C_NUM_CONTROLLERS 5 + #endif /* _TEGRA114_COMMON_H_ */ -- cgit v1.3.1 From c9aa831ee26f629fbd2df67cab8bb357777e2256 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Thu, 21 Feb 2013 12:31:30 +0000 Subject: Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren Signed-off-by: Thierry Reding Reviewed-by: Stephen Warren --- arch/arm/include/asm/arch-tegra/mmc.h | 2 +- arch/arm/include/asm/arch-tegra/tegra_mmc.h | 13 +- board/avionic-design/common/tamonten.c | 19 +-- board/compal/paz00/paz00.c | 26 +--- board/compulab/trimslice/trimslice.c | 23 +-- board/nvidia/common/board.c | 25 +++ board/nvidia/harmony/harmony.c | 26 +--- board/nvidia/seaboard/seaboard.c | 25 +-- board/nvidia/whistler/whistler.c | 30 +--- board/toradex/colibri_t20_iris/colibri_t20_iris.c | 11 +- drivers/mmc/tegra_mmc.c | 179 +++++++++++++++------- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 13 files changed, 173 insertions(+), 208 deletions(-) (limited to 'include') diff --git a/arch/arm/include/asm/arch-tegra/mmc.h b/arch/arm/include/asm/arch-tegra/mmc.h index 5c95047998c..71ad407511a 100644 --- a/arch/arm/include/asm/arch-tegra/mmc.h +++ b/arch/arm/include/asm/arch-tegra/mmc.h @@ -22,6 +22,6 @@ #ifndef _TEGRA_MMC_H_ #define _TEGRA_MMC_H_ -int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio); +void tegra_mmc_init(void); #endif /* _TEGRA_MMC_H_ */ diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h index dd746cae0d0..bd18f5f75b4 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h +++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h @@ -27,6 +27,8 @@ #define TEGRA_SDMMC3_BASE 0xC8000400 #define TEGRA_SDMMC4_BASE 0xC8000600 +#define MAX_HOSTS 4 /* Max number of 'hosts'/controllers */ + #ifndef __ASSEMBLY__ struct tegra_mmc { unsigned int sysad; /* _SYSTEM_ADDRESS_0 */ @@ -119,12 +121,15 @@ struct tegra_mmc { struct mmc_host { struct tegra_mmc *reg; + int id; /* device id/number, 0-3 */ + int enabled; /* 1 to enable, 0 to disable */ + int width; /* Bus Width, 1, 4 or 8 */ + enum periph_id mmc_id; /* Peripheral ID: PERIPH_ID_... */ + struct fdt_gpio_state cd_gpio; /* Change Detect GPIO */ + struct fdt_gpio_state pwr_gpio; /* Power GPIO */ + struct fdt_gpio_state wp_gpio; /* Write Protect GPIO */ unsigned int version; /* SDHCI spec. version */ unsigned int clock; /* Current clock (MHz) */ - unsigned int base; /* Base address, SDMMC1/2/3/4 */ - enum periph_id mmc_id; /* Peripheral ID: PERIPH_ID_... */ - int pwr_gpio; /* Power GPIO */ - int cd_gpio; /* Change Detect GPIO */ }; #endif /* __ASSEMBLY__ */ diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c index e6a932ec3c7..ea95e432867 100644 --- a/board/avionic-design/common/tamonten.c +++ b/board/avionic-design/common/tamonten.c @@ -33,13 +33,8 @@ #include #include #include -#include #include #include -#ifdef CONFIG_TEGRA_MMC -#include -#endif - #ifdef CONFIG_BOARD_EARLY_INIT_F void gpio_early_init(void) @@ -54,7 +49,7 @@ void gpio_early_init(void) * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) */ -static void pin_mux_mmc(void) +void pin_mux_mmc(void) { funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); /* for write-protect GPIO PI6 */ @@ -62,16 +57,4 @@ static void pin_mux_mmc(void) /* for CD GPIO PH2 */ pinmux_tristate_disable(PINGRP_ATD); } - -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - - /* init dev 0, SD slot, with 4-bit bus */ - tegra_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); - - return 0; -} #endif diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index 1447f47605b..d6e5c3740e5 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -18,19 +18,14 @@ #include #include #include -#include #include -#ifdef CONFIG_TEGRA_MMC -#include -#endif - #ifdef CONFIG_TEGRA_MMC /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) */ -static void pin_mux_mmc(void) +void pin_mux_mmc(void) { /* SDMMC4: config 3, x8 on 2nd set of pins */ pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); @@ -51,25 +46,6 @@ static void pin_mux_mmc(void) /* For CD GPIO PV5 */ pinmux_tristate_disable(PINGRP_GPV); } - -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - debug("board_mmc_init called\n"); - - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - - debug("board_mmc_init: init eMMC\n"); - /* init dev 0, eMMC chip, with 8-bit bus */ - tegra_mmc_init(0, 8, -1, -1); - - debug("board_mmc_init: init SD slot\n"); - /* init dev 3, SD slot, with 4-bit bus */ - tegra_mmc_init(3, 4, GPIO_PV1, GPIO_PV5); - - return 0; -} #endif #ifdef CONFIG_LCD diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c index 8f4dd09faa3..8401100b188 100644 --- a/board/compulab/trimslice/trimslice.c +++ b/board/compulab/trimslice/trimslice.c @@ -27,12 +27,8 @@ #include #include #include -#include #include #include -#ifdef CONFIG_TEGRA_MMC -#include -#endif void pin_mux_usb(void) { @@ -52,7 +48,7 @@ void pin_mux_spi(void) * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) */ -static void pin_mux_mmc(void) +void pin_mux_mmc(void) { funcmux_select(PERIPH_ID_SDMMC1, FUNCMUX_SDMMC1_SDIO1_4BIT); funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); @@ -60,20 +56,3 @@ static void pin_mux_mmc(void) /* For CD GPIO PP1 */ pinmux_tristate_disable(PINGRP_DAP3); } - -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - debug("board_mmc_init called\n"); - - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - - /* init dev 0 (SDMMC4), (micro-SD slot) with 4-bit bus */ - tegra_mmc_init(0, 4, -1, GPIO_PP1); - - /* init dev 3 (SDMMC1), (SD slot) with 4-bit bus */ - tegra_mmc_init(3, 4, -1, -1); - - return 0; -} diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 665fa1c36c2..babbe08e06a 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -48,6 +48,9 @@ #ifdef CONFIG_USB_EHCI_TEGRA #include #endif +#ifdef CONFIG_TEGRA_MMC +#include +#endif #include #include #include "emc.h" @@ -221,3 +224,25 @@ int board_late_init(void) #endif return 0; } + +#if defined(CONFIG_TEGRA_MMC) +void __pin_mux_mmc(void) +{ +} + +void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc"))); + +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("%s called\n", __func__); + + /* Enable muxes, etc. for SDMMC controllers */ + pin_mux_mmc(); + + debug("%s: init MMC\n", __func__); + tegra_mmc_init(); + + return 0; +} +#endif diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index 93430edd3bd..312244139c7 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -27,19 +27,14 @@ #include #include #include -#include #include -#ifdef CONFIG_TEGRA_MMC -#include -#endif - #ifdef CONFIG_TEGRA_MMC /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) */ -static void pin_mux_mmc(void) +void pin_mux_mmc(void) { funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT); @@ -54,25 +49,6 @@ static void pin_mux_mmc(void) /* For CD GPIO PI5 */ pinmux_tristate_disable(PINGRP_ATC); } - -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - debug("board_mmc_init called\n"); - - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - - debug("board_mmc_init: init SD slot J26\n"); - /* init dev 0, SD slot J26, with 8-bit bus */ - tegra_mmc_init(0, 8, GPIO_PI6, GPIO_PH2); - - debug("board_mmc_init: init SD slot J5\n"); - /* init dev 2, SD slot J5, with 4-bit bus */ - tegra_mmc_init(2, 4, GPIO_PT3, GPIO_PI5); - - return 0; -} #endif void pin_mux_usb(void) diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 3e33da0afc3..e581fddf434 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -28,11 +28,7 @@ #include #include #include -#include #include -#ifdef CONFIG_TEGRA_MMC -#include -#endif /* TODO: Remove this code when the SPI switch is working */ #if !defined(CONFIG_SPI_UART_SWITCH) && (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) @@ -51,7 +47,7 @@ void gpio_early_init_uart(void) * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) */ -static void pin_mux_mmc(void) +void pin_mux_mmc(void) { funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT); @@ -61,25 +57,6 @@ static void pin_mux_mmc(void) /* For CD GPIO PI5 */ pinmux_tristate_disable(PINGRP_ATC); } - -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - debug("board_mmc_init called\n"); - - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - - debug("board_mmc_init: init eMMC\n"); - /* init dev 0, eMMC chip, with 8-bit bus */ - tegra_mmc_init(0, 8, -1, -1); - - debug("board_mmc_init: init SD slot\n"); - /* init dev 1, SD slot, with 4-bit bus */ - tegra_mmc_init(1, 4, GPIO_PI6, GPIO_PI5); - - return 0; -} #endif void pin_mux_usb(void) diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c index 592cd6b496d..f18aa277b3d 100644 --- a/board/nvidia/whistler/whistler.c +++ b/board/nvidia/whistler/whistler.c @@ -27,32 +27,19 @@ #include #include #include -#include #include #include -#ifdef CONFIG_TEGRA_MMC -#include -#endif - +#ifdef CONFIG_TEGRA_MMC /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) */ -static void pin_mux_mmc(void) -{ - funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT); - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT); -} - -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) +void pin_mux_mmc(void) { uchar val; int ret; - debug("board_mmc_init called\n"); - /* Turn on MAX8907B LDO12 to 2.8V for J40 power */ ret = i2c_set_bus_num(0); if (ret) @@ -70,17 +57,10 @@ int board_mmc_init(bd_t *bd) if (ret) printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret); - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - - /* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */ - tegra_mmc_init(0, 8, -1, -1); - - /* init dev 1 (SDMMC3), (J40 "SDIO3") with 8-bit bus */ - tegra_mmc_init(1, 8, -1, -1); - - return 0; + funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT); + funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT); } +#endif /* this is a weak define that we are overriding */ void pin_mux_usb(void) diff --git a/board/toradex/colibri_t20_iris/colibri_t20_iris.c b/board/toradex/colibri_t20_iris/colibri_t20_iris.c index e40a98609f4..aa76f65fdef 100644 --- a/board/toradex/colibri_t20_iris/colibri_t20_iris.c +++ b/board/toradex/colibri_t20_iris/colibri_t20_iris.c @@ -19,7 +19,6 @@ #include #include #include -#include #include "../colibri_t20-common/colibri_t20-common.h" @@ -34,13 +33,13 @@ void pin_mux_usb(void) #endif #ifdef CONFIG_TEGRA_MMC -int board_mmc_init(bd_t *bd) +/* + * Routine: pin_mux_mmc + * Description: setup the pin muxes/tristate values for the SDMMC(s) + */ +void pin_mux_mmc(void) { funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); pinmux_tristate_disable(PINGRP_GMB); - - tegra_mmc_init(0, 4, -1, GPIO_PC7); - - return 0; } #endif diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 72586193ca5..455a690b7ee 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -2,7 +2,7 @@ * (C) Copyright 2009 SAMSUNG Electronics * Minkyu Kang * Jaehoon Chung - * Portions Copyright 2011-2012 NVIDIA Corporation + * Portions Copyright 2011-2013 NVIDIA Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,6 +21,7 @@ #include #include +#include #include #include #include @@ -28,44 +29,14 @@ #include #include -/* support 4 mmc hosts */ -struct mmc mmc_dev[4]; -struct mmc_host mmc_host[4]; +DECLARE_GLOBAL_DATA_PTR; +struct mmc mmc_dev[MAX_HOSTS]; +struct mmc_host mmc_host[MAX_HOSTS]; -/** - * Get the host address and peripheral ID for a device. Devices are numbered - * from 0 to 3. - * - * @param host Structure to fill in (base, reg, mmc_id) - * @param dev_index Device index (0-3) - */ -static void tegra_get_setup(struct mmc_host *host, int dev_index) -{ - debug("tegra_get_setup: dev_index = %d\n", dev_index); - - switch (dev_index) { - case 1: - host->base = TEGRA_SDMMC3_BASE; - host->mmc_id = PERIPH_ID_SDMMC3; - break; - case 2: - host->base = TEGRA_SDMMC2_BASE; - host->mmc_id = PERIPH_ID_SDMMC2; - break; - case 3: - host->base = TEGRA_SDMMC1_BASE; - host->mmc_id = PERIPH_ID_SDMMC1; - break; - case 0: - default: - host->base = TEGRA_SDMMC4_BASE; - host->mmc_id = PERIPH_ID_SDMMC4; - break; - } - - host->reg = (struct tegra_mmc *)host->base; -} +#ifndef CONFIG_OF_CONTROL +#error "Please enable device tree support to use this driver" +#endif static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data, struct bounce_buffer *bbstate) @@ -518,41 +489,43 @@ int tegra_mmc_getcd(struct mmc *mmc) debug("tegra_mmc_getcd called\n"); - if (host->cd_gpio >= 0) - return !gpio_get_value(host->cd_gpio); + if (fdt_gpio_isvalid(&host->cd_gpio)) + return fdtdec_get_gpio(&host->cd_gpio); return 1; } -int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) +static int do_mmc_init(int dev_index) { struct mmc_host *host; char gpusage[12]; /* "SD/MMCn PWR" or "SD/MMCn CD" */ struct mmc *mmc; - debug(" tegra_mmc_init: index %d, bus width %d " - "pwr_gpio %d cd_gpio %d\n", - dev_index, bus_width, pwr_gpio, cd_gpio); - + /* DT should have been read & host config filled in */ host = &mmc_host[dev_index]; + if (!host->enabled) + return -1; - host->clock = 0; - host->pwr_gpio = pwr_gpio; - host->cd_gpio = cd_gpio; - tegra_get_setup(host, dev_index); + debug(" do_mmc_init: index %d, bus width %d " + "pwr_gpio %d cd_gpio %d\n", + dev_index, host->width, + host->pwr_gpio.gpio, host->cd_gpio.gpio); + host->clock = 0; clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 20000000); - if (host->pwr_gpio >= 0) { + if (fdt_gpio_isvalid(&host->pwr_gpio)) { sprintf(gpusage, "SD/MMC%d PWR", dev_index); - gpio_request(host->pwr_gpio, gpusage); - gpio_direction_output(host->pwr_gpio, 1); + gpio_request(host->pwr_gpio.gpio, gpusage); + gpio_direction_output(host->pwr_gpio.gpio, 1); + debug(" Power GPIO name = %s\n", host->pwr_gpio.name); } - if (host->cd_gpio >= 0) { + if (fdt_gpio_isvalid(&host->cd_gpio)) { sprintf(gpusage, "SD/MMC%d CD", dev_index); - gpio_request(host->cd_gpio, gpusage); - gpio_direction_input(host->cd_gpio); + gpio_request(host->cd_gpio.gpio, gpusage); + gpio_direction_input(host->cd_gpio.gpio); + debug(" CD GPIO name = %s\n", host->cd_gpio.name); } mmc = &mmc_dev[dev_index]; @@ -567,9 +540,9 @@ int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; mmc->host_caps = 0; - if (bus_width == 8) + if (host->width == 8) mmc->host_caps |= MMC_MODE_8BIT; - if (bus_width >= 4) + if (host->width >= 4) mmc->host_caps |= MMC_MODE_4BIT; mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC; @@ -578,8 +551,6 @@ int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) * low-speed SDIO card frequency (actually 400KHz) * max freq is highest HS eMMC clock as per the SD/MMC spec * (actually 52MHz) - * Both of these are the closest equivalents w/216MHz source - * clock and Tegra SDMMC divisors. */ mmc->f_min = 375000; mmc->f_max = 48000000; @@ -588,3 +559,95 @@ int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) return 0; } + +/** + * Get the host address and peripheral ID for a node. + * + * @param blob fdt blob + * @param node Device index (0-3) + * @param host Structure to fill in (reg, width, mmc_id) + */ +static int mmc_get_config(const void *blob, int node, struct mmc_host *host) +{ + debug("%s: node = %d\n", __func__, node); + + host->enabled = fdtdec_get_is_enabled(blob, node); + + host->reg = (struct tegra_mmc *)fdtdec_get_addr(blob, node, "reg"); + if ((fdt_addr_t)host->reg == FDT_ADDR_T_NONE) { + debug("%s: no sdmmc base reg info found\n", __func__); + return -FDT_ERR_NOTFOUND; + } + + host->mmc_id = clock_decode_periph_id(blob, node); + if (host->mmc_id == PERIPH_ID_NONE) { + debug("%s: could not decode periph id\n", __func__); + return -FDT_ERR_NOTFOUND; + } + + /* + * NOTE: mmc->bus_width is determined by mmc.c dynamically. + * TBD: Override it with this value? + */ + host->width = fdtdec_get_int(blob, node, "bus-width", 0); + if (!host->width) + debug("%s: no sdmmc width found\n", __func__); + + /* These GPIOs are optional */ + fdtdec_decode_gpio(blob, node, "cd-gpios", &host->cd_gpio); + fdtdec_decode_gpio(blob, node, "wp-gpios", &host->wp_gpio); + fdtdec_decode_gpio(blob, node, "power-gpios", &host->pwr_gpio); + + debug("%s: found controller at %p, width = %d, periph_id = %d\n", + __func__, host->reg, host->width, host->mmc_id); + return 0; +} + +/* + * Process a list of nodes, adding them to our list of SDMMC ports. + * + * @param blob fdt blob + * @param node_list list of nodes to process (any <=0 are ignored) + * @param count number of nodes to process + * @return 0 if ok, -1 on error + */ +static int process_nodes(const void *blob, int node_list[], int count) +{ + struct mmc_host *host; + int i, node; + + debug("%s: count = %d\n", __func__, count); + + /* build mmc_host[] for each controller */ + for (i = 0; i < count; i++) { + node = node_list[i]; + if (node <= 0) + continue; + + host = &mmc_host[i]; + host->id = i; + + if (mmc_get_config(blob, node, host)) { + printf("%s: failed to decode dev %d\n", __func__, i); + return -1; + } + do_mmc_init(i); + } + return 0; +} + +void tegra_mmc_init(void) +{ + int node_list[MAX_HOSTS], count; + const void *blob = gd->fdt_blob; + debug("%s entry\n", __func__); + + count = fdtdec_find_aliases_for_id(blob, "sdhci", + COMPAT_NVIDIA_TEGRA20_SDMMC, node_list, MAX_HOSTS); + debug("%s: count of sdhci nodes is %d\n", __func__, count); + + if (process_nodes(blob, node_list, count)) { + printf("%s: Error processing mmc node(s)!\n", __func__); + return; + } +} diff --git a/include/fdtdec.h b/include/fdtdec.h index c7a92d553ed..32730d2063c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -71,6 +71,7 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ + COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra SDMMC controller */ COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */ COMPAT_NVIDIA_TEGRA20_SLINK, /* Tegra 2 SPI SLINK controller */ COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 7c7fc833a60..000130f9324 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -46,6 +46,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"), COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"), + COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"), COMPAT(NVIDIA_TEGRA20_SFLASH, "nvidia,tegra20-sflash"), COMPAT(NVIDIA_TEGRA20_SLINK, "nvidia,tegra20-slink"), COMPAT(SMSC_LAN9215, "smsc,lan9215"), -- cgit v1.3.1 From bfcf46db6340f202ecfd200252f9e3295a392696 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Tue, 26 Feb 2013 12:18:48 +0000 Subject: Tegra: Remove unused CONFIG_SYS_CPU_OSC_FREQUENCY define This wasn't used anywhere in any Tegra build. Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- include/configs/tegra-common.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 4a656bb51bf..80c846ce9db 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */ -#ifndef __TEGRA_COMMON_H -#define __TEGRA_COMMON_H +#ifndef _TEGRA_COMMON_H_ +#define _TEGRA_COMMON_H_ #include #include @@ -56,10 +56,8 @@ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ /* - * PllX Configuration + * NS16550 Configuration */ -#define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */ - #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) -- cgit v1.3.1 From f4e4e0b0e3405785a5a4b46913a9476175adc12d Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Mon, 4 Mar 2013 14:07:18 -0700 Subject: Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- include/fdtdec.h | 3 ++- lib/fdtdec.c | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index 32730d2063c..21894835d1b 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -71,7 +71,8 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ - COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra SDMMC controller */ + COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */ + COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */ COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */ COMPAT_NVIDIA_TEGRA20_SLINK, /* Tegra 2 SPI SLINK controller */ COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 000130f9324..43f29f5c6b4 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -46,6 +46,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"), COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"), + COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"), COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"), COMPAT(NVIDIA_TEGRA20_SFLASH, "nvidia,tegra20-sflash"), COMPAT(NVIDIA_TEGRA20_SLINK, "nvidia,tegra20-slink"), -- cgit v1.3.1 From ca557b386d957a853e085259b4c501b7a0ee1ee2 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Tue, 26 Feb 2013 12:36:22 -0700 Subject: Tegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boards Tested on my Cardhu-A04 tablet, eMMC and SD-Card work fine, can load a kernel off of an SD card OK, card detect works, and the env is now stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20). Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- include/configs/cardhu.h | 20 +++++++++++++++++++- include/configs/tegra30-common.h | 3 +++ 2 files changed, 22 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 1616b397789..18c7eb82dd4 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -47,7 +47,25 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_CMD_I2C -#define CONFIG_ENV_IS_NOWHERE +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 /* SPI */ #define CONFIG_TEGRA_SLINK diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 04517e14092..bd1dfe8df94 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -86,4 +86,7 @@ /* Total I2C ports on Tegra30 */ #define TEGRA_I2C_NUM_CONTROLLERS 5 +/* Misc utility code */ +#define CONFIG_BOUNCE_BUFFER + #endif /* _TEGRA30_COMMON_H_ */ -- cgit v1.3.1 From a885f85214dcd358b29a2ffe69ab4f9b515b95e9 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 28 Feb 2013 15:03:45 +0000 Subject: ARM: tegra: make bounce buffer option common All Tegra devices will need CONFIG_BOUNCE_BUFFER. Move it to tegra-common.h to ensure it's always set. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra-common.h | 3 +++ include/configs/tegra20-common.h | 3 --- include/configs/tegra30-common.h | 3 --- 3 files changed, 3 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 80c846ce9db..080feb01feb 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -155,4 +155,7 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT +/* Misc utility code */ +#define CONFIG_BOUNCE_BUFFER + #endif /* _TEGRA_COMMON_H_ */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 33e5f524f16..dac8245864b 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -114,7 +114,4 @@ #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -/* Misc utility code */ -#define CONFIG_BOUNCE_BUFFER - #endif /* _TEGRA20_COMMON_H_ */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index bd1dfe8df94..04517e14092 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -86,7 +86,4 @@ /* Total I2C ports on Tegra30 */ #define TEGRA_I2C_NUM_CONTROLLERS 5 -/* Misc utility code */ -#define CONFIG_BOUNCE_BUFFER - #endif /* _TEGRA30_COMMON_H_ */ -- cgit v1.3.1 From 2c1af9dcdcf4ede8d153c0918beca9067ec0eb36 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 28 Feb 2013 15:03:46 +0000 Subject: disk: define HAVE_BLOCK_DEVICE in a common place This set of ifdefs is used in a number of places. Move its definition somewhere common so it doesn't have to be repeated. Signed-off-by: Stephen Warren Acked-by: Simon Glass Acked-by: Tom Rini Signed-off-by: Tom Warren --- disk/part.c | 10 ---------- disk/part_amiga.c | 6 +----- disk/part_dos.c | 7 +------ disk/part_efi.c | 8 +------- disk/part_iso.c | 7 +------ disk/part_mac.c | 7 +------ include/config_fallbacks.h | 10 ++++++++++ 7 files changed, 15 insertions(+), 40 deletions(-) (limited to 'include') diff --git a/disk/part.c b/disk/part.c index 58a45637aab..d73625c4434 100644 --- a/disk/part.c +++ b/disk/part.c @@ -35,16 +35,6 @@ #define PRINTF(fmt,args...) #endif -/* Rather than repeat this expression each time, add a define for it */ -#if (defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) ) -#define HAVE_BLOCK_DEVICE -#endif - struct block_drvr { char *name; block_dev_desc_t* (*get_dev)(int dev); diff --git a/disk/part_amiga.c b/disk/part_amiga.c index dc7d46256dd..0e6d82dbaed 100644 --- a/disk/part_amiga.c +++ b/disk/part_amiga.c @@ -26,11 +26,7 @@ #include #include "part_amiga.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef HAVE_BLOCK_DEVICE #undef AMIGA_DEBUG diff --git a/disk/part_dos.c b/disk/part_dos.c index 3fe901ba1bd..37087a6ac3b 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -35,12 +35,7 @@ #include #include "part_dos.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef HAVE_BLOCK_DEVICE /* Convert char[4] in little endian format to the host format integer */ diff --git a/disk/part_efi.c b/disk/part_efi.c index 76650173309..b3fd0e954d2 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -39,13 +39,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) - +#ifdef HAVE_BLOCK_DEVICE /** * efi_crc32() - EFI version of crc32 function * @buf: buffer to calculate crc32 of diff --git a/disk/part_iso.c b/disk/part_iso.c index 4401790af2f..49639af2690 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -25,12 +25,7 @@ #include #include "part_iso.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef HAVE_BLOCK_DEVICE /* #define ISO_PART_DEBUG */ diff --git a/disk/part_mac.c b/disk/part_mac.c index cb443ac532b..74dc12fe58a 100644 --- a/disk/part_mac.c +++ b/disk/part_mac.c @@ -34,12 +34,7 @@ #include #include "part_mac.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef HAVE_BLOCK_DEVICE /* stdlib.h causes some compatibility problems; should fixe these! -- wd */ #ifndef __ldiv_t_defined diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index bfb9680d683..653ff2b3884 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -26,4 +26,14 @@ #define CONFIG_EXT4_WRITE #endif +/* Rather than repeat this expression each time, add a define for it */ +#if defined(CONFIG_CMD_IDE) || \ + defined(CONFIG_CMD_SATA) || \ + defined(CONFIG_CMD_SCSI) || \ + defined(CONFIG_CMD_USB) || \ + defined(CONFIG_MMC) || \ + defined(CONFIG_SYSTEMACE) +#define HAVE_BLOCK_DEVICE +#endif + #endif /* __CONFIG_FALLBACKS_H */ -- cgit v1.3.1 From 4123c4ea23cd8b9f3313bccb6c2add87b06412a3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 28 Feb 2013 15:03:47 +0000 Subject: disk: define HAVE_BLOCK_DEVICE if CONFIG_CMD_PART Various code that is conditional upon HAVE_BLOCK_DEVICE is required by code conditional upon CONFIG_CMD_PART. So, enable HAVE_BLOCK_DEVICE if CONFIG_CMD_PART is enabled. Signed-off-by: Stephen Warren Acked-by: Simon Glass Acked-by: Tom Rini Signed-off-by: Tom Warren --- include/config_fallbacks.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 653ff2b3884..9298d0ee970 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -31,6 +31,7 @@ defined(CONFIG_CMD_SATA) || \ defined(CONFIG_CMD_SCSI) || \ defined(CONFIG_CMD_USB) || \ + defined(CONFIG_CMD_PART) || \ defined(CONFIG_MMC) || \ defined(CONFIG_SYSTEMACE) #define HAVE_BLOCK_DEVICE -- cgit v1.3.1 From 11d9c0303949c2e9c2a176f81c0d7355c76bb546 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 28 Feb 2013 15:03:48 +0000 Subject: ARM: tegra: enable a common set of disk-related commands everywhere Enable a common set of partition types, filesystems, and related commands in tegra-common.h, so that they are available on all Tegra boards. This allows boot.scr (loaded and executed by the default built-in environment) on those boards to assume that certain features are always available. Do this in tegra-common.h, so that individual board files can undefine the features if they really don't want any of them. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/cardhu.h | 8 -------- include/configs/colibri_t20_iris.h | 6 ------ include/configs/harmony.h | 8 -------- include/configs/medcom-wide.h | 5 ----- include/configs/paz00.h | 8 -------- include/configs/plutux.h | 5 ----- include/configs/seaboard.h | 8 -------- include/configs/tec.h | 5 ----- include/configs/tegra-common.h | 12 ++++++++++++ include/configs/tegra20-common.h | 3 --- include/configs/trimslice.h | 8 -------- include/configs/ventana.h | 8 -------- include/configs/whistler.h | 8 -------- 13 files changed, 12 insertions(+), 80 deletions(-) (limited to 'include') diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 18c7eb82dd4..55dc83da6a1 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -53,14 +53,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_FS_EXT4 -#define CONFIG_FS_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE) diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h index 0e5f281b254..856c860cda6 100644 --- a/include/configs/colibri_t20_iris.h +++ b/include/configs/colibri_t20_iris.h @@ -40,12 +40,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -/* File system support */ -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT - /* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 8d1fd47afe7..0c73f86ec15 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -56,14 +56,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_FS_EXT4 -#define CONFIG_FS_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC - /* NAND support */ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index bae4ba0bb53..57a50d730c6 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -66,11 +66,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT - #define CONFIG_FIT #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 2edb4aaba95..eac1ef9e021 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -44,14 +44,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_FS_EXT4 -#define CONFIG_FS_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET ((1024 * 1024) - CONFIG_ENV_SIZE) diff --git a/include/configs/plutux.h b/include/configs/plutux.h index deee2378790..4cfe88a5e72 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -65,11 +65,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT - #define CONFIG_FIT #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index de0c777819b..f66173e0f23 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -70,14 +70,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_FS_EXT4 -#define CONFIG_FS_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE) diff --git a/include/configs/tec.h b/include/configs/tec.h index caeb9cd8a85..f90f5c7526e 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -73,11 +73,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT - #define CONFIG_FIT #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 080feb01feb..4cc35e5a887 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -88,6 +88,18 @@ #define CONFIG_COMMAND_HISTORY #define CONFIG_AUTO_COMPLETE +/* turn on commonly used storage-related commands */ + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_CMD_PART + #define CONFIG_SYS_NO_FLASH #define CONFIG_CONSOLE_MUX diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index dac8245864b..311680e9e19 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -108,9 +108,6 @@ /* Total I2C ports on Tegra20 */ #define TEGRA_I2C_NUM_CONTROLLERS 4 -#define CONFIG_PARTITION_UUIDS -#define CONFIG_CMD_PART - #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 334d3a3b8b8..0644f7a5b8f 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -67,14 +67,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_FS_EXT4 -#define CONFIG_FS_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC - /* Environment in SPI */ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_MAX_HZ 48000000 diff --git a/include/configs/ventana.h b/include/configs/ventana.h index b55ebc9bfc0..5755f11714f 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -50,14 +50,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_FS_EXT4 -#define CONFIG_FS_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET ((1024 * 1024) - CONFIG_ENV_SIZE) diff --git a/include/configs/whistler.h b/include/configs/whistler.h index 1e554d81647..9542c7e2131 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -59,14 +59,6 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_FS_EXT4 -#define CONFIG_FS_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC - /* * Environment in eMMC, at the end of 2nd "boot sector". Note: This assumes * the user plugged the standard 8MB MoviNAND card into J29/HSMMC/POP. If -- cgit v1.3.1