From 7196ce7ab79684166b4490c2959a142e5cfd7bbc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 25 Jan 2019 12:03:31 -0500 Subject: configs: Migrate CONFIG_DFU_MMC again A few platforms recently added in CONFIG_DFU_MMC under include/configs rather than via the defconfig, update them. Signed-off-by: Tom Rini --- include/configs/apalis_imx6.h | 4 ---- include/configs/colibri_imx6.h | 4 ---- 2 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 135b3c9584d..ba4e96da505 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -83,10 +83,6 @@ #define CONFIG_USBD_HS #define CONFIG_USB_GADGET_MASS_STORAGE -/* USB DFU */ -#define CONFIG_DFU_MMC - -/* Miscellaneous commands */ /* Framebuffer and LCD */ #define CONFIG_VIDEO_IPUV3 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 7eb87cada6f..2d40ceb24e9 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -71,10 +71,6 @@ #define CONFIG_USBD_HS #define CONFIG_USB_GADGET_MASS_STORAGE -/* USB DFU */ -#define CONFIG_DFU_MMC - -/* Miscellaneous commands */ /* Framebuffer and LCD */ #define CONFIG_VIDEO_IPUV3 -- cgit v1.3.1 From 8eef803a276c4b586ba5ad82e13485809934ffed Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 17 Jan 2019 12:09:50 +0800 Subject: poplar: sync up device tree with kernel 4.20 It adds missing pinctrl headers, updates clock header and sync up Poplar device tree with kernel 4.20 release. Signed-off-by: Shawn Guo --- arch/arm/dts/hi3798cv200-poplar.dts | 68 ++++++++-- arch/arm/dts/hi3798cv200.dtsi | 221 +++++++++++++++++++++++++++++++- arch/arm/dts/poplar-pinctrl.dtsi | 98 ++++++++++++++ include/dt-bindings/clock/histb-clock.h | 56 +++++--- include/dt-bindings/pinctrl/hisi.h | 74 +++++++++++ 5 files changed, 482 insertions(+), 35 deletions(-) create mode 100644 arch/arm/dts/poplar-pinctrl.dtsi create mode 100644 include/dt-bindings/pinctrl/hisi.h (limited to 'include') diff --git a/arch/arm/dts/hi3798cv200-poplar.dts b/arch/arm/dts/hi3798cv200-poplar.dts index 964326eae89..d30f6eb8a5e 100644 --- a/arch/arm/dts/hi3798cv200-poplar.dts +++ b/arch/arm/dts/hi3798cv200-poplar.dts @@ -1,14 +1,17 @@ -// SPDX-License-Identifier: GPL-2.0 /* * DTS File for HiSilicon Poplar Development Board * * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. + * + * Released under the GPLv2 only. + * SPDX-License-Identifier: GPL-2.0 */ /dts-v1/; #include #include "hi3798cv200.dtsi" +#include "poplar-pinctrl.dtsi" / { model = "HiSilicon Poplar Development Board"; @@ -59,6 +62,33 @@ default-state = "off"; }; }; + + reg_pcie: regulator-pcie { + compatible = "regulator-fixed"; + regulator-name = "3V3_PCIE0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio6 7 0>; + enable-active-high; + }; +}; + +&ehci { + status = "okay"; +}; + +&emmc { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins_1 &emmc_pins_2 + &emmc_pins_3 &emmc_pins_4>; + fifo-depth = <256>; + clock-frequency = <200000000>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + bus-width = <8>; + status = "okay"; }; &gmac1 { @@ -76,17 +106,17 @@ &gpio1 { status = "okay"; - gpio-line-names = "LS-GPIO-E", "", + gpio-line-names = "GPIO-E", "", "", "", - "", "LS-GPIO-F", - "", "LS-GPIO-J"; + "", "GPIO-F", + "", "GPIO-J"; }; &gpio2 { status = "okay"; - gpio-line-names = "LS-GPIO-H", "LS-GPIO-I", - "LS-GPIO-L", "LS-GPIO-G", - "LS-GPIO-K", "", + gpio-line-names = "GPIO-H", "GPIO-I", + "GPIO-L", "GPIO-G", + "GPIO-K", "", "", ""; }; @@ -94,15 +124,15 @@ status = "okay"; gpio-line-names = "", "", "", "", - "LS-GPIO-C", "", - "", "LS-GPIO-B"; + "GPIO-C", "", + "", "GPIO-B"; }; &gpio4 { status = "okay"; gpio-line-names = "", "", "", "", - "", "LS-GPIO-D", + "", "GPIO-D", "", ""; }; @@ -110,7 +140,7 @@ status = "okay"; gpio-line-names = "", "USER-LED-1", "USER-LED-2", "", - "", "LS-GPIO-A", + "", "GPIO-A", "", ""; }; @@ -144,6 +174,22 @@ status = "okay"; }; +&ohci { + status = "okay"; +}; + +&pcie { + reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; + vpcie-supply = <®_pcie>; + status = "okay"; +}; + +&sd0 { + bus-width = <4>; + cap-sd-highspeed; + status = "okay"; +}; + &spi0 { status = "okay"; label = "LS-SPI0"; diff --git a/arch/arm/dts/hi3798cv200.dtsi b/arch/arm/dts/hi3798cv200.dtsi index 8b9c5ad05a1..7c0fddd7c8c 100644 --- a/arch/arm/dts/hi3798cv200.dtsi +++ b/arch/arm/dts/hi3798cv200.dtsi @@ -1,12 +1,16 @@ -// SPDX-License-Identifier: GPL-2.0 /* * DTS File for HiSilicon Hi3798cv200 SoC. * * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. + * + * Released under the GPLv2 only. + * SPDX-License-Identifier: GPL-2.0 */ #include +#include #include +#include #include / { @@ -104,6 +108,113 @@ #reset-cells = <2>; }; + perictrl: peripheral-controller@8a20000 { + compatible = "hisilicon,hi3798cv200-perictrl", "syscon", + "simple-mfd"; + reg = <0x8a20000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x8a20000 0x1000>; + + usb2_phy1: usb2-phy@120 { + compatible = "hisilicon,hi3798cv200-usb2-phy"; + reg = <0x120 0x4>; + clocks = <&crg HISTB_USB2_PHY1_REF_CLK>; + resets = <&crg 0xbc 4>; + #address-cells = <1>; + #size-cells = <0>; + + usb2_phy1_port0: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&crg 0xbc 8>; + }; + + usb2_phy1_port1: phy@1 { + reg = <1>; + #phy-cells = <0>; + resets = <&crg 0xbc 9>; + }; + }; + + usb2_phy2: usb2-phy@124 { + compatible = "hisilicon,hi3798cv200-usb2-phy"; + reg = <0x124 0x4>; + clocks = <&crg HISTB_USB2_PHY2_REF_CLK>; + resets = <&crg 0xbc 6>; + #address-cells = <1>; + #size-cells = <0>; + + usb2_phy2_port0: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&crg 0xbc 10>; + }; + }; + + combphy0: phy@850 { + compatible = "hisilicon,hi3798cv200-combphy"; + reg = <0x850 0x8>; + #phy-cells = <1>; + clocks = <&crg HISTB_COMBPHY0_CLK>; + resets = <&crg 0x188 4>; + assigned-clocks = <&crg HISTB_COMBPHY0_CLK>; + assigned-clock-rates = <100000000>; + hisilicon,fixed-mode = ; + }; + + combphy1: phy@858 { + compatible = "hisilicon,hi3798cv200-combphy"; + reg = <0x858 0x8>; + #phy-cells = <1>; + clocks = <&crg HISTB_COMBPHY1_CLK>; + resets = <&crg 0x188 12>; + assigned-clocks = <&crg HISTB_COMBPHY1_CLK>; + assigned-clock-rates = <100000000>; + hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>; + }; + }; + + pmx0: pinconf@8a21000 { + compatible = "pinconf-single"; + reg = <0x8a21000 0x180>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <7>; + pinctrl-single,gpio-range = < + &range 0 8 2 /* GPIO 0 */ + &range 8 1 0 /* GPIO 1 */ + &range 9 4 2 + &range 13 1 0 + &range 14 1 1 + &range 15 1 0 + &range 16 5 0 /* GPIO 2 */ + &range 21 3 1 + &range 24 4 1 /* GPIO 3 */ + &range 28 2 2 + &range 86 1 1 + &range 87 1 0 + &range 30 4 2 /* GPIO 4 */ + &range 34 3 0 + &range 37 1 2 + &range 38 3 2 /* GPIO 6 */ + &range 41 5 0 + &range 46 8 1 /* GPIO 7 */ + &range 54 8 1 /* GPIO 8 */ + &range 64 7 1 /* GPIO 9 */ + &range 71 1 0 + &range 72 6 1 /* GPIO 10 */ + &range 78 1 0 + &range 79 1 1 + &range 80 6 1 /* GPIO 11 */ + &range 70 2 1 + &range 88 8 0 /* GPIO 12 */ + >; + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + }; + uart0: serial@8b00000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x8b00000 0x1000>; @@ -190,13 +301,30 @@ status = "disabled"; }; - emmc: mmc@9830000 { + sd0: mmc@9820000 { compatible = "snps,dw-mshc"; + reg = <0x9820000 0x10000>; + interrupts = ; + clocks = <&crg HISTB_SDIO0_CIU_CLK>, + <&crg HISTB_SDIO0_BIU_CLK>; + clock-names = "ciu", "biu"; + resets = <&crg 0x9c 4>; + reset-names = "reset"; + status = "disabled"; + }; + + emmc: mmc@9830000 { + compatible = "hisilicon,hi3798cv200-dw-mshc"; reg = <0x9830000 0x10000>; interrupts = ; clocks = <&crg HISTB_MMC_CIU_CLK>, - <&crg HISTB_MMC_BIU_CLK>; - clock-names = "ciu", "biu"; + <&crg HISTB_MMC_BIU_CLK>, + <&crg HISTB_MMC_SAMPLE_CLK>, + <&crg HISTB_MMC_DRV_CLK>; + clock-names = "ciu", "biu", "ciu-sample", "ciu-drive"; + resets = <&crg 0xa0 4>; + reset-names = "reset"; + status = "disabled"; }; gpio0: gpio@8b20000 { @@ -207,6 +335,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 0 8>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -220,6 +349,13 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = < + &pmx0 0 8 1 + &pmx0 1 9 4 + &pmx0 5 13 1 + &pmx0 6 14 1 + &pmx0 7 15 1 + >; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -233,6 +369,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 16 5 &pmx0 5 21 3>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -246,6 +383,12 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = < + &pmx0 0 24 4 + &pmx0 4 28 2 + &pmx0 6 86 1 + &pmx0 7 87 1 + >; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -259,6 +402,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 30 4 &pmx0 4 34 3 &pmx0 7 37 1>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -285,6 +429,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 38 3 &pmx0 0 41 5>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -298,6 +443,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 46 8>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -311,6 +457,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 54 8>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -324,6 +471,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 64 7 &pmx0 71 1>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -337,6 +485,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 72 6 &pmx0 6 78 1 &pmx0 7 79 1>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -350,6 +499,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 80 6 &pmx0 6 70 2>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -363,6 +513,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx0 0 88 8>; clocks = <&crg HISTB_APB_CLK>; clock-names = "apb_pclk"; status = "disabled"; @@ -405,5 +556,67 @@ clocks = <&sysctrl HISTB_IR_CLK>; status = "disabled"; }; + + pcie: pcie@9860000 { + compatible = "hisilicon,hi3798cv200-pcie"; + reg = <0x9860000 0x1000>, + <0x0 0x2000>, + <0x2000000 0x01000000>; + reg-names = "control", "rc-dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0 15>; + num-lanes = <1>; + ranges = <0x81000000 0x0 0x00000000 0x4f00000 0x0 0x100000 + 0x82000000 0x0 0x3000000 0x3000000 0x0 0x01f00000>; + interrupts = ; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&crg HISTB_PCIE_AUX_CLK>, + <&crg HISTB_PCIE_PIPE_CLK>, + <&crg HISTB_PCIE_SYS_CLK>, + <&crg HISTB_PCIE_BUS_CLK>; + clock-names = "aux", "pipe", "sys", "bus"; + resets = <&crg 0x18c 6>, <&crg 0x18c 5>, <&crg 0x18c 4>; + reset-names = "soft", "sys", "bus"; + phys = <&combphy1 PHY_TYPE_PCIE>; + phy-names = "phy"; + status = "disabled"; + }; + + ohci: ohci@9880000 { + compatible = "generic-ohci"; + reg = <0x9880000 0x10000>; + interrupts = ; + clocks = <&crg HISTB_USB2_BUS_CLK>, + <&crg HISTB_USB2_12M_CLK>, + <&crg HISTB_USB2_48M_CLK>; + clock-names = "bus", "clk12", "clk48"; + resets = <&crg 0xb8 12>; + reset-names = "bus"; + phys = <&usb2_phy1_port0>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci: ehci@9890000 { + compatible = "generic-ehci"; + reg = <0x9890000 0x10000>; + interrupts = ; + clocks = <&crg HISTB_USB2_BUS_CLK>, + <&crg HISTB_USB2_PHY_CLK>, + <&crg HISTB_USB2_UTMI_CLK>; + clock-names = "bus", "phy", "utmi"; + resets = <&crg 0xb8 12>, + <&crg 0xb8 16>, + <&crg 0xb8 13>; + reset-names = "bus", "phy", "utmi"; + phys = <&usb2_phy1_port0>; + phy-names = "usb"; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/poplar-pinctrl.dtsi b/arch/arm/dts/poplar-pinctrl.dtsi new file mode 100644 index 00000000000..7bb19e4b084 --- /dev/null +++ b/arch/arm/dts/poplar-pinctrl.dtsi @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Pinctrl dts file for HiSilicon Poplar board + * + * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd. + */ + +#include + +/* value, enable bits, disable bits, mask */ +#define PINCTRL_PULLDOWN(value, enable, disable, mask) \ + (value << 13) (enable << 13) (disable << 13) (mask << 13) +#define PINCTRL_PULLUP(value, enable, disable, mask) \ + (value << 12) (enable << 12) (disable << 12) (mask << 12) +#define PINCTRL_SLEW_RATE(value, mask) (value << 8) (mask << 8) +#define PINCTRL_DRV_STRENGTH(value, mask) (value << 4) (mask << 4) + +&pmx0 { + emmc_pins_1: emmc-pins-1 { + pinctrl-single,pins = < + 0x000 MUX_M2 + 0x004 MUX_M2 + 0x008 MUX_M2 + 0x00c MUX_M2 + 0x010 MUX_M2 + 0x014 MUX_M2 + 0x018 MUX_M2 + 0x01c MUX_M2 + 0x024 MUX_M2 + >; + pinctrl-single,bias-pulldown = < + PINCTRL_PULLDOWN(0, 1, 0, 1) + >; + pinctrl-single,bias-pullup = < + PINCTRL_PULLUP(0, 1, 0, 1) + >; + pinctrl-single,slew-rate = < + PINCTRL_SLEW_RATE(1, 1) + >; + pinctrl-single,drive-strength = < + PINCTRL_DRV_STRENGTH(0xb, 0xf) + >; + }; + + emmc_pins_2: emmc-pins-2 { + pinctrl-single,pins = < + 0x028 MUX_M2 + >; + pinctrl-single,bias-pulldown = < + PINCTRL_PULLDOWN(0, 1, 0, 1) + >; + pinctrl-single,bias-pullup = < + PINCTRL_PULLUP(0, 1, 0, 1) + >; + pinctrl-single,slew-rate = < + PINCTRL_SLEW_RATE(1, 1) + >; + pinctrl-single,drive-strength = < + PINCTRL_DRV_STRENGTH(0x9, 0xf) + >; + }; + + emmc_pins_3: emmc-pins-3 { + pinctrl-single,pins = < + 0x02c MUX_M2 + >; + pinctrl-single,bias-pulldown = < + PINCTRL_PULLDOWN(0, 1, 0, 1) + >; + pinctrl-single,bias-pullup = < + PINCTRL_PULLUP(0, 1, 0, 1) + >; + pinctrl-single,slew-rate = < + PINCTRL_SLEW_RATE(1, 1) + >; + pinctrl-single,drive-strength = < + PINCTRL_DRV_STRENGTH(3, 3) + >; + }; + + emmc_pins_4: emmc-pins-4 { + pinctrl-single,pins = < + 0x030 MUX_M2 + >; + pinctrl-single,bias-pulldown = < + PINCTRL_PULLDOWN(1, 1, 0, 1) + >; + pinctrl-single,bias-pullup = < + PINCTRL_PULLUP(0, 1, 0, 1) + >; + pinctrl-single,slew-rate = < + PINCTRL_SLEW_RATE(1, 1) + >; + pinctrl-single,drive-strength = < + PINCTRL_DRV_STRENGTH(3, 3) + >; + }; +}; diff --git a/include/dt-bindings/clock/histb-clock.h b/include/dt-bindings/clock/histb-clock.h index 181c0f070f7..136de24733b 100644 --- a/include/dt-bindings/clock/histb-clock.h +++ b/include/dt-bindings/clock/histb-clock.h @@ -22,18 +22,18 @@ #define HISTB_OSC_CLK 0 #define HISTB_APB_CLK 1 #define HISTB_AHB_CLK 2 -#define HISTB_UART1_CLK 3 -#define HISTB_UART2_CLK 4 -#define HISTB_UART3_CLK 5 -#define HISTB_I2C0_CLK 6 -#define HISTB_I2C1_CLK 7 -#define HISTB_I2C2_CLK 8 -#define HISTB_I2C3_CLK 9 -#define HISTB_I2C4_CLK 10 -#define HISTB_I2C5_CLK 11 -#define HISTB_SPI0_CLK 12 -#define HISTB_SPI1_CLK 13 -#define HISTB_SPI2_CLK 14 +#define HISTB_UART1_CLK 3 +#define HISTB_UART2_CLK 4 +#define HISTB_UART3_CLK 5 +#define HISTB_I2C0_CLK 6 +#define HISTB_I2C1_CLK 7 +#define HISTB_I2C2_CLK 8 +#define HISTB_I2C3_CLK 9 +#define HISTB_I2C4_CLK 10 +#define HISTB_I2C5_CLK 11 +#define HISTB_SPI0_CLK 12 +#define HISTB_SPI1_CLK 13 +#define HISTB_SPI2_CLK 14 #define HISTB_SCI_CLK 15 #define HISTB_FMC_CLK 16 #define HISTB_MMC_BIU_CLK 17 @@ -43,7 +43,7 @@ #define HISTB_SDIO0_BIU_CLK 21 #define HISTB_SDIO0_CIU_CLK 22 #define HISTB_SDIO0_DRV_CLK 23 -#define HISTB_SDIO0_SAMPLE_CLK 24 +#define HISTB_SDIO0_SAMPLE_CLK 24 #define HISTB_PCIE_AUX_CLK 25 #define HISTB_PCIE_PIPE_CLK 26 #define HISTB_PCIE_SYS_CLK 27 @@ -53,14 +53,30 @@ #define HISTB_ETH1_MAC_CLK 31 #define HISTB_ETH1_MACIF_CLK 32 #define HISTB_COMBPHY1_CLK 33 - +#define HISTB_USB2_BUS_CLK 34 +#define HISTB_USB2_PHY_CLK 35 +#define HISTB_USB2_UTMI_CLK 36 +#define HISTB_USB2_12M_CLK 37 +#define HISTB_USB2_48M_CLK 38 +#define HISTB_USB2_OTG_UTMI_CLK 39 +#define HISTB_USB2_PHY1_REF_CLK 40 +#define HISTB_USB2_PHY2_REF_CLK 41 +#define HISTB_COMBPHY0_CLK 42 +#define HISTB_USB3_BUS_CLK 43 +#define HISTB_USB3_UTMI_CLK 44 +#define HISTB_USB3_PIPE_CLK 45 +#define HISTB_USB3_SUSPEND_CLK 46 +#define HISTB_USB3_BUS_CLK1 47 +#define HISTB_USB3_UTMI_CLK1 48 +#define HISTB_USB3_PIPE_CLK1 49 +#define HISTB_USB3_SUSPEND_CLK1 50 /* clocks provided by mcu CRG */ -#define HISTB_MCE_CLK 1 -#define HISTB_IR_CLK 2 -#define HISTB_TIMER01_CLK 3 -#define HISTB_LEDC_CLK 4 -#define HISTB_UART0_CLK 5 -#define HISTB_LSADC_CLK 6 +#define HISTB_MCE_CLK 1 +#define HISTB_IR_CLK 2 +#define HISTB_TIMER01_CLK 3 +#define HISTB_LEDC_CLK 4 +#define HISTB_UART0_CLK 5 +#define HISTB_LSADC_CLK 6 #endif /* __DTS_HISTB_CLOCK_H */ diff --git a/include/dt-bindings/pinctrl/hisi.h b/include/dt-bindings/pinctrl/hisi.h new file mode 100644 index 00000000000..0359bfdc911 --- /dev/null +++ b/include/dt-bindings/pinctrl/hisi.h @@ -0,0 +1,74 @@ +/* + * This header provides constants for hisilicon pinctrl bindings. + * + * Copyright (c) 2015 Hisilicon Limited. + * Copyright (c) 2015 Linaro Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_PINCTRL_HISI_H +#define _DT_BINDINGS_PINCTRL_HISI_H + +/* iomg bit definition */ +#define MUX_M0 0 +#define MUX_M1 1 +#define MUX_M2 2 +#define MUX_M3 3 +#define MUX_M4 4 +#define MUX_M5 5 +#define MUX_M6 6 +#define MUX_M7 7 + +/* iocg bit definition */ +#define PULL_MASK (3) +#define PULL_DIS (0) +#define PULL_UP (1 << 0) +#define PULL_DOWN (1 << 1) + +/* drive strength definition */ +#define DRIVE_MASK (7 << 4) +#define DRIVE1_02MA (0 << 4) +#define DRIVE1_04MA (1 << 4) +#define DRIVE1_08MA (2 << 4) +#define DRIVE1_10MA (3 << 4) +#define DRIVE2_02MA (0 << 4) +#define DRIVE2_04MA (1 << 4) +#define DRIVE2_08MA (2 << 4) +#define DRIVE2_10MA (3 << 4) +#define DRIVE3_04MA (0 << 4) +#define DRIVE3_08MA (1 << 4) +#define DRIVE3_12MA (2 << 4) +#define DRIVE3_16MA (3 << 4) +#define DRIVE3_20MA (4 << 4) +#define DRIVE3_24MA (5 << 4) +#define DRIVE3_32MA (6 << 4) +#define DRIVE3_40MA (7 << 4) +#define DRIVE4_02MA (0 << 4) +#define DRIVE4_04MA (2 << 4) +#define DRIVE4_08MA (4 << 4) +#define DRIVE4_10MA (6 << 4) + +/* drive strength definition for hi3660 */ +#define DRIVE6_MASK (15 << 4) +#define DRIVE6_04MA (0 << 4) +#define DRIVE6_12MA (4 << 4) +#define DRIVE6_19MA (8 << 4) +#define DRIVE6_27MA (10 << 4) +#define DRIVE6_32MA (15 << 4) +#define DRIVE7_02MA (0 << 4) +#define DRIVE7_04MA (1 << 4) +#define DRIVE7_06MA (2 << 4) +#define DRIVE7_08MA (3 << 4) +#define DRIVE7_10MA (4 << 4) +#define DRIVE7_12MA (5 << 4) +#define DRIVE7_14MA (6 << 4) +#define DRIVE7_16MA (7 << 4) +#endif -- cgit v1.3.1 From 6536ca4d6676bf38e50784298e713edc30b9cde9 Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Thu, 17 Jan 2019 13:43:02 -0600 Subject: spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT to allow for cleaner use in code. Signed-off-by: Andrew F. Davis Reviewed-by: Tom Rini Acked-by: Lukasz Majewski --- arch/arm/mach-omap2/boot-common.c | 2 +- arch/arm/mach-zynqmp/spl.c | 2 +- common/Makefile | 4 ++-- common/spl/Kconfig | 6 +++--- common/spl/Makefile | 2 +- common/spl/spl_ram.c | 4 ++-- drivers/Makefile | 2 +- drivers/usb/gadget/Makefile | 2 +- include/configs/dra7xx_evm.h | 2 +- include/configs/xilinx_zynqmp.h | 4 ++-- 10 files changed, 15 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index 176d4f67cbb..2db19227b92 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -108,7 +108,7 @@ void save_omap_boot_params(void) sys_boot_device = 1; break; #endif -#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU_SUPPORT) +#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU) case BOOT_DEVICE_DFU: sys_boot_device = 1; break; diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index 01f31d0f0ed..fb3955c93fd 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -93,7 +93,7 @@ u32 spl_boot_device(void) case EMMC_MODE: return BOOT_DEVICE_MMC1; #endif -#ifdef CONFIG_SPL_DFU_SUPPORT +#ifdef CONFIG_SPL_DFU case USB_MODE: return BOOT_DEVICE_DFU; #endif diff --git a/common/Makefile b/common/Makefile index 0de60b3ced2..37110165055 100644 --- a/common/Makefile +++ b/common/Makefile @@ -64,10 +64,10 @@ obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o obj-$(CONFIG_$(SPL_TPL_)BLOBLIST) += bloblist.o ifdef CONFIG_SPL_BUILD -ifdef CONFIG_SPL_DFU_SUPPORT +ifdef CONFIG_SPL_DFU obj-$(CONFIG_DFU_OVER_USB) += dfu.o endif -obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o +obj-$(CONFIG_SPL_DFU) += cli_hush.o obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o obj-$(CONFIG_TPL_HASH_SUPPORT) += hash.o obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o diff --git a/common/spl/Kconfig b/common/spl/Kconfig index d175bb6cffe..aa24b6653ff 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -794,7 +794,7 @@ config SPL_USB_ETHER since the network stack uses a number of environment variables. See also SPL_NET_SUPPORT and SPL_ETH_SUPPORT. -config SPL_DFU_SUPPORT +config SPL_DFU bool "Support DFU (Device Firmware Upgrade)" select SPL_HASH_SUPPORT select SPL_DFU_NO_RESET @@ -809,11 +809,11 @@ config SPL_DFU_SUPPORT choice bool "DFU device selection" - depends on SPL_DFU_SUPPORT + depends on SPL_DFU config SPL_DFU_RAM bool "RAM device" - depends on SPL_DFU_SUPPORT && SPL_RAM_SUPPORT + depends on SPL_DFU && SPL_RAM_SUPPORT help select RAM/DDR memory device for loading binary images (u-boot/kernel) to the selected device partition using diff --git a/common/spl/Makefile b/common/spl/Makefile index a130a5be4b0..6f8d7599ae1 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -26,7 +26,7 @@ obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o obj-$(CONFIG_$(SPL_TPL_)SATA_SUPPORT) += spl_sata.o -obj-$(CONFIG_$(SPL_TPL_)DFU_SUPPORT) += spl_dfu.o +obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o obj-$(CONFIG_$(SPL_TPL_)USB_SDP_SUPPORT) += spl_sdp.o diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c index 5fcc3b1504b..954e91a0045 100644 --- a/common/spl/spl_ram.c +++ b/common/spl/spl_ram.c @@ -35,7 +35,7 @@ static int spl_ram_load_image(struct spl_image_info *spl_image, header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS; -#if CONFIG_IS_ENABLED(DFU_SUPPORT) +#if CONFIG_IS_ENABLED(DFU) if (bootdev->boot_device == BOOT_DEVICE_DFU) spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0"); #endif @@ -76,7 +76,7 @@ static int spl_ram_load_image(struct spl_image_info *spl_image, #if CONFIG_IS_ENABLED(RAM_DEVICE) SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image); #endif -#if CONFIG_IS_ENABLED(DFU_SUPPORT) +#if CONFIG_IS_ENABLED(DFU) SPL_LOAD_IMAGE_METHOD("DFU", 0, BOOT_DEVICE_DFU, spl_ram_load_image); #endif diff --git a/drivers/Makefile b/drivers/Makefile index 4105864e2b6..14543c7d6c9 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -50,7 +50,7 @@ obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/ obj-$(CONFIG_SPL_USB_GADGET) += usb/common/ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/ -obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu/ +obj-$(CONFIG_SPL_DFU) += dfu/ obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/ obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 01e2b3abf29..70f3bf43e7e 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -8,7 +8,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_USB_GADGET) += g_dnl.o -obj-$(CONFIG_SPL_DFU_SUPPORT) += f_dfu.o +obj-$(CONFIG_SPL_DFU) += f_dfu.o obj-$(CONFIG_SPL_USB_SDP_SUPPORT) += f_sdp.o endif diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 2d8758db754..f36a9c3e08c 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -53,7 +53,7 @@ #ifdef CONFIG_SPL_BUILD #undef CONFIG_CMD_BOOTD -#ifdef CONFIG_SPL_DFU_SUPPORT +#ifdef CONFIG_SPL_DFU #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 #define DFUARGS \ "dfu_bufsiz=0x10000\0" \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 0ab32611cee..7a9b06ec4c8 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -183,7 +183,7 @@ #endif /* SPL can't handle all huge variables - define just DFU */ -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT) +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) #undef CONFIG_EXTRA_ENV_SETTINGS # define CONFIG_EXTRA_ENV_SETTINGS \ "dfu_alt_info_ram=uboot.bin ram 0x8000000 0x1000000;" \ @@ -228,7 +228,7 @@ # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT) +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) # undef CONFIG_CMD_BOOTD # define CONFIG_SPL_ENV_SUPPORT # define CONFIG_SPL_HASH_SUPPORT -- cgit v1.3.1 From 2d59ec84829ff339041667c857afe94d5160f4b4 Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Thu, 17 Jan 2019 13:43:03 -0600 Subject: dfu: Make DFU support more SPL friendly Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code. This ensures the files and features are only built into the right build for which they are enabled. Using the macros to simplify this patch was made possible by the config symbol rename done in the last patch. Signed-off-by: Andrew F. Davis Reviewed-by: Tom Rini Acked-by: Lukasz Majewski --- drivers/Makefile | 3 +-- drivers/dfu/Makefile | 12 ++++++------ include/dfu.h | 10 +++++----- 3 files changed, 12 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/drivers/Makefile b/drivers/Makefile index 14543c7d6c9..eca023ac04d 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/ obj-$(CONFIG_$(SPL_TPL_)DM) += core/ +obj-$(CONFIG_$(SPL_TPL_)DFU) += dfu/ obj-$(CONFIG_$(SPL_TPL_)GPIO_SUPPORT) += gpio/ obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/ obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/ @@ -50,7 +51,6 @@ obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/ obj-$(CONFIG_SPL_USB_GADGET) += usb/common/ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/ -obj-$(CONFIG_SPL_DFU) += dfu/ obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/ obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ @@ -86,7 +86,6 @@ obj-y += misc/ obj-$(CONFIG_MMC) += mmc/ obj-$(CONFIG_NVME) += nvme/ obj-y += pcmcia/ -obj-y += dfu/ obj-$(CONFIG_X86) += pch/ obj-y += phy/allwinner/ obj-y += phy/marvell/ diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile index 56f9b0c5f49..4164f342acc 100644 --- a/drivers/dfu/Makefile +++ b/drivers/dfu/Makefile @@ -3,9 +3,9 @@ # Copyright (C) 2012 Samsung Electronics # Lukasz Majewski -obj-$(CONFIG_DFU) += dfu.o -obj-$(CONFIG_DFU_MMC) += dfu_mmc.o -obj-$(CONFIG_DFU_NAND) += dfu_nand.o -obj-$(CONFIG_DFU_RAM) += dfu_ram.o -obj-$(CONFIG_DFU_SF) += dfu_sf.o -obj-$(CONFIG_DFU_TFTP) += dfu_tftp.o +obj-$(CONFIG_$(SPL_)DFU) += dfu.o +obj-$(CONFIG_$(SPL_)DFU_MMC) += dfu_mmc.o +obj-$(CONFIG_$(SPL_)DFU_NAND) += dfu_nand.o +obj-$(CONFIG_$(SPL_)DFU_RAM) += dfu_ram.o +obj-$(CONFIG_$(SPL_)DFU_SF) += dfu_sf.o +obj-$(CONFIG_$(SPL_)DFU_TFTP) += dfu_tftp.o diff --git a/include/dfu.h b/include/dfu.h index fbe978abdc2..9340a900a2f 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -202,7 +202,7 @@ static inline void dfu_set_defer_flush(struct dfu_entity *dfu) int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size); /* Device specific */ -#ifdef CONFIG_DFU_MMC +#if CONFIG_IS_ENABLED(DFU_MMC) extern int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s); #else static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, @@ -213,7 +213,7 @@ static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, } #endif -#ifdef CONFIG_DFU_NAND +#if CONFIG_IS_ENABLED(DFU_NAND) extern int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s); #else static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, @@ -224,7 +224,7 @@ static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, } #endif -#ifdef CONFIG_DFU_RAM +#if CONFIG_IS_ENABLED(DFU_RAM) extern int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s); #else static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, @@ -235,7 +235,7 @@ static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, } #endif -#ifdef CONFIG_DFU_SF +#if CONFIG_IS_ENABLED(DFU_SF) extern int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s); #else static inline int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, @@ -259,7 +259,7 @@ static inline int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, * * @return 0 on success, otherwise error code */ -#ifdef CONFIG_DFU_TFTP +#if CONFIG_IS_ENABLED(DFU_TFTP) int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len, char *interface, char *devstring); #else -- cgit v1.3.1 From 0fd1359c5a9ba79a6bb408859e3376242a513ae2 Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Thu, 17 Jan 2019 13:43:05 -0600 Subject: ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to have an non-standard boot address in memory. This may be due to the device being a high security variant, which place the Initial SoftWare (ISW) after certificates and secure software. Allow these devices to set this from Kconfig. Signed-off-by: Andrew F. Davis --- arch/arm/mach-omap2/Kconfig | 15 +++++++++++++++ arch/arm/mach-omap2/am33xx/Kconfig | 15 --------------- include/configs/ti_omap5_common.h | 2 +- 3 files changed, 16 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 58e545a45b4..d9bdcb355a1 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -167,6 +167,21 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE using hardware memory firewalls. This value must be smaller than the TI_SECURE_EMIF_TOTAL_REGION_SIZE value. +if AM43XX || AM33XX || OMAP54XX +config ISW_ENTRY_ADDR + hex "Address in memory or XIP address of bootloader entry point" + default 0x402F4000 if AM43XX + default 0x402F0400 if AM33XX + default 0x40301350 if OMAP54XX + help + After any reset, the boot ROM searches the boot media for a valid + boot image. For non-XIP devices, the ROM then copies the image into + internal memory. For all boot modes, after the ROM processes the + boot image it eventually computes the entry point address depending + on the device type (secure/non-secure), boot media (xip/non-xip) and + image headers. +endif + source "arch/arm/mach-omap2/omap3/Kconfig" source "arch/arm/mach-omap2/omap4/Kconfig" diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 57284c4ae12..4f15346c86b 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -275,21 +275,6 @@ config SPL_RTC_DDR_SUPPORT endif if AM43XX || AM33XX -config ISW_ENTRY_ADDR - hex "Address in memory or XIP flash of bootloader entry point" - default 0x402F4000 if AM43XX - default 0x402F0400 if AM33XX - help - After any reset, the boot ROM on the AM43XX SOC - searches the boot media for a valid boot image. - For non-XIP devices, the ROM then copies the - image into internal memory. - For all boot modes, after the ROM processes the - boot image it eventually computes the entry - point address depending on the device type - (secure/non-secure), boot media (xip/non-xip) and - image headers. - config PUB_ROM_DATA_SIZE hex "Size in bytes of the L3 SRAM reserved by ROM to store data" default 0x8400 diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 8bf4a6b7e9f..ba57c40182c 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -81,7 +81,7 @@ * RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)). */ #define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ 0x1000 -#define CONFIG_SPL_TEXT_BASE 0x40301350 +#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR /* If no specific start address is specified then the secure EMIF * region will be placed at the end of the DDR space. In order to prevent * the main u-boot relocation from clobbering that memory and causing a -- cgit v1.3.1 From 1f15cb8f5b1b675426a7072d6c978e1c415c94c8 Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Sat, 19 Jan 2019 10:40:38 +0100 Subject: drivers: esdhc: add support for ColdFire mcf5441x family This patch has been tested on the mcf54415-based stmark2 board. The eSDHC driver works reliably using DMA mode. Signed-off-by: Angelo Dureghello --- drivers/mmc/fsl_esdhc.c | 43 ++++++++++++++++++++++++++++++++++++++++++- include/fsl_esdhc.h | 1 + 2 files changed, 43 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 84637313e0a..b8171ba08b9 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -384,6 +384,25 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); } +#ifdef CONFIG_MCF5441x +/* + * Swaps 32-bit words to little-endian byte order. + */ +static inline void sd_swap_dma_buff(struct mmc_data *data) +{ + int i, size = data->blocksize >> 2; + u32 *buffer = (u32 *)data->dest; + u32 sw; + + while (data->blocks--) { + for (i = 0; i < size; i++) { + sw = __sw32(*buffer); + *buffer++ = sw; + } + } +} +#endif + /* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -546,8 +565,12 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, * cache-fill during the DMA operations such as the * speculative pre-fetching etc. */ - if (data->flags & MMC_DATA_READ) + if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); +#ifdef CONFIG_MCF5441x + sd_swap_dma_buff(data); +#endif + } #endif } @@ -1029,8 +1052,12 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); +#ifdef CONFIG_MCF5441x + esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); +#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); +#endif /* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); @@ -1138,6 +1165,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret; +#ifdef CONFIG_MCF5441x + /* ColdFire, using SDHC_DATA[3] for card detection */ + esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); +#endif + #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1162,6 +1194,15 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt); +#ifdef CONFIG_MCF5441x + /* + * MCF5441x RM declares in more points that sdhc clock speed must + * never exceed 25 Mhz. From this, the HS bit needs to be disabled + * from host capabilities. + */ + caps &= ~ESDHC_HOSTCAPBLT_HSS; +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index acd8dd06f87..8dbd5249a7f 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -106,6 +106,7 @@ #define PROCTL_INIT 0x00000020 #define PROCTL_DTW_4 0x00000002 #define PROCTL_DTW_8 0x00000004 +#define PROCTL_D3CD 0x00000008 #define CMDARG 0x0002e008 -- cgit v1.3.1 From 65304aade8041c03859d0f7b210f2e2a4d46bec0 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Mon, 21 Jan 2019 20:29:55 +0100 Subject: lib: lmb: rename lmb_get_unreserved_size to lmb_get_free_size As a follow-up, change the name of the newly introduced function 'lmb_get_unreserved_size' to 'lmb_get_free_size', which is more appropriate. Signed-off-by: Simon Goldschmidt [trini: Fix test/lib/lmb.c] Signed-off-by: Tom Rini --- include/lmb.h | 2 +- lib/lmb.c | 2 +- net/tftp.c | 2 +- test/lib/lmb.c | 22 +++++++++++----------- 4 files changed, 14 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/lmb.h b/include/lmb.h index 1bb003e35e8..e87c0b0ada0 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -40,7 +40,7 @@ extern phys_addr_t __lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong ali phys_addr_t max_addr); extern phys_addr_t lmb_alloc_addr(struct lmb *lmb, phys_addr_t base, phys_size_t size); -extern phys_size_t lmb_get_unreserved_size(struct lmb *lmb, phys_addr_t addr); +extern phys_size_t lmb_get_free_size(struct lmb *lmb, phys_addr_t addr); extern int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr); extern long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size); diff --git a/lib/lmb.c b/lib/lmb.c index 3407705fa70..2efb48c1dc8 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -353,7 +353,7 @@ phys_addr_t lmb_alloc_addr(struct lmb *lmb, phys_addr_t base, phys_size_t size) } /* Return number of bytes from a given address that are free */ -phys_size_t lmb_get_unreserved_size(struct lmb *lmb, phys_addr_t addr) +phys_size_t lmb_get_free_size(struct lmb *lmb, phys_addr_t addr) { int i; long j; diff --git a/net/tftp.c b/net/tftp.c index 8fab6d2650f..eca801aa194 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -609,7 +609,7 @@ static int tftp_init_load_addr(void) lmb_init_and_reserve(&lmb, gd->bd->bi_dram[0].start, gd->bd->bi_dram[0].size, (void *)gd->fdt_blob); - max_size = lmb_get_unreserved_size(&lmb, load_addr); + max_size = lmb_get_free_size(&lmb, load_addr); if (!max_size) return -1; diff --git a/test/lib/lmb.c b/test/lib/lmb.c index 058d3c332be..9a228523cc4 100644 --- a/test/lib/lmb.c +++ b/test/lib/lmb.c @@ -560,31 +560,31 @@ static int test_get_unreserved_size(struct unit_test_state *uts, alloc_addr_b, 0x10000, alloc_addr_c, 0x10000); /* check addresses in between blocks */ - s = lmb_get_unreserved_size(&lmb, ram); + s = lmb_get_free_size(&lmb, ram); ut_asserteq(s, alloc_addr_a - ram); - s = lmb_get_unreserved_size(&lmb, ram + 0x10000); + s = lmb_get_free_size(&lmb, ram + 0x10000); ut_asserteq(s, alloc_addr_a - ram - 0x10000); - s = lmb_get_unreserved_size(&lmb, alloc_addr_a - 4); + s = lmb_get_free_size(&lmb, alloc_addr_a - 4); ut_asserteq(s, 4); - s = lmb_get_unreserved_size(&lmb, alloc_addr_a + 0x10000); + s = lmb_get_free_size(&lmb, alloc_addr_a + 0x10000); ut_asserteq(s, alloc_addr_b - alloc_addr_a - 0x10000); - s = lmb_get_unreserved_size(&lmb, alloc_addr_a + 0x20000); + s = lmb_get_free_size(&lmb, alloc_addr_a + 0x20000); ut_asserteq(s, alloc_addr_b - alloc_addr_a - 0x20000); - s = lmb_get_unreserved_size(&lmb, alloc_addr_b - 4); + s = lmb_get_free_size(&lmb, alloc_addr_b - 4); ut_asserteq(s, 4); - s = lmb_get_unreserved_size(&lmb, alloc_addr_c + 0x10000); + s = lmb_get_free_size(&lmb, alloc_addr_c + 0x10000); ut_asserteq(s, ram_end - alloc_addr_c - 0x10000); - s = lmb_get_unreserved_size(&lmb, alloc_addr_c + 0x20000); + s = lmb_get_free_size(&lmb, alloc_addr_c + 0x20000); ut_asserteq(s, ram_end - alloc_addr_c - 0x20000); - s = lmb_get_unreserved_size(&lmb, ram_end - 4); + s = lmb_get_free_size(&lmb, ram_end - 4); ut_asserteq(s, 4); return 0; } -static int lib_test_lmb_get_unreserved_size(struct unit_test_state *uts) +static int lib_test_lmb_get_free_size(struct unit_test_state *uts) { int ret; @@ -597,5 +597,5 @@ static int lib_test_lmb_get_unreserved_size(struct unit_test_state *uts) return test_get_unreserved_size(uts, 0xE0000000); } -DM_TEST(lib_test_lmb_get_unreserved_size, +DM_TEST(lib_test_lmb_get_free_size, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); -- cgit v1.3.1