From d0787656405fc9a43f00715a0d05c2860cbe7b81 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 25 Apr 2015 06:29:46 +0200 Subject: arm: mvebu: Move mvebu-common into mach-mvebu Now that the mach-mvebu directory exists and is used by Armada XP we can move the mvebu-common files into this directory as well. Signed-off-by: Stefan Roese Cc: Masahiro Yamada Tested-by: Kevin Smith Tested-by: Dirk Eibach --- include/configs/db-mv784mp-gp.h | 2 +- include/configs/maxbcm.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 4dd7b11fb4a..cfeeab59964 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -100,7 +100,7 @@ #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LDSCRIPT "arch/arm/mvebu-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-mvebu/u-boot-spl.lds" /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index e9096234af6..27ea71fe616 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -100,7 +100,7 @@ #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LDSCRIPT "arch/arm/mvebu-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-mvebu/u-boot-spl.lds" /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -- cgit v1.3.1 From 880b15a37b22ce516b24460e4bbedd9a6b055625 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 25 Apr 2015 06:29:50 +0200 Subject: arm: mvebu: Move CONFIG_SPL_LDSCRIPT to common header This way, new MVEBU boards don't need to specifiy the common location for the SPL linker script. Signed-off-by: Stefan Roese Tested-by: Kevin Smith Tested-by: Dirk Eibach --- arch/arm/mach-mvebu/include/mach/config.h | 5 +++++ include/configs/db-mv784mp-gp.h | 1 - include/configs/maxbcm.h | 1 - 3 files changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 86a0aed7699..b326ec08ed8 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -85,4 +85,9 @@ #define CONFIG_SYS_I2C_SPEED 100000 #endif +/* Common SPL configuration */ +#ifndef CONFIG_SPL_LDSCRIPT +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-mvebu/u-boot-spl.lds" +#endif + #endif /* __MVEBU_CONFIG_H */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index cfeeab59964..897f473f0c3 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -100,7 +100,6 @@ #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-mvebu/u-boot-spl.lds" /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 27ea71fe616..a0ff067d1d2 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -100,7 +100,6 @@ #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-mvebu/u-boot-spl.lds" /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -- cgit v1.3.1 From cae9008f69ab07b6faf75ebd0167ef06b8ebaf99 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 25 Apr 2015 06:29:52 +0200 Subject: arm: mvebu: Change network init code to allow a more flexible setup With the introduction of the Armada 38x support, its necessary to change the mvneta ethernet driver init call from always 4 times to a configurable value. Lets make this init call more flexible by moving the actually used devices to the config header. Additionally this patch takes care of the slightly different base addresses for the ethernet controllers on A38x. Signed-off-by: Stefan Roese Tested-by: Kevin Smith Tested-by: Dirk Eibach Acked-by: Joe Hershberger --- arch/arm/mach-mvebu/cpu.c | 20 ++++++++++++++++---- board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c | 3 ++- include/configs/db-mv784mp-gp.h | 2 +- include/configs/maxbcm.h | 2 +- 4 files changed, 20 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index eca5e2176cd..8058fadb22b 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -216,10 +216,22 @@ int arch_misc_init(void) #ifdef CONFIG_MVNETA int cpu_eth_init(bd_t *bis) { - mvneta_initialize(bis, MVEBU_EGIGA0_BASE, 0, CONFIG_PHY_BASE_ADDR + 0); - mvneta_initialize(bis, MVEBU_EGIGA1_BASE, 1, CONFIG_PHY_BASE_ADDR + 1); - mvneta_initialize(bis, MVEBU_EGIGA2_BASE, 2, CONFIG_PHY_BASE_ADDR + 2); - mvneta_initialize(bis, MVEBU_EGIGA3_BASE, 3, CONFIG_PHY_BASE_ADDR + 3); + u32 enet_base[] = { MVEBU_EGIGA0_BASE, MVEBU_EGIGA1_BASE, + MVEBU_EGIGA2_BASE, MVEBU_EGIGA3_BASE }; + u8 phy_addr[] = CONFIG_PHY_ADDR; + int i; + + /* + * Only Armada XP supports all 4 ethernet interfaces. A38x has + * slightly different base addresses for its 2-3 interfaces. + */ + if (mvebu_soc_family() != MVEBU_SOC_AXP) { + enet_base[1] = MVEBU_EGIGA2_BASE; + enet_base[2] = MVEBU_EGIGA3_BASE; + } + + for (i = 0; i < ARRAY_SIZE(phy_addr); i++) + mvneta_initialize(bis, enet_base[i], i, phy_addr[i]); return 0; } diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c index b3dae8910d4..00ca878873d 100644 --- a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c +++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c @@ -86,7 +86,8 @@ int checkboard(void) /* Configure and enable MV88E1545 PHY */ void reset_phy(void) { - u16 devadr = CONFIG_PHY_BASE_ADDR; + u8 phy_addr[] = CONFIG_PHY_ADDR; + u16 devadr = phy_addr[0]; char *name = "neta0"; u16 reg; diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 897f473f0c3..77d34080fd8 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -53,7 +53,7 @@ #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ #define CONFIG_PHY_MARVELL /* there is a marvell phy */ -#define CONFIG_PHY_BASE_ADDR 0x10 +#define CONFIG_PHY_ADDR { 0x10, 0x11, 0x12, 0x13 } #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_QSGMII #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define CONFIG_RESET_PHY_R diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index a0ff067d1d2..d8811a47cdc 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -53,7 +53,7 @@ #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ #define CONFIG_PHY_MARVELL /* there is a marvell phy */ -#define CONFIG_PHY_BASE_ADDR 0x0 +#define CONFIG_PHY_ADDR { 0x0, 0x1, 0x2, 0x3 } #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define CONFIG_RESET_PHY_R -- cgit v1.3.1 From b81d0ea7280b2d325e7c16cce808bec035d60a08 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 25 Apr 2015 06:29:54 +0200 Subject: arm: mvebu: mv-common.h: Add CONFIG_PREBOOT This enables the usage of the "preboot" environment variable on Marvell boards. Signed-off-by: Stefan Roese Tested-by: Kevin Smith Tested-by: Dirk Eibach --- include/configs/mv-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 721b75daee2..51436da64e0 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -57,6 +57,7 @@ 115200,230400, 460800, 921600 } /* auto boot */ #define CONFIG_BOOTDELAY 3 /* default enable autoboot */ +#define CONFIG_PREBOOT /* * For booting Linux, the board info and command line data -- cgit v1.3.1 From 2bae75a488b589d3cdcc58d9fdc1383f571b4a65 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 25 Apr 2015 06:29:56 +0200 Subject: arm: mvebu: Add Armada A38x DB-88F6820-GP board support This patch adds support for the Marvell DB-88F6820-GP Armada A38x evaluation board. Supported peripherals are: - UART - Ethernet (mvneta) - I2C - SPI (including SPI NOR flash) Please note that this board support right now only supports the main U-Boot. Without the bin_hdr integration (DDR training etc). This will be added in a few days / weeks to complete this board port. But till then this U-Boot version can be run on the target via the original Marvell U-Boot via this command: tftpboot 4000000 db-88f6820-gp/u-boot.bin;go 4000000 Signed-off-by: Stefan Roese Tested-by: Kevin Smith Tested-by: Dirk Eibach --- arch/arm/Kconfig | 6 ++ board/Marvell/db-88f6820-gp/Kconfig | 15 ++++ board/Marvell/db-88f6820-gp/Makefile | 7 ++ board/Marvell/db-88f6820-gp/binary.0 | 16 +++++ board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 103 ++++++++++++++++++++++++++++ board/Marvell/db-88f6820-gp/kwbimage.cfg | 12 ++++ configs/db-88f6820-gp_defconfig | 2 + include/configs/db-88f6820-gp.h | 72 +++++++++++++++++++ 8 files changed, 233 insertions(+) create mode 100644 board/Marvell/db-88f6820-gp/Kconfig create mode 100644 board/Marvell/db-88f6820-gp/Makefile create mode 100644 board/Marvell/db-88f6820-gp/binary.0 create mode 100644 board/Marvell/db-88f6820-gp/db-88f6820-gp.c create mode 100644 board/Marvell/db-88f6820-gp/kwbimage.cfg create mode 100644 configs/db-88f6820-gp_defconfig create mode 100644 include/configs/db-88f6820-gp.h (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 00be305c390..152a0296ccb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -102,6 +102,11 @@ config KIRKWOOD bool "Marvell Kirkwood" select CPU_ARM926EJS +config TARGET_DB_88F6820_GP + bool "Support DB-88F6820-GP" + select CPU_V7 + select SUPPORT_SPL + config TARGET_DB_MV784MP_GP bool "Support db-mv784mp-gp" select CPU_V7 @@ -850,6 +855,7 @@ source "board/BuR/kwb/Kconfig" source "board/BuR/tseries/Kconfig" source "board/CarMediaLab/flea3/Kconfig" source "board/Marvell/aspenite/Kconfig" +source "board/Marvell/db-88f6820-gp/Kconfig" source "board/Marvell/db-mv784mp-gp/Kconfig" source "board/Marvell/gplugd/Kconfig" source "board/altera/socfpga/Kconfig" diff --git a/board/Marvell/db-88f6820-gp/Kconfig b/board/Marvell/db-88f6820-gp/Kconfig new file mode 100644 index 00000000000..b2e911512b9 --- /dev/null +++ b/board/Marvell/db-88f6820-gp/Kconfig @@ -0,0 +1,15 @@ +if TARGET_DB_88F6820_GP + +config SYS_BOARD + default "db-88f6820-gp" + +config SYS_VENDOR + default "Marvell" + +config SYS_SOC + default "mvebu" + +config SYS_CONFIG_NAME + default "db-88f6820-gp" + +endif diff --git a/board/Marvell/db-88f6820-gp/Makefile b/board/Marvell/db-88f6820-gp/Makefile new file mode 100644 index 00000000000..58d40dd6cc6 --- /dev/null +++ b/board/Marvell/db-88f6820-gp/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2015 Stefan Roese +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := db-88f6820-gp.o diff --git a/board/Marvell/db-88f6820-gp/binary.0 b/board/Marvell/db-88f6820-gp/binary.0 new file mode 100644 index 00000000000..57a4cbf3304 --- /dev/null +++ b/board/Marvell/db-88f6820-gp/binary.0 @@ -0,0 +1,16 @@ +-------- +WARNING: +-------- +This file should contain the bin_hdr generated by the original Marvell +U-Boot implementation. As this is currently not included in this +U-Boot version, we have added this placeholder, so that the U-Boot +image can be generated without errors. + +If you have a known to be working bin_hdr for your board, then you +just need to replace this text file here with the binary header +and recompile U-Boot. + +In a few weeks, mainline U-Boot will get support to generate the +bin_hdr with the DDR training code itself. By implementing this code +as SPL U-Boot. Then this file will not be needed any more and will +get removed. diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c new file mode 100644 index 00000000000..51ac495a448 --- /dev/null +++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2015 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define BIT(nr) (1UL << (nr)) + +#define ETH_PHY_CTRL_REG 0 +#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 +#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) + +/* + * Those values and defines are taken from the Marvell U-Boot version + * "u-boot-2013.01-2014_T3.0" + */ +#define DB_GP_88F68XX_GPP_OUT_ENA_LOW \ + (~(BIT(1) | BIT(4) | BIT(6) | BIT(7) | BIT(8) | BIT(9) | \ + BIT(10) | BIT(11) | BIT(19) | BIT(22) | BIT(23) | BIT(25) | \ + BIT(26) | BIT(27) | BIT(29) | BIT(30) | BIT(31))) +#define DB_GP_88F68XX_GPP_OUT_ENA_MID \ + (~(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(15) | \ + BIT(16) | BIT(17) | BIT(18))) + +#define DB_GP_88F68XX_GPP_OUT_VAL_LOW 0x0 +#define DB_GP_88F68XX_GPP_OUT_VAL_MID 0x0 +#define DB_GP_88F68XX_GPP_POL_LOW 0x0 +#define DB_GP_88F68XX_GPP_POL_MID 0x0 + +/* IO expander on Marvell GP board includes e.g. fan enabling */ +struct marvell_io_exp { + u8 chip; + u8 addr; + u8 val; +}; + +static struct marvell_io_exp io_exp[] = { + { 0x20, 6, 0x20 }, /* Configuration registers: Bit on --> Input bits */ + { 0x20, 7, 0xC3 }, /* Configuration registers: Bit on --> Input bits */ + { 0x20, 2, 0x1D }, /* Output Data, register#0 */ + { 0x20, 3, 0x18 }, /* Output Data, register#1 */ + { 0x21, 6, 0xC3 }, /* Configuration registers: Bit on --> Input bits */ + { 0x21, 7, 0x31 }, /* Configuration registers: Bit on --> Input bits */ + { 0x21, 2, 0x08 }, /* Output Data, register#0 */ + { 0x21, 3, 0xC0 } /* Output Data, register#1 */ +}; + +int board_early_init_f(void) +{ + /* Configure MPP */ + writel(0x11111111, MVEBU_MPP_BASE + 0x00); + writel(0x11111111, MVEBU_MPP_BASE + 0x04); + writel(0x11244011, MVEBU_MPP_BASE + 0x08); + writel(0x22222111, MVEBU_MPP_BASE + 0x0c); + writel(0x22200002, MVEBU_MPP_BASE + 0x10); + writel(0x30042022, MVEBU_MPP_BASE + 0x14); + writel(0x55550555, MVEBU_MPP_BASE + 0x18); + writel(0x00005550, MVEBU_MPP_BASE + 0x1c); + + /* Set GPP Out value */ + writel(DB_GP_88F68XX_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); + writel(DB_GP_88F68XX_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); + + /* Set GPP Polarity */ + writel(DB_GP_88F68XX_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c); + writel(DB_GP_88F68XX_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c); + + /* Set GPP Out Enable */ + writel(DB_GP_88F68XX_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); + writel(DB_GP_88F68XX_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); + + return 0; +} + +int board_init(void) +{ + int i; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + /* Init I2C IO expanders */ + for (i = 0; i < ARRAY_SIZE(io_exp); i++) + i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1); + + return 0; +} + +int checkboard(void) +{ + puts("Board: Marvell DB-88F6820-GP\n"); + + return 0; +} diff --git a/board/Marvell/db-88f6820-gp/kwbimage.cfg b/board/Marvell/db-88f6820-gp/kwbimage.cfg new file mode 100644 index 00000000000..e81245420fa --- /dev/null +++ b/board/Marvell/db-88f6820-gp/kwbimage.cfg @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY board/Marvell/db-88f6820-gp/binary.0 0000005b 00000068 diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig new file mode 100644 index 00000000000..0d6f0de0e2c --- /dev/null +++ b/configs/db-88f6820-gp_defconfig @@ -0,0 +1,2 @@ +CONFIG_ARM=y +CONFIG_TARGET_DB_88F6820_GP=y diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h new file mode 100644 index 00000000000..12a24ced1ba --- /dev/null +++ b/include/configs/db-88f6820-gp.h @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2014 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_DB_88F6820_GP_H +#define _CONFIG_DB_88F6820_GP_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_ARMADA_XP /* SOC Family Name */ +#define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ + +#define CONFIG_SYS_L2_PL310 + +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO_LATE + +#define CONFIG_SYS_TEXT_BASE 0x04000000 +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_I2C +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_TFTPPUT +#define CONFIG_CMD_TIME + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* SPI NOR flash default params, used by sf commands */ +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#define CONFIG_SPI_FLASH_STMICRO + +/* Environment in SPI NOR flash */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ +#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ +#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ + +#define CONFIG_PHY_MARVELL /* there is a marvell phy */ +#define CONFIG_PHY_ADDR { 1, 0 } +#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ + +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CONFIG_SYS_ALT_MEMTEST + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#endif /* _CONFIG_DB_88F6820_GP_H */ -- cgit v1.3.1