From 158097052a6a528408e05d2345ff2ccdbb46036e Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Wed, 6 Mar 2019 14:49:14 +0800 Subject: armv7: ls102xa: Add workaround for DDR erratum A-008850 Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu Signed-off-by: Alison Wang Reviewed-by: Prabhakar Kushwaha --- include/configs/ls1021aiot.h | 2 ++ include/configs/ls1021atwr.h | 2 ++ 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 6be8df109bd..4af3988886a 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -85,6 +85,8 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_CHIP_SELECTS_PER_CTRL 4 + /* * Serial Port */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 4b6760b600d..da55bf2f43b 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -104,6 +104,8 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_CHIP_SELECTS_PER_CTRL 4 + #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -- cgit v1.2.3