From 7d84ad1da0e32f4525cee9b35bc5a4f3b5585ed8 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Fri, 14 Jun 2024 18:18:10 +0530 Subject: env_spi: support overriding spi dev from board code This enables boards to choose where to/from the environment should be saved/loaded. They can then for example support using the same device (dynamically) from which the bootloader was launched to load and save env data and do not have to define CONFIG_ENV_SPI_BUS statically. In my use case, the environment needs to be on the same device I booted from. It can be the QSPI or OSPI device. I therefore would override spi_get_env_dev in the board code, read the bootmode registers to determine where we booted from and return the corresponding device index. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20240614124811.22945-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek # Move spi_get_env_dev to sf.c --- include/spi.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/spi.h b/include/spi.h index 7e38cc2a2ad..9e9851284c8 100644 --- a/include/spi.h +++ b/include/spi.h @@ -743,4 +743,6 @@ int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep, #define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) #define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops) +int spi_get_env_dev(void); + #endif /* _SPI_H_ */ -- cgit v1.2.3 From 8bfbc09aef8a443d2e5b9d1c7fb8961b831416bf Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Wed, 19 Jun 2024 12:47:30 +0530 Subject: arm64: versal2: Add support for mini configuration Versal2 mini configuration is designed for running memory test. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20240619071733.10256-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- include/configs/amd_versal2_mini.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/configs/amd_versal2_mini.h (limited to 'include') diff --git a/include/configs/amd_versal2_mini.h b/include/configs/amd_versal2_mini.h new file mode 100644 index 00000000000..97e8f673a83 --- /dev/null +++ b/include/configs/amd_versal2_mini.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for AMD Versal Gen2 MINI configuration + * + * Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#ifndef __CONFIG_VERSAL2_MINI_H +#define __CONFIG_VERSAL2_MINI_H + +#define CFG_EXTRA_ENV_SETTINGS + +#include + +/* Undef unneeded configs */ +#undef CFG_EXTRA_ENV_SETTINGS + +#endif /* __CONFIG_VERSAL2_MINI_H */ -- cgit v1.2.3 From 5389564b521490f8e97299c2f82e26cbf75fc796 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 30 Jul 2024 15:50:17 +0200 Subject: ARM: zynq: Add support for 7z010_lr and 7z020_lr Add support for *_lr SOCs. Without this change chips are not going to be properly identified and bitstream programming won't work. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/14d8905a89d1b31fbb2318512cf57eb0256c11be.1722347416.git.michal.simek@amd.com --- include/zynqpl.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/zynqpl.h b/include/zynqpl.h index d7dc064585e..08d067d8757 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -20,9 +20,11 @@ extern struct xilinx_fpga_op zynq_op; #define XILINX_ZYNQ_XC7Z007S 0x3 #define XILINX_ZYNQ_XC7Z010 0x2 +#define XILINX_ZYNQ_XC7Z010_LR 0x4 #define XILINX_ZYNQ_XC7Z012S 0x1c #define XILINX_ZYNQ_XC7Z014S 0x8 #define XILINX_ZYNQ_XC7Z015 0x1b +#define XILINX_ZYNQ_XC7Z020_LR 0x9 #define XILINX_ZYNQ_XC7Z020 0x7 #define XILINX_ZYNQ_XC7Z030 0xc #define XILINX_ZYNQ_XC7Z035 0x12 @@ -32,9 +34,11 @@ extern struct xilinx_fpga_op zynq_op; /* Device Image Sizes */ #define XILINX_XC7Z007S_SIZE 16669920/8 #define XILINX_XC7Z010_SIZE 16669920/8 +#define XILINX_XC7Z010_LR_SIZE 16669920/8 #define XILINX_XC7Z012S_SIZE 28085344/8 #define XILINX_XC7Z014S_SIZE 32364512/8 #define XILINX_XC7Z015_SIZE 28085344/8 +#define XILINX_XC7Z020_LR_SIZE 32364512/8 #define XILINX_XC7Z020_SIZE 32364512/8 #define XILINX_XC7Z030_SIZE 47839328/8 #define XILINX_XC7Z035_SIZE 106571232/8 @@ -44,9 +48,11 @@ extern struct xilinx_fpga_op zynq_op; /* Device Names */ #define XILINX_XC7Z007S_NAME "7z007s" #define XILINX_XC7Z010_NAME "7z010" +#define XILINX_XC7Z010_LR_NAME "xc7z010_lr" #define XILINX_XC7Z012S_NAME "7z012s" #define XILINX_XC7Z014S_NAME "7z014s" #define XILINX_XC7Z015_NAME "7z015" +#define XILINX_XC7Z020_LR_NAME "xa7z020_lr" #define XILINX_XC7Z020_NAME "7z020" #define XILINX_XC7Z030_NAME "7z030" #define XILINX_XC7Z035_NAME "7z035" -- cgit v1.2.3 From c29a6daec184dd429bfccee42179bb5b079843b8 Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 18 Jul 2024 08:46:04 +0300 Subject: disk: support MTD partitions Add new MTD partition driver, which can be useful with mtdblock driver combination. Signed-off-by: Alexey Romanov Signed-off-by: Michael Trimarchi --- include/part.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/part.h b/include/part.h index b187ec4b4bd..a5994f2cace 100644 --- a/include/part.h +++ b/include/part.h @@ -30,12 +30,15 @@ struct block_drvr { #define PART_TYPE_ISO 0x03 #define PART_TYPE_AMIGA 0x04 #define PART_TYPE_EFI 0x05 +#define PART_TYPE_MTD 0x06 /* maximum number of partition entries supported by search */ #define DOS_ENTRY_NUMBERS 8 #define ISO_ENTRY_NUMBERS 64 #define MAC_ENTRY_NUMBERS 64 #define AMIGA_ENTRY_NUMBERS 8 +#define MTD_ENTRY_NUMBERS 64 + /* * Type string for U-Boot bootable partitions */ -- cgit v1.2.3 From e108d10d8c89aa65c8b41db5c43407fd0d4a09fe Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 18 Jul 2024 08:46:05 +0300 Subject: drivers: introduce mtdblock abstraction MTD block - abstraction over MTD subsystem, allowing to read and write in blocks using BLK UCLASS. Signed-off-by: Alexey Romanov Signed-off-by: Michael Trimarchi --- include/linux/mtd/mtd.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'include') diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 983a55ce70e..6751fb52c5a 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -26,6 +26,7 @@ #include #endif #include +#include #define MAX_MTD_DEVICES 32 #endif @@ -412,6 +413,30 @@ int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); +#if CONFIG_IS_ENABLED(MTD_BLOCK) +static inline struct mtd_info *blk_desc_to_mtd(struct blk_desc *bdesc) +{ + void *priv = dev_get_priv(bdesc->bdev); + + if (!priv) + return NULL; + + return *((struct mtd_info **)priv); +} + +int mtd_bind(struct udevice *dev, struct mtd_info **mtd); +#else +static inline struct mtd_info *blk_desc_to_mtd(struct blk_desc *bdesc) +{ + return NULL; +} + +static inline int mtd_bind(struct udevice *dev, struct mtd_info **mtd) +{ + return -EOPNOTSUPP; +} +#endif + int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); int mtd_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops); -- cgit v1.2.3 From cead69c528d4f107288717aeca6af52d0d9d47e9 Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 18 Jul 2024 08:45:23 +0300 Subject: ubi: allow to read from volume with offset Now user can pass an additional parameter 'offset' to ubi_volume_read() function. Signed-off-by: Alexey Romanov Reviewed-by: Heiko Schocher Acked-by: Heiko Schocher Signed-off-by: Michael Trimarchi --- include/ubi_uboot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index d7a8851094b..a4be0feabbd 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -49,7 +49,7 @@ extern int ubi_init(void); extern void ubi_exit(void); extern int ubi_part(char *part_name, const char *vid_header_offset); extern int ubi_volume_write(char *volume, void *buf, size_t size); -extern int ubi_volume_read(char *volume, char *buf, size_t size); +extern int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size); extern struct ubi_device *ubi_devices[]; int cmd_ubifs_mount(char *vol_name); -- cgit v1.2.3 From 25ee9c2005958e6f06609eef5c9d9915c77ece97 Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 18 Jul 2024 08:45:24 +0300 Subject: ubi: allow to write to volume with offset Introduce ubi_volume_offset_write() helper, which allow to write to ubi volume with specified offset. Signed-off-by: Alexey Romanov Reviewed-by: Heiko Schocher Acked-by: Heiko Schocher Signed-off-by: Michael Trimarchi --- include/ubi_uboot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index a4be0feabbd..d36bb923482 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -48,7 +48,7 @@ extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp); extern int ubi_init(void); extern void ubi_exit(void); extern int ubi_part(char *part_name, const char *vid_header_offset); -extern int ubi_volume_write(char *volume, void *buf, size_t size); +extern int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t size); extern int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size); extern struct ubi_device *ubi_devices[]; -- cgit v1.2.3 From 9daad11ad178646c288aca3615a7ba1e6039aed3 Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 18 Jul 2024 08:45:25 +0300 Subject: drivers: introduce UBI block abstraction UBI block is an virtual device, that runs on top of the MTD layer. The blocks are UBI volumes. Intended to be used in combination with other MTD drivers. Despite the fact that it, like mtdblock abstraction, it used with UCLASS_MTD, they can be used together on the system without conflicting. For example, using bcb command: # Trying to load bcb via mtdblock: $ bcb load mtd 0 mtd_partition_name # Trying to load bcb via UBI block: $ bcb load ubi 1 ubi_volume_name User always must attach UBI layer (for example, using ubi_part()) before using UBI block device. Signed-off-by: Alexey Romanov Reviewed-by: Heiko Schocher Acked-by: Heiko Schocher Signed-off-by: Michael Trimarchi --- include/ubi_uboot.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index d36bb923482..ea0db69c72a 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -55,4 +55,13 @@ extern struct ubi_device *ubi_devices[]; int cmd_ubifs_mount(char *vol_name); int cmd_ubifs_umount(void); +#if IS_ENABLED(CONFIG_UBI_BLOCK) +int ubi_bind(struct udevice *dev); +#else +static inline int ubi_bind(struct udevice *dev) +{ + return -EOPNOTSUPP; +} +#endif + #endif -- cgit v1.2.3 From aa5b67ce226267440e64fadc57d3a21e5842027c Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 18 Jul 2024 08:45:27 +0300 Subject: disk: support UBI partitions UBI partition is abstraction over UBI volumes. Can be used by UBI block device. Signed-off-by: Alexey Romanov Reviewed-by: Heiko Schocher Signed-off-by: Michael Trimarchi --- include/part.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/part.h b/include/part.h index a5994f2cace..54b986cee63 100644 --- a/include/part.h +++ b/include/part.h @@ -31,6 +31,7 @@ struct block_drvr { #define PART_TYPE_AMIGA 0x04 #define PART_TYPE_EFI 0x05 #define PART_TYPE_MTD 0x06 +#define PART_TYPE_UBI 0x07 /* maximum number of partition entries supported by search */ #define DOS_ENTRY_NUMBERS 8 @@ -38,6 +39,7 @@ struct block_drvr { #define MAC_ENTRY_NUMBERS 64 #define AMIGA_ENTRY_NUMBERS 8 #define MTD_ENTRY_NUMBERS 64 +#define UBI_ENTRY_NUMBERS UBI_MAX_VOLUMES /* * Type string for U-Boot bootable partitions -- cgit v1.2.3 From d53b7074ebcad4a69aa80502df46f4dfd35c18de Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 25 Jul 2024 09:46:03 +0000 Subject: rockchip: px30/rk3326: Use soc dtsi files from dts/upstream The commit f087f7fd277d ("rockchip: px30/rk3326: migrate to OF_UPSTREAM") migrated px30/rk3326 boards to use OF_UPSTREAM, however the soc dtsi and dt-bindings files remained. Remove the remaining px30/rk3326 soc dtsi and dt-bindings to ensure the files from dts/upstream is used. The gpio-ranges props is moved to u-boot.dtsi files and a ethernet0 alias is added to px30-firefly, they are missing in the dts/upstream files. No changes are expected with this. Signed-off-by: Jonas Karlman Reviewed-by: Quentin Schulz --- include/dt-bindings/clock/px30-cru.h | 389 --------------------------------- include/dt-bindings/power/px30-power.h | 27 --- 2 files changed, 416 deletions(-) delete mode 100644 include/dt-bindings/clock/px30-cru.h delete mode 100644 include/dt-bindings/power/px30-power.h (limited to 'include') diff --git a/include/dt-bindings/clock/px30-cru.h b/include/dt-bindings/clock/px30-cru.h deleted file mode 100644 index e5e59690b5f..00000000000 --- a/include/dt-bindings/clock/px30-cru.h +++ /dev/null @@ -1,389 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2017 Rockchip Electronics Co. Ltd. - * Author: Elaine - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_PX30_H -#define _DT_BINDINGS_CLK_ROCKCHIP_PX30_H - -/* core clocks */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_CPLL 3 -#define PLL_NPLL 4 -#define APLL_BOOST_H 5 -#define APLL_BOOST_L 6 -#define ARMCLK 7 - -/* sclk gates (special clocks) */ -#define USB480M 14 -#define SCLK_PDM 15 -#define SCLK_I2S0_TX 16 -#define SCLK_I2S0_TX_OUT 17 -#define SCLK_I2S0_RX 18 -#define SCLK_I2S0_RX_OUT 19 -#define SCLK_I2S1 20 -#define SCLK_I2S1_OUT 21 -#define SCLK_I2S2 22 -#define SCLK_I2S2_OUT 23 -#define SCLK_UART1 24 -#define SCLK_UART2 25 -#define SCLK_UART3 26 -#define SCLK_UART4 27 -#define SCLK_UART5 28 -#define SCLK_I2C0 29 -#define SCLK_I2C1 30 -#define SCLK_I2C2 31 -#define SCLK_I2C3 32 -#define SCLK_I2C4 33 -#define SCLK_PWM0 34 -#define SCLK_PWM1 35 -#define SCLK_SPI0 36 -#define SCLK_SPI1 37 -#define SCLK_TIMER0 38 -#define SCLK_TIMER1 39 -#define SCLK_TIMER2 40 -#define SCLK_TIMER3 41 -#define SCLK_TIMER4 42 -#define SCLK_TIMER5 43 -#define SCLK_TSADC 44 -#define SCLK_SARADC 45 -#define SCLK_OTP 46 -#define SCLK_OTP_USR 47 -#define SCLK_CRYPTO 48 -#define SCLK_CRYPTO_APK 49 -#define SCLK_DDRC 50 -#define SCLK_ISP 51 -#define SCLK_CIF_OUT 52 -#define SCLK_RGA_CORE 53 -#define SCLK_VOPB_PWM 54 -#define SCLK_NANDC 55 -#define SCLK_SDIO 56 -#define SCLK_EMMC 57 -#define SCLK_SFC 58 -#define SCLK_SDMMC 59 -#define SCLK_OTG_ADP 60 -#define SCLK_GMAC_SRC 61 -#define SCLK_GMAC 62 -#define SCLK_GMAC_RX_TX 63 -#define SCLK_MAC_REF 64 -#define SCLK_MAC_REFOUT 65 -#define SCLK_MAC_OUT 66 -#define SCLK_SDMMC_DRV 67 -#define SCLK_SDMMC_SAMPLE 68 -#define SCLK_SDIO_DRV 69 -#define SCLK_SDIO_SAMPLE 70 -#define SCLK_EMMC_DRV 71 -#define SCLK_EMMC_SAMPLE 72 -#define SCLK_GPU 73 -#define SCLK_PVTM 74 -#define SCLK_CORE_VPU 75 -#define SCLK_GMAC_RMII 76 -#define SCLK_UART2_SRC 77 -#define SCLK_NANDC_DIV 78 -#define SCLK_NANDC_DIV50 79 -#define SCLK_SDIO_DIV 80 -#define SCLK_SDIO_DIV50 81 -#define SCLK_EMMC_DIV 82 -#define SCLK_EMMC_DIV50 83 - -/* dclk gates */ -#define DCLK_VOPB 150 -#define DCLK_VOPL 151 - -/* aclk gates */ -#define ACLK_GPU 170 -#define ACLK_BUS_PRE 171 -#define ACLK_CRYPTO 172 -#define ACLK_VI_PRE 173 -#define ACLK_VO_PRE 174 -#define ACLK_VPU 175 -#define ACLK_PERI_PRE 176 -#define ACLK_GMAC 178 -#define ACLK_CIF 179 -#define ACLK_ISP 180 -#define ACLK_VOPB 181 -#define ACLK_VOPL 182 -#define ACLK_RGA 183 -#define ACLK_GIC 184 -#define ACLK_DCF 186 -#define ACLK_DMAC 187 - -/* hclk gates */ -#define HCLK_BUS_PRE 240 -#define HCLK_CRYPTO 241 -#define HCLK_VI_PRE 242 -#define HCLK_VO_PRE 243 -#define HCLK_VPU 244 -#define HCLK_PERI_PRE 245 -#define HCLK_MMC_NAND 246 -#define HCLK_SDMMC 247 -#define HCLK_USB 248 -#define HCLK_CIF 249 -#define HCLK_ISP 250 -#define HCLK_VOPB 251 -#define HCLK_VOPL 252 -#define HCLK_RGA 253 -#define HCLK_NANDC 254 -#define HCLK_SDIO 255 -#define HCLK_EMMC 256 -#define HCLK_SFC 257 -#define HCLK_OTG 258 -#define HCLK_HOST 259 -#define HCLK_HOST_ARB 260 -#define HCLK_PDM 261 -#define HCLK_I2S0 262 -#define HCLK_I2S1 263 -#define HCLK_I2S2 264 - -/* pclk gates */ -#define PCLK_BUS_PRE 320 -#define PCLK_DDR 321 -#define PCLK_VO_PRE 322 -#define PCLK_GMAC 323 -#define PCLK_MIPI_DSI 324 -#define PCLK_MIPIDSIPHY 325 -#define PCLK_MIPICSIPHY 326 -#define PCLK_USB_GRF 327 -#define PCLK_DCF 328 -#define PCLK_UART1 329 -#define PCLK_UART2 330 -#define PCLK_UART3 331 -#define PCLK_UART4 332 -#define PCLK_UART5 333 -#define PCLK_I2C0 334 -#define PCLK_I2C1 335 -#define PCLK_I2C2 336 -#define PCLK_I2C3 337 -#define PCLK_I2C4 338 -#define PCLK_PWM0 339 -#define PCLK_PWM1 340 -#define PCLK_SPI0 341 -#define PCLK_SPI1 342 -#define PCLK_SARADC 343 -#define PCLK_TSADC 344 -#define PCLK_TIMER 345 -#define PCLK_OTP_NS 346 -#define PCLK_WDT_NS 347 -#define PCLK_GPIO1 348 -#define PCLK_GPIO2 349 -#define PCLK_GPIO3 350 -#define PCLK_ISP 351 -#define PCLK_CIF 352 -#define PCLK_OTP_PHY 353 - -#define CLK_NR_CLKS (PCLK_OTP_PHY + 1) - -/* pmu-clocks indices */ - -#define PLL_GPLL 1 - -#define SCLK_RTC32K_PMU 4 -#define SCLK_WIFI_PMU 5 -#define SCLK_UART0_PMU 6 -#define SCLK_PVTM_PMU 7 -#define PCLK_PMU_PRE 8 -#define SCLK_REF24M_PMU 9 -#define SCLK_USBPHY_REF 10 -#define SCLK_MIPIDSIPHY_REF 11 - -#define XIN24M_DIV 12 - -#define PCLK_GPIO0_PMU 20 -#define PCLK_UART0_PMU 21 - -#define CLKPMU_NR_CLKS (PCLK_UART0_PMU + 1) - -/* soft-reset indices */ -#define SRST_CORE0_PO 0 -#define SRST_CORE1_PO 1 -#define SRST_CORE2_PO 2 -#define SRST_CORE3_PO 3 -#define SRST_CORE0 4 -#define SRST_CORE1 5 -#define SRST_CORE2 6 -#define SRST_CORE3 7 -#define SRST_CORE0_DBG 8 -#define SRST_CORE1_DBG 9 -#define SRST_CORE2_DBG 10 -#define SRST_CORE3_DBG 11 -#define SRST_TOPDBG 12 -#define SRST_CORE_NOC 13 -#define SRST_STRC_A 14 -#define SRST_L2C 15 - -#define SRST_DAP 16 -#define SRST_CORE_PVTM 17 -#define SRST_GPU 18 -#define SRST_GPU_NIU 19 -#define SRST_UPCTL2 20 -#define SRST_UPCTL2_A 21 -#define SRST_UPCTL2_P 22 -#define SRST_MSCH 23 -#define SRST_MSCH_P 24 -#define SRST_DDRMON_P 25 -#define SRST_DDRSTDBY_P 26 -#define SRST_DDRSTDBY 27 -#define SRST_DDRGRF_p 28 -#define SRST_AXI_SPLIT_A 29 -#define SRST_AXI_CMD_A 30 -#define SRST_AXI_CMD_P 31 - -#define SRST_DDRPHY 32 -#define SRST_DDRPHYDIV 33 -#define SRST_DDRPHY_P 34 -#define SRST_VPU_A 36 -#define SRST_VPU_NIU_A 37 -#define SRST_VPU_H 38 -#define SRST_VPU_NIU_H 39 -#define SRST_VI_NIU_A 40 -#define SRST_VI_NIU_H 41 -#define SRST_ISP_H 42 -#define SRST_ISP 43 -#define SRST_CIF_A 44 -#define SRST_CIF_H 45 -#define SRST_CIF_PCLKIN 46 -#define SRST_MIPICSIPHY_P 47 - -#define SRST_VO_NIU_A 48 -#define SRST_VO_NIU_H 49 -#define SRST_VO_NIU_P 50 -#define SRST_VOPB_A 51 -#define SRST_VOPB_H 52 -#define SRST_VOPB 53 -#define SRST_PWM_VOPB 54 -#define SRST_VOPL_A 55 -#define SRST_VOPL_H 56 -#define SRST_VOPL 57 -#define SRST_RGA_A 58 -#define SRST_RGA_H 59 -#define SRST_RGA 60 -#define SRST_MIPIDSI_HOST_P 61 -#define SRST_MIPIDSIPHY_P 62 -#define SRST_VPU_CORE 63 - -#define SRST_PERI_NIU_A 64 -#define SRST_USB_NIU_H 65 -#define SRST_USB2OTG_H 66 -#define SRST_USB2OTG 67 -#define SRST_USB2OTG_ADP 68 -#define SRST_USB2HOST_H 69 -#define SRST_USB2HOST_ARB_H 70 -#define SRST_USB2HOST_AUX_H 71 -#define SRST_USB2HOST_EHCI 72 -#define SRST_USB2HOST 73 -#define SRST_USBPHYPOR 74 -#define SRST_USBPHY_OTG_PORT 75 -#define SRST_USBPHY_HOST_PORT 76 -#define SRST_USBPHY_GRF 77 -#define SRST_CPU_BOOST_P 78 -#define SRST_CPU_BOOST 79 - -#define SRST_MMC_NAND_NIU_H 80 -#define SRST_SDIO_H 81 -#define SRST_EMMC_H 82 -#define SRST_SFC_H 83 -#define SRST_SFC 84 -#define SRST_SDCARD_NIU_H 85 -#define SRST_SDMMC_H 86 -#define SRST_NANDC_H 89 -#define SRST_NANDC 90 -#define SRST_GMAC_NIU_A 92 -#define SRST_GMAC_NIU_P 93 -#define SRST_GMAC_A 94 - -#define SRST_PMU_NIU_P 96 -#define SRST_PMU_SGRF_P 97 -#define SRST_PMU_GRF_P 98 -#define SRST_PMU 99 -#define SRST_PMU_MEM_P 100 -#define SRST_PMU_GPIO0_P 101 -#define SRST_PMU_UART0_P 102 -#define SRST_PMU_CRU_P 103 -#define SRST_PMU_PVTM 104 -#define SRST_PMU_UART 105 -#define SRST_PMU_NIU_H 106 -#define SRST_PMU_DDR_FAIL_SAVE 107 -#define SRST_PMU_CORE_PERF_A 108 -#define SRST_PMU_CORE_GRF_P 109 -#define SRST_PMU_GPU_PERF_A 110 -#define SRST_PMU_GPU_GRF_P 111 - -#define SRST_CRYPTO_NIU_A 112 -#define SRST_CRYPTO_NIU_H 113 -#define SRST_CRYPTO_A 114 -#define SRST_CRYPTO_H 115 -#define SRST_CRYPTO 116 -#define SRST_CRYPTO_APK 117 -#define SRST_BUS_NIU_H 120 -#define SRST_USB_NIU_P 121 -#define SRST_BUS_TOP_NIU_P 122 -#define SRST_INTMEM_A 123 -#define SRST_GIC_A 124 -#define SRST_ROM_H 126 -#define SRST_DCF_A 127 - -#define SRST_DCF_P 128 -#define SRST_PDM_H 129 -#define SRST_PDM 130 -#define SRST_I2S0_H 131 -#define SRST_I2S0_TX 132 -#define SRST_I2S1_H 133 -#define SRST_I2S1 134 -#define SRST_I2S2_H 135 -#define SRST_I2S2 136 -#define SRST_UART1_P 137 -#define SRST_UART1 138 -#define SRST_UART2_P 139 -#define SRST_UART2 140 -#define SRST_UART3_P 141 -#define SRST_UART3 142 -#define SRST_UART4_P 143 - -#define SRST_UART4 144 -#define SRST_UART5_P 145 -#define SRST_UART5 146 -#define SRST_I2C0_P 147 -#define SRST_I2C0 148 -#define SRST_I2C1_P 149 -#define SRST_I2C1 150 -#define SRST_I2C2_P 151 -#define SRST_I2C2 152 -#define SRST_I2C3_P 153 -#define SRST_I2C3 154 -#define SRST_PWM0_P 157 -#define SRST_PWM0 158 -#define SRST_PWM1_P 159 - -#define SRST_PWM1 160 -#define SRST_SPI0_P 161 -#define SRST_SPI0 162 -#define SRST_SPI1_P 163 -#define SRST_SPI1 164 -#define SRST_SARADC_P 165 -#define SRST_SARADC 166 -#define SRST_TSADC_P 167 -#define SRST_TSADC 168 -#define SRST_TIMER_P 169 -#define SRST_TIMER0 170 -#define SRST_TIMER1 171 -#define SRST_TIMER2 172 -#define SRST_TIMER3 173 -#define SRST_TIMER4 174 -#define SRST_TIMER5 175 - -#define SRST_OTP_NS_P 176 -#define SRST_OTP_NS_SBPI 177 -#define SRST_OTP_NS_USR 178 -#define SRST_OTP_PHY_P 179 -#define SRST_OTP_PHY 180 -#define SRST_WDT_NS_P 181 -#define SRST_GPIO1_P 182 -#define SRST_GPIO2_P 183 -#define SRST_GPIO3_P 184 -#define SRST_SGRF_P 185 -#define SRST_GRF_P 186 -#define SRST_I2S0_RX 191 - -#endif diff --git a/include/dt-bindings/power/px30-power.h b/include/dt-bindings/power/px30-power.h deleted file mode 100644 index 30917a99ad2..00000000000 --- a/include/dt-bindings/power/px30-power.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_POWER_PX30_POWER_H__ -#define __DT_BINDINGS_POWER_PX30_POWER_H__ - -/* VD_CORE */ -#define PX30_PD_A35_0 0 -#define PX30_PD_A35_1 1 -#define PX30_PD_A35_2 2 -#define PX30_PD_A35_3 3 -#define PX30_PD_SCU 4 - -/* VD_LOGIC */ -#define PX30_PD_USB 5 -#define PX30_PD_DDR 6 -#define PX30_PD_SDCARD 7 -#define PX30_PD_CRYPTO 8 -#define PX30_PD_GMAC 9 -#define PX30_PD_MMC_NAND 10 -#define PX30_PD_VPU 11 -#define PX30_PD_VO 12 -#define PX30_PD_VI 13 -#define PX30_PD_GPU 14 - -/* VD_PMU */ -#define PX30_PD_PMU 15 - -#endif -- cgit v1.2.3 From c308148a3e30ac97423d3f956589bfe321114e66 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 25 Jul 2024 09:46:04 +0000 Subject: rockchip: Use files from dts/upstream Most Rockchip aarch64 targets have now migrated to use OF_UPSTREAM, however a few of the old dtsi and dt-bindings files still remain. Remove remaining common dtsi and header files that can be included directly from dts/upstream to prevent possible issues when future tags from devicetree-binding is merged. No changes is expected with this. Signed-off-by: Jonas Karlman Reviewed-by: Quentin Schulz --- include/dt-bindings/clock/rockchip,rk808.h | 11 ----------- include/dt-bindings/soc/rockchip,boot-mode.h | 16 ---------------- include/dt-bindings/soc/rockchip,vop2.h | 18 ------------------ 3 files changed, 45 deletions(-) delete mode 100644 include/dt-bindings/clock/rockchip,rk808.h delete mode 100644 include/dt-bindings/soc/rockchip,boot-mode.h delete mode 100644 include/dt-bindings/soc/rockchip,vop2.h (limited to 'include') diff --git a/include/dt-bindings/clock/rockchip,rk808.h b/include/dt-bindings/clock/rockchip,rk808.h deleted file mode 100644 index 1a873432f96..00000000000 --- a/include/dt-bindings/clock/rockchip,rk808.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * This header provides constants clk index RK808 pmic clkout - */ -#ifndef _CLK_ROCKCHIP_RK808 -#define _CLK_ROCKCHIP_RK808 - -/* CLOCKOUT index */ -#define RK808_CLKOUT0 0 -#define RK808_CLKOUT1 1 - -#endif diff --git a/include/dt-bindings/soc/rockchip,boot-mode.h b/include/dt-bindings/soc/rockchip,boot-mode.h deleted file mode 100644 index 4b0914c0989..00000000000 --- a/include/dt-bindings/soc/rockchip,boot-mode.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ROCKCHIP_BOOT_MODE_H -#define __ROCKCHIP_BOOT_MODE_H - -/*high 24 bits is tag, low 8 bits is type*/ -#define REBOOT_FLAG 0x5242C300 -/* normal boot */ -#define BOOT_NORMAL (REBOOT_FLAG + 0) -/* enter bootloader rockusb mode */ -#define BOOT_BL_DOWNLOAD (REBOOT_FLAG + 1) -/* enter recovery */ -#define BOOT_RECOVERY (REBOOT_FLAG + 3) - /* enter fastboot mode */ -#define BOOT_FASTBOOT (REBOOT_FLAG + 9) - -#endif diff --git a/include/dt-bindings/soc/rockchip,vop2.h b/include/dt-bindings/soc/rockchip,vop2.h deleted file mode 100644 index 668f199df9f..00000000000 --- a/include/dt-bindings/soc/rockchip,vop2.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ - -#ifndef __DT_BINDINGS_ROCKCHIP_VOP2_H -#define __DT_BINDINGS_ROCKCHIP_VOP2_H - -#define ROCKCHIP_VOP2_EP_RGB0 1 -#define ROCKCHIP_VOP2_EP_HDMI0 2 -#define ROCKCHIP_VOP2_EP_EDP0 3 -#define ROCKCHIP_VOP2_EP_MIPI0 4 -#define ROCKCHIP_VOP2_EP_LVDS0 5 -#define ROCKCHIP_VOP2_EP_MIPI1 6 -#define ROCKCHIP_VOP2_EP_LVDS1 7 -#define ROCKCHIP_VOP2_EP_HDMI1 8 -#define ROCKCHIP_VOP2_EP_EDP1 9 -#define ROCKCHIP_VOP2_EP_DP0 10 -#define ROCKCHIP_VOP2_EP_DP1 11 - -#endif /* __DT_BINDINGS_ROCKCHIP_VOP2_H */ -- cgit v1.2.3 From d27c3431ae7e2394843a09a1d36a78f22fa8b50f Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 2 Aug 2024 23:00:28 +0200 Subject: board: rockchip: Add Radxa ROCK 5 ITX The Rock 5 ITX is a board in ITX form factor using the RK3588 SoC It can be powered either by 12V, ATX power-supply or PoE. Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot, 2*2.5Gb PCIe-connected Ethernet NICs. Display options are 2*HDMI, DP via USB-c, eDP + 2*DSI via PCB connectors. USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel connector. Schematics for the board can be found on - https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf - https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf The naming scheme with the dashes follows Dragan's comment on the mainline devicetree commit: "the name of this board deviates from the standard Radxa naming scheme, which is something like "ROCK " thus, "rock-5a" is fine, but it should be "rock-5-itx", simply because there's a space between "5" and "ITX" in "ROCK 5 ITX" Signed-off-by: Heiko Stuebner Reviewed-by: Kever Yang Signed-off-by: Kever Yang --- include/configs/rock-5-itx-rk3588.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 include/configs/rock-5-itx-rk3588.h (limited to 'include') diff --git a/include/configs/rock-5-itx-rk3588.h b/include/configs/rock-5-itx-rk3588.h new file mode 100644 index 00000000000..bc0f9e72bc5 --- /dev/null +++ b/include/configs/rock-5-itx-rk3588.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024 Heiko Stuebner + */ + +#ifndef __ROCK_5_ITX_RK3588_H +#define __ROCK_5_ITX_RK3588_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include + +#endif /* __ROCK_5_ITX_RK3588_H */ -- cgit v1.2.3 From 68a431e6386a2e31137324f49fd3081e57fed31a Mon Sep 17 00:00:00 2001 From: Gary Bisson Date: Mon, 5 Aug 2024 23:25:08 +0200 Subject: tools: imx8image: add upower image support Part of the upower management was included in a previous commit [1]. This patch only adds the bits required to properly parse a config file that would include the binary as follows: IMAGE PWR upower.bin [1] 6ec65c8558f (tools: image: support i.MX93) Signed-off-by: Gary Bisson Reviewed-by: Peng Fan --- include/imx8image.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/imx8image.h b/include/imx8image.h index 32064bfeeb8..85fb642ae39 100644 --- a/include/imx8image.h +++ b/include/imx8image.h @@ -162,6 +162,7 @@ enum imx8image_cmd { enum imx8image_core_type { CFG_CORE_INVALID, CFG_SCU, + CFG_PWR, CFG_M40, CFG_M41, CFG_A35, -- cgit v1.2.3 From d1cdb5fe2da0cde1c07fe513e214b9dcb4f7aff3 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 9 Aug 2024 14:58:08 -0300 Subject: tqma6: Convert to PMIC and I2C driver model Currently, the power_init_board() function is not executed because CONFIG_POWER_LEGACY is not selected. Convert to PMIC driver model, which allows removing board I2C code in favor of the I2C driver model. Signed-off-by: Fabio Estevam --- include/configs/tqma6.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 2da76f15431..b4a06a75c53 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -26,14 +26,6 @@ #define TQMA6_SPI_FLASH_SECTOR_SIZE SZ_64K -/* I2C Configs */ -#define CFG_I2C_MULTI_BUS - -#if !defined(CONFIG_DM_PMIC) -#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 -#define TQMA6_PFUZE100_I2C_BUS 2 -#endif - /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 -- cgit v1.2.3