From 1c73e05b03477ba5e17ac6dcbda9b473140f6ac5 Mon Sep 17 00:00:00 2001 From: Enrico Leto Date: Wed, 8 Nov 2023 15:53:17 +0100 Subject: siemens,am335x: clean-up draco targets Draco is a family of 3 boards: thuban, rastaban & etamin. Rename all targets of the family adding the draco- prefix to increase readibility and simplify future commits about concerning all boards of the family. The name draco was initially used for the first target. It's deprecated since a 2nd target was introduced. Unfortunately the draco target was copied to the thuban target instead to be renamed. Remove it to save unnecessary maintenance effort. Signed-off-by: Enrico Leto --- include/configs/draco-etamin.h | 141 +++++++++++++++++++++++++++++++++++++++ include/configs/draco-rastaban.h | 51 ++++++++++++++ include/configs/draco-thuban.h | 44 ++++++++++++ include/configs/draco.h | 41 ------------ include/configs/etamin.h | 141 --------------------------------------- include/configs/rastaban.h | 51 -------------- include/configs/thuban.h | 44 ------------ 7 files changed, 236 insertions(+), 277 deletions(-) create mode 100644 include/configs/draco-etamin.h create mode 100644 include/configs/draco-rastaban.h create mode 100644 include/configs/draco-thuban.h delete mode 100644 include/configs/draco.h delete mode 100644 include/configs/etamin.h delete mode 100644 include/configs/rastaban.h delete mode 100644 include/configs/thuban.h (limited to 'include') diff --git a/include/configs/draco-etamin.h b/include/configs/draco-etamin.h new file mode 100644 index 00000000000..97585a4fd12 --- /dev/null +++ b/include/configs/draco-etamin.h @@ -0,0 +1,141 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#ifndef __CONFIG_ETAMIN_H +#define __CONFIG_ETAMIN_H + +#include "siemens-am33x-common.h" +/* NAND specific changes for etamin due to different page size */ +#undef CFG_SYS_NAND_ECCPOS + +#define CFG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */ +#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ + 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ + 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ + 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ + 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ + 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ + 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ + 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ + 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ + 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ + 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ + 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ + 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ + 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ + 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ + 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ + 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ + 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ + } + +#undef CFG_SYS_NAND_ECCSIZE +#undef CFG_SYS_NAND_ECCBYTES +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 26 + +#define CFG_SYS_NAND_BASE2 (0x18000000) /* physical address */ +#define CFG_SYS_NAND_BASE_LIST {CFG_SYS_NAND_BASE, \ + CFG_SYS_NAND_BASE2} + +#define DDR_PLL_FREQ 303 + +/* FWD Button = 27 + * SRV Button = 87 */ +#define BOARD_DFU_BUTTON_GPIO 27 +#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ +/* In dfu mode keep led1 on */ +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + "button_dfu0=27\0" \ + "button_dfu1=87\0" \ + "led0=3,0,1\0" \ + "led1=4,0,0\0" \ + "led2=5,0,1\0" \ + "led3=87,0,1\0" \ + "led4=60,0,1\0" \ + "led5=63,0,1\0" + +/* Physical Memory Map */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +#define EEPROM_ADDR_DDR3 0x90 +#define EEPROM_ADDR_CHIP 0x120 + +/* nedded by compliance test in read mode */ + +#undef COMMON_ENV_DFU_ARGS +#define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \ + "setenv bootargs ${bootargs};" \ + "mtdparts default;" \ + "draco_led 1;" \ + "dfu 0 mtd 0;" \ + "draco_led 0;\0" \ + +#undef DFU_ALT_INFO_NAND_V2 +#define DFU_ALT_INFO_NAND_V2 \ + "spl mtddev;" \ + "spl.backup1 mtddev;" \ + "spl.backup2 mtddev;" \ + "spl.backup3 mtddev;" \ + "u-boot mtddev;" \ + "u-boot.env0 mtddev;" \ + "u-boot.env1 mtddev;" \ + "rootfs mtddevubi" \ + +#undef CFG_ENV_SETTINGS_NAND_V2 +#define CFG_ENV_SETTINGS_NAND_V2 \ + "nand_active_ubi_vol=rootfs_a\0" \ + "rootfs_name=rootfs\0" \ + "kernel_name=uImage\0"\ + "nand_root_fs_type=ubifs rootwait\0" \ + "nand_args=run bootargs_defaults;" \ + "mtdparts default;" \ + "setenv ${partitionset_active} true;" \ + "if test -n ${A}; then " \ + "setenv nand_active_ubi_vol ${rootfs_name}_a;" \ + "fi;" \ + "if test -n ${B}; then " \ + "setenv nand_active_ubi_vol ${rootfs_name}_b;" \ + "fi;" \ + "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \ + "ubi.mtd=rootfs,${ubi_off};" \ + "setenv bootargs ${bootargs} " \ + "root=${nand_root} noinitrd ${mtdparts} " \ + "rootfstype=${nand_root_fs_type} ip=${ip_method} " \ + "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \ + "=mtdoops\0" \ + COMMON_ENV_DFU_ARGS \ + "dfu_alt_info=" DFU_ALT_INFO_NAND_V2 "\0" \ + COMMON_ENV_NAND_BOOT \ + "ubi part rootfs ${ubi_off};" \ + "ubifsmount ubi0:${nand_active_ubi_vol};" \ + "ubifsload ${kloadaddr} boot/${kernel_name};" \ + "ubifsload ${loadaddr} boot/${dtb_name}.dtb;" \ + "bootm ${kloadaddr} - ${loadaddr}\0" \ + "nand_boot_backup=ubifsload ${loadaddr} boot/am335x-draco.dtb;" \ + "bootm ${kloadaddr} - ${loadaddr}\0" \ + COMMON_ENV_NAND_CMDS + +/* Default env settings */ +#define CFG_EXTRA_ENV_SETTINGS \ + "hostname=etamin\0" \ + "ubi_off=4096\0"\ + "nand_img_size=0x400000\0" \ + "optargs=\0" \ + "preboot=draco_led 0\0" \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_V2 \ + CFG_ENV_SETTINGS_NAND_V2 + +#endif /* ! __CONFIG_ETAMIN_H */ diff --git a/include/configs/draco-rastaban.h b/include/configs/draco-rastaban.h new file mode 100644 index 00000000000..0991ebfd00c --- /dev/null +++ b/include/configs/draco-rastaban.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#ifndef __CONFIG_RASTABAN_H +#define __CONFIG_RASTABAN_H + +#include "siemens-am33x-common.h" + +#define DDR_PLL_FREQ 303 + +/* FWD Button = 27 + * SRV Button = 87 */ +#define BOARD_DFU_BUTTON_GPIO 27 +#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ +/* In dfu mode keep led1 on */ +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + "button_dfu0=27\0" \ + "button_dfu1=87\0" \ + "led0=3,0,1\0" \ + "led1=4,0,0\0" \ + "led2=5,0,1\0" \ + "led3=62,0,1\0" \ + "led4=60,0,1\0" \ + "led5=63,0,1\0" + + /* Physical Memory Map */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +#define EEPROM_ADDR_DDR3 0x90 +#define EEPROM_ADDR_CHIP 0x120 + +/* Default env settings */ +#define CFG_EXTRA_ENV_SETTINGS \ + "hostname=rastaban\0" \ + "ubi_off=2048\0"\ + "nand_img_size=0x400000\0" \ + "optargs=\0" \ + "preboot=draco_led 0\0" \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_V2 \ + CFG_ENV_SETTINGS_NAND_V2 + +#endif /* ! __CONFIG_RASTABAN_H */ diff --git a/include/configs/draco-thuban.h b/include/configs/draco-thuban.h new file mode 100644 index 00000000000..f4c04c55ebf --- /dev/null +++ b/include/configs/draco-thuban.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#ifndef __CONFIG_THUBAN_H +#define __CONFIG_THUBAN_H + +#include "siemens-am33x-common.h" + +#define DDR_PLL_FREQ 303 + +#define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */ +#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ + +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + "button_dfu0=27\0" \ + "led0=103,1,0\0" \ + "led1=64,0,1\0" + + /* Physical Memory Map */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +#define EEPROM_ADDR_DDR3 0x90 +#define EEPROM_ADDR_CHIP 0x120 + +/* Default env settings */ +#define CFG_EXTRA_ENV_SETTINGS \ + "hostname=thuban\0" \ + "ubi_off=2048\0"\ + "nand_img_size=0x400000\0" \ + "optargs=\0" \ + "preboot=draco_led 0\0" \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_V2 \ + CFG_ENV_SETTINGS_NAND_V2 + +#endif /* ! __CONFIG_THUBAN_H */ diff --git a/include/configs/draco.h b/include/configs/draco.h deleted file mode 100644 index 8f993cee0a3..00000000000 --- a/include/configs/draco.h +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 Siemens Schweiz AG - * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * Based on: - * U-Boot file:/include/configs/am335x_evm.h - * - * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#ifndef __CONFIG_DRACO_H -#define __CONFIG_DRACO_H - -#include "siemens-am33x-common.h" - -#define DDR_PLL_FREQ 303 - -#define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */ -#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ - -#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - "button_dfu0=27\0" \ - "led0=103,1,0\0" \ - "led1=64,0,1\0" - - /* Physical Memory Map */ -#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ - -/* Default env settings */ -#define CFG_EXTRA_ENV_SETTINGS \ - "hostname=draco\0" \ - "ubi_off=2048\0"\ - "nand_img_size=0x400000\0" \ - "optargs=\0" \ - "preboot=draco_led 0\0" \ - CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CFG_ENV_SETTINGS_V2 \ - CFG_ENV_SETTINGS_NAND_V2 - -#endif /* ! __CONFIG_DRACO_H */ diff --git a/include/configs/etamin.h b/include/configs/etamin.h deleted file mode 100644 index 97585a4fd12..00000000000 --- a/include/configs/etamin.h +++ /dev/null @@ -1,141 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 Siemens Schweiz AG - * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * Based on: - * U-Boot file:/include/configs/am335x_evm.h - * - * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#ifndef __CONFIG_ETAMIN_H -#define __CONFIG_ETAMIN_H - -#include "siemens-am33x-common.h" -/* NAND specific changes for etamin due to different page size */ -#undef CFG_SYS_NAND_ECCPOS - -#define CFG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */ -#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ - 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ - 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ - 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ - 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ - 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ - 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ - 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ - 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ - 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ - 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ - 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ - 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ - 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ - 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ - 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ - 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ - 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ - 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ - 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ - } - -#undef CFG_SYS_NAND_ECCSIZE -#undef CFG_SYS_NAND_ECCBYTES -#define CFG_SYS_NAND_ECCSIZE 512 -#define CFG_SYS_NAND_ECCBYTES 26 - -#define CFG_SYS_NAND_BASE2 (0x18000000) /* physical address */ -#define CFG_SYS_NAND_BASE_LIST {CFG_SYS_NAND_BASE, \ - CFG_SYS_NAND_BASE2} - -#define DDR_PLL_FREQ 303 - -/* FWD Button = 27 - * SRV Button = 87 */ -#define BOARD_DFU_BUTTON_GPIO 27 -#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ -/* In dfu mode keep led1 on */ -#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - "button_dfu0=27\0" \ - "button_dfu1=87\0" \ - "led0=3,0,1\0" \ - "led1=4,0,0\0" \ - "led2=5,0,1\0" \ - "led3=87,0,1\0" \ - "led4=60,0,1\0" \ - "led5=63,0,1\0" - -/* Physical Memory Map */ -#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ - -#define EEPROM_ADDR_DDR3 0x90 -#define EEPROM_ADDR_CHIP 0x120 - -/* nedded by compliance test in read mode */ - -#undef COMMON_ENV_DFU_ARGS -#define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \ - "setenv bootargs ${bootargs};" \ - "mtdparts default;" \ - "draco_led 1;" \ - "dfu 0 mtd 0;" \ - "draco_led 0;\0" \ - -#undef DFU_ALT_INFO_NAND_V2 -#define DFU_ALT_INFO_NAND_V2 \ - "spl mtddev;" \ - "spl.backup1 mtddev;" \ - "spl.backup2 mtddev;" \ - "spl.backup3 mtddev;" \ - "u-boot mtddev;" \ - "u-boot.env0 mtddev;" \ - "u-boot.env1 mtddev;" \ - "rootfs mtddevubi" \ - -#undef CFG_ENV_SETTINGS_NAND_V2 -#define CFG_ENV_SETTINGS_NAND_V2 \ - "nand_active_ubi_vol=rootfs_a\0" \ - "rootfs_name=rootfs\0" \ - "kernel_name=uImage\0"\ - "nand_root_fs_type=ubifs rootwait\0" \ - "nand_args=run bootargs_defaults;" \ - "mtdparts default;" \ - "setenv ${partitionset_active} true;" \ - "if test -n ${A}; then " \ - "setenv nand_active_ubi_vol ${rootfs_name}_a;" \ - "fi;" \ - "if test -n ${B}; then " \ - "setenv nand_active_ubi_vol ${rootfs_name}_b;" \ - "fi;" \ - "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \ - "ubi.mtd=rootfs,${ubi_off};" \ - "setenv bootargs ${bootargs} " \ - "root=${nand_root} noinitrd ${mtdparts} " \ - "rootfstype=${nand_root_fs_type} ip=${ip_method} " \ - "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \ - "=mtdoops\0" \ - COMMON_ENV_DFU_ARGS \ - "dfu_alt_info=" DFU_ALT_INFO_NAND_V2 "\0" \ - COMMON_ENV_NAND_BOOT \ - "ubi part rootfs ${ubi_off};" \ - "ubifsmount ubi0:${nand_active_ubi_vol};" \ - "ubifsload ${kloadaddr} boot/${kernel_name};" \ - "ubifsload ${loadaddr} boot/${dtb_name}.dtb;" \ - "bootm ${kloadaddr} - ${loadaddr}\0" \ - "nand_boot_backup=ubifsload ${loadaddr} boot/am335x-draco.dtb;" \ - "bootm ${kloadaddr} - ${loadaddr}\0" \ - COMMON_ENV_NAND_CMDS - -/* Default env settings */ -#define CFG_EXTRA_ENV_SETTINGS \ - "hostname=etamin\0" \ - "ubi_off=4096\0"\ - "nand_img_size=0x400000\0" \ - "optargs=\0" \ - "preboot=draco_led 0\0" \ - CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CFG_ENV_SETTINGS_V2 \ - CFG_ENV_SETTINGS_NAND_V2 - -#endif /* ! __CONFIG_ETAMIN_H */ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h deleted file mode 100644 index 0991ebfd00c..00000000000 --- a/include/configs/rastaban.h +++ /dev/null @@ -1,51 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 Siemens Schweiz AG - * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * Based on: - * U-Boot file:/include/configs/am335x_evm.h - * - * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#ifndef __CONFIG_RASTABAN_H -#define __CONFIG_RASTABAN_H - -#include "siemens-am33x-common.h" - -#define DDR_PLL_FREQ 303 - -/* FWD Button = 27 - * SRV Button = 87 */ -#define BOARD_DFU_BUTTON_GPIO 27 -#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ -/* In dfu mode keep led1 on */ -#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - "button_dfu0=27\0" \ - "button_dfu1=87\0" \ - "led0=3,0,1\0" \ - "led1=4,0,0\0" \ - "led2=5,0,1\0" \ - "led3=62,0,1\0" \ - "led4=60,0,1\0" \ - "led5=63,0,1\0" - - /* Physical Memory Map */ -#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ - -#define EEPROM_ADDR_DDR3 0x90 -#define EEPROM_ADDR_CHIP 0x120 - -/* Default env settings */ -#define CFG_EXTRA_ENV_SETTINGS \ - "hostname=rastaban\0" \ - "ubi_off=2048\0"\ - "nand_img_size=0x400000\0" \ - "optargs=\0" \ - "preboot=draco_led 0\0" \ - CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CFG_ENV_SETTINGS_V2 \ - CFG_ENV_SETTINGS_NAND_V2 - -#endif /* ! __CONFIG_RASTABAN_H */ diff --git a/include/configs/thuban.h b/include/configs/thuban.h deleted file mode 100644 index f4c04c55ebf..00000000000 --- a/include/configs/thuban.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 Siemens Schweiz AG - * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * Based on: - * U-Boot file:/include/configs/am335x_evm.h - * - * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#ifndef __CONFIG_THUBAN_H -#define __CONFIG_THUBAN_H - -#include "siemens-am33x-common.h" - -#define DDR_PLL_FREQ 303 - -#define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */ -#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ - -#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - "button_dfu0=27\0" \ - "led0=103,1,0\0" \ - "led1=64,0,1\0" - - /* Physical Memory Map */ -#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ - -#define EEPROM_ADDR_DDR3 0x90 -#define EEPROM_ADDR_CHIP 0x120 - -/* Default env settings */ -#define CFG_EXTRA_ENV_SETTINGS \ - "hostname=thuban\0" \ - "ubi_off=2048\0"\ - "nand_img_size=0x400000\0" \ - "optargs=\0" \ - "preboot=draco_led 0\0" \ - CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CFG_ENV_SETTINGS_V2 \ - CFG_ENV_SETTINGS_NAND_V2 - -#endif /* ! __CONFIG_THUBAN_H */ -- cgit v1.3.1 From 438d25394353d7498559d18d72492c39cf2bc8b6 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 14 Nov 2023 16:51:56 +0800 Subject: arm: dts: npcm845-evb: fix/add node and aliases Modify spi and usb aliases name. Add dt-binding for usb phy define and fix usb phy reset error. Add tpm/otpee and host_intf node. Signed-off-by: Jim Liu --- arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 11 +++++++++- arch/arm/dts/nuvoton-npcm845-evb.dts | 29 ++++++++++++++++++++------- arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi | 2 +- include/dt-bindings/phy/nuvoton,npcm-usbphy.h | 14 +++++++++++++ 4 files changed, 47 insertions(+), 9 deletions(-) create mode 100644 include/dt-bindings/phy/nuvoton,npcm-usbphy.h (limited to 'include') diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi index fabe5925b70..1694ef88495 100644 --- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi @@ -133,7 +133,16 @@ ranges = <0x0 0x0 0xf0000000 0x00300000>, <0xfff00000 0x0 0xfff00000 0x00016000>; - spi1: spi@201000 { + host_intf: host_intf@9f000 { + compatible = "nuvoton,npcm845-host-intf"; + reg = <0x9f000 0x1000>; + type = "espi"; + ioaddr = <0x4e>; + channel-support = <0xf>; + syscon = <&gcr>; + }; + + pspi: spi@201000 { compatible = "nuvoton,npcm845-pspi"; reg = <0x201000 0x1000>; pinctrl-names = "default"; diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts index a93666cb419..0d3aaa0fffe 100644 --- a/arch/arm/dts/nuvoton-npcm845-evb.dts +++ b/arch/arm/dts/nuvoton-npcm845-evb.dts @@ -2,6 +2,8 @@ // Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com /dts-v1/; + +#include #include "nuvoton-npcm845.dtsi" #include "nuvoton-npcm845-pincfg.dtsi" @@ -46,10 +48,10 @@ spi1 = &fiu1; spi3 = &fiu3; spi4 = &fiux; - spi5 = &spi1; + spi5 = &pspi; usb0 = &udc0; usb1 = &ehci1; - usb2 = &ehci2; + usb2 = &udc8; }; chosen { @@ -60,6 +62,17 @@ reg = <0x0 0x0 0x0 0x40000000>; }; + tpm@0 { + compatible = "microsoft,ftpm"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + vsbr2: vsbr2 { compatible = "regulator-npcm845"; regulator-name = "vr2"; @@ -149,6 +162,8 @@ snps,reset-active-low; snps,reset-delays-us = <0 10000 1000000>; snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */ + phy-supply = <&vsbr2>; + phy-supply-microvolt = <1800000>; status = "okay"; }; @@ -179,7 +194,7 @@ status = "okay"; }; -&spi1 { +&pspi { status = "okay"; }; @@ -197,7 +212,7 @@ &udc0 { status = "okay"; - phys = <&usbphy1 0>; + phys = <&usbphy1 NPCM_UDC0_7>; }; &sdhci0 { @@ -207,12 +222,12 @@ &ehci1 { status = "okay"; - phys = <&usbphy2 3>; + phys = <&usbphy2 NPCM_USBH1>; }; -&ehci2 { +&udc8 { status = "okay"; - phys = <&usbphy3 4>; + phys = <&usbphy3 NPCM_UDC8>; }; &rng { diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi index e49e564b790..4c6d5bed447 100644 --- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi +++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi @@ -174,7 +174,7 @@ compatible = "nuvoton,npcm845-usb-phy"; #phy-cells = <1>; reg = <3>; - resets = <&rstc3 NPCM8XX_RESET_USBPHY3>; + resets = <&rstc4 NPCM8XX_RESET_USBPHY3>; status = "disabled"; }; }; diff --git a/include/dt-bindings/phy/nuvoton,npcm-usbphy.h b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h new file mode 100644 index 00000000000..46946d377d9 --- /dev/null +++ b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copyright (c) 2023 Nuvoton Technology corporation. + +#ifndef _DT_BINDINGS_NPCM_USBPHY_H +#define _DT_BINDINGS_NPCM_USBPHY_H + +#define NPCM_UDC0_7 0 +#define NPCM_UDC8 1 +#define NPCM_UDC9 2 +#define NPCM_USBH1 3 +#define NPCM_USBH2 4 +#define NPCM_MAX_USB_CTRL_ID 4 + +#endif -- cgit v1.3.1