From 4f627c5a59f4f69df156c199d6238849f26fe9af Mon Sep 17 00:00:00 2001 From: Nathan Rossi Date: Fri, 8 Jan 2016 03:00:45 +1000 Subject: spl: dm: Add SPL_DM_SEQ_ALIAS config option The Device Model sequence alias feature is required by some Uclasses. Instead of disabling the feature for all SPL targets allow it to be configured. The config option is disabled by default to reduce code size for targets that are not interested or do not require this feature. Signed-off-by: Nathan Rossi Acked-by: Simon Glass Acked-by: Michal Simek Cc: Simon Glass Cc: Masahiro Yamada Cc: Linus Walleij Cc: Marek Vasut Cc: Michal Simek Cc: Stefan Roese Signed-off-by: Michal Simek --- include/config_uncmd_spl.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index 6e299f69ae4..3b198ae3ced 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -29,7 +29,6 @@ #endif #undef CONFIG_DM_WARN -#undef CONFIG_DM_SEQ_ALIAS #undef CONFIG_DM_STDIO #endif /* CONFIG_SPL_BUILD */ -- cgit v1.3.1 From fc82edd8440721aadf3bfc784f29a513ad7680be Mon Sep 17 00:00:00 2001 From: Nathan Rossi Date: Fri, 8 Jan 2016 03:00:48 +1000 Subject: arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs This feature is required in SPL to enable support for loading from SPI flash. Also clean up the #define in socfpga_common.h. Signed-off-by: Nathan Rossi Reviewed-by: Stefan Roese Acked: Marek Vasut Cc: Dinh Nguyen Cc: Chin-Liang See Cc: Marek Vasut Cc: Stefan Roese Signed-off-by: Michal Simek --- configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + include/configs/socfpga_common.h | 1 - 6 files changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 68d12df404c..6e8976fcc35 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index accee924a32..e31aa716893 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index b4f41a939d1..59fbb2c3c12 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index fe940f967a6..aaba8cb29d5 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 3d98a636d91..a4f0835e9da 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -6,6 +6,7 @@ CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x00800000 # CONFIG_CMD_IMLS is not set diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index a09e906a6be..8de0ab90469 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -370,7 +370,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT -#define CONFIG_DM_SEQ_ALIAS 1 #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 -- cgit v1.3.1