From bbe0d4db53e30affae1194882075e1e0997c4c5c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:32 -0600 Subject: tegra: cros_ec: Add tegra support for Chrome OS EC This requires a change to stdin to include the 'cros-ec-keyb' input device. Put this in the common file, enabled by the relevant CONFIG. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra-common-post.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 0cea795de1b..48c1a7a1b67 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -40,8 +40,14 @@ #define STDOUT_LCD "" #endif +#ifdef CONFIG_CROS_EC_KEYB +#define STDOUT_CROS_EC ",cros-ec-keyb" +#else +#define STDOUT_CROS_EC "" +#endif + #define TEGRA_DEVICE_SETTINGS \ - "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB "\0" \ + "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \ "stdout=serial" STDOUT_LCD "\0" \ "stderr=serial" STDOUT_LCD "\0" \ "" -- cgit v1.3.1 From b3b9d7ca324429319df1d1f246643d2ae928beb6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:34 -0600 Subject: dm: tegra: cros_ec: Enable Chrome OS EC on Nyan-big Enable the EC and keyboard, using the SPI bus. The EC driver requires a particular format and a deactivation delay. Also U-Boot does not support interrupts. For now, adjust the device tree to comply. At some point we should tidy this up to support interrupts and make tegra and exynos use the same setup. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/dts/tegra124-nyan-big.dts | 3 +++ configs/nyan-big_defconfig | 5 +++++ include/configs/nyan-big.h | 2 ++ 3 files changed, 10 insertions(+) (limited to 'include') diff --git a/arch/arm/dts/tegra124-nyan-big.dts b/arch/arm/dts/tegra124-nyan-big.dts index 5a39e93c68c..8be6adbf07c 100644 --- a/arch/arm/dts/tegra124-nyan-big.dts +++ b/arch/arm/dts/tegra124-nyan-big.dts @@ -163,12 +163,15 @@ spi@7000d400 { status = "okay"; + spi-deactivate-delay = <200>; + spi-max-frequency = <3000000>; cros_ec: cros-ec@0 { compatible = "google,cros-ec-spi"; spi-max-frequency = <3000000>; interrupt-parent = <&gpio>; interrupts = ; + ec-interrupt = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; reg = <0>; google,cros-ec-spi-msg-delay = <2000>; diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 92acab293bb..81949e89508 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -6,3 +6,8 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_CMD_NET=y CONFIG_DISPLAY_PORT=y CONFIG_VIDEO_TEGRA124=y +CONFIG_DM_CROS_EC=y +CONFIG_CROS_EC=y +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_KEYB=y +CONFIG_CMD_CROS_EC=y diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index a92112f8704..515704f2ed8 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -79,6 +79,8 @@ #define CONFIG_FIT #define CONFIG_OF_LIBFDT +#define CONFIG_KEYBOARD + #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -- cgit v1.3.1 From 0859b49d127665e507300c56fb279183f13321e9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:40 -0600 Subject: tegra: Increase maximum arguments to 32 When setting up large environment variables we can exceed 16 arguemnts. Increase this to avoid problems. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 0bac9ad5c4f..2d5842229ff 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -104,7 +104,7 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -- cgit v1.3.1 From e379b03e6bde7b1e78fbec1adc22d69cd1c3063e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:44 -0600 Subject: tegra: config: Allow Chrome OS environment settings to be included Bring these in if they are provided by the board. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra-common-post.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 48c1a7a1b67..483222fbcf9 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -58,13 +58,18 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#ifndef CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS +#define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "fdt_high=ffffffff\0" \ "initrd_high=ffffffff\0" \ BOOTENV \ - BOARD_EXTRA_ENV_SETTINGS + BOARD_EXTRA_ENV_SETTINGS \ + CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS #if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI) #define CONFIG_TEGRA_SPI -- cgit v1.3.1 From b7160fabf11f423e879ee9cdcf8f7d0de7964509 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:46 -0600 Subject: tegra: config: nyan-big: Add options required by Chrome OS boot We need to match the device tree in the FIT with the U-Boot model so we can automatically select the right device tree. Also adjust the load address so that the device tree is not in the way when a zImage kernel tries to extract itself. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/nyan-big.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index 515704f2ed8..b99d7627612 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -47,6 +47,7 @@ #define CONFIG_AS3722_POWER #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CMD_BMP /* Align LCD to 1MB boundary */ #define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE @@ -77,10 +78,14 @@ #define CONFIG_CMD_DHCP #define CONFIG_FIT +#define CONFIG_FIT_BEST_MATCH #define CONFIG_OF_LIBFDT #define CONFIG_KEYBOARD +#undef CONFIG_LOADADDR +#define CONFIG_LOADADDR 0x82408000 + #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -- cgit v1.3.1 From fb1e3eb9eae5eda7fe9ea0efce60ae95a62d0006 Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Sat, 23 May 2015 23:09:15 +0200 Subject: atngw100: convert to generic board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- include/configs/atngw100.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 1202ec2494a..56bd7f87d15 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -14,6 +14,10 @@ #define CONFIG_AT32AP7000 #define CONFIG_ATNGW100 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R + /* * Set up the PLL to run at 140 MHz, the CPU to run at the PLL * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency -- cgit v1.3.1 From 9eb45aabe0780eb837baefe706482fe7bf68d9fc Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:24 +0200 Subject: avr32: delete non generic board favr-32-ezkit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 4 - board/earthlcd/favr-32-ezkit/Kconfig | 15 -- board/earthlcd/favr-32-ezkit/MAINTAINERS | 6 - board/earthlcd/favr-32-ezkit/Makefile | 9 -- board/earthlcd/favr-32-ezkit/favr-32-ezkit.c | 81 ---------- board/earthlcd/favr-32-ezkit/flash.c | 216 --------------------------- configs/favr-32-ezkit_defconfig | 7 - include/configs/favr-32-ezkit.h | 171 --------------------- 8 files changed, 509 deletions(-) delete mode 100644 board/earthlcd/favr-32-ezkit/Kconfig delete mode 100644 board/earthlcd/favr-32-ezkit/MAINTAINERS delete mode 100644 board/earthlcd/favr-32-ezkit/Makefile delete mode 100644 board/earthlcd/favr-32-ezkit/favr-32-ezkit.c delete mode 100644 board/earthlcd/favr-32-ezkit/flash.c delete mode 100644 configs/favr-32-ezkit_defconfig delete mode 100644 include/configs/favr-32-ezkit.h (limited to 'include') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index c69654c9934..34881edd454 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -26,9 +26,6 @@ config TARGET_ATSTK1004 config TARGET_ATSTK1006 bool "Support atstk1006" -config TARGET_FAVR_32_EZKIT - bool "Support favr-32-ezkit" - config TARGET_GRASSHOPPER bool "Support grasshopper" @@ -43,7 +40,6 @@ endchoice source "board/atmel/atngw100/Kconfig" source "board/atmel/atngw100mkii/Kconfig" source "board/atmel/atstk1000/Kconfig" -source "board/earthlcd/favr-32-ezkit/Kconfig" source "board/in-circuit/grasshopper/Kconfig" source "board/mimc/mimc200/Kconfig" source "board/miromico/hammerhead/Kconfig" diff --git a/board/earthlcd/favr-32-ezkit/Kconfig b/board/earthlcd/favr-32-ezkit/Kconfig deleted file mode 100644 index 50e29ec2414..00000000000 --- a/board/earthlcd/favr-32-ezkit/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_FAVR_32_EZKIT - -config SYS_BOARD - default "favr-32-ezkit" - -config SYS_VENDOR - default "earthlcd" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "favr-32-ezkit" - -endif diff --git a/board/earthlcd/favr-32-ezkit/MAINTAINERS b/board/earthlcd/favr-32-ezkit/MAINTAINERS deleted file mode 100644 index 89ba862149f..00000000000 --- a/board/earthlcd/favr-32-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -FAVR-32-EZKIT BOARD -#M: Hans-Christian Egtvedt -S: Orphan (since 2014-06) -F: board/earthlcd/favr-32-ezkit/ -F: include/configs/favr-32-ezkit.h -F: configs/favr-32-ezkit_defconfig diff --git a/board/earthlcd/favr-32-ezkit/Makefile b/board/earthlcd/favr-32-ezkit/Makefile deleted file mode 100644 index f712ab9c7ae..00000000000 --- a/board/earthlcd/favr-32-ezkit/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2008 Atmel Corporation -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := favr-32-ezkit.o flash.o diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c deleted file mode 100644 index f9ac330c33e..00000000000 --- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include - -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { - { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_WRBACK, - }, -}; - -static const struct sdram_config sdram_config = { - /* MT48LC4M32B2P-6 (16 MB) */ - .data_bits = SDRAM_DATA_32BIT, - .row_bits = 12, - .col_bits = 8, - .bank_bits = 2, - .cas = 3, - .twr = 2, - .trc = 7, - .trp = 2, - .trcd = 2, - .tras = 5, - .txsr = 5, - /* 15.6 us */ - .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, -}; - -int board_early_init_f(void) -{ - /* Enable SDRAM in the EBI mux */ - hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); - - portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); - - sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); - - portmux_enable_usart3(PORTMUX_DRIVE_MIN); -#if defined(CONFIG_MACB) - portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); -#endif -#if defined(CONFIG_MMC) - portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW); -#endif - - return 0; -} - -int board_early_init_r(void) -{ - gd->bd->bi_phy_id[0] = 0x01; - return 0; -} - -#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) -int board_eth_init(bd_t *bi) -{ - return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, - bi->bi_phy_id[0]); -} -#endif diff --git a/board/earthlcd/favr-32-ezkit/flash.c b/board/earthlcd/favr-32-ezkit/flash.c deleted file mode 100644 index e45c6f4d01f..00000000000 --- a/board/earthlcd/favr-32-ezkit/flash.c +++ /dev/null @@ -1,216 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include - -#ifdef CONFIG_FAVR32_EZKIT_EXT_FLASH -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -flash_info_t flash_info[1]; - -static void flash_identify(uint16_t *flash, flash_info_t *info) -{ - unsigned long flags; - - flags = disable_interrupts(); - - dcache_flush_unlocked(); - - writew(0xaa, flash + 0x555); - writew(0x55, flash + 0xaaa); - writew(0x90, flash + 0x555); - info->flash_id = readl(flash); - writew(0xff, flash); - - readw(flash); - - if (flags) - enable_interrupts(); -} - -unsigned long flash_init(void) -{ - unsigned long addr; - unsigned int i; - - flash_info[0].size = CONFIG_SYS_FLASH_SIZE; - flash_info[0].sector_count = 135; - - flash_identify(uncached((void *)CONFIG_SYS_FLASH_BASE), &flash_info[0]); - - for (i = 0, addr = 0; i < 8; i++, addr += 0x2000) - flash_info[0].start[i] = addr; - for (; i < flash_info[0].sector_count; i++, addr += 0x10000) - flash_info[0].start[i] = addr; - - return CONFIG_SYS_FLASH_SIZE; -} - -void flash_print_info(flash_info_t *info) -{ - printf("Flash: Vendor ID: 0x%02lx, Product ID: 0x%02lx\n", - info->flash_id >> 16, info->flash_id & 0xffff); - printf("Size: %ld MB in %d sectors\n", - info->size >> 10, info->sector_count); -} - -int flash_erase(flash_info_t *info, int s_first, int s_last) -{ - unsigned long flags; - unsigned long start_time; - uint16_t *fb, *sb; - unsigned int i; - int ret; - uint16_t status; - - if ((s_first < 0) || (s_first > s_last) - || (s_last >= info->sector_count)) { - puts("Error: first and/or last sector out of range\n"); - return ERR_INVAL; - } - - for (i = s_first; i < s_last; i++) - if (info->protect[i]) { - printf("Error: sector %d is protected\n", i); - return ERR_PROTECTED; - } - - fb = (uint16_t *)uncached(info->start[0]); - - dcache_flush_unlocked(); - - for (i = s_first; (i <= s_last) && !ctrlc(); i++) { - printf("Erasing sector %3d...", i); - - sb = (uint16_t *)uncached(info->start[i]); - - flags = disable_interrupts(); - - start_time = get_timer(0); - - /* Unlock sector */ - writew(0xaa, fb + 0x555); - writew(0x70, sb); - - /* Erase sector */ - writew(0xaa, fb + 0x555); - writew(0x55, fb + 0xaaa); - writew(0x80, fb + 0x555); - writew(0xaa, fb + 0x555); - writew(0x55, fb + 0xaaa); - writew(0x30, sb); - - /* Wait for completion */ - ret = ERR_OK; - do { - /* TODO: Timeout */ - status = readw(sb); - } while ((status != 0xffff) && !(status & 0x28)); - - writew(0xf0, fb); - - /* - * Make sure the command actually makes it to the bus - * before we re-enable interrupts. - */ - readw(fb); - - if (flags) - enable_interrupts(); - - if (status != 0xffff) { - printf("Flash erase error at address 0x%p: 0x%02x\n", - sb, status); - ret = ERR_PROG_ERROR; - break; - } - } - - if (ctrlc()) - printf("User interrupt!\n"); - - return ERR_OK; -} - -int write_buff(flash_info_t *info, uchar *src, - ulong addr, ulong count) -{ - unsigned long flags; - uint16_t *base, *p, *s, *end; - uint16_t word, status, status1; - int ret = ERR_OK; - - if (addr < info->start[0] - || (addr + count) > (info->start[0] + info->size) - || (addr + count) < addr) { - puts("Error: invalid address range\n"); - return ERR_INVAL; - } - - if (addr & 1 || count & 1 || (unsigned int)src & 1) { - puts("Error: misaligned source, destination or count\n"); - return ERR_ALIGN; - } - - base = (uint16_t *)uncached(info->start[0]); - end = (uint16_t *)uncached(addr + count); - - flags = disable_interrupts(); - - dcache_flush_unlocked(); - sync_write_buffer(); - - for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src; - p < end && !ctrlc(); p++, s++) { - word = *s; - - writew(0xaa, base + 0x555); - writew(0x55, base + 0xaaa); - writew(0xa0, base + 0x555); - writew(word, p); - - sync_write_buffer(); - - /* Wait for completion */ - status1 = readw(p); - do { - /* TODO: Timeout */ - status = status1; - status1 = readw(p); - } while (((status ^ status1) & 0x40) /* toggled */ - && !(status1 & 0x28)); /* error bits */ - - /* - * We'll need to check once again for toggle bit - * because the toggle bit may stop toggling as I/O5 - * changes to "1" (ref at49bv642.pdf p9) - */ - status1 = readw(p); - status = readw(p); - if ((status ^ status1) & 0x40) { - printf("Flash write error at address 0x%p: " - "0x%02x != 0x%02x\n", - p, status,word); - ret = ERR_PROG_ERROR; - writew(0xf0, base); - readw(base); - break; - } - - writew(0xf0, base); - readw(base); - } - - if (flags) - enable_interrupts(); - - return ret; -} - -#endif /* CONFIG_FAVR32_EZKIT_EXT_FLASH */ diff --git a/configs/favr-32-ezkit_defconfig b/configs/favr-32-ezkit_defconfig deleted file mode 100644 index 33305309b5e..00000000000 --- a/configs/favr-32-ezkit_defconfig +++ /dev/null @@ -1,7 +0,0 @@ -CONFIG_AVR32=y -CONFIG_CMD_NET=y -CONFIG_TARGET_FAVR_32_EZKIT=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h deleted file mode 100644 index 04f4124de85..00000000000 --- a/include/configs/favr-32-ezkit.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * Configuration settings for the Favr-32 EarthLCD LCD kit. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_FAVR32_EZKIT - -#define CONFIG_FAVR32_EZKIT_EXT_FLASH - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART3 -#define CONFIG_USART_ID 3 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "root=/dev/mtdblock1 rootfstype=jffs fbmem=1800k" - -#define CONFIG_BOOTCOMMAND \ - "fsload; bootm $(fileaddr)" - -#define CONFIG_BOOTDELAY 1 - -/* - * After booting the board for the first time, new ethernet addresses - * should be generated and assigned to the environment variables - * "ethaddr" and "eth1addr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -/* External flash on Favr-32 */ -#if 0 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#endif - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From e36930764471711c12a7fac8dfb9535b96a284ca Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:25 +0200 Subject: avr32: delete non generic board hammerhead MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 4 - board/miromico/hammerhead/Kconfig | 15 ---- board/miromico/hammerhead/MAINTAINERS | 6 -- board/miromico/hammerhead/Makefile | 6 -- board/miromico/hammerhead/hammerhead.c | 91 -------------------- configs/hammerhead_defconfig | 7 -- include/configs/hammerhead.h | 147 --------------------------------- 7 files changed, 276 deletions(-) delete mode 100644 board/miromico/hammerhead/Kconfig delete mode 100644 board/miromico/hammerhead/MAINTAINERS delete mode 100644 board/miromico/hammerhead/Makefile delete mode 100644 board/miromico/hammerhead/hammerhead.c delete mode 100644 configs/hammerhead_defconfig delete mode 100644 include/configs/hammerhead.h (limited to 'include') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 34881edd454..cfcdbe7565d 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -32,9 +32,6 @@ config TARGET_GRASSHOPPER config TARGET_MIMC200 bool "Support mimc200" -config TARGET_HAMMERHEAD - bool "Support hammerhead" - endchoice source "board/atmel/atngw100/Kconfig" @@ -42,6 +39,5 @@ source "board/atmel/atngw100mkii/Kconfig" source "board/atmel/atstk1000/Kconfig" source "board/in-circuit/grasshopper/Kconfig" source "board/mimc/mimc200/Kconfig" -source "board/miromico/hammerhead/Kconfig" endmenu diff --git a/board/miromico/hammerhead/Kconfig b/board/miromico/hammerhead/Kconfig deleted file mode 100644 index 1f09ef782e2..00000000000 --- a/board/miromico/hammerhead/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_HAMMERHEAD - -config SYS_BOARD - default "hammerhead" - -config SYS_VENDOR - default "miromico" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "hammerhead" - -endif diff --git a/board/miromico/hammerhead/MAINTAINERS b/board/miromico/hammerhead/MAINTAINERS deleted file mode 100644 index a87ceeeb730..00000000000 --- a/board/miromico/hammerhead/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -HAMMERHEAD BOARD -M: Alex Raimondi -S: Maintained -F: board/miromico/hammerhead/ -F: include/configs/hammerhead.h -F: configs/hammerhead_defconfig diff --git a/board/miromico/hammerhead/Makefile b/board/miromico/hammerhead/Makefile deleted file mode 100644 index 638a9df9308..00000000000 --- a/board/miromico/hammerhead/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Copyright (C) 2008 Miromico AG -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := hammerhead.o diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c deleted file mode 100644 index a0c7d3b3232..00000000000 --- a/board/miromico/hammerhead/hammerhead.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2008 Miromico AG - * - * Mostly copied form atmel ATNGW100 sources - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { - { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_WRBACK, - }, -}; - -static const struct sdram_config sdram_config = { - .data_bits = SDRAM_DATA_32BIT, - .row_bits = 13, - .col_bits = 9, - .bank_bits = 2, - .cas = 3, - .twr = 2, - .trc = 7, - .trp = 2, - .trcd = 2, - .tras = 5, - .txsr = 5, - /* 7.81 us */ - .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, -}; - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, - bis->bi_phy_id[0]); -} -#endif - -int board_early_init_f(void) -{ - /* Enable SDRAM in the EBI mux */ - hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); - - portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); - sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); - - portmux_enable_usart1(PORTMUX_DRIVE_MIN); - -#if defined(CONFIG_MACB) - portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); -#endif -#if defined(CONFIG_MMC) - portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW); -#endif - return 0; -} - -int board_early_init_r(void) -{ - gd->bd->bi_phy_id[0] = 0x01; - return 0; -} - -int board_postclk_init(void) -{ - /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */ - gclk_enable_output(3, PORTMUX_DRIVE_LOW); - gclk_set_rate(3, GCLK_PARENT_OSC0, 25000000); - return 0; -} diff --git a/configs/hammerhead_defconfig b/configs/hammerhead_defconfig deleted file mode 100644 index 278c76a4feb..00000000000 --- a/configs/hammerhead_defconfig +++ /dev/null @@ -1,7 +0,0 @@ -CONFIG_AVR32=y -CONFIG_CMD_NET=y -CONFIG_TARGET_HAMMERHEAD=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h deleted file mode 100644 index 274f2a81b8b..00000000000 --- a/include/configs/hammerhead.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Copyright (C) 2008 Miromico AG - * - * Configuration settings for the Miromico Hammerhead AVR32 board - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_HAMMERHEAD - -/* - * Set up the PLL to run at 125 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency - * and the PBA bus to run at 1/4 the PLL frequency. - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 25000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 5 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -#define CONFIG_SYS_CLKDIV_CPU 0 -#define CONFIG_SYS_CLKDIV_HSB 1 -#define CONFIG_SYS_CLKDIV_PBA 2 -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -#define CONFIG_HOSTNAME hammerhead - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=mtd1 rootfstype=jffs2" -#define CONFIG_BOOTCOMMAND \ - "fsload; bootm" - -#define CONFIG_BOOTDELAY 1 - -/* - * After booting the board for the first time, new ethernet address - * should be generated and assigned to the environment variables - * "ethaddr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP/DHCP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE 0x24000000 -#define CONFIG_SYS_INTRAM_SIZE 0x8000 - -#define CONFIG_SYS_SDRAM_BASE 0x10000000 - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "Hammerhead> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) - -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From c62d2f8fc5c682ad541d98e289434a0f76d5ad4b Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:26 +0200 Subject: avr32: delete non generic board mimc200 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 4 - board/mimc/mimc200/Kconfig | 15 ---- board/mimc/mimc200/MAINTAINERS | 6 -- board/mimc/mimc200/Makefile | 6 -- board/mimc/mimc200/mimc200.c | 197 ----------------------------------------- configs/mimc200_defconfig | 3 - include/configs/mimc200.h | 176 ------------------------------------ 7 files changed, 407 deletions(-) delete mode 100644 board/mimc/mimc200/Kconfig delete mode 100644 board/mimc/mimc200/MAINTAINERS delete mode 100644 board/mimc/mimc200/Makefile delete mode 100644 board/mimc/mimc200/mimc200.c delete mode 100644 configs/mimc200_defconfig delete mode 100644 include/configs/mimc200.h (limited to 'include') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index cfcdbe7565d..0c7b1ba11af 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -29,15 +29,11 @@ config TARGET_ATSTK1006 config TARGET_GRASSHOPPER bool "Support grasshopper" -config TARGET_MIMC200 - bool "Support mimc200" - endchoice source "board/atmel/atngw100/Kconfig" source "board/atmel/atngw100mkii/Kconfig" source "board/atmel/atstk1000/Kconfig" source "board/in-circuit/grasshopper/Kconfig" -source "board/mimc/mimc200/Kconfig" endmenu diff --git a/board/mimc/mimc200/Kconfig b/board/mimc/mimc200/Kconfig deleted file mode 100644 index 18736d7f96f..00000000000 --- a/board/mimc/mimc200/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_MIMC200 - -config SYS_BOARD - default "mimc200" - -config SYS_VENDOR - default "mimc" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "mimc200" - -endif diff --git a/board/mimc/mimc200/MAINTAINERS b/board/mimc/mimc200/MAINTAINERS deleted file mode 100644 index 6cb51dd3cbb..00000000000 --- a/board/mimc/mimc200/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -MIMC200 BOARD -M: Mark Jackson -S: Maintained -F: board/mimc/mimc200/ -F: include/configs/mimc200.h -F: configs/mimc200_defconfig diff --git a/board/mimc/mimc200/Makefile b/board/mimc/mimc200/Makefile deleted file mode 100644 index 5c30c0dbca6..00000000000 --- a/board/mimc/mimc200/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Copyright (C) 2005-2006 Atmel Corporation -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := mimc200.o diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c deleted file mode 100644 index f0782955082..00000000000 --- a/board/mimc/mimc200/mimc200.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "../../../arch/avr32/cpu/hsmc3.h" - -struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { - { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SRAM_CS2_SIZE >> MMU_PAGE_SHIFT, - .phys = (EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_NONE, - }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) - | MMU_VMR_CACHE_WRBACK, - }, -}; - -#if defined(CONFIG_LCD) -/* 480x272x16 @ 72 Hz */ -vidinfo_t panel_info = { - .vl_col = 480, /* Number of columns */ - .vl_row = 272, /* Number of rows */ - .vl_clk = 5000000, /* pixel clock in ps */ - .vl_sync = ATMEL_LCDC_INVCLK_INVERTED | - ATMEL_LCDC_INVLINE_INVERTED | - ATMEL_LCDC_INVFRAME_INVERTED, - .vl_bpix = LCD_COLOR16, /* Bits per pixel, BPP = 2^n */ - .vl_tft = 1, /* 0 = passive, 1 = TFT */ - .vl_hsync_len = 42, /* Length of horizontal sync */ - .vl_left_margin = 1, /* Time from sync to picture */ - .vl_right_margin = 1, /* Time from picture to sync */ - .vl_vsync_len = 1, /* Length of vertical sync */ - .vl_upper_margin = 12, /* Time from sync to picture */ - .vl_lower_margin = 1, /* Time from picture to sync */ - .mmio = LCDC_BASE, /* Memory mapped registers */ -}; - -void lcd_enable(void) -{ -} - -void lcd_disable(void) -{ -} -#endif - -DECLARE_GLOBAL_DATA_PTR; - -static const struct sdram_config sdram_config = { - .data_bits = SDRAM_DATA_16BIT, - .row_bits = 13, - .col_bits = 9, - .bank_bits = 2, - .cas = 3, - .twr = 2, - .trc = 6, - .trp = 2, - .trcd = 2, - .tras = 6, - .txsr = 6, - /* 15.6 us */ - .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, -}; - -int board_early_init_f(void) -{ - /* Enable SDRAM in the EBI mux */ - hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); - - /* Enable 26 address bits and NCS2 */ - portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH); - sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); - - portmux_enable_usart1(PORTMUX_DRIVE_MIN); - - /* de-assert "force sys reset" pin */ - portmux_select_gpio(PORTMUX_PORT_D, 1 << 15, - PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH); - - /* init custom i/o */ - /* cpu type inputs */ - portmux_select_gpio(PORTMUX_PORT_E, (1 << 19) | (1 << 20) | (1 << 23), - PORTMUX_DIR_INPUT); - /* main board type inputs */ - portmux_select_gpio(PORTMUX_PORT_B, (1 << 19) | (1 << 29), - PORTMUX_DIR_INPUT); - /* DEBUG input (use weak pullup) */ - portmux_select_gpio(PORTMUX_PORT_E, 1 << 21, - PORTMUX_DIR_INPUT | PORTMUX_PULL_UP); - - /* are we suppressing the console ? */ - if (gpio_get_value(GPIO_PIN_PE(21)) == 1) - gd->flags |= (GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE); - - /* reset phys */ - portmux_select_gpio(PORTMUX_PORT_E, 1 << 24, PORTMUX_DIR_INPUT); - portmux_select_gpio(PORTMUX_PORT_C, 1 << 18, - PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH); - - udelay(5000); - - /* release phys reset */ - gpio_set_value(GPIO_PIN_PC(18), 0); /* PHY RESET (Release) */ - - /* setup Data Flash chip select (NCS2) */ - hsmc3_writel(MODE2, 0x20121003); - hsmc3_writel(CYCLE2, 0x000a0009); - hsmc3_writel(PULSE2, 0x0a060806); - hsmc3_writel(SETUP2, 0x00030102); - - /* setup FRAM chip select (NCS3) */ - hsmc3_writel(MODE3, 0x10120001); - hsmc3_writel(CYCLE3, 0x001e001d); - hsmc3_writel(PULSE3, 0x08040704); - hsmc3_writel(SETUP3, 0x02050204); - -#if defined(CONFIG_MACB) - /* init macb0 pins */ - portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); - portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); -#endif - -#if defined(CONFIG_MMC) - portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW); -#endif - -#if defined(CONFIG_LCD) - portmux_enable_lcdc(1); -#endif - - return 0; -} - -int board_early_init_r(void) -{ - gd->bd->bi_phy_id[0] = 0x01; - gd->bd->bi_phy_id[1] = 0x03; - return 0; -} - -int board_postclk_init(void) -{ - /* Use GCLK0 as 10MHz output */ - gclk_enable_output(0, PORTMUX_DRIVE_LOW); - gclk_set_rate(0, GCLK_PARENT_OSC0, 10000000); - return 0; -} - -/* SPI chip select control */ -#ifdef CONFIG_ATMEL_SPI -#include - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return (bus == 0) && (cs == 0); -} - -void spi_cs_activate(struct spi_slave *slave) -{ -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ -} -#endif /* CONFIG_ATMEL_SPI */ - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bi) -{ - macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]); - macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]); - - return 0; -} -#endif diff --git a/configs/mimc200_defconfig b/configs/mimc200_defconfig deleted file mode 100644 index 85c646ec16e..00000000000 --- a/configs/mimc200_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_MIMC200=y -CONFIG_CMD_NET=y diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h deleted file mode 100644 index e8e5ae73ecf..00000000000 --- a/include/configs/mimc200.h +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * Configuration settings for the AVR32 Network Gateway - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_MIMC200 - -#define CONFIG_MIMC200_EXT_FLASH - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency - * and the PBA bus to run at 1/4 the PLL frequency. - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 10000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 15 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -#define CONFIG_SYS_CLKDIV_CPU 0 -#define CONFIG_SYS_CLKDIV_HSB 1 -#define CONFIG_SYS_CLKDIV_PBA 2 -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM, NOR flash and FRAM */ -#define CONFIG_SYS_NR_VM_REGIONS 3 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -#define CONFIG_MIMC200_DBGLINK 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1" -#define CONFIG_BOOTCOMMAND \ - "fsload boot/uImage; bootm" - -#define CONFIG_SILENT_CONSOLE /* enable silent startup */ -#define CONFIG_DISABLE_CONSOLE /* disable console */ -#define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */ - -#define CONFIG_LCD 1 - -/* - * Only interrupt autoboot if is pressed. Otherwise, garbage - * data on the serial line may interrupt the boot sequence. - */ -#define CONFIG_BOOTDELAY 0 -#define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_AUTOBOOT - -/* - * After booting the board for the first time, new ethernet addresses - * should be generated and assigned to the environment variables - * "ethaddr" and "eth1addr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP/DHCP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#if defined(CONFIG_LCD) -#define CONFIG_CMD_BMP -#define CONFIG_ATMEL_LCD 1 -#define LCD_BPP LCD_COLOR16 -#define CONFIG_BMP_16BPP 1 -#define CONFIG_FB_ADDR 0x10600000 -#define CONFIG_WHITE_ON_BLACK 1 -#define CONFIG_VIDEO_BMP_GZIP 1 -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 -#define CONFIG_ATMEL_LCD_BGR555 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -#define CONFIG_SPLASH_SCREEN 1 -#endif - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_SYS_FRAM_BASE 0x08000000 -#define CONFIG_SYS_FRAM_SIZE 0x20000 - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (1024*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) - -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From e5354b8a9e2ad7035c8623b552e7532ef7b133ae Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:27 +0200 Subject: avr32: delete non generic board's atstk100{3, 4, 6} MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 9 -- board/atmel/atstk1000/Kconfig | 48 ----------- board/atmel/atstk1000/MAINTAINERS | 6 -- board/atmel/atstk1000/atstk1000.c | 23 +----- configs/atstk1003_defconfig | 6 -- configs/atstk1004_defconfig | 6 -- configs/atstk1006_defconfig | 7 -- include/configs/atstk1003.h | 150 ---------------------------------- include/configs/atstk1004.h | 150 ---------------------------------- include/configs/atstk1006.h | 168 -------------------------------------- 10 files changed, 1 insertion(+), 572 deletions(-) delete mode 100644 configs/atstk1003_defconfig delete mode 100644 configs/atstk1004_defconfig delete mode 100644 configs/atstk1006_defconfig delete mode 100644 include/configs/atstk1003.h delete mode 100644 include/configs/atstk1004.h delete mode 100644 include/configs/atstk1006.h (limited to 'include') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 0c7b1ba11af..eb3377486fb 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -17,15 +17,6 @@ config TARGET_ATNGW100MKII config TARGET_ATSTK1002 bool "Support atstk1002" -config TARGET_ATSTK1003 - bool "Support atstk1003" - -config TARGET_ATSTK1004 - bool "Support atstk1004" - -config TARGET_ATSTK1006 - bool "Support atstk1006" - config TARGET_GRASSHOPPER bool "Support grasshopper" diff --git a/board/atmel/atstk1000/Kconfig b/board/atmel/atstk1000/Kconfig index 6d4151453fb..b4fa9a2b381 100644 --- a/board/atmel/atstk1000/Kconfig +++ b/board/atmel/atstk1000/Kconfig @@ -13,51 +13,3 @@ config SYS_CONFIG_NAME default "atstk1002" endif - -if TARGET_ATSTK1003 - -config SYS_BOARD - default "atstk1000" - -config SYS_VENDOR - default "atmel" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "atstk1003" - -endif - -if TARGET_ATSTK1004 - -config SYS_BOARD - default "atstk1000" - -config SYS_VENDOR - default "atmel" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "atstk1004" - -endif - -if TARGET_ATSTK1006 - -config SYS_BOARD - default "atstk1000" - -config SYS_VENDOR - default "atmel" - -config SYS_SOC - default "at32ap700x" - -config SYS_CONFIG_NAME - default "atstk1006" - -endif diff --git a/board/atmel/atstk1000/MAINTAINERS b/board/atmel/atstk1000/MAINTAINERS index 378e1b3dbc0..61438465f77 100644 --- a/board/atmel/atstk1000/MAINTAINERS +++ b/board/atmel/atstk1000/MAINTAINERS @@ -4,9 +4,3 @@ S: Orphan (since 2014-06) F: board/atmel/atstk1000/ F: include/configs/atstk1002.h F: configs/atstk1002_defconfig -F: include/configs/atstk1003.h -F: configs/atstk1003_defconfig -F: include/configs/atstk1004.h -F: configs/atstk1004_defconfig -F: include/configs/atstk1006.h -F: configs/atstk1006_defconfig diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index fd4363beceb..679b67432cc 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -30,32 +30,12 @@ struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { }; static const struct sdram_config sdram_config = { -#if defined(CONFIG_ATSTK1006) - /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */ .data_bits = SDRAM_DATA_32BIT, - .row_bits = 13, - .col_bits = 9, - .bank_bits = 2, - .cas = 2, - .twr = 2, - .trc = 7, - .trp = 2, - .trcd = 2, - .tras = 4, - .txsr = 7, - /* 7.81 us */ - .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, -#else - /* MT48LC2M32B2P-5 (8 MB) on motherboard */ -#ifdef CONFIG_ATSTK1004 - .data_bits = SDRAM_DATA_16BIT, -#else - .data_bits = SDRAM_DATA_32BIT, -#endif #ifdef CONFIG_ATSTK1000_16MB_SDRAM /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */ .row_bits = 12, #else + /* MT48LC2M32B2P-5 (8 MB) on motherboard */ .row_bits = 11, #endif .col_bits = 8, @@ -69,7 +49,6 @@ static const struct sdram_config sdram_config = { .txsr = 5, /* 15.6 us */ .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, -#endif }; int board_early_init_f(void) diff --git a/configs/atstk1003_defconfig b/configs/atstk1003_defconfig deleted file mode 100644 index bd6c93afbc0..00000000000 --- a/configs/atstk1003_defconfig +++ /dev/null @@ -1,6 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_ATSTK1003=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/atstk1004_defconfig b/configs/atstk1004_defconfig deleted file mode 100644 index 4d121602947..00000000000 --- a/configs/atstk1004_defconfig +++ /dev/null @@ -1,6 +0,0 @@ -CONFIG_AVR32=y -CONFIG_TARGET_ATSTK1004=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/atstk1006_defconfig b/configs/atstk1006_defconfig deleted file mode 100644 index 6d1d045c0d7..00000000000 --- a/configs/atstk1006_defconfig +++ /dev/null @@ -1,7 +0,0 @@ -CONFIG_AVR32=y -CONFIG_CMD_NET=y -CONFIG_TARGET_ATSTK1006=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h deleted file mode 100644 index 4126b66d9d0..00000000000 --- a/include/configs/atstk1003.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright (C) 2007 Atmel Corporation - * - * Configuration settings for the ATSTK1003 CPU daughterboard - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7001 -#define CONFIG_ATSTK1003 -#define CONFIG_ATSTK1000 - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mmcblk0p1 rootwait" - -#define CONFIG_BOOTCOMMAND \ - "mmc rescan; ext2load mmc 0:1 0x10400000 /boot/uImage; bootm" - -#define CONFIG_BOOTDELAY 1 - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h deleted file mode 100644 index 97a1d3ef148..00000000000 --- a/include/configs/atstk1004.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright (C) 2007 Atmel Corporation - * - * Configuration settings for the ATSTK1003 CPU daughterboard - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7002 -#define CONFIG_ATSTK1004 -#define CONFIG_ATSTK1000 - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mmcblk0p1 rootwait" - -#define CONFIG_BOOTCOMMAND \ - "mmc rescan; ext2load mmc 0:1 0x10200000 /boot/uImage; bootm" - -#define CONFIG_BOOTDELAY 1 - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 2MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00200000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h deleted file mode 100644 index cbf17dbd5f3..00000000000 --- a/include/configs/atstk1006.h +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Copyright (C) 2005-2006 Atmel Corporation - * - * Configuration settings for the ATSTK1002 CPU daughterboard - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CONFIG_AT32AP -#define CONFIG_AT32AP7000 -#define CONFIG_ATSTK1006 -#define CONFIG_ATSTK1000 - - -/* - * Set up the PLL to run at 140 MHz, the CPU to run at the PLL - * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the - * PLL frequency. - * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz - */ -#define CONFIG_PLL -#define CONFIG_SYS_POWER_MANAGER -#define CONFIG_SYS_OSC0_HZ 20000000 -#define CONFIG_SYS_PLL0_DIV 1 -#define CONFIG_SYS_PLL0_MUL 7 -#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 -/* - * Set the CPU running at: - * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz - */ -#define CONFIG_SYS_CLKDIV_CPU 0 -/* - * Set the HSB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz - */ -#define CONFIG_SYS_CLKDIV_HSB 1 -/* - * Set the PBA running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz - */ -#define CONFIG_SYS_CLKDIV_PBA 2 -/* - * Set the PBB running at: - * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz - */ -#define CONFIG_SYS_CLKDIV_PBB 1 - -/* Reserve VM regions for SDRAM and NOR flash */ -#define CONFIG_SYS_NR_VM_REGIONS 2 - -/* - * The PLLOPT register controls the PLL like this: - * icp = PLLOPT<2> - * ivco = PLLOPT<1:0> - * - * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). - */ -#define CONFIG_SYS_PLL0_OPT 0x04 - -#define CONFIG_USART_BASE ATMEL_BASE_USART1 -#define CONFIG_USART_ID 1 - -/* User serviceable stuff */ -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_STACKSIZE (2048) - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0 root=mtd3 fbmem=2400k" - -#define CONFIG_BOOTCOMMAND \ - "fsload; bootm $(fileaddr)" - -#define CONFIG_BOOTDELAY 1 - -/* - * After booting the board for the first time, new ethernet addresses - * should be generated and assigned to the environment variables - * "ethaddr" and "eth1addr". This is normally done during production. - */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MMC - -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_XIMG - -#define CONFIG_ATMEL_USART -#define CONFIG_MACB -#define CONFIG_PORTMUX_PIO -#define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC -#define CONFIG_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_GENERIC_MMC - -#define CONFIG_SYS_DCACHE_LINESZ 32 -#define CONFIG_SYS_ICACHE_LINESZ 32 - -#define CONFIG_NR_DRAM_BANKS 1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x800000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 135 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_TEXT_BASE 0x00000000 - -#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE -#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE -#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE - -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SIZE 65536 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) - -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -/* Allow 4MB for the kernel run-time image */ -#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) -#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) - -/* Other configuration settings that shouldn't have to change all that often */ -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP - -#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x3f00000) -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From 0751b138064db28f0866f0c2439afb8b3975180c Mon Sep 17 00:00:00 2001 From: Bernhard Nortmann Date: Wed, 10 Jun 2015 10:51:40 +0200 Subject: sunxi: Enable CONFIG_SYS_64BIT_LBA when AHCI is used Due to absence of CONFIG_SYS_64BIT_LBA, u-boot-sunxi currently has no support for the (GPT) partioning scheme of large disks > 2TB. While the AHCI driver seems to handle this nicely, the problem is that lbaint_t values get truncated to 32-bit. This patch sets CONFIG_SYS_64BIT_LBA from sunxi_common.h for all SoCs that support AHCI (CONFIG_SUNXI_AHCI). Signed-off-by: Bernhard Nortmann Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sunxi-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 07db736d316..063abd56a93 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -126,6 +126,7 @@ #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SUNXI_AHCI +#define CONFIG_SYS_64BIT_LBA #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ -- cgit v1.3.1 From a2879764ba392229dc7aba89951e74524750af18 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 16 May 2015 15:01:41 -0600 Subject: dm: i2c: Add compatibility functions for dm_i2c_reg_read/write() Add the legacy i2c_reg_read/write() functions to the compatibility layer so that they can be used when CONFIG_DM_I2C_COMPAT is defined. Signed-off-by: Simon Glass Acked-by: Heiko Schocher --- drivers/i2c/i2c-uclass-compat.c | 21 +++++++++++++++++++++ include/i2c.h | 6 ++++++ 2 files changed, 27 insertions(+) (limited to 'include') diff --git a/drivers/i2c/i2c-uclass-compat.c b/drivers/i2c/i2c-uclass-compat.c index 223f238f4be..5606d1f807f 100644 --- a/drivers/i2c/i2c-uclass-compat.c +++ b/drivers/i2c/i2c-uclass-compat.c @@ -106,3 +106,24 @@ void board_i2c_init(const void *blob) { /* Nothing to do here - the init happens through driver model */ } + +uint8_t i2c_reg_read(uint8_t chip_addr, uint8_t offset) +{ + struct udevice *dev; + int ret; + + ret = i2c_compat_get_device(chip_addr, 1, &dev); + if (ret) + return 0xff; + return dm_i2c_reg_read(dev, offset); +} + +void i2c_reg_write(uint8_t chip_addr, uint8_t offset, uint8_t val) +{ + struct udevice *dev; + int ret; + + ret = i2c_compat_get_device(chip_addr, 1, &dev); + if (!ret) + dm_i2c_reg_write(dev, offset, val); +} diff --git a/include/i2c.h b/include/i2c.h index ddfebc4107f..9300d97e146 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -284,6 +284,12 @@ void i2c_init(int speed, int slaveaddr); */ void board_i2c_init(const void *blob); +/* + * Compatibility functions for driver model. + */ +uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); +void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); + #endif /* -- cgit v1.3.1 From 32ba8952cb449f8b151c4c1a27b9e9c3b4995dee Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 13 May 2015 07:02:24 -0600 Subject: arm: spl: Add an API to detect when U-Boot is started from SPL For secure boot systems it is common to have a read-only U-Boot which starts the machine and jumps to a read-write U-Boot for actual booting the OS. This allows the read-write U-Boot to be upgraded without risk of permanently bricking the machine. In the event that the read-write U-Boot is corrupted, the read-only U-Boot can detect this with a checksum and boot into a recovery flow. To support this, add a way to detect when U-Boot is run from SPL as opposed to some other method, such as booted directly (no SPL) or started from another source (e.g. a primary U-Boot). This works by putting a special value in r0. For now we rely on board-specific code to actually check the register and set a flag. At some point this could be generalised, perhaps by using a spare register and passing a flag to _main and/or board_init_f(). This commit does not implement any feature, but merely provides the API for boards to implement. Signed-off-by: Simon Glass --- include/spl.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/spl.h b/include/spl.h index b2e5bf726f2..d19940f2a33 100644 --- a/include/spl.h +++ b/include/spl.h @@ -11,6 +11,8 @@ #include #include +/* Value in r0 indicates we booted from U-Boot */ +#define UBOOT_NOT_LOADED_FROM_SPL 0x13578642 /* Boot type */ #define MMCSD_MODE_UNDEFINED 0 @@ -82,4 +84,15 @@ int spl_load_image_ext_os(block_dev_desc_t *block_dev, int partition); #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void); #endif + +/** + * spl_was_boot_source() - check if U-Boot booted from SPL + * + * This will normally be true, but if U-Boot jumps to second U-Boot, it will + * be false. This should be implemented by board-specific code. + * + * @return true if U-Boot booted from SPL, else false + */ +bool spl_was_boot_source(void); + #endif -- cgit v1.3.1 From 4d24a11ee6aeba68fe4a8c94ed37019b773af2f3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 13 May 2015 07:02:25 -0600 Subject: arm: Allow cleanup_before_linux() without disabling caches This function is used before jumping to U-Boot, but in that case we don't always want to disable caches. Signed-off-by: Simon Glass Signed-off-by: Vadim Bendebury --- arch/arm/cpu/armv7/cpu.c | 47 +++++++++++++++++++++++++++++------------------ include/common.h | 15 +++++++++++++++ 2 files changed, 44 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index c56417dd2f1..0b0e5003cc3 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -24,7 +24,7 @@ void __weak cpu_cache_initialization(void){} -int cleanup_before_linux(void) +int cleanup_before_linux_select(int flags) { /* * this function is called just before we call linux @@ -42,24 +42,30 @@ int cleanup_before_linux(void) icache_disable(); invalidate_icache_all(); - /* - * turn off D-cache - * dcache_disable() in turn flushes the d-cache and disables MMU - */ - dcache_disable(); - v7_outer_cache_disable(); + if (flags & CBL_DISABLE_CACHES) { + /* + * turn off D-cache + * dcache_disable() in turn flushes the d-cache and disables MMU + */ + dcache_disable(); + v7_outer_cache_disable(); - /* - * After D-cache is flushed and before it is disabled there may - * be some new valid entries brought into the cache. We are sure - * that these lines are not dirty and will not affect our execution. - * (because unwinding the call-stack and setting a bit in CP15 SCTLR - * is all we did during this. We have not pushed anything on to the - * stack. Neither have we affected any static data) - * So just invalidate the entire d-cache again to avoid coherency - * problems for kernel - */ - invalidate_dcache_all(); + /* + * After D-cache is flushed and before it is disabled there may + * be some new valid entries brought into the cache. We are + * sure that these lines are not dirty and will not affect our + * execution. (because unwinding the call-stack and setting a + * bit in CP15 SCTRL is all we did during this. We have not + * pushed anything on to the stack. Neither have we affected + * any static data) So just invalidate the entire d-cache again + * to avoid coherency problems for kernel + */ + invalidate_dcache_all(); + } else { + flush_dcache_all(); + invalidate_icache_all(); + icache_enable(); + } /* * Some CPU need more cache attention before starting the kernel. @@ -68,3 +74,8 @@ int cleanup_before_linux(void) return 0; } + +int cleanup_before_linux(void) +{ + return cleanup_before_linux_select(CBL_ALL); +} diff --git a/include/common.h b/include/common.h index ea5aeb0014a..8f4b2ec2127 100644 --- a/include/common.h +++ b/include/common.h @@ -714,6 +714,21 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop); void invalidate_dcache_all(void); void invalidate_icache_all(void); +enum { + /* Disable caches (else flush caches but leave them active) */ + CBL_DISABLE_CACHES = 1 << 0, + CBL_SHOW_BOOTSTAGE_REPORT = 1 << 1, + + CBL_ALL = 3, +}; + +/** + * Clean up ready for linux + * + * @param flags Flags to control what is done + */ +int cleanup_before_linux_select(int flags); + /* arch/$(ARCH)/lib/ticks.S */ uint64_t get_ticks(void); void wait_ticks (unsigned long); -- cgit v1.3.1 From 1c3dbe56f720132723a89709ef5f2baeb52b44d4 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 13 May 2015 07:02:27 -0600 Subject: Remove typedefs from bmp_layout.h We try to avoid typedefs and these ones are easy enough to remove. Before changing this header in the next patch, remove the typedefs. Signed-off-by: Simon Glass Suggested-by: Joe Hershberger Acked-by: Joe Hershberger --- common/cmd_bmp.c | 16 ++++++++-------- common/lcd.c | 10 +++++----- drivers/video/atmel_lcdfb.c | 4 ++-- drivers/video/bus_vcxk.c | 4 ++-- drivers/video/cfb_console.c | 10 +++++----- include/bmp_layout.h | 17 ++++++++--------- 6 files changed, 30 insertions(+), 31 deletions(-) (limited to 'include') diff --git a/common/cmd_bmp.c b/common/cmd_bmp.c index cc904c25356..cb1f07119b4 100644 --- a/common/cmd_bmp.c +++ b/common/cmd_bmp.c @@ -34,12 +34,12 @@ static int bmp_info (ulong addr); * didn't contain a valid BMP signature. */ #ifdef CONFIG_VIDEO_BMP_GZIP -bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, - void **alloc_addr) +struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, + void **alloc_addr) { void *dst; unsigned long len; - bmp_image_t *bmp; + struct bmp_image *bmp; /* * Decompress bmp image @@ -55,7 +55,7 @@ bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, bmp = dst; /* align to 32-bit-aligned-address + 2 */ - bmp = (bmp_image_t *)((((unsigned int)dst + 1) & ~3) + 2); + bmp = (struct bmp_image *)((((unsigned int)dst + 1) & ~3) + 2); if (gunzip(bmp, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE, (uchar *)addr, &len) != 0) { free(dst); @@ -80,8 +80,8 @@ bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, return bmp; } #else -bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp, - void **alloc_addr) +struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, + void **alloc_addr) { return NULL; } @@ -187,7 +187,7 @@ U_BOOT_CMD( */ static int bmp_info(ulong addr) { - bmp_image_t *bmp=(bmp_image_t *)addr; + struct bmp_image *bmp = (struct bmp_image *)addr; void *bmp_alloc_addr = NULL; unsigned long len; @@ -224,7 +224,7 @@ static int bmp_info(ulong addr) int bmp_display(ulong addr, int x, int y) { int ret; - bmp_image_t *bmp = (bmp_image_t *)addr; + struct bmp_image *bmp = (struct bmp_image *)addr; void *bmp_alloc_addr = NULL; unsigned long len; diff --git a/common/lcd.c b/common/lcd.c index 055c366b191..c7f28302cb1 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -448,8 +448,8 @@ static void draw_encoded_bitmap(ushort **fbp, ushort c, int cnt) /* * Do not call this function directly, must be called from lcd_display_bitmap. */ -static void lcd_display_rle8_bitmap(bmp_image_t *bmp, ushort *cmap, uchar *fb, - int x_off, int y_off) +static void lcd_display_rle8_bitmap(struct bmp_image *bmp, ushort *cmap, + uchar *fb, int x_off, int y_off) { uchar *bmap; ulong width, height; @@ -548,10 +548,10 @@ __weak void fb_put_word(uchar **fb, uchar **from) } #endif /* CONFIG_BMP_16BPP */ -__weak void lcd_set_cmap(bmp_image_t *bmp, unsigned colors) +__weak void lcd_set_cmap(struct bmp_image *bmp, unsigned colors) { int i; - bmp_color_table_entry_t cte; + struct bmp_color_table_entry cte; ushort *cmap = configuration_get_cmap(); for (i = 0; i < colors; ++i) { @@ -572,7 +572,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) ushort *cmap_base = NULL; ushort i, j; uchar *fb; - bmp_image_t *bmp = (bmp_image_t *)map_sysmem(bmp_image, 0); + struct bmp_image *bmp = (struct bmp_image *)map_sysmem(bmp_image, 0); uchar *bmap; ushort padded_width; unsigned long width, height, byte_width; diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 4ed3a49beca..d43d8a59d3b 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -81,12 +81,12 @@ void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) #endif } -void lcd_set_cmap(bmp_image_t *bmp, unsigned colors) +void lcd_set_cmap(struct bmp_image *bmp, unsigned colors) { int i; for (i = 0; i < colors; ++i) { - bmp_color_table_entry_t cte = bmp->color_table[i]; + struct bmp_color_table_entry cte = bmp->color_table[i]; lcd_setcolreg(i, cte.red, cte.green, cte.blue); } } diff --git a/drivers/video/bus_vcxk.c b/drivers/video/bus_vcxk.c index 60a5cc5b719..2f54d3d1474 100644 --- a/drivers/video/bus_vcxk.c +++ b/drivers/video/bus_vcxk.c @@ -358,7 +358,7 @@ void vcxk_draw_mono(unsigned char *dataptr, unsigned long linewidth, int vcxk_display_bitmap(ulong addr, int x, int y) { - bmp_image_t *bmp; + struct bmp_image *bmp; unsigned long width; unsigned long height; unsigned long bpp; @@ -369,7 +369,7 @@ int vcxk_display_bitmap(ulong addr, int x, int y) unsigned long c_height; unsigned char *dataptr; - bmp = (bmp_image_t *) addr; + bmp = (struct bmp_image *)addr; if ((bmp->header.signature[0] == 'B') && (bmp->header.signature[1] == 'M')) { width = le32_to_cpu(bmp->header.width); diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index f4231b8e62a..7f2ddc10c62 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -1295,7 +1295,7 @@ static void draw_bitmap(uchar **fb, uchar *bm, struct palette *p, *fb = (uchar *) addr; /* return modified address */ } -static int display_rle8_bitmap(bmp_image_t *img, int xoff, int yoff, +static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff, int width, int height) { unsigned char *bm; @@ -1304,7 +1304,7 @@ static int display_rle8_bitmap(bmp_image_t *img, int xoff, int yoff, int decode = 1; int x, y, bpp, i, ncolors; struct palette p[256]; - bmp_color_table_entry_t cte; + struct bmp_color_table_entry cte; int green_shift, red_off; int limit = VIDEO_COLS * VIDEO_ROWS; int pixels = 0; @@ -1447,13 +1447,13 @@ int video_display_bitmap(ulong bmp_image, int x, int y) { ushort xcount, ycount; uchar *fb; - bmp_image_t *bmp = (bmp_image_t *) bmp_image; + struct bmp_image *bmp = (struct bmp_image *)bmp_image; uchar *bmap; ushort padded_line; unsigned long width, height, bpp; unsigned colors; unsigned long compression; - bmp_color_table_entry_t cte; + struct bmp_color_table_entry cte; #ifdef CONFIG_VIDEO_BMP_GZIP unsigned char *dst = NULL; @@ -1495,7 +1495,7 @@ int video_display_bitmap(ulong bmp_image, int x, int y) /* * Set addr to decompressed image */ - bmp = (bmp_image_t *)(dst+2); + bmp = (struct bmp_image *)(dst+2); if (!((bmp->header.signature[0] == 'B') && (bmp->header.signature[1] == 'M'))) { diff --git a/include/bmp_layout.h b/include/bmp_layout.h index 22b1fbc9435..55db8b86eab 100644 --- a/include/bmp_layout.h +++ b/include/bmp_layout.h @@ -11,17 +11,17 @@ #ifndef _BMP_H_ #define _BMP_H_ -typedef struct bmp_color_table_entry { +struct __packed bmp_color_table_entry { __u8 blue; __u8 green; __u8 red; __u8 reserved; -} __attribute__ ((packed)) bmp_color_table_entry_t; +}; /* When accessing these fields, remember that they are stored in little endian format, so use linux macros, e.g. le32_to_cpu(width) */ -typedef struct bmp_header { +struct __packed bmp_header { /* Header */ char signature[2]; __u32 file_size; @@ -40,15 +40,14 @@ typedef struct bmp_header { __u32 colors_used; __u32 colors_important; /* ColorTable */ +}; -} __attribute__ ((packed)) bmp_header_t; - -typedef struct bmp_image { - bmp_header_t header; +struct bmp_image { + struct bmp_header header; /* We use a zero sized array just as a placeholder for variable sized array */ - bmp_color_table_entry_t color_table[0]; -} bmp_image_t; + struct bmp_color_table_entry color_table[0]; +}; /* Data in the bmp_image is aligned to this length */ #define BMP_DATA_ALIGN 4 -- cgit v1.3.1 From 9091400859248e2f1d04f34f37c8a30b15fc4ef7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 12 May 2015 14:55:02 -0600 Subject: dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model This option is used by some boards, so support it with driver model. This is really ugly - we should rewrite this driver once all users are moved to driver model. Signed-off-by: Simon Glass --- drivers/serial/ns16550.c | 4 ++++ include/ns16550.h | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 3d376d75808..9b044a37da5 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -65,6 +65,8 @@ static inline void serial_out_shift(void *addr, int shift, int value) out_le32(addr, value); #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) out_be32(addr, value); +#elif defined(CONFIG_SYS_NS16550_MEM32) + writel(value, addr); #elif defined(CONFIG_SYS_BIG_ENDIAN) writeb(value, addr + (1 << shift) - 1); #else @@ -80,6 +82,8 @@ static inline int serial_in_shift(void *addr, int shift) return in_le32(addr); #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) return in_be32(addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) + return readl(addr); #elif defined(CONFIG_SYS_BIG_ENDIAN) return readb(addr + (1 << shift) - 1); #else diff --git a/include/ns16550.h b/include/ns16550.h index 0607379537d..4e620676c45 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -33,7 +33,7 @@ #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error "Please define NS16550 registers size." -#elif defined(CONFIG_SYS_NS16550_MEM32) +#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) #define UART_REG(x) u32 x #elif (CONFIG_SYS_NS16550_REG_SIZE > 0) #define UART_REG(x) \ -- cgit v1.3.1 From a59abd10498fed8c2bb5718748ba27310aac4ba2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 12 May 2015 14:55:07 -0600 Subject: Remove SPL undefine of CONFIG_OF_CONTROL Allow SPL to be built with this option so that we can support device tree control. Disable the simple bus for now in SPL. It may be needed later. Signed-off-by: Simon Glass --- drivers/core/Makefile | 2 ++ include/config_uncmd_spl.h | 2 ++ scripts/Makefile.uncmd_spl | 2 ++ 3 files changed, 6 insertions(+) (limited to 'include') diff --git a/drivers/core/Makefile b/drivers/core/Makefile index f14695b2d6e..a3fec385039 100644 --- a/drivers/core/Makefile +++ b/drivers/core/Makefile @@ -5,5 +5,7 @@ # obj-$(CONFIG_DM) += device.o lists.o root.o uclass.o util.o +ifndef CONFIG_SPL_BUILD obj-$(CONFIG_OF_CONTROL) += simple-bus.o +endif obj-$(CONFIG_DM_DEVICE_REMOVE) += device-remove.o diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index 38cb0e8abac..c191f5634e2 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -20,7 +20,9 @@ #undef CONFIG_CMD_SNTP #undef CONFIG_CMD_TFTPPUT #undef CONFIG_CMD_TFTPSRV +#ifdef CONFIG_SPL_DISABLE_OF_CONTROL #undef CONFIG_OF_CONTROL +#endif #ifndef CONFIG_SPL_DM #undef CONFIG_DM_SERIAL diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl index 343c3fc1993..4f056525bb0 100644 --- a/scripts/Makefile.uncmd_spl +++ b/scripts/Makefile.uncmd_spl @@ -3,7 +3,9 @@ # TODO: Invent a better way ifdef CONFIG_SPL_BUILD +ifdef CONFIG_SPL_DISABLE_OF_CONTROL CONFIG_OF_CONTROL= +endif ifndef CONFIG_SPL_DM CONFIG_DM_SERIAL= -- cgit v1.3.1 From af282245462186b8b06047c379ee85f4d0ec7a9c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 6 Mar 2015 13:19:03 -0700 Subject: sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass --- configs/sandbox_defconfig | 1 + drivers/serial/Kconfig | 20 ++++++++++++++++++++ drivers/serial/serial-uclass.c | 5 +++-- include/configs/sandbox.h | 1 - include/fdtdec.h | 6 ++++++ 5 files changed, 30 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 345b701f146..31fe2f9f451 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -41,3 +41,4 @@ CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y CONFIG_UT_ENV=y +CONFIG_SANDBOX_SERIAL=y diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5611fac0dc4..4829284216c 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -76,6 +76,26 @@ config DEBUG_UART_SHIFT value. Use this value to specify the shift to use, where 0=byte registers, 2=32-bit word registers, etc. +config SANDBOX_SERIAL + bool "Sandbox UART support" + depends on SANDBOX && DM + help + Select this to enable a seral UART for sandbox. This is required to + operate correctly, otherwise you will see no serial output from + sandbox. The emulated UART will display to the console and console + input will be fed into the UART. This allows you to interact with + U-Boot. + + The operation of the console is controlled by the -t command-line + flag. In raw mode, U-Boot sees all characters from the terminal + before they are processed, including Ctrl-C. In cooked mode, Ctrl-C + is processed by the terminal, and terminates U-Boot. Valid options + are: + + -t raw-with-sigs Raw mode, Ctrl-C will terminate U-Boot + -t raw Raw mode, Ctrl-C is processed by U-Boot + -t cooked Cooked mode, Ctrl-C terminates + config UNIPHIER_SERIAL bool "Support for UniPhier on-chip UART" depends on ARCH_UNIPHIER && DM_SERIAL diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 5674d5e538a..815fec32646 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -32,7 +32,7 @@ static void serial_find_console_or_panic(void) struct udevice *dev; int node; - if (OF_CONTROL) { + if (OF_CONTROL && gd->fdt_blob) { /* Check for a chosen console */ node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path"); if (node < 0) @@ -54,7 +54,8 @@ static void serial_find_console_or_panic(void) return; } } - } else { + } + if (!SPL_BUILD || !OF_CONTROL || !gd->fdt_blob) { /* * Try to use CONFIG_CONS_INDEX if available (it is numbered * from 1!). diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 3a857e2a3dd..3caa83ce098 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -113,7 +113,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define CONFIG_SANDBOX_SERIAL #define CONFIG_SYS_NO_FLASH diff --git a/include/fdtdec.h b/include/fdtdec.h index 4fb8a2a1ba5..e255998161c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -41,6 +41,12 @@ struct fdt_memory { fdt_addr_t end; }; +#ifdef CONFIG_SPL_BUILD +#define SPL_BUILD 1 +#else +#define SPL_BUILD 0 +#endif + #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && defined(SPL_DISABLE_OF_CONTROL) # define OF_CONTROL 0 -- cgit v1.3.1 From 257bfd2e215ff02aacce23e14bf17b61524a723f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Mar 2015 12:23:06 -0600 Subject: dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass --- arch/arm/mach-tegra/board2.c | 3 - drivers/usb/host/ehci-tegra.c | 150 ------------------------------------------ include/fdtdec.h | 3 - lib/fdtdec.c | 3 - 4 files changed, 159 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 8512afa7925..ce9b6959efb 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -161,9 +161,6 @@ int board_init(void) #ifdef CONFIG_USB_EHCI_TEGRA pin_mux_usb(); -# ifndef CONFIG_DM_USB - usb_process_devicetree(gd->fdt_blob); -# endif #endif #ifdef CONFIG_LCD diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 27705d66271..e2574d7958e 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -35,12 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; #endif #endif -#ifndef CONFIG_DM_USB -enum { - USB_PORTS_MAX = 3, /* Maximum ports we allow */ -}; -#endif - /* Parameters we need for USB */ enum { PARAM_DIVN, /* PLL FEEDBACK DIVIDer */ @@ -82,9 +76,6 @@ struct fdt_usb { unsigned ulpi:1; /* 1 if port has external ULPI transceiver */ unsigned enabled:1; /* 1 to enable, 0 to disable */ unsigned has_legacy_mode:1; /* 1 if this port has legacy mode */ -#ifndef CONFIG_DM_USB - unsigned initialized:1; /* has this port already been initialized? */ -#endif enum usb_ctlr_type type; enum usb_init_type init_type; enum dr_mode dr_mode; /* dual role mode */ @@ -93,11 +84,6 @@ struct fdt_usb { struct gpio_desc phy_reset_gpio; /* GPIO to reset ULPI phy */ }; -#ifndef CONFIG_DM_USB -static struct fdt_usb port[USB_PORTS_MAX]; /* List of valid USB ports */ -static unsigned port_count; /* Number of available ports */ -#endif - /* * This table has USB timing parameters for each Oscillator frequency we * support. There are four sets of values: @@ -173,8 +159,6 @@ static const u8 utmip_elastic_limit = 16; static const u8 utmip_hs_sync_start_delay = 9; struct fdt_usb_controller { - /* TODO(sjg@chromium.org): Remove when we only use driver model */ - int compat; /* flag to determine whether controller supports hostpc register */ u32 has_hostpc:1; const unsigned *pll_parameter; @@ -182,17 +166,14 @@ struct fdt_usb_controller { static struct fdt_usb_controller fdt_usb_controllers[USB_CTRL_COUNT] = { { - .compat = COMPAT_NVIDIA_TEGRA20_USB, .has_hostpc = 0, .pll_parameter = (const unsigned *)T20_usb_pll, }, { - .compat = COMPAT_NVIDIA_TEGRA30_USB, .has_hostpc = 1, .pll_parameter = (const unsigned *)T30_usb_pll, }, { - .compat = COMPAT_NVIDIA_TEGRA114_USB, .has_hostpc = 1, .pll_parameter = (const unsigned *)T114_usb_pll, }, @@ -754,12 +735,6 @@ int usb_common_init(struct fdt_usb *config, enum usb_init_type init) return -1; } -#ifndef CONFIG_DM_USB - /* skip init, if the port is already initialized */ - if (config->initialized && config->init_type == init) - return 0; -#endif - debug("%d, %d\n", config->utmi, config->ulpi); if (config->utmi) ret = init_utmi_usb_controller(config, init); @@ -796,130 +771,6 @@ static const struct ehci_ops tegra_ehci_ops = { .powerup_fixup = tegra_ehci_powerup_fixup, }; -#ifndef CONFIG_DM_USB -/* - * process_usb_nodes() - Process a list of USB nodes, adding them to our list - * of USB ports. - * @blob: fdt blob - * @node_list: list of nodes to process (any <=0 are ignored) - * @count: number of nodes to process - * @id: controller type (enum usb_ctlr_type) - * - * Return: 0 - ok, -1 - error - */ -static int process_usb_nodes(const void *blob, int node_list[], int count, - enum usb_ctlr_type id) -{ - struct fdt_usb config; - int node, i; - int clk_done = 0; - - port_count = 0; - for (i = 0; i < count; i++) { - if (port_count == USB_PORTS_MAX) { - printf("tegrausb: Cannot register more than %d ports\n", - USB_PORTS_MAX); - return -1; - } - - debug("USB %d: ", i); - node = node_list[i]; - if (!node) - continue; - if (fdt_decode_usb(blob, node, &config)) { - debug("Cannot decode USB node %s\n", - fdt_get_name(blob, node, NULL)); - return -1; - } - if (!clk_done) { - config_clock(get_pll_timing( - &fdt_usb_controllers[id])); - clk_done = 1; - } - config.type = id; - config.initialized = 0; - - /* add new USB port to the list of available ports */ - port[port_count++] = config; - } - - return 0; -} - -int usb_process_devicetree(const void *blob) -{ - int node_list[USB_PORTS_MAX]; - int count, err = 0; - int i; - - for (i = 0; i < ARRAY_SIZE(fdt_usb_controllers); i++) { - count = fdtdec_find_aliases_for_id(blob, "usb", - fdt_usb_controllers[i].compat, node_list, - USB_PORTS_MAX); - if (count) { - err = process_usb_nodes(blob, node_list, count, i); - if (err) - printf("%s: Error processing USB node!\n", - __func__); - return err; - } - } - - return err; -} - -/** - * Start up the given port number (ports are numbered from 0 on each board). - * This returns values for the appropriate hccr and hcor addresses to use for - * USB EHCI operations. - * - * @param index port number to start - * @param hccr returns start address of EHCI HCCR registers - * @param hcor returns start address of EHCI HCOR registers - * @return 0 if ok, -1 on error (generally invalid port number) - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - struct fdt_usb *config; - struct usb_ctlr *usbctlr; - int ret; - - if (index >= port_count) - return -1; - - config = &port[index]; - ehci_set_controller_priv(index, config, &tegra_ehci_ops); - - ret = usb_common_init(config, init); - if (ret) { - printf("tegrausb: Cannot init port %d\n", index); - return ret; - } - - config->initialized = 1; - - usbctlr = config->reg; - *hccr = (struct ehci_hccr *)&usbctlr->cap_length; - *hcor = (struct ehci_hcor *)&usbctlr->usb_cmd; - - return 0; -} - -/* - * Bring down the specified USB controller - */ -int ehci_hcd_stop(int index) -{ - usb_common_uninit(&port[index]); - - port[index].initialized = 0; - - return 0; -} -#endif /* !CONFIG_DM_USB */ - -#ifdef CONFIG_DM_USB static int ehci_usb_ofdata_to_platdata(struct udevice *dev) { struct fdt_usb *priv = dev_get_priv(dev); @@ -987,4 +838,3 @@ U_BOOT_DRIVER(usb_ehci) = { .priv_auto_alloc_size = sizeof(struct fdt_usb), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; -#endif diff --git a/include/fdtdec.h b/include/fdtdec.h index e255998161c..232360341a5 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -128,9 +128,6 @@ static inline fdt_size_t fdt_resource_size(const struct fdt_resource *res) */ enum fdt_compat_id { COMPAT_UNKNOWN, - COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */ - COMPAT_NVIDIA_TEGRA30_USB, /* Tegra30 USB port */ - COMPAT_NVIDIA_TEGRA114_USB, /* Tegra114 USB port */ COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */ COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */ COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra20 Keyboard */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 46dfcb675cc..9877849f99b 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -22,9 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; #define COMPAT(id, name) name static const char * const compat_names[COMPAT_COUNT] = { COMPAT(UNKNOWN, ""), - COMPAT(NVIDIA_TEGRA20_USB, "nvidia,tegra20-ehci"), - COMPAT(NVIDIA_TEGRA30_USB, "nvidia,tegra30-ehci"), - COMPAT(NVIDIA_TEGRA114_USB, "nvidia,tegra114-ehci"), COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), COMPAT(NVIDIA_TEGRA20_KBC, "nvidia,tegra20-kbc"), -- cgit v1.3.1