From cc4dcd488cd339f931fa97dcda30b94a3d10a302 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 20 Nov 2021 23:55:42 +0100 Subject: board: stemmy: Increase boot image to 64 MB When using a recent kernel with a bunch of compiled-in stuff the kernel image easily becomes bigger than 8 MB yielding this error: Loading Kernel Image Image too large: increase CONFIG_SYS_BOOTM_LEN Must RESET board to recover Fix this by bumping to SZ_64MB. Cc: Stephan Gerhold Signed-off-by: Linus Walleij Reviewed-by: Tom Rini Reviewed-by: Stephan Gerhold --- include/configs/stemmy.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index e5571b240dc..96e759d99ca 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -14,6 +14,7 @@ * bootloader. New images are loaded at the same address for compatibility. */ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_BOOTM_LEN SZ_64M /* FIXME: This should be loaded from device tree... */ #define CONFIG_SYS_L2_PL310 -- cgit v1.2.3 From 17fe55fd6fe9d32270380f574b33ff0bc15bb47e Mon Sep 17 00:00:00 2001 From: Peter Hoyes Date: Thu, 11 Nov 2021 09:26:00 +0000 Subject: vexpress64: Refactor header file to make it easier to add new FVPs Rename from vexpress_aemv8a.h -> vepxress_aemv8.h as new FVPs may not be v8-A. No change in behavior. This is towards future work to enable support for the FVP_BaseR. Signed-off-by: Peter Hoyes Reviewed-by: Andre Przywara --- include/configs/vexpress_aemv8.h | 214 ++++++++++++++++++++++++++++++++++++++ include/configs/vexpress_aemv8a.h | 213 ------------------------------------- 2 files changed, 214 insertions(+), 213 deletions(-) create mode 100644 include/configs/vexpress_aemv8.h delete mode 100644 include/configs/vexpress_aemv8a.h (limited to 'include') diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h new file mode 100644 index 00000000000..52fc15d5fc8 --- /dev/null +++ b/include/configs/vexpress_aemv8.h @@ -0,0 +1,214 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Versatile Express. Parts were derived from other ARM + * configurations. + */ + +#ifndef __VEXPRESS_AEMV8_H +#define __VEXPRESS_AEMV8_H + +#define CONFIG_REMAKE_ELF + +/* Link Definitions */ +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#else +/* ATF loads u-boot here for BASE_FVP model */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) +#endif + +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + +/* CS register bases for the original memory map. */ +#define V2M_BASE 0x80000000 +#define V2M_PA_BASE 0x00000000 + +#define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000) +#define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000) +#define V2M_PA_CS2 (V2M_PA_BASE + 0x18000000) +#define V2M_PA_CS3 (V2M_PA_BASE + 0x1c000000) +#define V2M_PA_CS4 (V2M_PA_BASE + 0x0c000000) +#define V2M_PA_CS5 (V2M_PA_BASE + 0x10000000) + +#define V2M_PERIPH_OFFSET(x) (x << 16) +#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) +#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) +#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) + +/* Common peripherals relative to CS7. */ +#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) +#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) +#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) +#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) + +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define V2M_UART0 0x7ff80000 +#define V2M_UART1 0x7ff70000 +#else /* Not Juno */ +#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) +#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) +#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) +#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) +#endif + +#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) + +#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) +#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) + +#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) +#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) + +#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) + +#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) + +/* System register offsets. */ +#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) +#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) +#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 24000000 /* 24MHz */ + +/* Generic Interrupt Controller Definitions */ +#ifdef CONFIG_GICV3 +#define GICD_BASE (V2M_PA_BASE + 0x2f000000) +#define GICR_BASE (V2M_PA_BASE + 0x2f100000) +#else + +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define GICD_BASE (0x2C010000) +#define GICC_BASE (0x2C02f000) +#else +#define GICD_BASE (V2M_PA_BASE + 0x2f000000) +#define GICC_BASE (V2M_PA_BASE + 0x2c000000) +#endif +#endif /* !CONFIG_GICV3 */ + +#ifndef CONFIG_TARGET_VEXPRESS64_JUNO +/* The Vexpress64 simulators use SMSC91C111 */ +#define CONFIG_SMC91111 1 +#define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000) +#endif + +/* PL011 Serial Configuration */ +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_PL011_CLOCK 7372800 +#else +#define CONFIG_PL011_CLOCK 24000000 +#endif + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE + +/* Miscellaneous configurable options */ + +/* Physical Memory Map */ +#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ +/* Top 16MB reserved for secure world use */ +#define DRAM_SEC_SIZE 0x01000000 +#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define PHYS_SDRAM_2 (0x880000000) +#define PHYS_SDRAM_2_SIZE 0x180000000 +#elif CONFIG_NR_DRAM_BANKS == 2 +#define PHYS_SDRAM_2 (0x880000000) +#define PHYS_SDRAM_2_SIZE 0x80000000 +#endif + +/* Enable memtest */ + +/* Initial environment variables */ +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +/* Copy the kernel and FDT to DRAM memory and boot */ +#define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \ + "bootcmd_afs=" \ + "afs load ${kernel_name} ${kernel_addr_r} ;"\ + "if test $? -eq 1; then "\ + " echo Loading ${kernel_alt_name} instead of ${kernel_name}; "\ + " afs load ${kernel_alt_name} ${kernel_addr_r};"\ + "fi ; "\ + "afs load ${fdtfile} ${fdt_addr_r} ;"\ + "if test $? -eq 1; then "\ + " echo Loading ${fdt_alt_name} instead of ${fdtfile}; "\ + " afs load ${fdt_alt_name} ${fdt_addr_r}; "\ + "fi ; "\ + "fdt addr ${fdt_addr_r}; fdt resize; " \ + "if afs load ${ramdisk_name} ${ramdisk_addr_r} ; "\ + "then "\ + " setenv ramdisk_param ${ramdisk_addr_r}; "\ + "else "\ + " setenv ramdisk_param -; "\ + "fi ; " \ + "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0" +#define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs " + +#define BOOT_TARGET_DEVICES(func) \ + func(USB, usb, 0) \ + func(SATA, sata, 0) \ + func(SATA, sata, 1) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) \ + func(AFS, afs, na) + +#include + +/* + * Defines where the kernel and FDT exist in NOR flash and where it will + * be copied into DRAM + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_name=norkern\0" \ + "kernel_alt_name=Image\0" \ + "kernel_addr_r=0x80080000\0" \ + "ramdisk_name=ramdisk.img\0" \ + "ramdisk_addr_r=0x88000000\0" \ + "fdtfile=board.dtb\0" \ + "fdt_alt_name=juno\0" \ + "fdt_addr_r=0x80000000\0" \ + BOOTENV + +#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_name=Image\0" \ + "kernel_addr=0x80080000\0" \ + "initrd_name=ramdisk.img\0" \ + "initrd_addr=0x88000000\0" \ + "fdtfile=devtree.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "boot_name=boot.img\0" \ + "boot_addr=0x8007f800\0" +#endif + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_MAXARGS 64 /* max command args */ + +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_FLASH_BASE 0x08000000 +/* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */ +#define CONFIG_SYS_MAX_FLASH_SECT 259 +/* Store environment at top of flash in the same location as blank.img */ +/* in the Juno firmware. */ +#else +#define CONFIG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000) +/* 256 x 256KiB sectors */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 +/* Store environment at top of flash */ +#endif + +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT +#define CONFIG_SYS_MAX_FLASH_BANKS 1 + +#ifdef CONFIG_USB_EHCI_HCD +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 +#endif + +#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ +#define FLASH_MAX_SECTOR_SIZE 0x00040000 + +#endif /* __VEXPRESS_AEMV8_H */ diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h deleted file mode 100644 index 44c746f6f2b..00000000000 --- a/include/configs/vexpress_aemv8a.h +++ /dev/null @@ -1,213 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Versatile Express. Parts were derived from other ARM - * configurations. - */ - -#ifndef __VEXPRESS_AEMV8A_H -#define __VEXPRESS_AEMV8A_H - -#define CONFIG_REMAKE_ELF - -/* Link Definitions */ -#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP -/* ATF loads u-boot here for BASE_FVP model */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) -#elif CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) -#endif - -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -/* CS register bases for the original memory map. */ -#define V2M_PA_CS0 0x00000000 -#define V2M_PA_CS1 0x14000000 -#define V2M_PA_CS2 0x18000000 -#define V2M_PA_CS3 0x1c000000 -#define V2M_PA_CS4 0x0c000000 -#define V2M_PA_CS5 0x10000000 - -#define V2M_PERIPH_OFFSET(x) (x << 16) -#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) -#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) -#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) - -#define V2M_BASE 0x80000000 - -/* Common peripherals relative to CS7. */ -#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) -#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) -#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) -#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) - -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define V2M_UART0 0x7ff80000 -#define V2M_UART1 0x7ff70000 -#else /* Not Juno */ -#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) -#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) -#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) -#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) -#endif - -#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) - -#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) -#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) - -#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) -#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) - -#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) - -#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) - -/* System register offsets. */ -#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) -#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) -#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) - -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 24000000 /* 24MHz */ - -/* Generic Interrupt Controller Definitions */ -#ifdef CONFIG_GICV3 -#define GICD_BASE (0x2f000000) -#define GICR_BASE (0x2f100000) -#else - -#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP -#define GICD_BASE (0x2f000000) -#define GICC_BASE (0x2c000000) -#elif CONFIG_TARGET_VEXPRESS64_JUNO -#define GICD_BASE (0x2C010000) -#define GICC_BASE (0x2C02f000) -#endif -#endif /* !CONFIG_GICV3 */ - -#ifndef CONFIG_TARGET_VEXPRESS64_JUNO -/* The Vexpress64 simulators use SMSC91C111 */ -#define CONFIG_SMC91111 1 -#define CONFIG_SMC91111_BASE (0x01A000000) -#endif - -/* PL011 Serial Configuration */ -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_PL011_CLOCK 7372800 -#else -#define CONFIG_PL011_CLOCK 24000000 -#endif - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* Miscellaneous configurable options */ - -/* Physical Memory Map */ -#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ -/* Top 16MB reserved for secure world use */ -#define DRAM_SEC_SIZE 0x01000000 -#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 - -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define PHYS_SDRAM_2 (0x880000000) -#define PHYS_SDRAM_2_SIZE 0x180000000 -#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP && CONFIG_NR_DRAM_BANKS == 2 -#define PHYS_SDRAM_2 (0x880000000) -#define PHYS_SDRAM_2_SIZE 0x80000000 -#endif - -/* Enable memtest */ - -/* Initial environment variables */ -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO -/* Copy the kernel and FDT to DRAM memory and boot */ -#define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \ - "bootcmd_afs=" \ - "afs load ${kernel_name} ${kernel_addr_r} ;"\ - "if test $? -eq 1; then "\ - " echo Loading ${kernel_alt_name} instead of ${kernel_name}; "\ - " afs load ${kernel_alt_name} ${kernel_addr_r};"\ - "fi ; "\ - "afs load ${fdtfile} ${fdt_addr_r} ;"\ - "if test $? -eq 1; then "\ - " echo Loading ${fdt_alt_name} instead of ${fdtfile}; "\ - " afs load ${fdt_alt_name} ${fdt_addr_r}; "\ - "fi ; "\ - "fdt addr ${fdt_addr_r}; fdt resize; " \ - "if afs load ${ramdisk_name} ${ramdisk_addr_r} ; "\ - "then "\ - " setenv ramdisk_param ${ramdisk_addr_r}; "\ - "else "\ - " setenv ramdisk_param -; "\ - "fi ; " \ - "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0" -#define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs " - -#define BOOT_TARGET_DEVICES(func) \ - func(USB, usb, 0) \ - func(SATA, sata, 0) \ - func(SATA, sata, 1) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) \ - func(AFS, afs, na) - -#include - -/* - * Defines where the kernel and FDT exist in NOR flash and where it will - * be copied into DRAM - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_name=norkern\0" \ - "kernel_alt_name=Image\0" \ - "kernel_addr_r=0x80080000\0" \ - "ramdisk_name=ramdisk.img\0" \ - "ramdisk_addr_r=0x88000000\0" \ - "fdtfile=board.dtb\0" \ - "fdt_alt_name=juno\0" \ - "fdt_addr_r=0x80000000\0" \ - BOOTENV - -#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP -#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_name=Image\0" \ - "kernel_addr=0x80080000\0" \ - "initrd_name=ramdisk.img\0" \ - "initrd_addr=0x88000000\0" \ - "fdtfile=devtree.dtb\0" \ - "fdt_addr=0x83000000\0" \ - "boot_name=boot.img\0" \ - "boot_addr=0x8007f800\0" -#endif - -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ - -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_SYS_FLASH_BASE 0x08000000 -/* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */ -#define CONFIG_SYS_MAX_FLASH_SECT 259 -/* Store environment at top of flash in the same location as blank.img */ -/* in the Juno firmware. */ -#else -#define CONFIG_SYS_FLASH_BASE 0x0C000000 -/* 256 x 256KiB sectors */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 -/* Store environment at top of flash */ -#endif - -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT -#define CONFIG_SYS_MAX_FLASH_BANKS 1 - -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#endif - -#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ -#define FLASH_MAX_SECTOR_SIZE 0x00040000 - -#endif /* __VEXPRESS_AEMV8A_H */ -- cgit v1.2.3 From 90f262a6951f530ec60bf78a681b117f625cbe3f Mon Sep 17 00:00:00 2001 From: Peter Hoyes Date: Thu, 11 Nov 2021 09:26:01 +0000 Subject: vexpress64: Clean up BASE_FVP boot configuration Move env var address values to #defines so they can be reused elsewhere. Rename env var names to those recommended in the README and modify addresses to allow more space for the kernel. Fix issue where fdt is called with invalid arguments when booting without a ramdisk. Signed-off-by: Peter Hoyes Reviewed-by: Andre Przywara --- include/configs/vexpress_aemv8.h | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 52fc15d5fc8..5f7d19daad3 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -7,6 +7,8 @@ #ifndef __VEXPRESS_AEMV8_H #define __VEXPRESS_AEMV8_H +#include + #define CONFIG_REMAKE_ELF /* Link Definitions */ @@ -172,15 +174,22 @@ BOOTENV #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP + +#define VEXPRESS_KERNEL_ADDR 0x80080000 +#define VEXPRESS_FDT_ADDR 0x8fc00000 +#define VEXPRESS_BOOT_ADDR 0x8fd00000 +#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 + #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_name=Image\0" \ - "kernel_addr=0x80080000\0" \ - "initrd_name=ramdisk.img\0" \ - "initrd_addr=0x88000000\0" \ - "fdtfile=devtree.dtb\0" \ - "fdt_addr=0x83000000\0" \ - "boot_name=boot.img\0" \ - "boot_addr=0x8007f800\0" + "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ + "ramdisk_name=ramdisk.img\0" \ + "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ + "fdtfile=devtree.dtb\0" \ + "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \ + "boot_name=boot.img\0" \ + "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0" + #endif /* Monitor Command Prompt */ -- cgit v1.2.3 From 439581dca4c786dbbdd2d6be024e0b907a3b0c80 Mon Sep 17 00:00:00 2001 From: Peter Hoyes Date: Thu, 11 Nov 2021 09:26:03 +0000 Subject: vexpress64: Enable VIRTIO_NET network driver The SMSC driver is using the old driver model. Init the virtio system in vexpress64.c so that the network device is discovered. Signed-off-by: Peter Hoyes Reviewed-by: Andre Przywara --- include/configs/vexpress_aemv8.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 5f7d19daad3..54e8caeb7bc 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -88,8 +88,8 @@ #endif #endif /* !CONFIG_GICV3 */ -#ifndef CONFIG_TARGET_VEXPRESS64_JUNO -/* The Vexpress64 simulators use SMSC91C111 */ +#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH) +/* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */ #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000) #endif -- cgit v1.2.3 From 3bbd6c0152309709c335ed5f2335be29346d2d3a Mon Sep 17 00:00:00 2001 From: Mark Kettenis Date: Sun, 14 Nov 2021 13:09:54 +0100 Subject: arm: apple: Remove CONFIG_SYS_SDRAM_BASE The memory layout is taken from the device tree passed to us by m1n1, so there is no need to define this. Signed-off-by: Mark Kettenis Reviewed-by: Simon Glass Tested-by: Simon Glass --- include/configs/apple.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/apple.h b/include/configs/apple.h index 9cf20fc833f..3e5fb495f1a 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -3,8 +3,6 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x880000000 - /* Environment */ #define ENV_DEVICE_SETTINGS \ "stdin=serial,usbkbd\0" \ -- cgit v1.2.3