From 935d410c29601ca2502132a8235f4cec7e2932c9 Mon Sep 17 00:00:00 2001 From: Igor Prusov Date: Mon, 25 Sep 2023 18:52:08 +0300 Subject: dt-bindings: clock: Add Amlogic A1 clock bindings Add clock bindings for Amlogic A1 from linux-next next-20230821. Signed-off-by: Igor Prusov Reviewed-by: Simon Glass Link: https://lore.kernel.org/r/20230925155209.130671-2-ivprusov@salutedevices.com Signed-off-by: Neil Armstrong --- .../clock/amlogic,a1-peripherals-clkc.h | 168 +++++++++++++++++++++ include/dt-bindings/clock/amlogic,a1-pll-clkc.h | 25 +++ 2 files changed, 193 insertions(+) create mode 100644 include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h create mode 100644 include/dt-bindings/clock/amlogic,a1-pll-clkc.h (limited to 'include') diff --git a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h b/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h new file mode 100644 index 00000000000..06f198ee762 --- /dev/null +++ b/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h @@ -0,0 +1,168 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + * Author: Jian Hu + * + * Copyright (c) 2023, SberDevices. All Rights Reserved. + * Author: Dmitry Rokosov + */ + +#ifndef __A1_PERIPHERALS_CLKC_H +#define __A1_PERIPHERALS_CLKC_H + +#define CLKID_XTAL_IN 0 +#define CLKID_FIXPLL_IN 1 +#define CLKID_USB_PHY_IN 2 +#define CLKID_USB_CTRL_IN 3 +#define CLKID_HIFIPLL_IN 4 +#define CLKID_SYSPLL_IN 5 +#define CLKID_DDS_IN 6 +#define CLKID_SYS 7 +#define CLKID_CLKTREE 8 +#define CLKID_RESET_CTRL 9 +#define CLKID_ANALOG_CTRL 10 +#define CLKID_PWR_CTRL 11 +#define CLKID_PAD_CTRL 12 +#define CLKID_SYS_CTRL 13 +#define CLKID_TEMP_SENSOR 14 +#define CLKID_AM2AXI_DIV 15 +#define CLKID_SPICC_B 16 +#define CLKID_SPICC_A 17 +#define CLKID_MSR 18 +#define CLKID_AUDIO 19 +#define CLKID_JTAG_CTRL 20 +#define CLKID_SARADC_EN 21 +#define CLKID_PWM_EF 22 +#define CLKID_PWM_CD 23 +#define CLKID_PWM_AB 24 +#define CLKID_CEC 25 +#define CLKID_I2C_S 26 +#define CLKID_IR_CTRL 27 +#define CLKID_I2C_M_D 28 +#define CLKID_I2C_M_C 29 +#define CLKID_I2C_M_B 30 +#define CLKID_I2C_M_A 31 +#define CLKID_ACODEC 32 +#define CLKID_OTP 33 +#define CLKID_SD_EMMC_A 34 +#define CLKID_USB_PHY 35 +#define CLKID_USB_CTRL 36 +#define CLKID_SYS_DSPB 37 +#define CLKID_SYS_DSPA 38 +#define CLKID_DMA 39 +#define CLKID_IRQ_CTRL 40 +#define CLKID_NIC 41 +#define CLKID_GIC 42 +#define CLKID_UART_C 43 +#define CLKID_UART_B 44 +#define CLKID_UART_A 45 +#define CLKID_SYS_PSRAM 46 +#define CLKID_RSA 47 +#define CLKID_CORESIGHT 48 +#define CLKID_AM2AXI_VAD 49 +#define CLKID_AUDIO_VAD 50 +#define CLKID_AXI_DMC 51 +#define CLKID_AXI_PSRAM 52 +#define CLKID_RAMB 53 +#define CLKID_RAMA 54 +#define CLKID_AXI_SPIFC 55 +#define CLKID_AXI_NIC 56 +#define CLKID_AXI_DMA 57 +#define CLKID_CPU_CTRL 58 +#define CLKID_ROM 59 +#define CLKID_PROC_I2C 60 +#define CLKID_DSPA_SEL 61 +#define CLKID_DSPB_SEL 62 +#define CLKID_DSPA_EN 63 +#define CLKID_DSPA_EN_NIC 64 +#define CLKID_DSPB_EN 65 +#define CLKID_DSPB_EN_NIC 66 +#define CLKID_RTC 67 +#define CLKID_CECA_32K 68 +#define CLKID_CECB_32K 69 +#define CLKID_24M 70 +#define CLKID_12M 71 +#define CLKID_FCLK_DIV2_DIVN 72 +#define CLKID_GEN 73 +#define CLKID_SARADC_SEL 74 +#define CLKID_SARADC 75 +#define CLKID_PWM_A 76 +#define CLKID_PWM_B 77 +#define CLKID_PWM_C 78 +#define CLKID_PWM_D 79 +#define CLKID_PWM_E 80 +#define CLKID_PWM_F 81 +#define CLKID_SPICC 82 +#define CLKID_TS 83 +#define CLKID_SPIFC 84 +#define CLKID_USB_BUS 85 +#define CLKID_SD_EMMC 86 +#define CLKID_PSRAM 87 +#define CLKID_DMC 88 +#define CLKID_SYS_A_SEL 89 +#define CLKID_SYS_A_DIV 90 +#define CLKID_SYS_A 91 +#define CLKID_SYS_B_SEL 92 +#define CLKID_SYS_B_DIV 93 +#define CLKID_SYS_B 94 +#define CLKID_DSPA_A_SEL 95 +#define CLKID_DSPA_A_DIV 96 +#define CLKID_DSPA_A 97 +#define CLKID_DSPA_B_SEL 98 +#define CLKID_DSPA_B_DIV 99 +#define CLKID_DSPA_B 100 +#define CLKID_DSPB_A_SEL 101 +#define CLKID_DSPB_A_DIV 102 +#define CLKID_DSPB_A 103 +#define CLKID_DSPB_B_SEL 104 +#define CLKID_DSPB_B_DIV 105 +#define CLKID_DSPB_B 106 +#define CLKID_RTC_32K_IN 107 +#define CLKID_RTC_32K_DIV 108 +#define CLKID_RTC_32K_XTAL 109 +#define CLKID_RTC_32K_SEL 110 +#define CLKID_CECB_32K_IN 111 +#define CLKID_CECB_32K_DIV 112 +#define CLKID_CECB_32K_SEL_PRE 113 +#define CLKID_CECB_32K_SEL 114 +#define CLKID_CECA_32K_IN 115 +#define CLKID_CECA_32K_DIV 116 +#define CLKID_CECA_32K_SEL_PRE 117 +#define CLKID_CECA_32K_SEL 118 +#define CLKID_DIV2_PRE 119 +#define CLKID_24M_DIV2 120 +#define CLKID_GEN_SEL 121 +#define CLKID_GEN_DIV 122 +#define CLKID_SARADC_DIV 123 +#define CLKID_PWM_A_SEL 124 +#define CLKID_PWM_A_DIV 125 +#define CLKID_PWM_B_SEL 126 +#define CLKID_PWM_B_DIV 127 +#define CLKID_PWM_C_SEL 128 +#define CLKID_PWM_C_DIV 129 +#define CLKID_PWM_D_SEL 130 +#define CLKID_PWM_D_DIV 131 +#define CLKID_PWM_E_SEL 132 +#define CLKID_PWM_E_DIV 133 +#define CLKID_PWM_F_SEL 134 +#define CLKID_PWM_F_DIV 135 +#define CLKID_SPICC_SEL 136 +#define CLKID_SPICC_DIV 137 +#define CLKID_SPICC_SEL2 138 +#define CLKID_TS_DIV 139 +#define CLKID_SPIFC_SEL 140 +#define CLKID_SPIFC_DIV 141 +#define CLKID_SPIFC_SEL2 142 +#define CLKID_USB_BUS_SEL 143 +#define CLKID_USB_BUS_DIV 144 +#define CLKID_SD_EMMC_SEL 145 +#define CLKID_SD_EMMC_DIV 146 +#define CLKID_SD_EMMC_SEL2 147 +#define CLKID_PSRAM_SEL 148 +#define CLKID_PSRAM_DIV 149 +#define CLKID_PSRAM_SEL2 150 +#define CLKID_DMC_SEL 151 +#define CLKID_DMC_DIV 152 +#define CLKID_DMC_SEL2 153 + +#endif /* __A1_PERIPHERALS_CLKC_H */ diff --git a/include/dt-bindings/clock/amlogic,a1-pll-clkc.h b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h new file mode 100644 index 00000000000..2b660c0f2c9 --- /dev/null +++ b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + * Author: Jian Hu + * + * Copyright (c) 2023, SberDevices. All Rights Reserved. + * Author: Dmitry Rokosov + */ + +#ifndef __A1_PLL_CLKC_H +#define __A1_PLL_CLKC_H + +#define CLKID_FIXED_PLL_DCO 0 +#define CLKID_FIXED_PLL 1 +#define CLKID_FCLK_DIV2_DIV 2 +#define CLKID_FCLK_DIV3_DIV 3 +#define CLKID_FCLK_DIV5_DIV 4 +#define CLKID_FCLK_DIV7_DIV 5 +#define CLKID_FCLK_DIV2 6 +#define CLKID_FCLK_DIV3 7 +#define CLKID_FCLK_DIV5 8 +#define CLKID_FCLK_DIV7 9 +#define CLKID_HIFI_PLL 10 + +#endif /* __A1_PLL_CLKC_H */ -- cgit v1.3.1 From 1cff5bf0c3debc1e2c1ce680a78c2c08ac3d15ba Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 5 Oct 2023 11:54:22 +0300 Subject: dt-bindings: reset: add Meson A1 reset bindings Get this from Linux 6.6-rc3. Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20231005085434.74755-2-avromanov@salutedevices.com Signed-off-by: Neil Armstrong --- include/dt-bindings/reset/amlogic,meson-a1-reset.h | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 include/dt-bindings/reset/amlogic,meson-a1-reset.h (limited to 'include') diff --git a/include/dt-bindings/reset/amlogic,meson-a1-reset.h b/include/dt-bindings/reset/amlogic,meson-a1-reset.h new file mode 100644 index 00000000000..2c749c655e1 --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-a1-reset.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + * Author: Xingyu Chen + * + * Copyright (c) 2023, SberDevices, Inc. + * Author: Alexey Romanov + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H + +/* RESET0 */ +/* 0 */ +#define RESET_AM2AXI_VAD 1 +/* 2-3 */ +#define RESET_PSRAM 4 +#define RESET_PAD_CTRL 5 +/* 6 */ +#define RESET_TEMP_SENSOR 7 +#define RESET_AM2AXI_DEV 8 +/* 9 */ +#define RESET_SPICC_A 10 +#define RESET_MSR_CLK 11 +#define RESET_AUDIO 12 +#define RESET_ANALOG_CTRL 13 +#define RESET_SAR_ADC 14 +#define RESET_AUDIO_VAD 15 +#define RESET_CEC 16 +#define RESET_PWM_EF 17 +#define RESET_PWM_CD 18 +#define RESET_PWM_AB 19 +/* 20 */ +#define RESET_IR_CTRL 21 +#define RESET_I2C_S_A 22 +/* 23 */ +#define RESET_I2C_M_D 24 +#define RESET_I2C_M_C 25 +#define RESET_I2C_M_B 26 +#define RESET_I2C_M_A 27 +#define RESET_I2C_PROD_AHB 28 +#define RESET_I2C_PROD 29 +/* 30-31 */ + +/* RESET1 */ +#define RESET_ACODEC 32 +#define RESET_DMA 33 +#define RESET_SD_EMMC_A 34 +/* 35 */ +#define RESET_USBCTRL 36 +/* 37 */ +#define RESET_USBPHY 38 +/* 39-41 */ +#define RESET_RSA 42 +#define RESET_DMC 43 +/* 44 */ +#define RESET_IRQ_CTRL 45 +/* 46 */ +#define RESET_NIC_VAD 47 +#define RESET_NIC_AXI 48 +#define RESET_RAMA 49 +#define RESET_RAMB 50 +/* 51-52 */ +#define RESET_ROM 53 +#define RESET_SPIFC 54 +#define RESET_GIC 55 +#define RESET_UART_C 56 +#define RESET_UART_B 57 +#define RESET_UART_A 58 +#define RESET_OSC_RING 59 +/* 60-63 */ + +/* RESET2 */ +/* 64-95 */ + +#endif -- cgit v1.3.1 From c52cd07407af6467d68f1ed9dd180fb72bbf0313 Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 21 Sep 2023 11:13:34 +0300 Subject: drivers: introduce Secure Monitor uclass At the moment, we don't have a common API for working with SM, only the smc_call() function. This approach is not generic and difficult to configure and maintain. This patch adds UCLASS_SM with the generic API: - sm_call() - sm_call_write() - sm_call_read() These functions operate with struct pt_regs, which describes Secure Monitor arguments. Signed-off-by: Alexey Romanov Reviewed-by: Simon Glass Link: https://lore.kernel.org/r/20230921081346.22157-2-avromanov@salutedevices.com Signed-off-by: Neil Armstrong --- drivers/Kconfig | 2 ++ drivers/Makefile | 1 + drivers/sm/Kconfig | 2 ++ drivers/sm/Makefile | 3 +++ drivers/sm/sm-uclass.c | 55 ++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/sm-uclass.h | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/sm.h | 67 ++++++++++++++++++++++++++++++++++++++++++++++ 8 files changed, 203 insertions(+) create mode 100644 drivers/sm/Kconfig create mode 100644 drivers/sm/Makefile create mode 100644 drivers/sm/sm-uclass.c create mode 100644 include/sm-uclass.h create mode 100644 include/sm.h (limited to 'include') diff --git a/drivers/Kconfig b/drivers/Kconfig index a25f6ae02fd..a073230c26d 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -118,6 +118,8 @@ source "drivers/scsi/Kconfig" source "drivers/serial/Kconfig" +source "drivers/sm/Kconfig" + source "drivers/smem/Kconfig" source "drivers/sound/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index efc2a4afb24..74f940a57d3 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_$(SPL_TPL_)VIRTIO) += virtio/ obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/ obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/ obj-$(CONFIG_$(SPL_)SYSINFO) += sysinfo/ +obj-$(CONFIG_$(SPL_TPL_)SM) += sm/ obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/ obj-$(CONFIG_$(SPL_)NVME) += nvme/ obj-$(CONFIG_XEN) += xen/ diff --git a/drivers/sm/Kconfig b/drivers/sm/Kconfig new file mode 100644 index 00000000000..6cc6d55578e --- /dev/null +++ b/drivers/sm/Kconfig @@ -0,0 +1,2 @@ +config SM + bool "Enable Secure Monitor driver support" diff --git a/drivers/sm/Makefile b/drivers/sm/Makefile new file mode 100644 index 00000000000..9f4683ba064 --- /dev/null +++ b/drivers/sm/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-y += sm-uclass.o diff --git a/drivers/sm/sm-uclass.c b/drivers/sm/sm-uclass.c new file mode 100644 index 00000000000..6a8b7026293 --- /dev/null +++ b/drivers/sm/sm-uclass.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 SberDevices, Inc. + * + * Author: Alexey Romanov + */ + +#include +#include +#include +#include + +static const struct sm_ops *get_sm_ops(struct udevice *dev) +{ + return (const struct sm_ops *)dev->driver->ops; +} + +int sm_call(struct udevice *dev, u32 cmd, s32 *ret, struct pt_regs *args) +{ + const struct sm_ops *ops = get_sm_ops(dev); + + if (ops->sm_call) + return ops->sm_call(dev, cmd, ret, args); + + return -ENOSYS; +} + +int sm_call_read(struct udevice *dev, void *buffer, size_t size, + u32 cmd, struct pt_regs *args) +{ + const struct sm_ops *ops = get_sm_ops(dev); + + if (ops->sm_call_read) + return ops->sm_call_read(dev, buffer, size, cmd, + args); + + return -ENOSYS; +} + +int sm_call_write(struct udevice *dev, void *buffer, size_t size, + u32 cmd, struct pt_regs *args) +{ + const struct sm_ops *ops = get_sm_ops(dev); + + if (ops->sm_call_write) + return ops->sm_call_write(dev, buffer, size, cmd, + args); + + return -ENOSYS; +} + +UCLASS_DRIVER(sm) = { + .name = "sm", + .id = UCLASS_SM, +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 0432c95c9ed..d2c5288c8bb 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -89,6 +89,7 @@ enum uclass_id { UCLASS_MDIO, /* MDIO bus */ UCLASS_MDIO_MUX, /* MDIO MUX/switch */ UCLASS_MEMORY, /* Memory Controller device */ + UCLASS_SM, /* Secure Monitor driver */ UCLASS_MISC, /* Miscellaneous device */ UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ diff --git a/include/sm-uclass.h b/include/sm-uclass.h new file mode 100644 index 00000000000..c1144840440 --- /dev/null +++ b/include/sm-uclass.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 SberDevices, Inc. + * + * Author: Alexey Romanov + */ + +#ifndef __SM_UCLASS_H__ +#define __SM_UCLASS_H__ + +#include +#include + +struct udevice; + +/** + * struct sm_ops - The functions that a SM driver must implement. + * + * @sm_call: Request a secure monitor call with specified command. + * + * @sm_call_read: Request a secure monitor call and retrieve data + * from secure-monitor (depends on specified command). + * + * @sm_call_write: Request a secure monitor call and send data + * to secure-monitor (depends on specified command). + * + * The individual methods are described more fully below. + */ +struct sm_ops { + /** + * sm_call - generic SMC call to the secure-monitor + * + * @dev: Pointer to UCLASS_SM device + * @cmd_index: Index of the SMC function ID + * @smc_ret: Returned value from secure world + * @args: SMC arguments + * + * @return: 0 on success, a negative value on error + */ + int (*sm_call)(struct udevice *dev, u32 cmd, s32 *smc_ret, + struct pt_regs *args); + + /** + * sm_call_write - send data to secure-monitor + * + * @dev: Pointer to UCLASS_SM device + * @buffer: Buffer containing data to send + * @size: Size of the buffer + * @cmd: Index of the SMC function ID + * @args: SMC arguments + * + * @return: size of sent data on success, a negative value on error + */ + int (*sm_call_write)(struct udevice *dev, void *buffer, + size_t size, u32 cmd, struct pt_regs *args); + + /** + * sm_call_read - retrieve data from secure-monitor + * + * @dev: Pointer to UCLASS_SM device + * @buffer: Buffer to store the retrieved data + * @size: Size of the buffer + * @cmd: Index of the SMC function ID + * @args: SMC arguments + * + * @return: size of read data on success, a negative value on error + */ + int (*sm_call_read)(struct udevice *dev, void *buffer, + size_t size, u32 cmd, struct pt_regs *args); +}; + +#endif /* __SM_UCLASS_H__ */ diff --git a/include/sm.h b/include/sm.h new file mode 100644 index 00000000000..afa9c89055e --- /dev/null +++ b/include/sm.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 SberDevices, Inc. + * + * Author: Alexey Romanov + */ + +#ifndef __SM_H__ +#define __SM_H__ + +/* + * NOTE: UCLASS_SM is designed with the idea that + * each driver should convert @cmd to some raw + * value, which is known only for driver, and set this + * value to the first element of the @args->regs array. + * Therefore, it is necessary to pass the remaining + * arguments starting at index = 1. Anyway, driver + * implementation may vary, so, please, check the specific + * implementation of the driver you are using. + */ + +#include +#include + +struct udevice; + +/** + * sm_call - generic SMC call to the secure-monitor + * + * @dev: Pointer to UCLASS_SM device + * @cmd_index: Index of the SMC function ID + * @smc_ret: Returned value from secure world + * @args: SMC arguments + * + * @return: 0 on success, a negative value on error + */ +int sm_call(struct udevice *dev, u32 cmd, s32 *ret, struct pt_regs *args); + +/** + * sm_call_read - retrieve data from secure-monitor + * + * @dev: Pointer to UCLASS_MESON_SM device + * @buffer: Buffer to store the retrieved data + * @size: Size of the buffer + * @cmd: Index of the SMC function ID + * @args: SMC arguments + * + * @return: size of read data on success, a negative value on error + */ +int sm_call_read(struct udevice *dev, void *buffer, size_t size, + u32 cmd, struct pt_regs *args); + +/** + * sm_call_write - send data to secure-monitor + * + * @dev: Pointer to UCLASS_SM device + * @buffer: Buffer containing data to send + * @size: Size of the buffer + * @cmd: Index of the SMC function ID + * @args: SMC arguments + * + * @return: size of sent data on success, a negative value on error + */ +int sm_call_write(struct udevice *dev, void *buffer, size_t size, + u32 cmd, struct pt_regs *args); + +#endif /* __SM_H__ */ -- cgit v1.3.1 From 9ec6db32ca04b41330225d96f44eb6a4d8e97e7e Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 21 Sep 2023 11:13:35 +0300 Subject: sandbox: add sandbox sm uclass driver This patch adds sandbox secure monitor driver. Signed-off-by: Alexey Romanov Reviewed-by: Simon Glass Link: https://lore.kernel.org/r/20230921081346.22157-3-avromanov@salutedevices.com Signed-off-by: Neil Armstrong --- drivers/sm/Makefile | 1 + drivers/sm/sandbox-sm.c | 76 +++++++++++++++++++++++++++++++++++++++++++++++++ include/sandbox-sm.h | 18 ++++++++++++ 3 files changed, 95 insertions(+) create mode 100644 drivers/sm/sandbox-sm.c create mode 100644 include/sandbox-sm.h (limited to 'include') diff --git a/drivers/sm/Makefile b/drivers/sm/Makefile index 9f4683ba064..af5f475c2b2 100644 --- a/drivers/sm/Makefile +++ b/drivers/sm/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += sm-uclass.o +obj-$(CONFIG_SANDBOX) += sandbox-sm.o diff --git a/drivers/sm/sandbox-sm.c b/drivers/sm/sandbox-sm.c new file mode 100644 index 00000000000..109ddb2af55 --- /dev/null +++ b/drivers/sm/sandbox-sm.c @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 SberDevices, Inc. + * + * Author: Alexey Romanov + */ + +#include +#include +#include +#include +#include +#include +#include + +static u8 test_buffer[SZ_4K]; + +static int sandbox_sm_call(struct udevice *dev, u32 cmd_index, s32 *smc_ret, + struct pt_regs *args) +{ + if (cmd_index >= SANDBOX_SMC_CMD_COUNT) + return -EINVAL; + + if (smc_ret) + *smc_ret = 0; + + return 0; +} + +static int sandbox_sm_call_read(struct udevice *dev, void *buffer, size_t size, + u32 cmd_index, struct pt_regs *args) +{ + if (cmd_index >= SANDBOX_SMC_CMD_COUNT || !buffer) + return -EINVAL; + + if (size > sizeof(test_buffer)) + return -EINVAL; + + memcpy(buffer, test_buffer, size); + + return size; +} + +static int sandbox_sm_call_write(struct udevice *dev, void *buffer, size_t size, + u32 cmd_index, struct pt_regs *args) +{ + if (cmd_index >= SANDBOX_SMC_CMD_COUNT || !buffer) + return -EINVAL; + + if (size > sizeof(test_buffer)) + return -EINVAL; + + memcpy(test_buffer, buffer, size); + + return size; +} + +static const struct udevice_id sandbox_sm_ids[] = { + { + .compatible = "sandbox,sm", + }, + {}, +}; + +static const struct sm_ops sandbox_sm_ops = { + .sm_call = sandbox_sm_call, + .sm_call_read = sandbox_sm_call_read, + .sm_call_write = sandbox_sm_call_write, +}; + +U_BOOT_DRIVER(sm) = { + .name = "sm", + .id = UCLASS_SM, + .of_match = sandbox_sm_ids, + .ops = &sandbox_sm_ops, +}; diff --git a/include/sandbox-sm.h b/include/sandbox-sm.h new file mode 100644 index 00000000000..91c30d501d4 --- /dev/null +++ b/include/sandbox-sm.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 SberDevices, Inc. + * + * Author: Alexey Romanov + */ + +#ifndef __SANDBOX_SM_H__ +#define __SANDBOX_SM_H__ + +enum sandbox_smc_cmd { + SANDBOX_SMC_CMD_READ_MEM, + SANDBOX_SMC_CMD_WRITE_MEM, + SANDBOX_SMC_CMD_COMMON, + SANDBOX_SMC_CMD_COUNT, +}; + +#endif -- cgit v1.3.1 From ef2eb106eebfc792f6d09d11dfed5c23c3991691 Mon Sep 17 00:00:00 2001 From: Alexey Romanov Date: Thu, 21 Sep 2023 11:13:39 +0300 Subject: drivers: introduce Meson Secure Monitor driver This patch adds an implementation of the Meson Secure Monitor driver based on UCLASS_SM. Signed-off-by: Alexey Romanov Reviewed-by: Simon Glass Link: https://lore.kernel.org/r/20230921081346.22157-7-avromanov@salutedevices.com Signed-off-by: Neil Armstrong --- MAINTAINERS | 1 + drivers/sm/Kconfig | 7 ++ drivers/sm/Makefile | 1 + drivers/sm/meson-sm.c | 198 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/meson/sm.h | 19 +++++ 5 files changed, 226 insertions(+) create mode 100644 drivers/sm/meson-sm.c create mode 100644 include/meson/sm.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index 7d5d05320c0..16b17fdd96d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -161,6 +161,7 @@ F: drivers/net/phy/meson-gxl.c F: drivers/adc/meson-saradc.c F: drivers/phy/meson* F: drivers/mmc/meson_gx_mmc.c +F: drivers/sm/meson-sm.c F: drivers/spi/meson_spifc.c F: drivers/pinctrl/meson/ F: drivers/power/domain/meson-gx-pwrc-vpu.c diff --git a/drivers/sm/Kconfig b/drivers/sm/Kconfig index 6cc6d55578e..f0987275d26 100644 --- a/drivers/sm/Kconfig +++ b/drivers/sm/Kconfig @@ -1,2 +1,9 @@ config SM bool "Enable Secure Monitor driver support" + +config MESON_SM + bool "Amlogic Secure Monitor driver" + select SM + default n + help + Say y here to enable the Amlogic secure monitor driver. diff --git a/drivers/sm/Makefile b/drivers/sm/Makefile index af5f475c2b2..da81ee898ab 100644 --- a/drivers/sm/Makefile +++ b/drivers/sm/Makefile @@ -2,3 +2,4 @@ obj-y += sm-uclass.o obj-$(CONFIG_SANDBOX) += sandbox-sm.o +obj-$(CONFIG_MESON_SM) += meson-sm.o diff --git a/drivers/sm/meson-sm.c b/drivers/sm/meson-sm.c new file mode 100644 index 00000000000..25adaf45607 --- /dev/null +++ b/drivers/sm/meson-sm.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 SberDevices, Inc. + * + * Author: Alexey Romanov + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct meson_sm_cmd { + u32 smc_id; +}; + +#define SET_CMD(index, id) \ + [index] = { \ + .smc_id = (id), \ + } + +struct meson_sm_data { + u32 cmd_get_shmem_in; + u32 cmd_get_shmem_out; + unsigned int shmem_size; + struct meson_sm_cmd cmd[]; +}; + +struct meson_sm_priv { + void *sm_shmem_in; + void *sm_shmem_out; + const struct meson_sm_data *data; +}; + +static unsigned long __meson_sm_call(u32 cmd, const struct pt_regs *args) +{ + struct pt_regs r = *args; + + r.regs[0] = cmd; + smc_call(&r); + + return r.regs[0]; +}; + +static u32 meson_sm_get_cmd(const struct meson_sm_data *data, + u32 cmd_index) +{ + struct meson_sm_cmd cmd; + + if (cmd_index >= MESON_SMC_CMD_COUNT) + return 0; + + cmd = data->cmd[cmd_index]; + return cmd.smc_id; +} + +static int meson_sm_call(struct udevice *dev, u32 cmd_index, s32 *retval, + struct pt_regs *args) +{ + struct meson_sm_priv *priv = dev_get_priv(dev); + u32 cmd, ret; + + cmd = meson_sm_get_cmd(priv->data, cmd_index); + if (!cmd) + return -ENOENT; + + ret = __meson_sm_call(cmd, args); + if (retval) + *retval = ret; + + return 0; +} + +static int meson_sm_call_read(struct udevice *dev, void *buffer, size_t size, + u32 cmd_index, struct pt_regs *args) +{ + struct meson_sm_priv *priv = dev_get_priv(dev); + s32 nbytes; + int ret; + + if (!buffer || size > priv->data->shmem_size) + return -EINVAL; + + ret = meson_sm_call(dev, cmd_index, &nbytes, args); + if (ret) + return ret; + + if (nbytes < 0 || nbytes > size) + return -ENOBUFS; + + /* In some cases (for example GET_CHIP_ID command), + * SMC doesn't return the number of bytes read, even + * though the bytes were actually read into sm_shmem_out. + * So this check is needed. + */ + ret = nbytes; + if (!nbytes) + nbytes = size; + + memcpy(buffer, priv->sm_shmem_out, nbytes); + + return ret; +} + +static int meson_sm_call_write(struct udevice *dev, void *buffer, size_t size, + u32 cmd_index, struct pt_regs *args) +{ + struct meson_sm_priv *priv = dev_get_priv(dev); + s32 nbytes; + int ret; + + if (!buffer || size > priv->data->shmem_size) + return -EINVAL; + + memcpy(priv->sm_shmem_in, buffer, size); + + ret = meson_sm_call(dev, cmd_index, &nbytes, args); + if (ret) + return ret; + + if (nbytes <= 0 || nbytes > size) + return -EIO; + + return nbytes; +} + +static int meson_sm_probe(struct udevice *dev) +{ + struct meson_sm_priv *priv = dev_get_priv(dev); + struct pt_regs regs = { 0 }; + + priv->data = (struct meson_sm_data *)dev_get_driver_data(dev); + if (!priv->data) + return -EINVAL; + + priv->sm_shmem_in = + (void *)__meson_sm_call(priv->data->cmd_get_shmem_in, ®s); + + if (!priv->sm_shmem_in) + return -ENOMEM; + + priv->sm_shmem_out = + (void *)__meson_sm_call(priv->data->cmd_get_shmem_out, ®s); + + if (!priv->sm_shmem_out) + return -ENOMEM; + + pr_debug("meson sm driver probed\n" + "shmem_in addr: 0x%p, shmem_out addr: 0x%p\n", + priv->sm_shmem_in, + priv->sm_shmem_out); + + return 0; +} + +static const struct meson_sm_data meson_sm_gxbb_data = { + .cmd_get_shmem_in = 0x82000020, + .cmd_get_shmem_out = 0x82000021, + .shmem_size = SZ_4K, + .cmd = { + SET_CMD(MESON_SMC_CMD_EFUSE_READ, 0x82000030), + SET_CMD(MESON_SMC_CMD_EFUSE_WRITE, 0x82000031), + SET_CMD(MESON_SMC_CMD_CHIP_ID_GET, 0x82000044), + SET_CMD(MESON_SMC_CMD_PWRDM_SET, 0x82000093), + }, +}; + +static const struct udevice_id meson_sm_ids[] = { + { + .compatible = "amlogic,meson-gxbb-sm", + .data = (ulong)&meson_sm_gxbb_data, + }, + { } +}; + +static const struct sm_ops sm_ops = { + .sm_call = meson_sm_call, + .sm_call_read = meson_sm_call_read, + .sm_call_write = meson_sm_call_write, +}; + +U_BOOT_DRIVER(meson_sm) = { + .name = "meson_sm", + .id = UCLASS_SM, + .of_match = meson_sm_ids, + .probe = meson_sm_probe, + .priv_auto = sizeof(struct meson_sm_priv), + .ops = &sm_ops, +}; diff --git a/include/meson/sm.h b/include/meson/sm.h new file mode 100644 index 00000000000..fbaab1f1ee0 --- /dev/null +++ b/include/meson/sm.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 SberDevices, Inc. + * + * Author: Alexey Romanov + */ + +#ifndef __MESON_SM_CMD_H__ +#define __MESON_SM_CMD_H__ + +enum meson_smc_cmd { + MESON_SMC_CMD_EFUSE_READ, /* read efuse memory */ + MESON_SMC_CMD_EFUSE_WRITE, /* write efuse memory */ + MESON_SMC_CMD_CHIP_ID_GET, /* readh chip unique id */ + MESON_SMC_CMD_PWRDM_SET, /* do command at specified power domain */ + MESON_SMC_CMD_COUNT, +}; + +#endif -- cgit v1.3.1