From 3098e539d6a67df9f2a3c402d62147fa10422150 Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Fri, 14 Apr 2017 16:49:01 +0800 Subject: armv8: ls1046a: enable PCI command tool Signed-off-by: Hou Zhiqiang Reviewed-by: York Sun --- include/configs/ls1046a_common.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 957ffd36347..80f8dc2cbbc 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -138,6 +138,16 @@ #define CONFIG_SYS_I2C_MXC_I2C3 #define CONFIG_SYS_I2C_MXC_I2C4 +/* PCIe */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ + +#ifdef CONFIG_PCI +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_CMD_PCI +#endif + /* Command line configuration */ #ifndef SPL_NO_ENV #define CONFIG_CMD_ENV -- cgit v1.3.1 From e9420444f64a0ec3b444204ada20c10a50f93800 Mon Sep 17 00:00:00 2001 From: Suresh Gupta Date: Tue, 25 Apr 2017 14:51:37 +0530 Subject: armv8: layperscape: remove CONFIG_SPI_FLASH_BAR from some platforms ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does not support Bank Address Register commands. Signed-off-by: Suresh Gupta Reviewed-by: York Sun --- include/configs/ls1012a_common.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls2080ardb.h | 1 - 3 files changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 09f890d55c3..0db926fc4a1 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -55,7 +55,6 @@ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION -#define CONFIG_SPI_FLASH_BAR #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 67ee62608cd..66af0397896 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -208,7 +208,6 @@ #define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SPI_FLASH_BAR #endif #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index d0bf5520b70..ec83eb5fd5d 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -265,7 +265,6 @@ unsigned long get_board_sys_clk(void); /* SPI */ #ifdef CONFIG_FSL_DSPI #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_STMICRO #endif -- cgit v1.3.1 From 5e3f763a4b00b6ca99e3e7e30544c78a8cb05f20 Mon Sep 17 00:00:00 2001 From: Suresh Gupta Date: Tue, 25 Apr 2017 14:51:38 +0530 Subject: armv8: ls1012a: fix the size of flash for multiple boards LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size. Signed-off-by: Suresh Gupta --- include/configs/ls1012a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0db926fc4a1..861cbc3299a 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -56,7 +56,7 @@ #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION -#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_SIZE SZ_64M #define FSL_QSPI_FLASH_NUM 2 /* -- cgit v1.3.1 From 99b47c25d0e2bdc9ebbd685a87456e175581c695 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 25 Apr 2017 08:39:51 -0700 Subject: armv8: ls1046ardb: Make NET independent of FMan This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun CC: Mingkai Hu Acked-by: Mingkai Hu --- board/freescale/ls1046ardb/Makefile | 2 +- include/configs/ls1046ardb.h | 15 +++++++++------ 2 files changed, 10 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/board/freescale/ls1046ardb/Makefile b/board/freescale/ls1046ardb/Makefile index b92ed0b3ec4..40765580899 100644 --- a/board/freescale/ls1046ardb/Makefile +++ b/board/freescale/ls1046ardb/Makefile @@ -7,6 +7,6 @@ obj-y += ddr.o obj-y += ls1046ardb.o ifndef CONFIG_SPL_BUILD -obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o +obj-$(CONFIG_NET) += eth.o obj-y += cpld.o endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 66af0397896..7161ee8dd48 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -178,18 +178,20 @@ #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ #endif +#define AQR105_IRQ_MASK 0x80000000 /* FMan */ #ifndef SPL_NO_FMAN -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_FMAN_ENET + +#ifdef CONFIG_NET #define CONFIG_PHYLIB -#define CONFIG_PHYLIB_10G #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - #define CONFIG_PHY_REALTEK -#define CONFIG_PHY_AQUANTIA -#define AQR105_IRQ_MASK 0x80000000 +#endif +#ifdef CONFIG_SYS_DPAA_FMAN +#define CONFIG_FMAN_ENET +#define CONFIG_PHY_AQUANTIA +#define CONFIG_PHYLIB_10G #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 @@ -200,6 +202,7 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif + #endif /* QSPI device */ -- cgit v1.3.1 From c40e6f916982bfaa38aef642461cbcb5917f2744 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 25 Apr 2017 08:39:52 -0700 Subject: armv8: ls1043ardb: Make NET independent of FMan This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun CC: Mingkai Hu Acked-by: Mingkai Hu --- board/freescale/ls1043ardb/Makefile | 2 +- include/configs/ls1043ardb.h | 13 ++++++++----- 2 files changed, 9 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/board/freescale/ls1043ardb/Makefile b/board/freescale/ls1043ardb/Makefile index 2a4452e5ec1..930c69032e0 100644 --- a/board/freescale/ls1043ardb/Makefile +++ b/board/freescale/ls1043ardb/Makefile @@ -7,6 +7,6 @@ obj-y += ddr.o obj-y += ls1043ardb.o ifndef CONFIG_SPL_BUILD -obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o +obj-$(CONFIG_NET) += eth.o obj-y += cpld.o endif diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 5e570cd5e8d..5e5d1f647cc 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -250,16 +250,19 @@ /* FMan */ #ifndef SPL_NO_FMAN -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_FMAN_ENET +#define AQR105_IRQ_MASK 0x40000000 + +#ifdef CONFIG_NET #define CONFIG_PHYLIB -#define CONFIG_PHYLIB_10G #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - #define CONFIG_PHY_VITESSE #define CONFIG_PHY_REALTEK +#endif + +#ifdef CONFIG_SYS_DPAA_FMAN +#define CONFIG_FMAN_ENET +#define CONFIG_PHYLIB_10G #define CONFIG_PHY_AQUANTIA -#define AQR105_IRQ_MASK 0x40000000 #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 -- cgit v1.3.1 From 89a168f776cbc15a2ff1f25a0f4e54f9bbaffdec Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Fri, 28 Apr 2017 10:41:35 +0530 Subject: armv8: ls2080ardb: Add QSPI-boot support QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: Priyanka Jain Signed-off-by: Suresh Gupta Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/dts/Makefile | 3 +- arch/arm/dts/fsl-ls2088a-rdb-qspi.dts | 59 +++++++++++++++++++++++++++++++ board/freescale/ls2080ardb/MAINTAINERS | 5 +++ board/freescale/ls2080ardb/README | 26 ++++++++++++++ configs/ls2088ardb_qspi_defconfig | 46 ++++++++++++++++++++++++ include/configs/ls2080a_common.h | 7 ++++ include/configs/ls2080aqds.h | 9 ++--- include/configs/ls2080ardb.h | 50 ++++++++++++++++++++++++-- 9 files changed, 195 insertions(+), 11 deletions(-) create mode 100644 arch/arm/dts/fsl-ls2088a-rdb-qspi.dts create mode 100644 configs/ls2088ardb_qspi_defconfig (limited to 'include') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 4c16c4cd0c6..998944a31b2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -163,6 +163,7 @@ endchoice config SYS_LS_PPA_FW_ADDR hex "Address of PPA firmware loading from" depends on FSL_LS_PPA + default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A default 0x40500000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT default 0x580a00000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A default 0x60500000 if SYS_LS_PPA_FW_IN_XIP diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a985c5d216d..a44f158bf4e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -174,7 +174,8 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \ ls1021a-iot-duart.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ - fsl-ls2080a-rdb.dtb + fsl-ls2080a-rdb.dtb \ + fsl-ls2088a-rdb-qspi.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1043a-qds-lpuart.dtb \ fsl-ls1043a-rdb.dtb \ diff --git a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts new file mode 100644 index 00000000000..3230e7ed7df --- /dev/null +++ b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts @@ -0,0 +1,59 @@ +/* + * NXP ls2080a RDB board device tree source for QSPI-boot + * + * Author: Priyanka Jain + * + * Copyright 2017 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "fsl-ls2080a.dtsi" + +/ { + model = "Freescale Layerscape 2080a RDB Board"; + compatible = "fsl,ls2080a-rdb", "fsl,ls2080a"; + + aliases { + spi0 = &qspi; + spi1 = &dspi; + }; +}; + +&dspi { + bus-num = <0>; + status = "okay"; + + dflash0: n25q512a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: s25fs512s@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + + qflash1: s25fs512s@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <1>; + }; +}; diff --git a/board/freescale/ls2080ardb/MAINTAINERS b/board/freescale/ls2080ardb/MAINTAINERS index 759a14605c6..3175ba38364 100644 --- a/board/freescale/ls2080ardb/MAINTAINERS +++ b/board/freescale/ls2080ardb/MAINTAINERS @@ -7,6 +7,11 @@ F: include/configs/ls2080ardb.h F: configs/ls2080ardb_defconfig F: configs/ls2080ardb_nand_defconfig +LS2088A_QSPI-boot BOARD +M: Priyanka Jain +S: Maintained +F: configs/ls2088ardb_qspi_defconfig + LS2080A_SECURE_BOOT BOARD M: Saksham Jain S: Maintained diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index 0c9c574f338..873aadfab1a 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -43,6 +43,7 @@ Memory map from core's view 0x00_0000_0000 .. 0x00_000F_FFFF Boot Rom 0x00_0100_0000 .. 0x00_0FFF_FFFF CCSR 0x00_1800_0000 .. 0x00_181F_FFFF OCRAM +0x00_2000_0000 .. 0x00_2FFF_FFFF QSPI region #1 0x00_3000_0000 .. 0x00_3FFF_FFFF IFC region #1 0x00_8000_0000 .. 0x00_FFFF_FFFF DDR region #1 0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2 @@ -68,6 +69,31 @@ Booting Options --------------- a) NOR boot b) NAND boot +c) QSPI boot + +cfg_rcw_src switches needs to be changed for booting from different option. +Refer to board documentation for correct switch setting. + +QSPI boot details +=================== +Supported only for + LS2088ARDB RevF board with LS2088A SoC. + +Images needs to be copied to QSPI flash +as per memory map given below. + +Memory map for QSPI flash +------------------------- +Image Flash Offset +RCW+PBI 0x00000000 +Boot firmware (U-Boot) 0x00100000 +Boot firmware Environment 0x00300000 +PPA firmware 0x00400000 +Cortina PHY firmware 0x00980000 +DPAA2 MC 0x00A00000 +DPAA2 DPL 0x00D00000 +DPAA2 DPC 0x00E00000 +Kernel.itb 0x01000000 Booting Linux flavors which do not support 48-bit VA (< Linux 3.18) ------------------------------------------------------------------- diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig new file mode 100644 index 00000000000..139ff089906 --- /dev/null +++ b/configs/ls2088ardb_qspi_defconfig @@ -0,0 +1,46 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2080ARDB=y +CONFIG_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" +# CONFIG_SYS_MALLOC_F is not set +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_CMD_GREPENV=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_FSL_DSPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 427f623e8c5..363bfd4e95e 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -1,4 +1,5 @@ /* + * Copyright 2017 NXP * Copyright (C) 2014 Freescale Semiconductor * * SPDX-License-Identifier: GPL-2.0+ @@ -28,6 +29,12 @@ #else #define CONFIG_SYS_TEXT_BASE 0x30100000 #endif +#else +#define CONFIG_SYS_TEXT_BASE 0x20100000 +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 #endif #define CONFIG_SUPPORT_RAW_INITRD diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index f50ad429172..469ef9e0a44 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -1,4 +1,5 @@ /* + * Copyright 2017 NXP * Copyright 2015 Freescale Semiconductor * * SPDX-License-Identifier: GPL-2.0+ @@ -262,13 +263,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 -#if defined(CONFIG_QSPI_BOOT) -#define CONFIG_SYS_TEXT_BASE 0x20010000 -#define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ -#define CONFIG_ENV_SECT_SIZE 0x10000 -#else +#ifndef CONFIG_QSPI_BOOT #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) #define CONFIG_ENV_SECT_SIZE 0x20000 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ec83eb5fd5d..ef95358ebf2 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -1,4 +1,5 @@ /* + * Copyright 2017 NXP * Copyright 2015 Freescale Semiconductor * * SPDX-License-Identifier: GPL-2.0+ @@ -12,6 +13,11 @@ #undef CONFIG_CONS_INDEX #define CONFIG_CONS_INDEX 2 +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SYS_I2C_EARLY_INIT +#define CONFIG_DISPLAY_BOARDINFO_LATE +#endif + #define I2C_MUX_CH_VOL_MONITOR 0xa #define I2C_VOL_MONITOR_ADDR 0x38 #define CONFIG_VOL_MONITOR_IR36021_READ @@ -69,6 +75,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#ifndef CONFIG_FSL_QSPI /* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) @@ -157,7 +164,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) - #define CONFIG_FSL_QIXIS /* use common QIXIS code */ #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f @@ -250,7 +256,7 @@ unsigned long get_board_sys_clk(void); /* Debug Server firmware */ #define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR #define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580D00000ULL - +#endif #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 /* @@ -263,10 +269,17 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* SPI */ -#ifdef CONFIG_FSL_DSPI +#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI) #define CONFIG_SPI_FLASH +#ifdef CONFIG_FSL_QSPI #define CONFIG_SPI_FLASH_STMICRO #endif +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SPI_FLASH_SPANSION +#define FSL_QSPI_FLASH_SIZE SZ_64M /* 64MB */ +#define FSL_QSPI_FLASH_NUM 2 +#endif +#endif /* * RTC configuration @@ -345,6 +358,25 @@ unsigned long get_board_sys_clk(void); " 0x580800000 \0" \ BOOTENV #else +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "scriptaddr=0x80800000\0" \ + "kernel_addr_r=0x81000000\0" \ + "pxefile_addr_r=0x81000000\0" \ + "fdt_addr_r=0x88000000\0" \ + "ramdisk_addr_r=0x89000000\0" \ + "loadaddr=0x80100000\0" \ + "kernel_addr=0x100000\0" \ + "ramdisk_size=0x2000000\0" \ + "fdt_high=0xa0000000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_start=0x21000000\0" \ + "mcmemsize=0x40000000\0" \ + "mcinitcmd=fsl_mc start mc 0x20a00000" \ + " 0x20e00000 \0" \ + BOOTENV +#else #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "scriptaddr=0x80800000\0" \ @@ -367,6 +399,7 @@ unsigned long get_board_sys_clk(void); " 0x580800000 \0" \ BOOTENV #endif +#endif #undef CONFIG_BOOTARGS @@ -376,11 +409,18 @@ unsigned long get_board_sys_clk(void); " hugepagesz=2m hugepages=256" #undef CONFIG_BOOTCOMMAND +#ifdef CONFIG_QSPI_BOOT +/* Try to boot an on-QSPI kernel first, then do normal distro boot */ +#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x20d00000" \ + " && bootm $kernel_start" \ + " || run distro_bootcmd" +#else /* Try to boot an on-NOR kernel first, then do normal distro boot */ #define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580700000" \ " && cp.b $kernel_start $kernel_load $kernel_size" \ " && bootm $kernel_load" \ " || run distro_bootcmd" +#endif /* MAC/PHY configuration */ #ifdef CONFIG_FSL_MC_ENET @@ -389,7 +429,11 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PHY_CORTINA #define CONFIG_PHYLIB #define CONFIG_SYS_CORTINA_FW_IN_NOR +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_CORTINA_FW_ADDR 0x20980000 +#else #define CONFIG_CORTINA_FW_ADDR 0x581000000 +#endif #define CONFIG_CORTINA_FW_LENGTH 0x40000 #define CORTINA_PHY_ADDR1 0x10 -- cgit v1.3.1 From 3049a583f343a71ead9d7cb33f0ab6cecfbbaa12 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Thu, 27 Apr 2017 15:08:07 +0530 Subject: armv8: ls2080ardb: Add LS2081ARDB board support LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain Signed-off-by: Santan Kumar Reviewed-by: York Sun --- arch/arm/Kconfig | 14 ++++++++ arch/arm/cpu/armv8/Kconfig | 1 + arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls2081a-rdb.dts | 59 +++++++++++++++++++++++++++++++++ board/freescale/ls2080ardb/Kconfig | 18 ++++++++++ board/freescale/ls2080ardb/MAINTAINERS | 5 +++ board/freescale/ls2080ardb/README | 20 +++++++++-- board/freescale/ls2080ardb/ls2080ardb.c | 52 +++++++++++++++++++++++++++++ configs/ls2081ardb_defconfig | 46 +++++++++++++++++++++++++ drivers/usb/host/xhci-fsl.c | 3 +- include/configs/ls2080ardb.h | 31 +++++++++++++++++ 11 files changed, 246 insertions(+), 4 deletions(-) create mode 100644 arch/arm/dts/fsl-ls2081a-rdb.dts create mode 100644 configs/ls2081ardb_defconfig (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b2d6e80716d..2db7e3cb3b0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -781,6 +781,20 @@ config TARGET_LS2080ARDB development platform that supports the QorIQ LS2080A Layerscape Architecture processor. +config TARGET_LS2081ARDB + bool "Support ls2081ardb" + select ARCH_LS2080A + select ARM64 + select ARMV8_MULTIENTRY + select BOARD_LATE_INIT + select SUPPORT_SPL + select ARCH_MISC_INIT + help + Support for Freescale LS2081ARDB platform. + The LS2081A Reference design board (RDB) is a high-performance + development platform that supports the QorIQ LS2081A/LS2041A + Layerscape Architecture processor. + config TARGET_HIKEY bool "Support HiKey 96boards Consumer Edition Platform" select ARM64 diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 0188b95e99f..d5b692eb290 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -91,6 +91,7 @@ config PSCI_RESET !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ + !TARGET_LS2081ARDB && \ !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && !TARGET_S32V234EVB help Most armv8 systems have PSCI support enabled in EL3, either through diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a44f158bf4e..55f4ae9c6d9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -175,6 +175,7 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \ ls1021a-iot-duart.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb \ + fsl-ls2081a-rdb.dtb \ fsl-ls2088a-rdb-qspi.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1043a-qds-lpuart.dtb \ diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-rdb.dts new file mode 100644 index 00000000000..6489362fc0c --- /dev/null +++ b/arch/arm/dts/fsl-ls2081a-rdb.dts @@ -0,0 +1,59 @@ +/* + * NXP LS2081A RDB board device tree source for QSPI-boot + * + * Author: Priyanka Jain + * + * Copyright 2017 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "fsl-ls2080a.dtsi" + +/ { + model = "Freescale Layerscape 2081a RDB Board"; + compatible = "fsl,ls2081a-rdb", "fsl,ls2080a"; + + aliases { + spi0 = &qspi; + spi1 = &dspi; + }; +}; + +&dspi { + bus-num = <0>; + status = "okay"; + + dflash0: n25q512a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: n25q512a@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + + qflash1: n25q512a@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <1>; + }; +}; diff --git a/board/freescale/ls2080ardb/Kconfig b/board/freescale/ls2080ardb/Kconfig index 2f0465fbba2..8f64642593d 100644 --- a/board/freescale/ls2080ardb/Kconfig +++ b/board/freescale/ls2080ardb/Kconfig @@ -16,3 +16,21 @@ config SYS_CONFIG_NAME source "board/freescale/common/Kconfig" endif + +if TARGET_LS2081ARDB + +config SYS_BOARD + default "ls2080ardb" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "fsl-layerscape" + +config SYS_CONFIG_NAME + default "ls2080ardb" + +source "board/freescale/common/Kconfig" + +endif diff --git a/board/freescale/ls2080ardb/MAINTAINERS b/board/freescale/ls2080ardb/MAINTAINERS index 3175ba38364..91f13ea7176 100644 --- a/board/freescale/ls2080ardb/MAINTAINERS +++ b/board/freescale/ls2080ardb/MAINTAINERS @@ -12,6 +12,11 @@ M: Priyanka Jain S: Maintained F: configs/ls2088ardb_qspi_defconfig +LS2081ARDB BOARD +M: Priyanka Jain +S: Maintained +F: configs/ls2081ardb_defconfig + LS2080A_SECURE_BOOT BOARD M: Saksham Jain S: Maintained diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index 873aadfab1a..fde143d2f4b 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -4,10 +4,14 @@ The LS2080A Reference Design (RDB) is a high-performance computing, evaluation, and development platform that supports the QorIQ LS2080A, LS2088A Layerscape Architecture processor. -LS2080A, LS2088A SoC Overview --------------------- +The LS2081A Reference Design (RDB) is a high-performance computing, +evaluation, and development platform that supports the QorIQ LS2081A +Layerscape Architecture processor.More details in below sections + +LS2080A, LS2088A, LS2081A SoC Overview +-------------------------------------- Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A, -LS2088A SoC overview. +LS2081A, LS2088A SoC overview. LS2080ARDB board Overview ----------------------- @@ -38,6 +42,16 @@ LS2088A SoC overview. - UART - ARM JTAG support + LS2081ARDB board Overview + ------------------------- + LS2081ARDB board is similar to LS2080ARDB board + with few differences like + - Hosts LS2081A SoC + - Default boot source is QSPI-boot + - Does not have IFC interface + - RTC and QSPI flash devices are different + - Provides QIXIS access via I2C + Memory map from core's view ---------------------------- 0x00_0000_0000 .. 0x00_000F_FFFF Boot Rom diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 10e8ea4e425..df2d7687181 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -68,6 +68,44 @@ int checkboard(void) cpu_name(buf); printf("Board: %s-RDB, ", buf); +#ifdef CONFIG_TARGET_LS2081ARDB +#ifdef CONFIG_FSL_QIXIS + sw = QIXIS_READ(arch); + printf("Board Arch: V%d, ", sw >> 4); + printf("Board version: %c, ", (sw & 0xf) + 'A'); + + sw = QIXIS_READ(brdcfg[0]); + sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT; + switch (sw) { + case 0: + puts("boot from QSPI DEV#0\n"); + puts("QSPI_CSA_1 mapped to QSPI DEV#1\n"); + break; + case 1: + puts("boot from QSPI DEV#1\n"); + puts("QSPI_CSA_1 mapped to QSPI DEV#0\n"); + break; + case 2: + puts("boot from QSPI EMU\n"); + puts("QSPI_CSA_1 mapped to QSPI DEV#0\n"); + break; + case 3: + puts("boot from QSPI EMU\n"); + puts("QSPI_CSA_1 mapped to QSPI DEV#1\n"); + break; + case 4: + puts("boot from QSPI DEV#0\n"); + puts("QSPI_CSA_1 mapped to QSPI EMU\n"); + break; + default: + printf("invalid setting of SW%u\n", sw); + break; + } +#endif + puts("SERDES1 Reference : "); + printf("Clock1 = 100MHz "); + printf("Clock2 = 161.13MHz"); +#else #ifdef CONFIG_FSL_QIXIS sw = QIXIS_READ(arch); printf("Board Arch: V%d, ", sw >> 4); @@ -88,6 +126,7 @@ int checkboard(void) puts("SERDES1 Reference : "); printf("Clock1 = 156.25MHz "); printf("Clock2 = 156.25MHz"); +#endif puts("\nSERDES2 Reference : "); printf("Clock1 = 100MHz "); @@ -209,6 +248,9 @@ int board_init(void) int board_early_init_f(void) { +#ifdef CONFIG_SYS_I2C_EARLY_INIT + i2c_early_init_f(); +#endif fsl_lsch3_early_init_f(); return 0; } @@ -216,6 +258,11 @@ int board_early_init_f(void) int misc_init_r(void) { #ifdef CONFIG_FSL_QIXIS + /* + * LS2081ARDB has smart voltage translator which needs + * to be programmed as below + */ +#ifndef CONFIG_TARGET_LS2081ARDB u8 sw; sw = QIXIS_READ(arch); @@ -225,11 +272,14 @@ int misc_init_r(void) * by setting GPIO4_10 output to zero */ if ((sw & 0xf) == 0x5) { +#endif out_le32(GPIO4_GPDIR_ADDR, (1 << 21 | in_le32(GPIO4_GPDIR_ADDR))); out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) & in_le32(GPIO4_GPDAT_ADDR))); +#ifndef CONFIG_TARGET_LS2081ARDB } +#endif #endif if (hwconfig("sdhc")) @@ -350,6 +400,7 @@ void update_spd_address(unsigned int ctrl_num, unsigned int slot, unsigned int *addr) { +#ifndef CONFIG_TARGET_LS2081ARDB #ifdef CONFIG_FSL_QIXIS u8 sw; @@ -361,4 +412,5 @@ void update_spd_address(unsigned int ctrl_num, *addr = SPD_EEPROM_ADDRESS3; } #endif +#endif } diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig new file mode 100644 index 00000000000..0d1730fc792 --- /dev/null +++ b/configs/ls2081ardb_defconfig @@ -0,0 +1,46 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2081ARDB=y +CONFIG_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" +# CONFIG_SYS_MALLOC_F is not set +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_CMD_GREPENV=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_FSL_DSPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 798c358fd91..3a16624713b 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -40,7 +40,8 @@ __weak int __board_usb_init(int index, enum usb_init_type init) static int erratum_a008751(void) { -#if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB) +#if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB) ||\ + defined(CONFIG_TARGET_LS2080AQDS) u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4); return 0; diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ef95358ebf2..3774b177fcc 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -14,6 +14,9 @@ #define CONFIG_CONS_INDEX 2 #ifdef CONFIG_FSL_QSPI +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_QIXIS_I2C_ACCESS +#endif #define CONFIG_SYS_I2C_EARLY_INIT #define CONFIG_DISPLAY_BOARDINFO_LATE #endif @@ -259,9 +262,28 @@ unsigned long get_board_sys_clk(void); #endif #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_FSL_QIXIS /* use common QIXIS code */ +#define QIXIS_QMAP_MASK 0x07 +#define QIXIS_QMAP_SHIFT 5 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_QSPI 0x00 +#define QIXIS_RCW_SRC_QSPI 0x62 +#define QIXIS_LBMAP_ALTBANK 0x20 +#define QIXIS_RST_CTL_RESET 0x31 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_RST_CTL_RESET_EN 0x30 +#endif + /* * I2C */ +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#endif #define I2C_MUX_PCA_ADDR 0x75 #define I2C_MUX_PCA_ADDR_PRI 0x75 /* Primary Mux*/ @@ -275,7 +297,11 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SPI_FLASH_STMICRO #endif #ifdef CONFIG_FSL_QSPI +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_SPI_FLASH_STMICRO +#else #define CONFIG_SPI_FLASH_SPANSION +#endif #define FSL_QSPI_FLASH_SIZE SZ_64M /* 64MB */ #define FSL_QSPI_FLASH_NUM 2 #endif @@ -285,8 +311,13 @@ unsigned long get_board_sys_clk(void); * RTC configuration */ #define RTC +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_RTC_PCF8563 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 +#else #define CONFIG_RTC_DS3231 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#endif /* EEPROM */ #define CONFIG_ID_EEPROM -- cgit v1.3.1 From 615bfce5640c1b577f14d95d77f1b46dfd2b500e Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Tue, 16 May 2017 10:45:57 +0800 Subject: arm: ls1021a: Adjust memory mapping for Flash/SD card on LS1021AQDS/TWR This patch is to adjust the memory mapping for FLash/SD card on LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial Flash, QE firmware load address and environment address. Signed-off-by: Alison Wang Reviewed-by: York Sun --- include/configs/ls1021aqds.h | 10 +++++----- include/configs/ls1021atwr.h | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 373de40d298..5fcaf857fb4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -69,7 +69,7 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_QSPI_BOOT -#define CONFIG_SYS_TEXT_BASE 0x40010000 +#define CONFIG_SYS_TEXT_BASE 0x40100000 #endif #ifdef CONFIG_NAND_BOOT @@ -498,7 +498,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_DEVICE_DISABLE -#define CONFIG_SYS_QE_FW_ADDR 0x600c0000 +#define CONFIG_SYS_QE_FW_ADDR 0x60940000 #ifdef CONFIG_LPUART #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -549,14 +549,14 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET 0x300000 #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 #elif defined(CONFIG_NAND_BOOT) #define CONFIG_ENV_IS_IN_NAND @@ -564,7 +564,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 1ff3d9ee9e9..2a20dec9abd 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -133,7 +133,7 @@ #endif #ifdef CONFIG_QSPI_BOOT -#define CONFIG_SYS_TEXT_BASE 0x40010000 +#define CONFIG_SYS_TEXT_BASE 0x40100000 #endif #ifndef CONFIG_SYS_TEXT_BASE @@ -409,7 +409,7 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_SYS_QE_FW_ADDR 0x600c0000 +#define CONFIG_SYS_QE_FW_ADDR 0x60940000 /* * Environment @@ -417,18 +417,18 @@ #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET 0x300000 #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x20000 #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET 0x300000 #define CONFIG_ENV_SECT_SIZE 0x10000 #else #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif -- cgit v1.3.1 From a9a5cef391ed5b2e47ed02a8cecf0ab1a19fc76a Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Tue, 16 May 2017 10:45:58 +0800 Subject: armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043A This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 ++++---- include/configs/ls1043a_common.h | 12 ++++++------ include/configs/ls1043aqds.h | 10 +++++----- include/configs/ls1043ardb.h | 8 ++++---- 4 files changed, 19 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 998944a31b2..c8ba2d63ea8 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -164,11 +164,11 @@ config SYS_LS_PPA_FW_ADDR hex "Address of PPA firmware loading from" depends on FSL_LS_PPA default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A - default 0x40500000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT default 0x580a00000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A - default 0x60500000 if SYS_LS_PPA_FW_IN_XIP - default 0x500000 if SYS_LS_PPA_FW_IN_MMC - default 0x500000 if SYS_LS_PPA_FW_IN_NAND + default 0x60400000 if SYS_LS_PPA_FW_IN_XIP + default 0x400000 if SYS_LS_PPA_FW_IN_MMC + default 0x400000 if SYS_LS_PPA_FW_IN_NAND help If the PPA firmware locate at XIP flash, such as NOR or diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index e26924877d1..05419fe9fbd 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -208,20 +208,20 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #ifdef CONFIG_NAND_BOOT -/* Store Fman ucode at offeset 0x160000(11 blocks). */ +/* Store Fman ucode at offeset 0x900000(72 blocks). */ #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SD_BOOT) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is * about 1MB (2040 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 2080(0x820). + * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800). */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800) #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_MAX_HZ 1000000 @@ -229,7 +229,7 @@ #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR /* FMan fireware Pre-load address */ -#define CONFIG_SYS_FMAN_FW_ADDR 0x60300000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index b14e944897b..04d74acdeb0 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -12,7 +12,7 @@ #if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT) #define CONFIG_SYS_TEXT_BASE 0x82000000 #elif defined(CONFIG_QSPI_BOOT) -#define CONFIG_SYS_TEXT_BASE 0x40010000 +#define CONFIG_SYS_TEXT_BASE 0x40100000 #else #define CONFIG_SYS_TEXT_BASE 0x60100000 #endif @@ -413,20 +413,20 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_NAND_BOOT #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET (1024 * 1024) +#define CONFIG_ENV_OFFSET (3 * 1024 * 1024) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 #else #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x20000 #endif diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 5e5d1f647cc..2647b150b46 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -235,15 +235,15 @@ #if defined(CONFIG_NAND_BOOT) #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET (1024 * 1024) +#define CONFIG_ENV_OFFSET (3 * 1024 * 1024) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x20000 #endif @@ -284,7 +284,7 @@ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE #endif -#define CONFIG_SYS_QE_FW_ADDR 0x60600000 +#define CONFIG_SYS_QE_FW_ADDR 0x60940000 #endif /* USB */ -- cgit v1.3.1 From 8104deb2d6b77d3793a66016bf993bccd8f6afe2 Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Tue, 16 May 2017 10:45:59 +0800 Subject: armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046A This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang Reviewed-by: York Sun --- board/freescale/ls1046ardb/README | 16 ++++++++-------- include/configs/ls1046a_common.h | 10 +++++----- include/configs/ls1046aqds.h | 10 +++++----- include/configs/ls1046ardb.h | 4 ++-- 4 files changed, 20 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/board/freescale/ls1046ardb/README b/board/freescale/ls1046ardb/README index 1ef7d479a3c..a38c9d48300 100644 --- a/board/freescale/ls1046ardb/README +++ b/board/freescale/ls1046ardb/README @@ -59,14 +59,14 @@ Start Address End Address Description Size QSPI flash map: Start Address End Address Description Size 0x00_4000_0000 - 0x00_400F_FFFF RCW + PBI 1MB -0x00_4010_0000 - 0x00_401F_FFFF U-Boot 1MB -0x00_4020_0000 - 0x00_402F_FFFF U-Boot Env 1MB -0x00_4030_0000 - 0x00_403F_FFFF FMan ucode 1MB -0x00_4040_0000 - 0x00_404F_FFFF UEFI 1MB -0x00_4050_0000 - 0x00_406F_FFFF PPA 2MB -0x00_4070_0000 - 0x00_408F_FFFF Secure boot header - + bootscript 2MB -0x00_4090_0000 - 0x00_40FF_FFFF Reserved 7MB +0x00_4010_0000 - 0x00_402F_FFFF U-Boot 2MB +0x00_4030_0000 - 0x00_403F_FFFF U-Boot Env 1MB +0x00_4040_0000 - 0x00_405F_FFFF PPA 2MB +0x00_4060_0000 - 0x00_408F_FFFF Secure boot header + + bootscript 3MB +0x00_4090_0000 - 0x00_4093_FFFF FMan ucode 256KB +0x00_4094_0000 - 0x00_4097_FFFF QE/uQE firmware 256KB +0x00_4098_0000 - 0x00_40FF_FFFF Reserved 6MB 0x00_4100_0000 - 0x00_43FF_FFFF FIT Image 48MB Booting Options diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 80f8dc2cbbc..47a544c90c5 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -176,23 +176,23 @@ /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is * about 1MB (2048 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820). + * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800). */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800) #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_FMAN_FW_ADDR 0x40300000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_MAX_HZ 1000000 #define CONFIG_ENV_SPI_MODE 0x03 #elif defined(CONFIG_NAND_BOOT) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_FMAN_FW_ADDR 0x60300000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 0cf6010a6cd..5d2e819e786 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -12,7 +12,7 @@ #if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT) #define CONFIG_SYS_TEXT_BASE 0x82000000 #elif defined(CONFIG_QSPI_BOOT) -#define CONFIG_SYS_TEXT_BASE 0x40010000 +#define CONFIG_SYS_TEXT_BASE 0x40100000 #else #define CONFIG_SYS_TEXT_BASE 0x60100000 #endif @@ -447,20 +447,20 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_NAND_BOOT #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET (1024 * 1024) +#define CONFIG_ENV_OFFSET (3 * 1024 * 1024) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 #else #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x20000 #endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 7161ee8dd48..6f649a62232 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -169,12 +169,12 @@ #if defined(CONFIG_SD_BOOT) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_OFFSET (1024 * 1024) +#define CONFIG_ENV_OFFSET (3 * 1024 * 1024) #define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x200000 /* 2MB */ +#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ #endif -- cgit v1.3.1 From f5bf23d8278b2fdfb9ce41fa36369cebc882ab02 Mon Sep 17 00:00:00 2001 From: Santan Kumar Date: Fri, 28 Apr 2017 12:47:24 +0530 Subject: armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: Santan Kumar Signed-off-by: Priyanka Jain Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 +- board/freescale/ls2080aqds/README | 12 ++++++++++++ board/freescale/ls2080ardb/README | 13 +++++++++++++ include/configs/ls2080a_common.h | 8 ++++---- include/configs/ls2080aqds.h | 8 ++++---- include/configs/ls2080ardb.h | 12 ++++++------ 6 files changed, 40 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index c8ba2d63ea8..fa386c68962 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -165,7 +165,7 @@ config SYS_LS_PPA_FW_ADDR depends on FSL_LS_PPA default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x580a00000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A + default 0x580400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A default 0x60400000 if SYS_LS_PPA_FW_IN_XIP default 0x400000 if SYS_LS_PPA_FW_IN_MMC default 0x400000 if SYS_LS_PPA_FW_IN_NAND diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index 2808bd58519..fd0e25a6865 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -89,6 +89,18 @@ c) NAND boot d) SD boot e) QSPI boot +Memory map for NOR boot +------------------------- +Image Flash Offset +RCW+PBI 0x00000000 +Boot firmware (U-Boot) 0x00100000 +Boot firmware Environment 0x00300000 +PPA firmware 0x00400000 +DPAA2 MC 0x00A00000 +DPAA2 DPL 0x00D00000 +DPAA2 DPC 0x00E00000 +Kernel.itb 0x01000000 + Environment Variables --------------------- - mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index fde143d2f4b..f228d805494 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -85,6 +85,19 @@ a) NOR boot b) NAND boot c) QSPI boot +Memory map for NOR boot +------------------------- +Image Flash Offset +RCW+PBI 0x00000000 +Boot firmware (U-Boot) 0x00100000 +Boot firmware Environment 0x00300000 +PPA firmware 0x00400000 +Cortina PHY firmware 0x00980000 +DPAA2 MC 0x00A00000 +DPAA2 DPL 0x00D00000 +DPAA2 DPC 0x00E00000 +Kernel.itb 0x01000000 + cfg_rcw_src switches needs to be changed for booting from different option. Refer to board documentation for correct switch setting. diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 363bfd4e95e..7b73139879e 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -193,18 +193,18 @@ unsigned long long get_qixis_addr(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581200000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "console=ttyAMA0,38400n8\0" \ - "mcinitcmd=fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" + "mcinitcmd=fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500 " \ "ramdisk_size=0x2000000 default_hugepagesz=2m" \ " hugepagesz=2m hugepages=256" -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580700000 &&" \ +#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 469ef9e0a44..4788c15d321 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -265,7 +265,7 @@ unsigned long get_board_ddr_clk(void); #ifndef CONFIG_QSPI_BOOT #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x2000 #endif @@ -376,12 +376,12 @@ unsigned long get_board_ddr_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ - "mcinitcmd=fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" + "mcinitcmd=fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" #endif /* CONFIG_SECURE_BOOT */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 3774b177fcc..0e920f63742 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -251,7 +251,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x2000 #endif @@ -421,13 +421,13 @@ unsigned long get_board_sys_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ "fdtfile=fsl-ls2080a-rdb.dtb\0" \ - "mcinitcmd=fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" \ + "mcinitcmd=fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" \ BOOTENV #endif #endif @@ -447,7 +447,7 @@ unsigned long get_board_sys_clk(void); " || run distro_bootcmd" #else /* Try to boot an on-NOR kernel first, then do normal distro boot */ -#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580700000" \ +#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580d00000" \ " && cp.b $kernel_start $kernel_load $kernel_size" \ " && bootm $kernel_load" \ " || run distro_bootcmd" @@ -463,7 +463,7 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_QSPI_BOOT #define CONFIG_CORTINA_FW_ADDR 0x20980000 #else -#define CONFIG_CORTINA_FW_ADDR 0x581000000 +#define CONFIG_CORTINA_FW_ADDR 0x580980000 #endif #define CONFIG_CORTINA_FW_LENGTH 0x40000 -- cgit v1.3.1 From 7676074ac756ab9566d52544cc836f7b93f80b37 Mon Sep 17 00:00:00 2001 From: Udit Agarwal Date: Tue, 2 May 2017 17:43:57 +0530 Subject: armv8: LS2080A: Adjust memory map for secure boot headers for NOR-boot This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: Udit Agarwal Reviewed-by: York Sun --- board/freescale/ls2080aqds/README | 1 + board/freescale/ls2080ardb/README | 1 + include/configs/ls2080aqds.h | 10 +++++----- include/configs/ls2080ardb.h | 10 +++++----- 4 files changed, 12 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index fd0e25a6865..cad860eac20 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -96,6 +96,7 @@ RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 +Secure Headers 0x00600000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index f228d805494..205c45cb2af 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -92,6 +92,7 @@ RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 +Secure Headers 0x00600000 Cortina PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 4788c15d321..84e9db26489 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -359,14 +359,14 @@ unsigned long get_board_ddr_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ - "mcinitcmd=esbc_validate 0x580c80000;" \ - "esbc_validate 0x580cc0000;" \ - "fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" + "mcinitcmd=esbc_validate 0x580700000;" \ + "esbc_validate 0x580740000;" \ + "fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" #else #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 0e920f63742..c20a7f437c8 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -378,15 +378,15 @@ unsigned long get_board_sys_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ "fdtfile=fsl-ls2080a-rdb.dtb\0" \ - "mcinitcmd=esbc_validate 0x580c80000;" \ - "esbc_validate 0x580cc0000;" \ - "fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" \ + "mcinitcmd=esbc_validate 0x580700000;" \ + "esbc_validate 0x580740000;" \ + "fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" \ BOOTENV #else #ifdef CONFIG_QSPI_BOOT -- cgit v1.3.1