From d6d07a9bec3bc30a58c45f8e6343c92dfef96fee Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 12 Sep 2014 13:06:36 +0200 Subject: arm: vf610: add NAND support for vf610twr This adds NAND support for the Vybrid tower system (TWR-VF65GS10) provided by the vf610_nfc driver. Full 16-Bit bus width is supported. Also an aditional config vf610twr_nand is introduced which gets the environment from NAND. However, booting U-Boot from NAND is not yet possible due to missing boot configuration block (BCB). Signed-off-by: Stefan Agner --- include/configs/vf610twr.h | 46 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 03425504122..6fd0b173ebb 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -14,6 +14,7 @@ #define CONFIG_VF610 +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -44,6 +45,41 @@ #undef CONFIG_CMD_IMLS +/* NAND support */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS + +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_VF610_NFC +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_USE_ARCH_MEMCPY +#define CONFIG_SYS_NAND_BUSWIDTH_16BIT +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR + +/* UBI */ +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS + +/* Dynamic MTD partition support */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define MTDIDS_DEFAULT "nand0=fsl_nfc" +#define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \ + "128k(vf-bcb)ro," \ + "1408k(u-boot)ro," \ + "512k(u-boot-env)," \ + "4m(kernel)," \ + "512k(fdt)," \ + "-(rootfs)" +#endif + #define CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -218,11 +254,19 @@ /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH +#ifdef CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET (12 * 64 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + +#ifdef CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE (64 * 2048) +#define CONFIG_ENV_SECT_SIZE (64 * 2048) +#define CONFIG_ENV_RANGE (512 * 1024) +#define CONFIG_ENV_OFFSET 0x180000 +#endif #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ -- cgit v1.3.1 From 152adee1b6174611903b81fa8d3b9797d70b0ca1 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 15 Sep 2014 14:59:16 +0800 Subject: imx:mx6sxsabresd: change CONFIG_SYS_FSL_ESDHC_ADDR Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC4_BASE_ADDR which is used in board_mmc_init. If board_mmc_init failed, cpu_mmc_init->fsl_esdhc_mmc_init will use CONFIG_SYS_FSL_ESDHC_ADDR to initialize sdhc. So set this macro to correct value. Signed-off-by: Peng Fan --- include/configs/mx6sxsabresd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index b92d9443d47..fd74c6980d7 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -159,7 +159,7 @@ /* MMC Configuration */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR #define CONFIG_MMC #define CONFIG_CMD_MMC -- cgit v1.3.1 From 95083b3a0887e1653df04ef4e1aa3c42920ffa11 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 15 Sep 2014 14:59:17 +0800 Subject: imx:mx6qarm2: change CONFIG_SYS_FSL_ESDHC_ADDR Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC4_BASE_ADDR. USDHC3 and USDHC4 are both initialized in board_mmc_init. There is no restriction on USDHC3 addr or USDHC4 addr should be assigned to CONFIG_SYS_FSL_ESDHC_ADDR. So, just choose USDHC4_BASE_ADDR to avoid errors when fsl_esdhc_mmc_init is invoked. Signed-off-by: Peng Fan --- include/configs/mx6qarm2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 35c0a850801..e2469a11656 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -37,7 +37,7 @@ /* MMC Configs */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_MMC -- cgit v1.3.1 From 08129d618c3906a696bdaf758bd7e923ea43eced Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 15 Sep 2014 14:59:18 +0800 Subject: imx:mx6slevk: change CONFIG_SYS_FSL_ESDHC_ADDR Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC2_BASE_ADDR which is used in board_mmc_init. Signed-off-by: Peng Fan --- include/configs/mx6slevk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 194d7bdb76e..55b983c7ad2 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -40,7 +40,7 @@ /* MMC Configs */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_MMC #define CONFIG_CMD_MMC -- cgit v1.3.1 From e425436ca83e3c285000d53acc1700b63d39893b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 20 Sep 2014 20:05:36 -0300 Subject: cm_fx6: Remove CONFIG_NETMASK We should not hardcode CONFIG_NETMASK in the config file. Signed-off-by: Fabio Estevam Acked-by: Igor Grinberg Acked-by: Nikita Kiryanov --- include/configs/cm_fx6.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 10d02b4e18c..7cf241e31d7 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -222,7 +222,6 @@ #define CONFIG_MII #define CONFIG_ETHPRIME "FEC0" #define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NET_RETRY_COUNT 5 /* USB */ -- cgit v1.3.1 From 9992792be07517647fa2f07a54263d7051ff420f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 16 Sep 2014 20:03:40 -0300 Subject: mx51evk: Fix CONFIG_SYS_FSL_ESDHC_ADDR We should pass the SDHC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR. Signed-off-by: Fabio Estevam --- include/configs/mx51evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index b389475ebe8..b0d401c9280 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -69,7 +69,7 @@ * MMC Configs * */ #define CONFIG_FSL_ESDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_NUM 2 #define CONFIG_MMC -- cgit v1.3.1 From 7a56bddd7fb9fe27c775cadd18ebde6f883d7cff Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 16 Sep 2014 20:03:41 -0300 Subject: mx51evk: Add generic board support Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related to generic board not being supported. Signed-off-by: Fabio Estevam --- include/configs/mx51evk.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index b0d401c9280..d6e8ec4e13e 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -26,6 +26,7 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_OF_LIBFDT -- cgit v1.3.1 From 05d1c24517726c73fabb16c483a5cbd3737ed2a6 Mon Sep 17 00:00:00 2001 From: Guillaume GARDET Date: Thu, 11 Sep 2014 11:59:52 +0200 Subject: imx: nitrogen6x: Make use of both uSD and SD slots to load script or kernel on Sabrelite board Sabrelite board has two solts: 0 is SD3 (bottom) slot and 1 is uSD4 (top) slot. This patch makes use of both slots instead of only one. Signed-off-by: Guillaume GARDET Cc: Stefano Babic Cc: Eric Nelson Reviewed-by: Eric Nelson Acked-by: Eric Nelson Reviewed-by: Eric Nelson Acked-by: Eric Nelson --- include/configs/nitrogen6x.h | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index d4b0ac9fdb1..2a1eb3b773d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -186,7 +186,7 @@ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ - "mmcdev=0\0" \ + "mmcdevs=0 1\0" \ "mmcpart=1\0" \ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -238,16 +238,19 @@ "fi;\0" #define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" + "for mmcdev in ${mmcdevs}; do " \ + "mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loaduimage; then " \ + "run mmcboot; " \ + "fi; " \ + "fi; " \ + "fi; " \ + "done; " \ + "run netboot; " #else #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc1\0" \ -- cgit v1.3.1 From 3098ef429c1ee6678ac1c643cb7246c13137070d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 16 Sep 2014 11:13:12 -0300 Subject: mx25pdk: Fix CONFIG_SYS_FSL_ESDHC_ADDR We should pass the MMC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR. Signed-off-by: Fabio Estevam --- include/configs/mx25pdk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index d464ad964b9..34199af203e 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -100,7 +100,7 @@ #define CONFIG_MMC #define CONFIG_GENERIC_MMC #define CONFIG_FSL_ESDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_ADDR IMX_MMC_SDHC1_BASE #define CONFIG_SYS_FSL_ESDHC_NUM 1 /* PMIC Configs */ -- cgit v1.3.1 From 4f797c4c1c93b508928786f539cd6a4a98a68f22 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 16 Sep 2014 11:13:13 -0300 Subject: mx25pdk: Add generic board support Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related to generic board support is not in place. Signed-off-by: Fabio Estevam --- include/configs/mx25pdk.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 34199af203e..c02e29be9ad 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -14,6 +14,7 @@ #define CONFIG_MX25 #define CONFIG_SYS_TEXT_BASE 0x81200000 #define CONFIG_MXC_GPIO +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_TIMER_RATE 32768 #define CONFIG_SYS_TIMER_COUNTER \ -- cgit v1.3.1 From e7380a1fdc90a88c450458f87899199bd8f4681e Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Tue, 9 Sep 2014 10:16:57 +0800 Subject: imx: mx6qarm2: Add the kernel FDT Loading support To support loading FDT file for kernel, add the fdt address, file and loading script to arm2 board default environment. Signed-off-by: Ye.Li --- include/configs/mx6qarm2.h | 41 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 38 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index e2469a11656..a8c496d0658 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -69,15 +69,19 @@ #define CONFIG_BOOTDELAY 3 -#define CONFIG_LOADADDR 0x10800000 +#define CONFIG_LOADADDR 0x12000000 #define CONFIG_SYS_TEXT_BASE 0x17800000 #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc3\0" \ + "fdt_file=imx6q-arm2.dtb\0" \ + "fdt_addr=0x18000000\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ "mmcdev=1\0" \ "mmcpart=2\0" \ "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \ @@ -88,15 +92,46 @@ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ - "bootz\0" \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ "netboot=echo Booting from net ...; " \ "run netargs; " \ - "dhcp ${image}; bootz\0" \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev};" \ -- cgit v1.3.1 From adca1875c8090dea9b163550d8607ccba5418819 Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Tue, 9 Sep 2014 10:16:58 +0800 Subject: imx: mx6qarm2: Change the mmcroot and mmcpart env value 1. Set the image load partition to the first FAT partition. 2. Set the kernel rootfs partition to the second partition. Signed-off-by: Ye.Li --- include/configs/mx6qarm2.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index a8c496d0658..aa01647c97e 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -83,8 +83,8 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev=1\0" \ - "mmcpart=2\0" \ - "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ -- cgit v1.3.1 From 4ba9b1c2e3805c1399b2c432b5c0b2f1d985b88a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 23 Sep 2014 13:18:18 +0200 Subject: arm: m28evk: Test if bootscript exists before loading it Make sure the boot.scr exists on the card before loading it from the card to avoid annoying message on the console. Signed-off-by: Marek Vasut Cc: Stefano Babic --- include/configs/m28evk.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index fccd29dc26c..2d9ad5f23c9 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -279,10 +279,12 @@ "bootm ${kernel_addr_r}\0" \ "try_bootscript=" \ "mmc rescan;" \ + "if test -e mmc 0:2 ${bootscript} ; then " \ "if ext4load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ "then;" \ "\techo Running bootscript...;" \ "\tsource ${kernel_addr_r};" \ + "fi ; " \ "fi\0" /* The rest of the configuration is shared */ -- cgit v1.3.1 From 14b256e5c084e1b693f4ad73c6a8beee7ffcb4af Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 23 Sep 2014 13:18:19 +0200 Subject: arm: m53evk: Test if bootscript exists before loading it Make sure the boot.scr exists on the card before loading it from the card to avoid annoying message on the console. Signed-off-by: Marek Vasut Cc: Stefano Babic --- include/configs/m53evk.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index df6a2261099..ad9c39c16ca 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -348,10 +348,12 @@ "bootm ${kernel_addr_r}\0" \ "try_bootscript=" \ "mmc rescan;" \ + "if test -e mmc 0:1 ${bootscript} ; then " \ "if ext4load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ "then;" \ "\techo Running bootscript...;" \ "\tsource ${kernel_addr_r};" \ + "fi ; " \ "fi\0" #endif /* __M53EVK_CONFIG_H__ */ -- cgit v1.3.1 From fc532a921aae1151dd39322d8f50b55a735de8d5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 23 Sep 2014 13:18:20 +0200 Subject: arm: m28evk: Enable FS_GENERIC Enable the CONFIG_CMD_FS_GENERIC on m28evk to avoid per-fs specific commands and tweak the environment to cater for this new option. Signed-off-by: Marek Vasut Cc: Stefano Babic --- include/configs/m28evk.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 2d9ad5f23c9..322b45fd990 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -32,6 +32,7 @@ #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC #define CONFIG_CMD_GPIO #define CONFIG_CMD_GREPENV #define CONFIG_CMD_I2C @@ -236,7 +237,7 @@ "addargs=run addcons addmtd addmisc\0" \ "mmcload=" \ "mmc rescan ; " \ - "ext4load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \ + "load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \ "ubiload=" \ "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ @@ -280,7 +281,7 @@ "try_bootscript=" \ "mmc rescan;" \ "if test -e mmc 0:2 ${bootscript} ; then " \ - "if ext4load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ + "if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ "then;" \ "\techo Running bootscript...;" \ "\tsource ${kernel_addr_r};" \ -- cgit v1.3.1 From febae49a2b282283db98c1217aa04c4538704585 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 23 Sep 2014 13:18:21 +0200 Subject: arm: m53evk: Enable FS_GENERIC Enable the CONFIG_CMD_FS_GENERIC on m53evk to avoid per-fs specific commands and tweak the environment to cater for this new option. Signed-off-by: Marek Vasut Cc: Stefano Babic --- include/configs/m53evk.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index ad9c39c16ca..ee4eb10e461 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -38,6 +38,7 @@ #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC #define CONFIG_CMD_GREPENV #define CONFIG_CMD_I2C #define CONFIG_CMD_MII @@ -305,7 +306,7 @@ "addargs=run addcons addmtd addmisc\0" \ "mmcload=" \ "mmc rescan ; " \ - "ext4load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ + "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ "ubiload=" \ "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ @@ -349,7 +350,7 @@ "try_bootscript=" \ "mmc rescan;" \ "if test -e mmc 0:1 ${bootscript} ; then " \ - "if ext4load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ + "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ "then;" \ "\techo Running bootscript...;" \ "\tsource ${kernel_addr_r};" \ -- cgit v1.3.1 From b357503f1cdedade6d31991fa6aabb4174f92989 Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Mon, 29 Sep 2014 23:26:28 +0800 Subject: imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 board This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. Signed-off-by: Ye.Li --- board/freescale/mx6qarm2/MAINTAINERS | 2 + board/freescale/mx6qarm2/imximage_mx6dl.cfg | 143 ++++++++++++++++++++++++++++ board/freescale/mx6qarm2/mx6qarm2.c | 4 + configs/mx6dlarm2_defconfig | 3 + configs/mx6qarm2_defconfig | 2 +- include/configs/mx6qarm2.h | 5 +- 6 files changed, 157 insertions(+), 2 deletions(-) create mode 100644 board/freescale/mx6qarm2/imximage_mx6dl.cfg create mode 100644 configs/mx6dlarm2_defconfig (limited to 'include') diff --git a/board/freescale/mx6qarm2/MAINTAINERS b/board/freescale/mx6qarm2/MAINTAINERS index 42c19d13ec1..c8d594b17ff 100644 --- a/board/freescale/mx6qarm2/MAINTAINERS +++ b/board/freescale/mx6qarm2/MAINTAINERS @@ -1,6 +1,8 @@ MX6QARM2 BOARD M: Jason Liu +M: Ye Li S: Maintained F: board/freescale/mx6qarm2/ F: include/configs/mx6qarm2.h F: configs/mx6qarm2_defconfig +F: configs/mx6dlarm2_defconfig diff --git a/board/freescale/mx6qarm2/imximage_mx6dl.cfg b/board/freescale/mx6qarm2/imximage_mx6dl.cfg new file mode 100644 index 00000000000..eef723c254c --- /dev/null +++ b/board/freescale/mx6qarm2/imximage_mx6dl.cfg @@ -0,0 +1,143 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Jason Liu + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0798 0x000c0000 +DATA 4 0x020e0758 0x00000000 +DATA 4 0x020e0588 0x00000030 +DATA 4 0x020e0594 0x00000030 +DATA 4 0x020e056c 0x00000030 +DATA 4 0x020e0578 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e057c 0x00000030 +DATA 4 0x020e0590 0x00003000 +DATA 4 0x020e0598 0x00003000 +DATA 4 0x020e058c 0x00000000 +DATA 4 0x020e059c 0x00003030 +DATA 4 0x020e05a0 0x00003030 +DATA 4 0x020e078c 0x00000030 +DATA 4 0x020e0750 0x00020000 +DATA 4 0x020e05a8 0x00000030 +DATA 4 0x020e05b0 0x00000030 +DATA 4 0x020e0524 0x00000030 +DATA 4 0x020e051c 0x00000030 +DATA 4 0x020e0518 0x00000030 +DATA 4 0x020e050c 0x00000030 +DATA 4 0x020e05b8 0x00000030 +DATA 4 0x020e05c0 0x00000030 +DATA 4 0x020e0774 0x00020000 +DATA 4 0x020e0784 0x00000030 +DATA 4 0x020e0788 0x00000030 +DATA 4 0x020e0794 0x00000030 +DATA 4 0x020e079c 0x00000030 +DATA 4 0x020e07a0 0x00000030 +DATA 4 0x020e07a4 0x00000030 +DATA 4 0x020e07a8 0x00000030 +DATA 4 0x020e0748 0x00000030 +DATA 4 0x020e05ac 0x00000030 +DATA 4 0x020e05b4 0x00000030 +DATA 4 0x020e0528 0x00000030 +DATA 4 0x020e0520 0x00000030 +DATA 4 0x020e0514 0x00000030 +DATA 4 0x020e0510 0x00000030 +DATA 4 0x020e05bc 0x00000030 +DATA 4 0x020e05c4 0x00000030 + +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b4800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b480c 0x00370037 +DATA 4 0x021b4810 0x00370037 +DATA 4 0x021b083c 0x422f0220 +DATA 4 0x021b0840 0x021f0219 +DATA 4 0x021b483C 0x422f0220 +DATA 4 0x021b4840 0x022d022f +DATA 4 0x021b0848 0x47494b49 +DATA 4 0x021b4848 0x48484c47 +DATA 4 0x021b0850 0x39382b2f +DATA 4 0x021b4850 0x2f35312c +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 +DATA 4 0x021b0004 0x0002002d +DATA 4 0x021b0008 0x00333030 + +DATA 4 0x021b000c 0x40445323 +DATA 4 0x021b0010 0xb66e8c63 + +DATA 4 0x021b0014 0x01ff00db +DATA 4 0x021b0018 0x00081740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x00440e21 +#ifdef CONFIG_DDR_32BIT +DATA 4 0x021b0040 0x00000017 +DATA 4 0x021b0000 0xc3190000 +#else +DATA 4 0x021b0040 0x00000027 +DATA 4 0x021b0000 0xc31a0000 +#endif +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x0400803a +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x0000803b +DATA 4 0x021b001c 0x00428031 +DATA 4 0x021b001c 0x00428039 +DATA 4 0x021b001c 0x07208030 +DATA 4 0x021b001c 0x07208038 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b001c 0x04008048 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00000007 +DATA 4 0x021b4818 0x00000007 +DATA 4 0x021b0004 0x0002556d +DATA 4 0x021b4004 0x00011006 +DATA 4 0x021b001c 0x00000000 + +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +DATA 4 0x020e0010 0xF00000CF +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index 6c51f3a1825..f2e577d5144 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -224,7 +224,11 @@ int board_init(void) int checkboard(void) { +#ifdef CONFIG_MX6DL + puts("Board: MX6DL-Armadillo2\n"); +#else puts("Board: MX6Q-Armadillo2\n"); +#endif return 0; } diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig new file mode 100644 index 00000000000..b4b78e5ab5e --- /dev/null +++ b/configs/mx6dlarm2_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL" +CONFIG_ARM=y +CONFIG_TARGET_MX6QARM2=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index bdcc672b57a..a251615a381 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q" CONFIG_ARM=y CONFIG_TARGET_MX6QARM2=y diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index aa01647c97e..ed57e4aa87a 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -10,7 +10,6 @@ #define __CONFIG_H #define CONFIG_MX6 -#define CONFIG_MX6Q #include "mx6_common.h" @@ -169,7 +168,11 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#ifdef CONFIG_DDR_32BIT +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) +#else #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) +#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -- cgit v1.3.1 From 661139faf7b03a8d88da55ee36ad4b0fb7e35964 Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Mon, 29 Sep 2014 23:26:29 +0800 Subject: imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boards Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li --- board/freescale/mx6qarm2/MAINTAINERS | 2 + board/freescale/mx6qarm2/imximage.cfg | 189 +++++++++++++++- board/freescale/mx6qarm2/imximage_mx6dl.cfg | 319 ++++++++++++++++++++++++++++ board/freescale/mx6qarm2/mx6qarm2.c | 7 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 3 + configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 3 + include/configs/mx6qarm2.h | 5 - 9 files changed, 518 insertions(+), 14 deletions(-) create mode 100644 configs/mx6dlarm2_lpddr2_defconfig create mode 100644 configs/mx6qarm2_lpddr2_defconfig (limited to 'include') diff --git a/board/freescale/mx6qarm2/MAINTAINERS b/board/freescale/mx6qarm2/MAINTAINERS index c8d594b17ff..52cf7f935ab 100644 --- a/board/freescale/mx6qarm2/MAINTAINERS +++ b/board/freescale/mx6qarm2/MAINTAINERS @@ -6,3 +6,5 @@ F: board/freescale/mx6qarm2/ F: include/configs/mx6qarm2.h F: configs/mx6qarm2_defconfig F: configs/mx6dlarm2_defconfig +F: configs/mx6qarm2_lpddr2_defconfig +F: configs/mx6dlarm2_lpddr2_defconfig diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index 710f34d9a54..c85bde510e0 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Copyright (C) 2011-2014 Freescale Semiconductor, Inc. * Jason Liu * * SPDX-License-Identifier: GPL-2.0+ @@ -30,6 +30,185 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ +#ifdef CONFIG_MX6DQ_LPDDR2 +/* DCD */ +DATA 4 0x020C4018 0x60324 + +DATA 4 0x020E05a8 0x00003038 +DATA 4 0x020E05b0 0x00003038 +DATA 4 0x020E0524 0x00003038 +DATA 4 0x020E051c 0x00003038 + +DATA 4 0x020E0518 0x00003038 +DATA 4 0x020E050c 0x00003038 +DATA 4 0x020E05b8 0x00003038 +DATA 4 0x020E05c0 0x00003038 + +DATA 4 0x020E05ac 0x00000038 +DATA 4 0x020E05b4 0x00000038 +DATA 4 0x020E0528 0x00000038 +DATA 4 0x020E0520 0x00000038 + +DATA 4 0x020E0514 0x00000038 +DATA 4 0x020E0510 0x00000038 +DATA 4 0x020E05bc 0x00000038 +DATA 4 0x020E05c4 0x00000038 + +DATA 4 0x020E056c 0x00000038 +DATA 4 0x020E0578 0x00000038 +DATA 4 0x020E0588 0x00000038 +DATA 4 0x020E0594 0x00000038 + +DATA 4 0x020E057c 0x00000038 +DATA 4 0x020E0590 0x00000038 +DATA 4 0x020E0598 0x00000038 +DATA 4 0x020E058c 0x00000000 + +DATA 4 0x020E059c 0x00000038 +DATA 4 0x020E05a0 0x00000038 +DATA 4 0x020E0784 0x00000038 +DATA 4 0x020E0788 0x00000038 + +DATA 4 0x020E0794 0x00000038 +DATA 4 0x020E079c 0x00000038 +DATA 4 0x020E07a0 0x00000038 +DATA 4 0x020E07a4 0x00000038 + +DATA 4 0x020E07a8 0x00000038 +DATA 4 0x020E0748 0x00000038 +DATA 4 0x020E074c 0x00000038 +DATA 4 0x020E0750 0x00020000 + +DATA 4 0x020E0758 0x00000000 +DATA 4 0x020E0774 0x00020000 +DATA 4 0x020E078c 0x00000038 +DATA 4 0x020E0798 0x00080000 + +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b401c 0x00008000 + +DATA 4 0x021b085c 0x1b5f01ff +DATA 4 0x021b485c 0x1b5f01ff + +DATA 4 0x021b0800 0xa1390000 +DATA 4 0x021b4800 0xa1390000 + +DATA 4 0x021b0890 0x00400000 +DATA 4 0x021b4890 0x00400000 + +DATA 4 0x021b48bc 0x00055555 + +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 + +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 + +DATA 4 0x021b082c 0xf3333333 +DATA 4 0x021b0830 0xf3333333 +DATA 4 0x021b0834 0xf3333333 +DATA 4 0x021b0838 0xf3333333 +DATA 4 0x021b482c 0xf3333333 +DATA 4 0x021b4830 0xf3333333 +DATA 4 0x021b4834 0xf3333333 +DATA 4 0x021b4838 0xf3333333 + +DATA 4 0x021b0848 0x49383b39 +DATA 4 0x021b0850 0x30364738 +DATA 4 0x021b4848 0x3e3c3846 +DATA 4 0x021b4850 0x4c294b35 + +DATA 4 0x021b083c 0x20000000 +DATA 4 0x021b0840 0x0 +DATA 4 0x021b483c 0x20000000 +DATA 4 0x021b4840 0x0 + +DATA 4 0x021b0858 0xf00 +DATA 4 0x021b4858 0xf00 + +DATA 4 0x021b08b8 0x800 +DATA 4 0x021b48b8 0x800 + +DATA 4 0x021b000c 0x555a61a5 +DATA 4 0x021b0004 0x20036 +DATA 4 0x021b0010 0x160e83 +DATA 4 0x021b0014 0xdd +DATA 4 0x021b0018 0x8174c +DATA 4 0x021b002c 0xf9f26d2 +DATA 4 0x021b0030 0x20e +DATA 4 0x021b0038 0x200aac +DATA 4 0x021b0008 0x0 + +DATA 4 0x021b0040 0x5f + +DATA 4 0x021b0000 0xc3010000 + +DATA 4 0x021b400c 0x555a61a5 +DATA 4 0x021b4004 0x20036 +DATA 4 0x021b4010 0x160e83 +DATA 4 0x021b4014 0xdd +DATA 4 0x021b4018 0x8174c +DATA 4 0x021b402c 0xf9f26d2 +DATA 4 0x021b4030 0x20e +DATA 4 0x021b4038 0x200aac +DATA 4 0x021b4008 0x0 + +DATA 4 0x021b4040 0x3f +DATA 4 0x021b4000 0xc3010000 + +DATA 4 0x021b001c 0x3f8030 +DATA 4 0x021b001c 0xff0a8030 +DATA 4 0x021b001c 0xc2018030 +DATA 4 0x021b001c 0x6028030 +DATA 4 0x021b001c 0x2038030 + +DATA 4 0x021b401c 0x3f8030 +DATA 4 0x021b401c 0xff0a8030 +DATA 4 0x021b401c 0xc2018030 +DATA 4 0x021b401c 0x6028030 +DATA 4 0x021b401c 0x2038030 + +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b4800 0xa1390003 + +DATA 4 0x021b0020 0x7800 +DATA 4 0x021b4020 0x7800 + +DATA 4 0x021b0818 0x0 +DATA 4 0x021b4818 0x0 + +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b4800 0xa1390003 + +DATA 4 0x021b08b8 0x800 +DATA 4 0x021b48b8 0x800 + +DATA 4 0x021b001c 0x0 +DATA 4 0x021b401c 0x0 + +DATA 4 0x021b0404 0x00011006 + +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F + +#else DATA 4 0x020e05a8 0x00000030 DATA 4 0x020e05b0 0x00000030 DATA 4 0x020e0524 0x00000030 @@ -142,12 +321,8 @@ DATA 4 0x021b48b8 0x00000800 DATA 4 0x021b001c 0x00000000 DATA 4 0x021b0404 0x00011006 -DATA 4 0x020e0010 0xF00000FF -DATA 4 0x020e0018 0x00070007 -DATA 4 0x020e001c 0x00070007 - DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC00 +DATA 4 0x020c406c 0x0030FC03 DATA 4 0x020c4070 0x0FFFC000 DATA 4 0x020c4074 0x3FF00000 DATA 4 0x020c4078 0x00FFF300 @@ -159,3 +334,5 @@ DATA 4 0x020e0010 0xF00000CF /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F + +#endif /* CONFIG_MX6DQ_LPDDR2 */ diff --git a/board/freescale/mx6qarm2/imximage_mx6dl.cfg b/board/freescale/mx6qarm2/imximage_mx6dl.cfg index eef723c254c..ae8dcc626ed 100644 --- a/board/freescale/mx6qarm2/imximage_mx6dl.cfg +++ b/board/freescale/mx6qarm2/imximage_mx6dl.cfg @@ -30,6 +30,324 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ + + + +#ifdef CONFIG_MX6DL_LPDDR2 + +/* IOMUX SETTINGS */ +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 */ +DATA 4 0x020E04bc 0x00003028 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 */ +DATA 4 0x020E04c0 0x00003028 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 */ +DATA 4 0x020E04c4 0x00003028 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 */ +DATA 4 0x020E04c8 0x00003028 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS4 */ +DATA 4 0x020E04cc 0x00003028 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS5 */ +DATA 4 0x020E04d0 0x00003028 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS6 */ +DATA 4 0x020E04d4 0x00003028 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS7 */ +DATA 4 0x020E04d8 0x00003028 + +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0 */ +DATA 4 0x020E0470 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1 */ +DATA 4 0x020E0474 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2 */ +DATA 4 0x020E0478 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3 */ +DATA 4 0x020E047c 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM4 */ +DATA 4 0x020E0480 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM5 */ +DATA 4 0x020E0484 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM6 */ +DATA 4 0x020E0488 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM7 */ +DATA 4 0x020E048c 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS */ +DATA 4 0x020E0464 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS */ +DATA 4 0x020E0490 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_0 */ +DATA 4 0x020E04ac 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_1 */ +DATA 4 0x020E04b0 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET */ +DATA 4 0x020E0494 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE0 */ +DATA 4 0x020E04a4 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE1 */ +DATA 4 0x020E04a8 0x00000038 +/* + * IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA2 + * DSE can be configured using Group Control Register: + * IOMUXC_SW_PAD_CTL_GRP_CTLDS + */ +DATA 4 0x020E04a0 0x00000000 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT0 */ +DATA 4 0x020E04b4 0x00000038 +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT1 */ +DATA 4 0x020E04b8 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B0DS */ +DATA 4 0x020E0764 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B1DS */ +DATA 4 0x020E0770 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B2DS */ +DATA 4 0x020E0778 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B3DS */ +DATA 4 0x020E077c 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B4DS */ +DATA 4 0x020E0780 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B5DS */ +DATA 4 0x020E0784 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B6DS */ +DATA 4 0x020E078c 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_B7DS */ +DATA 4 0x020E0748 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_ADDDS */ +DATA 4 0x020E074c 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_CTLDS */ +DATA 4 0x020E076c 0x00000038 +/* IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL */ +DATA 4 0x020E0750 0x00020000 +/* IOMUXC_SW_PAD_CTL_GRP_DDRPKE */ +DATA 4 0x020E0754 0x00000000 +/* IOMUXC_SW_PAD_CTL_GRP_DDRMODE */ +DATA 4 0x020E0760 0x00020000 +/* IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE */ +DATA 4 0x020E0774 0x00080000 + +/* + * DDR Controller Registers + * + * Manufacturer: Mocron + * Device Part Number: MT42L64M64D2KH-18 + * Clock Freq.: 528MHz + * MMDC channels: Both MMDC0, MMDC1 + *Density per CS in Gb: 256M + * Chip Selects used: 2 + * Number of Banks: 8 + * Row address: 14 + * Column address: 9 + * Data bus width 32 + */ + +/* MMDC_P0_BASE_ADDR = 0x021b0000 */ +/* MMDC_P1_BASE_ADDR = 0x021b4000 */ + +/* MMDC0_MDSCR, set the Configuration request bit during MMDC set up */ +DATA 4 0x021b001c 0x00008000 + +/* MMDC0_MDSCR, set the Configuration request bit during MMDC set up */ +DATA 4 0x021b401c 0x00008000 + +/*LPDDR2 ZQ params */ +DATA 4 0x021b085c 0x1b5f01ff +DATA 4 0x021b485c 0x1b5f01ff + +/* Calibration setup. */ +/* DDR_PHY_P0_MPZQHWCTRL, enable on time ZQ calibration */ +DATA 4 0x021b0800 0xa1390003 + +/*ca bus abs delay */ +DATA 4 0x021b0890 0x00400000 +/*ca bus abs delay */ +DATA 4 0x021b4890 0x00400000 +/* values of 20,40,50,60,7f tried. no difference seen */ + +/* DDR_PHY_P1_MPWRCADL */ +DATA 4 0x021b48bc 0x00055555 + +/*frc_msr.*/ +DATA 4 0x021b08b8 0x00000800 +/*frc_msr.*/ +DATA 4 0x021b48b8 0x00000800 + +/* DDR_PHY_P0_MPREDQBY0DL3 */ +DATA 4 0x021b081c 0x33333333 +/* DDR_PHY_P0_MPREDQBY1DL3 */ +DATA 4 0x021b0820 0x33333333 +/* DDR_PHY_P0_MPREDQBY2DL3 */ +DATA 4 0x021b0824 0x33333333 +/* DDR_PHY_P0_MPREDQBY3DL3 */ +DATA 4 0x021b0828 0x33333333 +/* DDR_PHY_P1_MPREDQBY0DL3 */ +DATA 4 0x021b481c 0x33333333 +/* DDR_PHY_P1_MPREDQBY1DL3 */ +DATA 4 0x021b4820 0x33333333 +/* DDR_PHY_P1_MPREDQBY2DL3 */ +DATA 4 0x021b4824 0x33333333 +/* DDR_PHY_P1_MPREDQBY3DL3 */ +DATA 4 0x021b4828 0x33333333 + +/* + * Read and write data delay, per byte. + * For optimized DDR operation it is recommended to run mmdc_calibration + * on your board, and replace 4 delay register assigns with resulted values + * Note: + * a. DQS gating is not relevant for LPDDR2. DSQ gating calibration section + * should be skipped, or the write/read calibration comming after that + * will stall + * b. The calibration code that runs for both MMDC0 & MMDC1 should be used. + */ + +DATA 4 0x021b0848 0x4b4b524f +DATA 4 0x021b4848 0x494f4c44 + +DATA 4 0x021b0850 0x3c3d303c +DATA 4 0x021b4850 0x3c343d38 + +/*dqs gating dis */ +DATA 4 0x021b083c 0x20000000 +DATA 4 0x021b0840 0x0 +DATA 4 0x021b483c 0x20000000 +DATA 4 0x021b4840 0x0 + +/*clk delay */ +DATA 4 0x021b0858 0xa00 +/*clk delay */ +DATA 4 0x021b4858 0xa00 + +/*frc_msr */ +DATA 4 0x021b08b8 0x00000800 +/*frc_msr */ +DATA 4 0x021b48b8 0x00000800 +/* Calibration setup end */ + +/* Channel0 - startng address 0x80000000 */ +/* MMDC0_MDCFG0 */ +DATA 4 0x021b000c 0x34386145 + +/* MMDC0_MDPDC */ +DATA 4 0x021b0004 0x00020036 +/* MMDC0_MDCFG1 */ +DATA 4 0x021b0010 0x00100c83 +/* MMDC0_MDCFG2 */ +DATA 4 0x021b0014 0x000000Dc +/* MMDC0_MDMISC */ +DATA 4 0x021b0018 0x0000174C +/* MMDC0_MDRWD;*/ +DATA 4 0x021b002c 0x0f9f26d2 +/* MMDC0_MDOR */ +DATA 4 0x021b0030 0x0000020e +/* MMDC0_MDCFG3LP */ +DATA 4 0x021b0038 0x00190778 +/* MMDC0_MDOTC */ +DATA 4 0x021b0008 0x00000000 + +/* CS0_END */ +DATA 4 0x021b0040 0x0000005f +/* ROC */ +DATA 4 0x021b0404 0x0000000f + +/* MMDC0_MDCTL */ +DATA 4 0x021b0000 0xc3010000 + +/* Channel1 - starting address 0x10000000 */ +/* MMDC1_MDCFG0 */ +DATA 4 0x021b400c 0x34386145 + +/* MMDC1_MDPDC */ +DATA 4 0x021b4004 0x00020036 +/* MMDC1_MDCFG1 */ +DATA 4 0x021b4010 0x00100c83 +/* MMDC1_MDCFG2 */ +DATA 4 0x021b4014 0x000000Dc +/* MMDC1_MDMISC */ +DATA 4 0x021b4018 0x0000174C +/* MMDC1_MDRWD;*/ +DATA 4 0x021b402c 0x0f9f26d2 +/* MMDC1_MDOR */ +DATA 4 0x021b4030 0x0000020e +/* MMDC1_MDCFG3LP */ +DATA 4 0x021b4038 0x00190778 +/* MMDC1_MDOTC */ +DATA 4 0x021b4008 0x00000000 + +/* CS0_END */ +DATA 4 0x021b4040 0x0000003f + +/* MMDC1_MDCTL */ +DATA 4 0x021b4000 0xc3010000 + +/* Channel0 : Configure DDR device:*/ +/* MRW: BA=0 CS=0 MR_ADDR=63 MR_OP=0 */ +DATA 4 0x021b001c 0x003f8030 +/* MRW: BA=0 CS=0 MR_ADDR=10 MR_OP=ff */ +DATA 4 0x021b001c 0xff0a8030 +/* MRW: BA=0 CS=0 MR_ADDR=1 MR_OP=a2 */ +DATA 4 0x021b001c 0xa2018030 +/* MRW: BA=0 CS=0 MR_ADDR=2 MR_OP=6. tcl=8, tcwl=4 */ +DATA 4 0x021b001c 0x06028030 +/* MRW: BA=0 CS=0 MR_ADDR=3 MR_OP=2.drive=240/6 */ +DATA 4 0x021b001c 0x01038030 + +/* Channel1 : Configure DDR device:*/ +/* MRW: BA=0 CS=0 MR_ADDR=63 MR_OP=0 */ +DATA 4 0x021b401c 0x003f8030 +/* MRW: BA=0 CS=0 MR_ADDR=10 MR_OP=ff */ +DATA 4 0x021b401c 0xff0a8030 +/* MRW: BA=0 CS=0 MR_ADDR=1 MR_OP=a2 */ +DATA 4 0x021b401c 0xa2018030 +/* MRW: BA=0 CS=0 MR_ADDR=2 MR_OP=6. tcl=8, tcwl=4 */ +DATA 4 0x021b401c 0x06028030 +/* MRW: BA=0 CS=0 MR_ADDR=3 MR_OP=2.drive=240/6 */ +DATA 4 0x021b401c 0x01038030 + +/* MMDC0_MDREF */ +DATA 4 0x021b0020 0x00005800 +/* MMDC1_MDREF */ +DATA 4 0x021b4020 0x00005800 + +/* DDR_PHY_P0_MPODTCTRL */ +DATA 4 0x021b0818 0x0 +/* DDR_PHY_P1_MPODTCTRL */ +DATA 4 0x021b4818 0x0 + +/* + * calibration values based on calibration compare of 0x00ffff00: + * Note, these calibration values are based on Freescale's board + * May need to run calibration on target board to fine tune these + */ + +/* DDR_PHY_P0_MPZQHWCTRL, enable automatic ZQ calibration */ +DATA 4 0x021b0800 0xa1310003 + +/* DDR_PHY_P0_MPMUR0, frc_msr */ +DATA 4 0x021b08b8 0x00000800 +/* DDR_PHY_P1_MPMUR0, frc_msr */ +DATA 4 0x021b48b8 0x00000800 + +/* + * MMDC0_MDSCR, clear this register + * (especially the configuration bit as initialization is complete) + */ +DATA 4 0x021b001c 0x00000000 +/* + * MMDC0_MDSCR, clear this register + * (especially the configuration bit as initialization is complete) + */ +DATA 4 0x021b401c 0x00000000 + +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +DATA 4 0x020e0010 0xF00000CF +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F + +#else /* CONFIG_MX6DL_LPDDR2 */ + DATA 4 0x020e0798 0x000c0000 DATA 4 0x020e0758 0x00000000 DATA 4 0x020e0588 0x00000030 @@ -141,3 +459,4 @@ DATA 4 0x020c4080 0x000003FF DATA 4 0x020e0010 0xF00000CF DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F +#endif /* CONFIG_MX6DL_LPDDR2 */ diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index f2e577d5144..667dca532f4 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -32,7 +32,12 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); +#if defined(CONFIG_MX6DL) && !defined(CONFIG_MX6DL_LPDDR2) && \ + defined(CONFIG_DDR_32BIT) + gd->ram_size = ((phys_size_t)CONFIG_DDR_MB * 1024 * 1024) / 2; +#else + gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024; +#endif return 0; } diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index b4b78e5ab5e..de0193f4ccb 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048" CONFIG_ARM=y CONFIG_TARGET_MX6QARM2=y diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig new file mode 100644 index 00000000000..cc432cfb542 --- /dev/null +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512" +CONFIG_ARM=y +CONFIG_TARGET_MX6QARM2=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index a251615a381..3fe3559a17b 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048" CONFIG_ARM=y CONFIG_TARGET_MX6QARM2=y diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig new file mode 100644 index 00000000000..491e22a057a --- /dev/null +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512" +CONFIG_ARM=y +CONFIG_TARGET_MX6QARM2=y diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index ed57e4aa87a..6e01fa0435a 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -168,11 +168,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#ifdef CONFIG_DDR_32BIT -#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) -#else -#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) -#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -- cgit v1.3.1 From 9f87640c03ea686bde5788ae14b13666620102f7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 24 Sep 2014 15:21:58 -0300 Subject: wandboard: Select CONFIG_CMD_FUSE Select CONFIG_CMD_FUSE so that the fuse API commands can be used. Signed-off-by: Fabio Estevam --- include/configs/wandboard.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 7d96908f0e4..9fb501a3412 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -110,6 +110,11 @@ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + #if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) #define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb" #elif defined(CONFIG_MX6Q) -- cgit v1.3.1 From fb6f86c4116252bbae2fb8773a614b8c790d25d4 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 30 Sep 2014 14:05:39 -0300 Subject: mx6sxsabresd: Fix PCI reset and power GPIO assignments PERST_GPIO and POWER_GPIO are currently swapped. Fix the GPIO assignments as per the board schematics. Signed-off-by: Fabio Estevam --- include/configs/mx6sxsabresd.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index fd74c6980d7..e02ea18a646 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -204,8 +204,8 @@ #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 1) -#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 0) +#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) +#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif /* FLASH and environment organization */ -- cgit v1.3.1 From 46f8a4b7e6cbf9cd86ad09f2a679fe1d78b79bb1 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 25 Sep 2014 21:14:16 +0200 Subject: arm: m28evk: Zap superfluous tab in env Remove this tab from env, since it's useless, just use spaces. Signed-off-by: Marek Vasut Cc: Stefano Babic --- include/configs/m28evk.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 322b45fd990..efe770b81b3 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -282,9 +282,9 @@ "mmc rescan;" \ "if test -e mmc 0:2 ${bootscript} ; then " \ "if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ - "then;" \ - "\techo Running bootscript...;" \ - "\tsource ${kernel_addr_r};" \ + "then ; " \ + "echo Running bootscript... ; " \ + "source ${kernel_addr_r} ; " \ "fi ; " \ "fi\0" -- cgit v1.3.1 From 252499e603aa342368cb8a02c6d0641435e676c0 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 25 Sep 2014 21:14:17 +0200 Subject: arm: m53evk: Zap superfluous tab in env Remove this tab from env, since it's useless, just use spaces. Signed-off-by: Marek Vasut Cc: Stefano Babic --- include/configs/m53evk.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index ee4eb10e461..c133ba9d03f 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -351,9 +351,9 @@ "mmc rescan;" \ "if test -e mmc 0:1 ${bootscript} ; then " \ "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ - "then;" \ - "\techo Running bootscript...;" \ - "\tsource ${kernel_addr_r};" \ + "then ; " \ + "echo Running bootscript... ; " \ + "source ${kernel_addr_r} ; " \ "fi ; " \ "fi\0" -- cgit v1.3.1 From 39d0973300b83c08f3f5047245ebf1de883b31f2 Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Thu, 2 Oct 2014 13:33:46 +0200 Subject: imx6: add Bachmann OT1200 board This patch adds support for the OT1200 series of devices. Following components are used in u-boot: + ethernet + i2c + emmc + gpio For more details see README. Changes v1 > v2 - make use of enable_cspi_clock(..) - fix usage of OUTPUT_40OHM define - added README Changes v2 > v3 - improve spelling in README - added own copy of mx6q_4x_mt41j128.cfg Signed-off-by: Christian Gmeiner --- arch/arm/Kconfig | 4 + board/bachmann/ot1200/Kconfig | 23 +++ board/bachmann/ot1200/MAINTAINERS | 6 + board/bachmann/ot1200/Makefile | 9 ++ board/bachmann/ot1200/README | 20 +++ board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 169 +++++++++++++++++++ board/bachmann/ot1200/ot1200.c | 251 +++++++++++++++++++++++++++++ configs/ot1200_defconfig | 3 + include/configs/ot1200.h | 197 ++++++++++++++++++++++ 9 files changed, 682 insertions(+) create mode 100644 board/bachmann/ot1200/Kconfig create mode 100644 board/bachmann/ot1200/MAINTAINERS create mode 100644 board/bachmann/ot1200/Makefile create mode 100644 board/bachmann/ot1200/README create mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg create mode 100644 board/bachmann/ot1200/ot1200.c create mode 100644 configs/ot1200_defconfig create mode 100644 include/configs/ot1200.h (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 106aed985f8..8face21d56e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -414,6 +414,9 @@ config TARGET_HUMMINGBOARD config TARGET_TQMA6 bool "TQ Systems TQMa6 board" +config TARGET_OT1200 + bool "Bachmann OT1200" + config OMAP34XX bool "OMAP34XX SoC" @@ -577,6 +580,7 @@ source "board/atmel/at91sam9rlek/Kconfig" source "board/atmel/at91sam9x5ek/Kconfig" source "board/atmel/sama5d3_xplained/Kconfig" source "board/atmel/sama5d3xek/Kconfig" +source "board/bachmann/ot1200/Kconfig" source "board/balloon3/Kconfig" source "board/barco/titanium/Kconfig" source "board/bluegiga/apx4devkit/Kconfig" diff --git a/board/bachmann/ot1200/Kconfig b/board/bachmann/ot1200/Kconfig new file mode 100644 index 00000000000..55a825d8aa8 --- /dev/null +++ b/board/bachmann/ot1200/Kconfig @@ -0,0 +1,23 @@ +if TARGET_OT1200 + +config SYS_CPU + string + default "armv7" + +config SYS_BOARD + string + default "ot1200" + +config SYS_VENDOR + string + default "bachmann" + +config SYS_SOC + string + default "mx6" + +config SYS_CONFIG_NAME + string + default "ot1200" + +endif diff --git a/board/bachmann/ot1200/MAINTAINERS b/board/bachmann/ot1200/MAINTAINERS new file mode 100644 index 00000000000..ad75c24ee46 --- /dev/null +++ b/board/bachmann/ot1200/MAINTAINERS @@ -0,0 +1,6 @@ +BACHMANN ELECTRONIC OT1200 BOARD +M: Christian Gmeiner +S: Maintained +F: board/bachmann/ot1200 +F: include/configs/ot1200.h +F: configs/ot1200*_defconfig diff --git a/board/bachmann/ot1200/Makefile b/board/bachmann/ot1200/Makefile new file mode 100644 index 00000000000..1bd42e83211 --- /dev/null +++ b/board/bachmann/ot1200/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := ot1200.o diff --git a/board/bachmann/ot1200/README b/board/bachmann/ot1200/README new file mode 100644 index 00000000000..c03d44e458a --- /dev/null +++ b/board/bachmann/ot1200/README @@ -0,0 +1,20 @@ +U-Boot for the Bachmann electronic GmbH OT1200 devices + +There are two different versions of the base board, which differ +in the way ethernet is done. The variant detection is done during +runtime based on the address of the found phy. + +- "mr" variant +FEC is connected directly to an ethernet switch (KSZ8895). The ethernet +port is always up and auto-negotiation is not possible. + +- normal variant +FEC is connected to a normal phy and auto-negotiation is possible. + + +The variant name is part of the dtb file name loaded by u-boot. This +make is possible to boot the linux kernel and make use variant specific +devicetree (fixed-phy link). + +In order to support different display resoltuions/sizes the OT1200 devices +are making use of EDID data stored in an i2c EEPROM. diff --git a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg new file mode 100644 index 00000000000..bb6c60b4c3c --- /dev/null +++ b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg @@ -0,0 +1,169 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e05a8 0x00000030 +DATA 4 0x020e05b0 0x00000030 +DATA 4 0x020e0524 0x00000030 +DATA 4 0x020e051c 0x00000030 + +DATA 4 0x020e0518 0x00000030 +DATA 4 0x020e050c 0x00000030 +DATA 4 0x020e05b8 0x00000030 +DATA 4 0x020e05c0 0x00000030 + +DATA 4 0x020e05ac 0x00020030 +DATA 4 0x020e05b4 0x00020030 +DATA 4 0x020e0528 0x00020030 +DATA 4 0x020e0520 0x00020030 + +DATA 4 0x020e0514 0x00020030 +DATA 4 0x020e0510 0x00020030 +DATA 4 0x020e05bc 0x00020030 +DATA 4 0x020e05c4 0x00020030 + +DATA 4 0x020e056c 0x00020030 +DATA 4 0x020e0578 0x00020030 +DATA 4 0x020e0588 0x00020030 +DATA 4 0x020e0594 0x00020030 + +DATA 4 0x020e057c 0x00020030 +DATA 4 0x020e0590 0x00003000 +DATA 4 0x020e0598 0x00003000 +DATA 4 0x020e058c 0x00000000 + +DATA 4 0x020e059c 0x00003030 +DATA 4 0x020e05a0 0x00003030 +DATA 4 0x020e0784 0x00000030 +DATA 4 0x020e0788 0x00000030 + +DATA 4 0x020e0794 0x00000030 +DATA 4 0x020e079c 0x00000030 +DATA 4 0x020e07a0 0x00000030 +DATA 4 0x020e07a4 0x00000030 + +DATA 4 0x020e07a8 0x00000030 +DATA 4 0x020e0748 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e0750 0x00020000 + +DATA 4 0x020e0758 0x00000000 +DATA 4 0x020e0774 0x00020000 +DATA 4 0x020e078c 0x00000030 +DATA 4 0x020e0798 0x000C0000 + +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 + +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 + +DATA 4 0x021b0018 0x00081740 + +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b000c 0x555A7974 +DATA 4 0x021b0010 0xDB538F64 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b002c 0x000026D2 + +DATA 4 0x021b0030 0x005A1023 +DATA 4 0x021b0008 0x09444040 +DATA 4 0x021b0004 0x00025576 +DATA 4 0x021b0040 0x00000027 +DATA 4 0x021b0000 0x831A0000 + +DATA 4 0x021b001c 0x04088032 +DATA 4 0x021b001c 0x0408803A +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x0000803B +DATA 4 0x021b001c 0x00428031 +DATA 4 0x021b001c 0x00428039 +DATA 4 0x021b001c 0x19308030 +DATA 4 0x021b001c 0x19308038 + +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b001c 0x04008048 +DATA 4 0x021b0800 0xA1380003 +DATA 4 0x021b4800 0xA1380003 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00022227 +DATA 4 0x021b4818 0x00022227 + +DATA 4 0x021b083c 0x434B0350 +DATA 4 0x021b0840 0x034C0359 +DATA 4 0x021b483c 0x434B0350 +DATA 4 0x021b4840 0x03650348 +DATA 4 0x021b0848 0x4436383B +DATA 4 0x021b4848 0x39393341 +DATA 4 0x021b0850 0x35373933 +DATA 4 0x021b4850 0x48254A36 + +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F + +DATA 4 0x021b480c 0x00440044 +DATA 4 0x021b4810 0x00440044 + +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 + +DATA 4 0x021b001c 0x00000000 +DATA 4 0x021b0404 0x00011006 + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4 0x020c4060 0x000000fb diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c new file mode 100644 index 00000000000..0d5ede5ca89 --- /dev/null +++ b/board/bachmann/ot1200/ot1200.c @@ -0,0 +1,251 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014, Bachmann electronic GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + OUTPUT_40OHM | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \ + PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | OUTPUT_40OHM | \ + PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \ + PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + +static iomux_v3_cfg_t const enet_pads[] = { + MX6_PAD_KEY_ROW1__ENET_COL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_KEY_COL3__ENET_CRS | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_GPIO_18__ENET_RX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_KEY_COL2__ENET_RX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_KEY_COL0__ENET_RX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_KEY_ROW2__ENET_TX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_KEY_ROW0__ENET_TX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + MX6_PAD_DISP0_DAT3__ECSPI3_SS0 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT4__ECSPI3_SS1 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_iomux_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + setup_iomux_spi(); + + return 0; +} + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +struct fsl_esdhc_cfg usdhc_cfg[] = { + {USDHC3_BASE_ADDR}, +}; + +int board_mmc_init(bd_t *bis) +{ + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 8; + + imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C3 - IO expander */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC, + .gp = IMX_GPIO_NR(3, 17) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC, + .gp = IMX_GPIO_NR(3, 18) + } +}; + +static iomux_v3_cfg_t const pwm_pad[] = { + MX6_PAD_SD1_CMD__PWM4_OUT | MUX_PAD_CTRL(OUTPUT_40OHM), +}; + +static void leds_on(void) +{ + /* turn on all possible leds connected via GPIO expander */ + i2c_set_bus_num(2); + pca953x_set_dir(CONFIG_SYS_I2C_PCA953X_ADDR, 0xffff, PCA953X_DIR_OUT); + pca953x_set_val(CONFIG_SYS_I2C_PCA953X_ADDR, 0xffff, 0x0); +} + +static void backlight_lcd_off(void) +{ + unsigned gpio = IMX_GPIO_NR(2, 0); + gpio_direction_output(gpio, 0); + + gpio = IMX_GPIO_NR(2, 3); + gpio_direction_output(gpio, 0); +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + + /* scan phy 0 and 5 */ + phydev = phy_find_by_mask(bus, 0x21, PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + + /* depending on the phy address we can detect our board version */ + if (phydev->addr == 0) + setenv("boardver", ""); + else + setenv("boardver", "mr"); + + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } + return 0; +} + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + backlight_lcd_off(); + + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + leds_on(); + + /* enable ecspi3 clocks */ + enable_cspi_clock(1, 2); + + return 0; +} + +int checkboard(void) +{ + puts("Board: "CONFIG_SYS_BOARD"\n"); + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig new file mode 100644 index 00000000000..c516038697f --- /dev/null +++ b/configs/ot1200_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q" +CONFIG_ARM=y +CONFIG_TARGET_OT1200=y diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h new file mode 100644 index 00000000000..071880fe759 --- /dev/null +++ b/include/configs/ot1200.h @@ -0,0 +1,197 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014 Bachmann electronic GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO + +/* FUSE Configs */ +#define CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP + +/* UART Configs */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* SF Configs */ +#define CONFIG_CMD_SF +#define CONFIG_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 2 +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(1, 3)<<8)) +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) + +/* IO expander */ +#define CONFIG_PCA953X +#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 +#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } +#define CONFIG_CMD_PCA953X +#define CONFIG_CMD_PCA953X_INFO + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* OCOTP Configs */ +#define CONFIG_CMD_IMXOTP +#define CONFIG_IMX_OTP +#define IMX_OTP_BASE OCOTP_BASE_ADDR +#define IMX_OTP_ADDR_MAX 0x7F +#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA +#define IMX_OTPWRITE_ENABLED + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE MII100 +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0x5 +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 2 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */ +#define CONFIG_ENV_OFFSET (1024 * 1024) +/* M25P16 has an erase size of 64 KiB */ +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD + +/* FS Configs */ +#define CONFIG_CMD_EXT3 +#define CONFIG_CMD_EXT4 +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_FS_GENERIC + +#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTFILE + +#endif /* __CONFIG_H */ -- cgit v1.3.1 From 84e2dc0c89dc5c70ae17224141a745edcd36402c Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:40 -0700 Subject: nitrogen6x: config: add USB Mass Storage (ums) support Add support for the USB mass storage to enable access to on-board storage (especially eMMC and SATA). Details at: http://boundarydevices.com/u-boot-usb-mass-storage-gadget/ Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 2a1eb3b773d..5e9b7437d9c 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -368,4 +368,17 @@ #define CONFIG_PCIE_IMX #endif +#define CONFIG_CMD_ELF + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 5b7103e0af5435d68489b2b579e9e46226782e64 Mon Sep 17 00:00:00 2001 From: Diego Rondini Date: Thu, 2 Oct 2014 12:16:41 -0700 Subject: nitrogen6x: config: allow boot to USB stick This patch enables boot to USB storage devices by expanding on the list of boot devices. Because the USB startup currently takes a long time, it places USB at the end of the list of supported devices. You can over-ride the boot order using the bootdevs environment variable. For instance, this will make USB the first (highest priority) device: U-Boot > setenv bootdevs usb mmc sata U-Boot > saveenv Signed-off-by: Diego Rondini Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 5e9b7437d9c..21a25e07340 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -173,7 +173,13 @@ #define CONFIG_DRIVE_MMC #endif -#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB #if defined(CONFIG_SABRELITE) #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -253,12 +259,16 @@ "run netboot; " #else #define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ "console=ttymxc1\0" \ "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ "sf erase 0xc0000 0x2000 && " \ "echo restored environment to factory default ; fi\0" \ - "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "bootcmd=for dtype in ${bootdevs}" \ "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ "for fs in fat ext2 ; do " \ "${fs}load " \ @@ -274,7 +284,7 @@ "echo ; echo serial console at 115200, 8N1 ; echo ; " \ "echo details at http://boundarydevices.com/6q_bootscript ; " \ "setenv stdout serial\0" \ - "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "upgradeu=for dtype in ${bootdevs}" \ "; do " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ "for fs in fat ext2 ; do " \ -- cgit v1.3.1 From 43a3431c2602ba7949c3bbb7a541396caa772c2c Mon Sep 17 00:00:00 2001 From: Kevin Mihelich Date: Thu, 2 Oct 2014 12:16:42 -0700 Subject: nitrogen6x: config: use FS_GENERIC load command Remove the individual attempts to load using ext2 and fat, replace with the generic load command supporting available filesystem types. Signed-off-by: Kevin Mihelich --- include/configs/nitrogen6x.h | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 21a25e07340..2167d77a380 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -270,13 +270,11 @@ "usb start ;" \ "fi; " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ - "for fs in fat ext2 ; do " \ - "${fs}load " \ - "${dtype} ${disk}:1 " \ - "10008000 " \ - "/6x_bootscript" \ - "&& source 10008000 ; " \ - "done ; " \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ "done ; " \ "done; " \ "setenv stdout serial,vga ; " \ @@ -287,11 +285,9 @@ "upgradeu=for dtype in ${bootdevs}" \ "; do " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ - "for fs in fat ext2 ; do " \ - "${fs}load ${dtype} ${disk}:1 10008000 " \ - "/6x_upgrade " \ - "&& source 10008000 ; " \ - "done ; " \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ "done ; " \ "done\0" \ -- cgit v1.3.1 From 8145ccc3be91f4909884cb80735e33ee930baa15 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:43 -0700 Subject: nitrogen6x: config: add initrd_high Support RAM disks by setting initrd_high. See commit 7e9603e Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 2167d77a380..3c244435926 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -282,6 +282,7 @@ "echo ; echo serial console at 115200, 8N1 ; echo ; " \ "echo details at http://boundarydevices.com/6q_bootscript ; " \ "setenv stdout serial\0" \ + "initrd_high=0xffffffff\0" \ "upgradeu=for dtype in ${bootdevs}" \ "; do " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ -- cgit v1.3.1 From 8d97b3ad95a2584aa31e281cfe2d6977f790803a Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:44 -0700 Subject: nitrogen6x: config: expose SATA, then MMC over USB If no boot script was found, expose internal storage over the USB mass storage gadget to allow easy programming. This is especially useful when SD cards are inaccessible or when loading SATA drives. More details are available in this blog post: http://boundarydevices.com/u-boot-usb-mass-storage-gadget/ Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 3c244435926..b31b92291d3 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -180,6 +180,7 @@ #endif #define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB +#define CONFIG_UMSDEVS CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC #if defined(CONFIG_SABRELITE) #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -260,6 +261,7 @@ #else #define CONFIG_EXTRA_ENV_SETTINGS \ "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "umsdevs=" CONFIG_UMSDEVS "\0" \ "console=ttymxc1\0" \ "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ "sf erase 0xc0000 0x2000 && " \ @@ -281,7 +283,26 @@ "echo ; echo 6x_bootscript not found ; " \ "echo ; echo serial console at 115200, 8N1 ; echo ; " \ "echo details at http://boundarydevices.com/6q_bootscript ; " \ - "setenv stdout serial\0" \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "for dtype in ${umsdevs} ; do " \ + "if itest.s sata == ${dtype}; then " \ + "initcmd='sata init' ;" \ + "else " \ + "initcmd='mmc rescan' ;" \ + "fi; " \ + "for disk in 0 1 ; do " \ + "if $initcmd && $dtype dev $disk ; then " \ + "setenv stdout serial,vga; " \ + "echo expose ${dtype} ${disk} " \ + "over USB; " \ + "ums 0 $dtype $disk ;" \ + "fi; " \ + " done; " \ + "done ;" \ + "setenv stdout serial,vga; " \ + "echo no block devices found;" \ + "\0" \ "initrd_high=0xffffffff\0" \ "upgradeu=for dtype in ${bootdevs}" \ "; do " \ -- cgit v1.3.1 From c36c0008285ebc5b3c56b4c0fcc654d2b55fef66 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:45 -0700 Subject: nitrogen6x: config: enable USB keyboard support Enable the use of USB keyboards on SABRE Lite and Nitrogen6x boards. Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index b31b92291d3..d505191d206 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -122,6 +122,8 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP /* Miscellaneous commands */ #define CONFIG_CMD_BMODE -- cgit v1.3.1 From d3d70e6f9b450ca37c005abe0a8ed5cd2869d71b Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:46 -0700 Subject: nitrogen6x: config: add CONFIG_CMD_MEMTEST Enable the 'mtest' command on Nitrogen6x and SABRE Lite boards. Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index d505191d206..82dc0fc9751 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -382,6 +382,7 @@ #define CONFIG_CMD_BMP #define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST #define CONFIG_SYS_ALT_MEMTEST #define CONFIG_CMD_BOOTZ -- cgit v1.3.1 From 5dbdc3cf3cd870ef799fd8e412f8b82915c98b65 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:47 -0700 Subject: nitrogen6x: config: enable "i2c edid" Enable the "i2c edid" command to query data from an attached HDMI monitor. Usage is typically this: U-Boot > i2c dev 1 U-Boot > i2c edid 0x50 ... Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 82dc0fc9751..b911d06da74 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -63,6 +63,7 @@ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID /* MMC Configs */ #define CONFIG_FSL_ESDHC -- cgit v1.3.1 From 3f5d964ea082049c9616e4dc827cd4aa3972a281 Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Thu, 2 Oct 2014 12:16:48 -0700 Subject: nitrogen6x: config: allow more bootargs parameters Increase the maximum number of arguments allowed by the Hush parser. This prevents errors when users or scripts aren't quoting parameters when setting the "bootargs" variable et al. Signed-off-by: Troy Kisky Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index b911d06da74..50b6c5a19a2 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -326,7 +326,7 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_MAXARGS 48 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MEMTEST_START 0x10000000 -- cgit v1.3.1 From 54950e8215c819e6a8e46752255b8347b00eb81f Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:49 -0700 Subject: nitrogen6x: config: disable logo Some users (QNX and Windows CE users in particular) have asked to disable the Penguin shown on the display at boot time. Signed-off-by: Eric Nelson Acked-by: Stefano Babic --- include/configs/nitrogen6x.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 50b6c5a19a2..60c942f0d2b 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -140,7 +140,6 @@ #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP -#define CONFIG_VIDEO_LOGO #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_CMD_HDMIDETECT #define CONFIG_CONSOLE_MUX -- cgit v1.3.1 From c0e7bd6661ee2c117d9543b674c968d711a9aed9 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:51 -0700 Subject: nitrogen6x: config: add gpio command Enable the 'gpio' command to allow reading and toggling of GPIO pins. Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 60c942f0d2b..21013bc23ad 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -32,6 +32,7 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO #define CONFIG_CI_UDC #define CONFIG_USBD_HS #define CONFIG_USB_GADGET_DUALSPEED -- cgit v1.3.1 From e9feee63705c1d380e229a381f9a7d696044ff76 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Thu, 2 Oct 2014 12:16:52 -0700 Subject: nitrogen6x: config: enable Android fastboot Enable 'fastboot' command. This is currently enabled but not yet functional. Including it in the configuration will ease further testing and development as discussed on the mailing list. Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 21013bc23ad..17559d8f8cd 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -413,4 +413,9 @@ #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "Boundary" +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 5e3a388cddce1685ccd9bc1b58ddb89a191ed88f Mon Sep 17 00:00:00 2001 From: Kevin Mihelich Date: Thu, 2 Oct 2014 12:16:53 -0700 Subject: nitrogen6x: config: enable EXT4 filesystem Support reading/writing ext4 partitions. Signed-off-by: Kevin Mihelich Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 17559d8f8cd..469591fe88d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -77,6 +77,8 @@ #define CONFIG_GENERIC_MMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -- cgit v1.3.1