From 2489a7e9f3055da15a8a8a0e54babf29ff5f6f14 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 27 Apr 2016 18:44:32 -0400 Subject: omap3: Reduce logic/overo SPL max image size While the OMAP3 has 64KiB of SRAM, per the TRM the download area is only from 0x40200000 to 0x4020F000 and exceeding that will cause failure to boot. Further, we need to make sure that we don't run into SRAM_SCRATCH_SPACE_ADDR as once SPL is running we will write values there and would corrupt our running image. Cc: Adam Ford Cc: Steve Sakoman Signed-off-by: Tom Rini --- include/configs/omap3_logic.h | 2 +- include/configs/omap3_overo.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 055dcb7c614..6c796438268 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -34,7 +34,7 @@ #undef CONFIG_SPL_TEXT_BASE #undef CONFIG_SPL_MAX_SIZE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (64 * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) /* Display CPU and Board information */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index c066eae5392..fbd0c2a0708 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -12,9 +12,9 @@ #include #undef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_MAX_SIZE (64*1024) #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) #define CONFIG_BCH -- cgit v1.2.3 From f188357a155a5b7d6906f081c6e7265f6d6086ec Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 2 May 2016 08:49:53 -0400 Subject: Revert "ti_armv7_common.h: Fix U-Boot location on eMMC" We cannot change the long standing hard-coded offset for raw boot mode for everyone to accommodate how Android expects things to be done here. This reverts commit ef5ebe951bec72631cdbc7cef9079e6c684e5d0b. Signed-off-by: Tom Rini --- include/configs/ti_armv7_common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 2c7d5425efe..7db08813e49 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -219,8 +219,8 @@ #endif /* RAW SD card / eMMC locations. */ -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 /* address 0x40000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 /* 384 KB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ /* FAT sd card locations. */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -- cgit v1.2.3 From 09c2b8f3e39925e5bdff12cb90add09bc9e117d4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Sun, 1 May 2016 03:46:16 +0200 Subject: Change my mailaddress MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I'll switch my mails to my own server, so drop all gmail references. Signed-off-by: Andreas Bießmann --- include/configs/atngw100mkii.h | 2 +- include/linux/mtd/omap_gpmc.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h index fb126329238..dfa2d93a90d 100644 --- a/include/configs/atngw100mkii.h +++ b/include/configs/atngw100mkii.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2006 Atmel Corporation * - * Copyright (C) 2012 Andreas Bießmann + * Copyright (C) 2012 Andreas Bießmann * * Configuration settings for the AVR32 Network Gateway * diff --git a/include/linux/mtd/omap_gpmc.h b/include/linux/mtd/omap_gpmc.h index 6cbae450221..3a756743592 100644 --- a/include/linux/mtd/omap_gpmc.h +++ b/include/linux/mtd/omap_gpmc.h @@ -2,7 +2,7 @@ * (C) Copyright 2004-2008 Texas Instruments, * Rohit Choraria * - * (C) Copyright 2013 Andreas Bießmann + * (C) Copyright 2013 Andreas Bießmann * * SPDX-License-Identifier: GPL-2.0+ */ -- cgit v1.2.3 From eae4b2b67bc8c68e2440616a447ca6c6898ad188 Mon Sep 17 00:00:00 2001 From: Vagrant Cascadian Date: Sat, 30 Apr 2016 19:18:00 -0700 Subject: Fix spelling of "occurred". Signed-off-by: Vagrant Cascadian Reviewed-by: Simon Glass --- include/linux/fb.h | 4 ++-- include/test/ut.h | 12 ++++++------ include/usbdevice.h | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/linux/fb.h b/include/linux/fb.h index 652cf3bab70..fcf331b79f4 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -388,14 +388,14 @@ struct fb_cursor_user { #define FB_EVENT_GET_CONSOLE_MAP 0x07 /* CONSOLE-SPECIFIC: set console to framebuffer mapping */ #define FB_EVENT_SET_CONSOLE_MAP 0x08 -/* A hardware display blank change occured */ +/* A hardware display blank change occurred */ #define FB_EVENT_BLANK 0x09 /* Private modelist is to be replaced */ #define FB_EVENT_NEW_MODELIST 0x0A /* The resolution of the passed in fb_info about to change and all vc's should be changed */ #define FB_EVENT_MODE_CHANGE_ALL 0x0B -/* A software display blank change occured */ +/* A software display blank change occurred */ #define FB_EVENT_CONBLANK 0x0C /* Get drawing requirements */ #define FB_EVENT_GET_REQ 0x0D diff --git a/include/test/ut.h b/include/test/ut.h index da7c1a9d265..85434d785a8 100644 --- a/include/test/ut.h +++ b/include/test/ut.h @@ -17,9 +17,9 @@ struct unit_test_state; * ut_fail() - Record failure of a unit test * * @uts: Test state - * @fname: Filename where the error occured - * @line: Line number where the error occured - * @func: Function name where the error occured + * @fname: Filename where the error occurred + * @line: Line number where the error occurred + * @func: Function name where the error occurred * @cond: The condition that failed */ void ut_fail(struct unit_test_state *uts, const char *fname, int line, @@ -29,9 +29,9 @@ void ut_fail(struct unit_test_state *uts, const char *fname, int line, * ut_failf() - Record failure of a unit test * * @uts: Test state - * @fname: Filename where the error occured - * @line: Line number where the error occured - * @func: Function name where the error occured + * @fname: Filename where the error occurred + * @line: Line number where the error occurred + * @func: Function name where the error occurred * @cond: The condition that failed * @fmt: printf() format string for the error, followed by args */ diff --git a/include/usbdevice.h b/include/usbdevice.h index da5af6efe4c..f27e17f124a 100644 --- a/include/usbdevice.h +++ b/include/usbdevice.h @@ -438,7 +438,7 @@ typedef enum usb_device_event { DEVICE_HUB_RESET, /* bi - bus has been unplugged */ DEVICE_DESTROY, /* bi - device instance should be destroyed */ - DEVICE_HOTPLUG, /* bi - a hotplug event has occured */ + DEVICE_HOTPLUG, /* bi - a hotplug event has occurred */ DEVICE_FUNCTION_PRIVATE, /* function - private */ -- cgit v1.2.3 From f9f9d2d625056b674145b6773fe2d91852e4a7fa Mon Sep 17 00:00:00 2001 From: "matwey.kornilov@gmail.com" Date: Sun, 1 May 2016 19:58:31 +0300 Subject: config: am335x_evm: detect BoneGreen using BBG1 Since 770e68c0a37fded897d4bdda661614fc81cb33d2 BoneGreen is detected in board_late_init as board_name 'BBG1' Signed-off-by: Matwey V. Kornilov --- include/configs/am335x_evm.h | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index cd8923d7a5d..16935a105a1 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -162,12 +162,9 @@ "if test $board_name = A335BONE; then " \ "setenv fdtfile am335x-bone.dtb; fi; " \ "if test $board_name = A335BNLT; then " \ - "if test $board_rev = BBG1; then " \ - "setenv fdtfile am335x-bonegreen.dtb; " \ - "else " \ - "setenv fdtfile am335x-boneblack.dtb; " \ - "fi; " \ - "fi; " \ + "setenv fdtfile am335x-boneblack.dtb; fi; " \ + "if test $board_name = BBG1; then " \ + "setenv fdtfile am335x-bonegreen.dtb; fi; " \ "if test $board_name = A33515BB; then " \ "setenv fdtfile am335x-evm.dtb; fi; " \ "if test $board_name = A335X_SK; then " \ -- cgit v1.2.3 From 58abb988ce24525474f0d515d2a36c1b3acf893f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 20 Apr 2016 22:48:13 -0300 Subject: mx6ul_evk: Remove CONFIG_SUPPORT_EMMC_BOOT mx6ul_evk does not come with a eMMC populated, so we should not define CONFIG_SUPPORT_EMMC_BOOT as it causes SPL to not be able to boot some brands of SD cards, such as SanDisk microSD HC - 8GB: U-Boot SPL 2016.05-rc1-28384-g108f841 (Apr 19 2016 - 11:19:11) Trying to boot from MMC1 spl: mmc block read error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### When CONFIG_SUPPORT_EMMC_BOOT is defined spl_boot_mode() returns MMCSD_MODE_EMMCBOOT, so remove this option to have a reliable boot via SD card. Signed-off-by: Fabio Estevam --- include/configs/mx6ul_14x14_evk.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 15976f76cf1..b2ba7734be5 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #endif -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #endif /* I2C configs */ -- cgit v1.2.3 From e7fbcbc2566ab4bbcb07889a5791972ac49fa407 Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Tue, 3 May 2016 08:59:24 +0200 Subject: igep00x0: Use the SRAM available for SPL. Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear what the limit is. This will also help some compilers to fit all the code into the allocated space. Signed-off-by: Enric Balletbo i Serra --- include/configs/omap3_igep00x0.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 5da50a50948..9bd891586cd 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -19,6 +19,13 @@ #include #include +/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */ +#undef CONFIG_SPL_MAX_SIZE +#undef CONFIG_SPL_TEXT_BASE + +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_TEXT_BASE 0x40200000 + /* * Display CPU and Board information */ -- cgit v1.2.3 From 0299cee53014f12a60c5b7d317eb2e6ea97c530d Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Wed, 13 Apr 2016 16:38:01 -0700 Subject: net: fix vlan validation VLAN identifiers are 12-bit decimal numbers, not IP addresses. Signed-off-by: Stefan Agner Reviewed-by: Tom Rini Acked-by: Joe Hershberger --- include/env_flags.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/env_flags.h b/include/env_flags.h index 9e87e1b7dbf..0dcec0689b1 100644 --- a/include/env_flags.h +++ b/include/env_flags.h @@ -57,8 +57,8 @@ enum env_flags_varaccess { "gatewayip:i," \ "netmask:i," \ "serverip:i," \ - "nvlan:i," \ - "vlan:i," \ + "nvlan:d," \ + "vlan:d," \ "dnsip:i," #else #define ETHADDR_FLAGS -- cgit v1.2.3 From 700877a62bfa88ef6e0267749db49f4dc63e2ea2 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Wed, 13 Apr 2016 16:38:02 -0700 Subject: net: increase maximum frame size to accomediate VLAN packets Ethernet packages with IEEE 802.1Q VLAN support may be up to 1522 bytes long. Increase the default size used to allocate packet storage by 4 bytes. While at it, let git care about history and rewrite the comment to represent the situation today only. Signed-off-by: Stefan Agner Reviewed-by: Tom Rini Acked-by: Joe Hershberger --- include/net.h | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/net.h b/include/net.h index 1fb419424bf..05800c4422e 100644 --- a/include/net.h +++ b/include/net.h @@ -465,20 +465,14 @@ struct icmp_hdr { #define IP_ICMP_HDR_SIZE (IP_HDR_SIZE + ICMP_HDR_SIZE) /* - * Maximum packet size; used to allocate packet storage. - * TFTP packets can be 524 bytes + IP header + ethernet header. - * Lets be conservative, and go for 38 * 16. (Must also be - * a multiple of 32 bytes). - */ -/* - * AS.HARNOIS : Better to set PKTSIZE to maximum size because - * traffic type is not always controlled - * maximum packet size = 1518 + * Maximum packet size; used to allocate packet storage. Use + * the maxium Ethernet frame size as specified by the Ethernet + * standard including the 802.1Q tag (VLAN tagging). + * maximum packet size = 1522 * maximum packet size and multiple of 32 bytes = 1536 */ -#define PKTSIZE 1518 +#define PKTSIZE 1522 #define PKTSIZE_ALIGN 1536 -/*#define PKTSIZE 608*/ /* * Maximum receive ring size; that is, the number of packets -- cgit v1.2.3 From b38eaec53570821043c94ad44eabcb23747d9969 Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Tue, 3 May 2016 19:52:49 -0400 Subject: include/configs: Numerous typo fixes: "controler" -> "controller". Signed-off-by: Robert P. J. Day --- include/configs/B4860QDS.h | 2 +- include/configs/BSC9132QDS.h | 2 +- include/configs/C29XPCIE.h | 2 +- include/configs/MPC8536DS.h | 6 +++--- include/configs/MPC8544DS.h | 6 +++--- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8572DS.h | 6 +++--- include/configs/MPC8610HPCD.h | 2 +- include/configs/MPC8641HPCN.h | 4 ++-- include/configs/P1010RDB.h | 4 ++-- include/configs/P1022DS.h | 6 +++--- include/configs/P1023RDB.h | 6 +++--- include/configs/P2041RDB.h | 6 +++--- include/configs/T102xQDS.h | 6 +++--- include/configs/T102xRDB.h | 8 ++++---- include/configs/T1040QDS.h | 8 ++++---- include/configs/T104xRDB.h | 8 ++++---- include/configs/T208xQDS.h | 8 ++++---- include/configs/T208xRDB.h | 8 ++++---- include/configs/T4240RDB.h | 6 +++--- include/configs/controlcenterd.h | 2 +- include/configs/corenet_ds.h | 4 ++-- include/configs/cyrus.h | 4 ++-- include/configs/km/kmp204x-common.h | 4 ++-- include/configs/ls1021aqds.h | 4 ++-- include/configs/ls1021atwr.h | 4 ++-- include/configs/ls2080a_common.h | 8 ++++---- include/configs/p1_p2_rdb_pc.h | 4 ++-- include/configs/p1_twr.h | 4 ++-- include/configs/sbc8641d.h | 4 ++-- include/configs/t4qds.h | 6 +++--- include/configs/xpedite517x.h | 4 ++-- include/configs/xpedite537x.h | 4 ++-- include/configs/xpedite550x.h | 2 +- 34 files changed, 82 insertions(+), 82 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 94c8253e60d..52497518304 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -83,7 +83,7 @@ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 3a733795ae2..aaddfca2cd7 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -85,7 +85,7 @@ #define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 4d14c8ba376..1e5b501ab1a 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -92,7 +92,7 @@ #define CONFIG_PCI /* Enable PCI/PCIE */ #ifdef CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 8cc7f023919..03f17f9c35a 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -51,9 +51,9 @@ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 6202dffaa50..26d92daff1d 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -25,9 +25,9 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller 1 */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index dd07dc4fb5e..5de8b198288 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -34,7 +34,7 @@ #define CONFIG_PCI /* enable any pci type devices */ #define CONFIG_PCI1 /* PCI controller 1 */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 9144f321e09..8c4e5e21ca9 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -40,9 +40,9 @@ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 88ca4f30489..e7f01d00d1d 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -45,7 +45,7 @@ #define CONFIG_SYS_SCRATCH_VA 0xc0000000 #define CONFIG_PCI 1 /* Enable PCI/PCIE*/ -#define CONFIG_PCI1 1 /* PCI controler 1 */ +#define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */ #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 3569849c52b..2f94c8214eb 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -46,8 +46,8 @@ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (ULI bridge) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (ULI bridge) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL law init code */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 5719e86f1bc..f398b37f5b9 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -176,8 +176,8 @@ #define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b29951c985..7457dfcd489 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -134,9 +134,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index fcbe288472e..a10310ec273 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -33,9 +33,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 /* PCIE controller 3 (slot 3) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b7a08e0a30d..b3fb38c63a4 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -52,9 +52,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 12260aaf62a..ef2ede49b9f 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -577,9 +577,9 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_PCI_INDIRECT_BRIDGE diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 74274cac571..778c64b3f08 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -563,11 +563,11 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #ifdef CONFIG_PPC_T1040 -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #endif #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 4c1175d426e..be4ae712b5e 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -65,10 +65,10 @@ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9a3965fa413..ed3493b6849 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -130,10 +130,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 85df388b6f9..d8c57a833b8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -550,10 +550,10 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCIE_RESET #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5e2d65975df..b6be46e004f 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -500,10 +500,10 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index a0cce858a14..ab838a8036c 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -92,9 +92,9 @@ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 1bb8d93ba06..c60c6443936 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -245,7 +245,7 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 96f17d3e7c3..a06bfe05adb 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -67,8 +67,8 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 4280c9cfb40..660646eb918 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -59,8 +59,8 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 9232ee32a7c..028623d1ee8 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -45,8 +45,8 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 3796395bd67..f605ca62803 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -528,8 +528,8 @@ unsigned long get_board_ddr_clk(void); /* PCIe */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 3e321284859..32d2acc0cda 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -377,8 +377,8 @@ /* PCIe */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 8e0b472fd75..a3aad1b99d9 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -185,10 +185,10 @@ unsigned long long get_qixis_addr(void); #endif /* PCIe */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #ifdef CONFIG_LS2080A #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie" diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 596193d5c4c..71b2fa9c074 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -306,8 +306,8 @@ #define CONFIG_FSL_ELBC #define CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index f2959c9b239..9b75afe92a5 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -48,8 +48,8 @@ #define CONFIG_FSL_ELBC #define CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index f34cef519c6..a7c7aef71ab 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -44,8 +44,8 @@ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_PCI 1 /* Enable PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index af61f216939..8ce337e0a76 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -32,9 +32,9 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index af02efbdef7..86c9b4c41f6 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -30,8 +30,8 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index a1c5826f7ba..6a06b0ab1c9 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -30,8 +30,8 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 02685ca1a82..5b377e35eed 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -31,7 +31,7 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (PEX8112 or XMC) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (PEX8112 or XMC) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -- cgit v1.2.3 From ea948590a3e0bd08021f110db9784a6d201ea810 Mon Sep 17 00:00:00 2001 From: Ash Charles Date: Thu, 5 May 2016 11:58:06 -0700 Subject: omap4: load files for legacy boot Be sure to load the zImage and fdtfile prior to actually booting in case we are doing a legacy boot. Signed-off-by: Ash Charles --- include/configs/ti_omap4_common.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 586d84886e8..5fad3c1242c 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -122,7 +122,10 @@ "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc${mmcdev} ...; " \ "run args_mmc; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ + "if run loadimage; then " \ + "run loadfdt; " \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "fi;\0" \ "uimageboot=echo Booting from mmc${mmcdev} ...; " \ "run args_mmc; " \ "bootm ${loadaddr}\0" \ -- cgit v1.2.3 From 4bf11dc88c246c354ab6060309018a8feb97ec10 Mon Sep 17 00:00:00 2001 From: Ash Charles Date: Thu, 5 May 2016 11:58:07 -0700 Subject: omap4: duovero: Disable EFI booting The DuoVero board fails to compile with EFI enabled as the generated binaries are too large. As this platform doesn't currently need EFI, disable this feature. Signed-off-by: Ash Charles --- include/configs/duovero.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/duovero.h b/include/configs/duovero.h index d8f48efdd85..98afe27287d 100644 --- a/include/configs/duovero.h +++ b/include/configs/duovero.h @@ -22,6 +22,7 @@ #include #undef CONFIG_SPL_OS_BOOT +#undef CONFIG_EFI_PARTITION #undef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -- cgit v1.2.3 From 1cc0a9f49657734c54939f03fc1e3ca0ec9d7eef Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Wed, 4 May 2016 04:47:31 -0400 Subject: Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller --- include/configs/hikey.h | 2 +- include/configs/omap3_logic.h | 2 +- include/configs/pengwyn.h | 2 +- include/fdtdec.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 83d9e107fe8..ffcc4d26307 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -121,7 +121,7 @@ "initrd_high=0xffffffffffffffff\0" \ BOOTENV -/* Preserve enviroment on sd card */ +/* Preserve environment on sd card */ #define CONFIG_COMMAND_HISTORY #define CONFIG_ENV_SIZE 0x1000 diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 6c796438268..3c11e2acc2a 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -140,7 +140,7 @@ #define CONFIG_PREBOOT \ "echo ======================NOTICE============================;"\ "echo \"The u-boot environment is not set.\";" \ - "echo \"If using a display a valid display varible for your panel\";" \ + "echo \"If using a display a valid display variable for your panel\";" \ "echo \"needs to be set.\";" \ "echo \"Valid display options are:\";" \ "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \ diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 1f33bc62e26..816c571511f 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -102,7 +102,7 @@ "run mmcboot;" \ "run nandboot;" -/* NS16550 Configuration: primary UART via FDTI */ +/* NS16550 Configuration: primary UART via FTDI */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CONFIG_BAUDRATE 115200 diff --git a/include/fdtdec.h b/include/fdtdec.h index fb882739355..37d482aba72 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -570,7 +570,7 @@ int fdtdec_check_fdt(void); * @param id Compatible ID to look for * @param node_list Place to put list of found nodes * @param maxcount Maximum number of nodes to find - * @return number of nodes found on success, FTD_ERR_... on error + * @return number of nodes found on success, FDT_ERR_... on error */ int fdtdec_find_aliases_for_id(const void *blob, const char *name, enum fdt_compat_id id, int *node_list, int maxcount); -- cgit v1.2.3