From 566a494f592ae3b3c0785d90d4e1ba45574880c4 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 22 Jun 2007 19:11:54 +0200 Subject: [PCS440EP] upgrade the PCS440EP board: - Show on the Status LEDs, some States of the board. - Get the MAC addresses from the EEProm - use PREBOOT - use the CF on the board. - check the U-Boot image in the Flash with a SHA1 checksum. - use dynamic TLB entries generation for the SDRAM Signed-off-by: Heiko Schocher --- include/configs/pcs440ep.h | 83 ++++++++++++++++++++++++++++++-- include/sha1.h | 115 +++++++++++++++++++++++++++++++++++++++++++++ include/status_led.h | 7 +++ 3 files changed, 202 insertions(+), 3 deletions(-) create mode 100644 include/sha1.h (limited to 'include') diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 23bdfc8dfb9..d4718088213 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -105,19 +105,27 @@ #ifdef CFG_ENV_IS_IN_FLASH #define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE) -#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ +#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ + +#define CONFIG_ENV_OVERWRITE 1 /* Address and size of Redundant Environment Sector */ #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) #endif /* CFG_ENV_IS_IN_FLASH */ +#define ENV_NAME_REVLEV "revision_level" +#define ENV_NAME_SOLDER "solder_switch" +#define ENV_NAME_DIP "dip" + /*----------------------------------------------------------------------- * DDR SDRAM *----------------------------------------------------------------------*/ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */ #undef CONFIG_DDR_ECC /* don't use ECC */ #define SPD_EEPROM_ADDRESS {0x50} +#define CONFIG_PROG_SDRAM_TLB 1 +#define CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG 1 /*----------------------------------------------------------------------- * I2C @@ -142,6 +150,8 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "hostname=pcs440ep\0" \ + "use_eeprom_ethaddr=default\0" \ + "cs_test=off\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ @@ -172,6 +182,36 @@ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #endif +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +/* check U-Boot image with SHA1 sum */ +#define CONFIG_SHA1_CHECK_UB_IMG 1 +#define CONFIG_SHA1_START CFG_MONITOR_BASE +#define CONFIG_SHA1_LEN CFG_MONITOR_LEN + +/*----------------------------------------------------------------------- + * Definitions for status LED + */ +#define CONFIG_STATUS_LED 1 /* Status LED enabled */ +#define CONFIG_BOARD_SPECIFIC_LED 1 + +#define STATUS_LED_BIT 0x08 /* LED 1 is on GPIO_PPC_1 */ +#define STATUS_LED_PERIOD ((CFG_HZ / 2) / 5) /* blink at 5 Hz */ +#define STATUS_LED_STATE STATUS_LED_OFF +#define STATUS_LED_BIT1 0x04 /* LED 2 is on GPIO_PPC_2 */ +#define STATUS_LED_PERIOD1 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */ +#define STATUS_LED_STATE1 STATUS_LED_ON +#define STATUS_LED_BIT2 0x02 /* LED 3 is on GPIO_PPC_3 */ +#define STATUS_LED_PERIOD2 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */ +#define STATUS_LED_STATE2 STATUS_LED_OFF +#define STATUS_LED_BIT3 0x01 /* LED 4 is on GPIO_PPC_4 */ +#define STATUS_LED_PERIOD3 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */ +#define STATUS_LED_STATE3 STATUS_LED_OFF + +#define CONFIG_SHOW_BOOT_PROGRESS 1 + #define CONFIG_BAUDRATE 115200 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ @@ -213,7 +253,10 @@ CFG_CMD_DIAG | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ + CFG_CMD_EXT2 | \ + CFG_CMD_FAT | \ CFG_CMD_I2C | \ + CFG_CMD_IDE | \ CFG_CMD_IRQ | \ CFG_CMD_MII | \ CFG_CMD_NET | \ @@ -221,9 +264,8 @@ CFG_CMD_PCI | \ CFG_CMD_PING | \ CFG_CMD_REGINFO | \ + CFG_CMD_REISER | \ CFG_CMD_SDRAM | \ - CFG_CMD_EXT2 | \ - CFG_CMD_FAT | \ CFG_CMD_USB ) @@ -410,4 +452,39 @@ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif +/*----------------------------------------------------------------------- + * IDE/ATA stuff Supports IDE harddisk + *----------------------------------------------------------------------- + */ + +#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ + +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_LED /* LED for ide not supported */ + +#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CFG_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */ + +#define CONFIG_IDE_PREINIT 1 +#define CONFIG_IDE_RESET 1 + +#define CFG_ATA_IDE0_OFFSET 0x0000 + +#define CFG_ATA_BASE_ADDR CFG_CF1 + +/* Offset for data I/O */ +#define CFG_ATA_DATA_OFFSET 0 + +/* Offset for normal register accesses */ +#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) + +/* Offset for alternate registers */ +#define CFG_ATA_ALT_OFFSET (0x0000) + +/* This addresses need to be shifted one place to the left + * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0) + * This values are shifted + */ +#define CFG_ATA_PORT_ADDR(port) ((port) << 1) + #endif /* __CONFIG_H */ diff --git a/include/sha1.h b/include/sha1.h new file mode 100644 index 00000000000..3030f2975f2 --- /dev/null +++ b/include/sha1.h @@ -0,0 +1,115 @@ +/** + * \file sha1.h + * based from http://xyssl.org/code/source/sha1/ + * FIPS-180-1 compliant SHA-1 implementation + * + * Copyright (C) 2003-2006 Christophe Devine + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License, version 2.1 as published by the Free Software Foundation. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +/* + * The SHA-1 standard was published by NIST in 1993. + * + * http://www.itl.nist.gov/fipspubs/fip180-1.htm + */ +#ifndef _SHA1_H +#define _SHA1_H + +#ifdef __cplusplus +extern "C" { +#endif + +#define SHA1_SUM_POS -0x20 +#define SHA1_SUM_LEN 20 + +/** + * \brief SHA-1 context structure + */ +typedef struct +{ + unsigned long total[2]; /*!< number of bytes processed */ + unsigned long state[5]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ +} +sha1_context; + +/** + * \brief SHA-1 context setup + * + * \param ctx SHA-1 context to be initialized + */ +void sha1_starts( sha1_context *ctx ); + +/** + * \brief SHA-1 process buffer + * + * \param ctx SHA-1 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void sha1_update( sha1_context *ctx, unsigned char *input, int ilen ); + +/** + * \brief SHA-1 final digest + * + * \param ctx SHA-1 context + * \param output SHA-1 checksum result + */ +void sha1_finish( sha1_context *ctx, unsigned char output[20] ); + +/** + * \brief Output = SHA-1( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output SHA-1 checksum result + */ +void sha1_csum( unsigned char *input, int ilen, + unsigned char output[20] ); + +/** + * \brief Output = SHA-1( file contents ) + * + * \param path input file name + * \param output SHA-1 checksum result + * \return 0 if successful, or 1 if fopen failed + */ +int sha1_file( char *path, unsigned char output[20] ); + +/** + * \brief Output = HMAC-SHA-1( input buffer, hmac key ) + * + * \param key HMAC secret key + * \param keylen length of the HMAC key + * \param input buffer holding the data + * \param ilen length of the input data + * \param output HMAC-SHA-1 result + */ +void sha1_hmac( unsigned char *key, int keylen, + unsigned char *input, int ilen, + unsigned char output[20] ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int sha1_self_test( void ); + +#ifdef __cplusplus +} +#endif + +#endif /* sha1.h */ diff --git a/include/status_led.h b/include/status_led.h index 71a202fe36e..a6468142557 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -367,6 +367,13 @@ void status_led_set (int led, int state); #define STATUS_LED_BOOT 0 /* LED 0 used for boot status */ +#elif defined(CONFIG_BOARD_SPECIFIC_LED) +/* led_id_t is unsigned long mask */ +typedef unsigned long led_id_t; + +extern void __led_toggle (led_id_t mask); +extern void __led_init (led_id_t mask, int state); +extern void __led_set (led_id_t mask, int state); #else # error Status LED configuration missing #endif -- cgit v1.3.1 From a5d71e290f3673269be8eefb4ec44f53412f9461 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Mon, 25 Jun 2007 19:11:37 +0200 Subject: [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG Signed-off-by: Heiko Schocher --- board/pcs440ep/pcs440ep.c | 3 -- cpu/ppc4xx/44x_spd_ddr.c | 32 ++++++++++--------- cpu/ppc4xx/44x_spd_ddr2.c | 79 ++++++++++++++++++++++++---------------------- include/configs/pcs440ep.h | 1 - 4 files changed, 58 insertions(+), 57 deletions(-) (limited to 'include') diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index f638589df29..8b2427aa946 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -506,8 +506,6 @@ int checkboard(void) return (0); } - -#if defined(CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG) void spd_ddr_init_hang (void) { status_led_set (0, STATUS_LED_OFF); @@ -520,7 +518,6 @@ void spd_ddr_init_hang (void) udelay (100000); } } -#endif long int initdram (int board_type) { diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c index 8621aa00cf4..a384392406a 100644 --- a/cpu/ppc4xx/44x_spd_ddr.c +++ b/cpu/ppc4xx/44x_spd_ddr.c @@ -70,12 +70,14 @@ #define ONE_BILLION 1000000000 -#if defined(CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG) -extern void spd_ddr_init_hang (void); -#define HANG() spd_ddr_init_hang() -#else -#define HANG() hang() -#endif +/* + * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed + */ +void __spd_ddr_init_hang (void) +{ + hang (); +} +void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))); /*----------------------------------------------------------------------------- | Memory Controller Options 0 @@ -474,7 +476,7 @@ static void get_spd_info(unsigned long *dimm_populated, if (dimm_found == FALSE) { printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } } @@ -497,7 +499,7 @@ static void check_mem_type(unsigned long *dimm_populated, dimm_num); printf("Only DDR SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; } } @@ -517,7 +519,7 @@ static void check_volt_type(unsigned long *dimm_populated, if (voltage_type != 0x04) { printf("ERROR: DIMM %lu with unsupported voltage level.\n", dimm_num); - HANG(); + spd_ddr_init_hang (); } else { debug("DIMM %lu voltage level supported.\n", dimm_num); } @@ -588,7 +590,7 @@ static void program_cfg0(unsigned long *dimm_populated, printf("WARNING: DIMM with datawidth of %lu bits.\n", data_width); printf("Only DIMMs with 32 or 64 bit datawidths supported.\n"); - HANG(); + spd_ddr_init_hang (); } break; } @@ -776,7 +778,7 @@ static void program_tr0(unsigned long *dimm_populated, if ((tcyc_reg & 0x0F) >= 10) { printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n", dimm_num); - HANG(); + spd_ddr_init_hang (); } cycle_time_ns_x_10[cas_index] = @@ -856,7 +858,7 @@ static void program_tr0(unsigned long *dimm_populated, printf("ERROR: No supported CAS latency with the installed DIMMs.\n"); printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n"); printf("Make sure the PLB speed is within the supported range.\n"); - HANG(); + spd_ddr_init_hang (); } /* @@ -1168,7 +1170,7 @@ static void program_tr1(void) */ if (window_found == FALSE) { printf("ERROR: Cannot determine a common read delay.\n"); - HANG(); + spd_ddr_init_hang (); } /* @@ -1318,7 +1320,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated, printf("ERROR: Unsupported value for the banksize: %d.\n", bank_size_id); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } switch (num_col_addr) { @@ -1340,7 +1342,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated, printf("ERROR: Unsupported value for number of " "column addresses: %d.\n", num_col_addr); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } /* diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index d748daee015..626b3e69bd9 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -129,12 +129,15 @@ #define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */ #endif -#if defined(CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG) -extern void spd_ddr_init_hang (void); -#define HANG() spd_ddr_init_hang() -#else -#define HANG() hang() -#endif +/* + * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed + */ +void __spd_ddr_init_hang (void) +{ + hang (); +} +void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))); + /* Private Structure Definitions */ @@ -589,7 +592,7 @@ static void get_spd_info(unsigned long *dimm_populated, if (dimm_found == FALSE) { printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } } @@ -636,42 +639,42 @@ static void check_mem_type(unsigned long *dimm_populated, "slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; case 2: printf("ERROR: EDO DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; case 3: printf("ERROR: Pipelined Nibble DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; case 4: printf("ERROR: SDRAM DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; case 5: printf("ERROR: Multiplexed ROM DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; case 6: printf("ERROR: SGRAM DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; case 7: debug("DIMM slot %d: DDR1 SDRAM detected\n", dimm_num); @@ -686,7 +689,7 @@ static void check_mem_type(unsigned long *dimm_populated, (unsigned int)dimm_num); printf("Only DDR1 and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; } } @@ -696,7 +699,7 @@ static void check_mem_type(unsigned long *dimm_populated, && (dimm_populated[dimm_num] != SDRAM_NONE) && (dimm_populated[dimm_num-1] != dimm_populated[dimm_num])) { printf("ERROR: DIMM's DDR1 and DDR2 type can not be mixed.\n"); - HANG(); + spd_ddr_init_hang (); } } } @@ -771,7 +774,7 @@ static void check_frequency(unsigned long *dimm_populated, (unsigned int)(calc_cycle_time*10)); printf("Replace the DIMM, or change DDR frequency via " "strapping bits.\n\n"); - HANG(); + spd_ddr_init_hang (); } } } @@ -803,7 +806,7 @@ static void check_rank_number(unsigned long *dimm_populated, "slot %d is not supported.\n", dimm_rank, dimm_num); printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } else total_rank += dimm_rank; } @@ -812,7 +815,7 @@ static void check_rank_number(unsigned long *dimm_populated, "for all slots.\n", (unsigned int)total_rank); printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS); printf("Remove one of the DIMM modules.\n\n"); - HANG(); + spd_ddr_init_hang (); } } } @@ -837,28 +840,28 @@ static void check_voltage_type(unsigned long *dimm_populated, printf("This DIMM is 5.0 Volt/TTL.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - HANG(); + spd_ddr_init_hang (); break; case 0x01: printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("This DIMM is LVTTL.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - HANG(); + spd_ddr_init_hang (); break; case 0x02: printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("This DIMM is 1.5 Volt.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - HANG(); + spd_ddr_init_hang (); break; case 0x03: printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("This DIMM is 3.3 Volt/TTL.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - HANG(); + spd_ddr_init_hang (); break; case 0x04: /* 2.5 Voltage only for DDR1 */ @@ -870,7 +873,7 @@ static void check_voltage_type(unsigned long *dimm_populated, printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - HANG(); + spd_ddr_init_hang (); break; } } @@ -1013,13 +1016,13 @@ static void program_copt1(unsigned long *dimm_populated, if ((dimm_populated[0] != SDRAM_NONE) && (dimm_populated[1] != SDRAM_NONE)) { if (buf0 != buf1) { printf("ERROR: DIMM's buffered/unbuffered, registered, clocking don't match.\n"); - HANG(); + spd_ddr_init_hang (); } } if ((dimm_64bit == TRUE) && (dimm_32bit == TRUE)) { printf("ERROR: Cannot mix 32 bit and 64 bit DDR-SDRAM DIMMs together.\n"); - HANG(); + spd_ddr_init_hang (); } else if ((dimm_64bit == TRUE) && (dimm_32bit == FALSE)) { mcopt1 |= SDRAM_MCOPT1_DMWD_64; @@ -1027,7 +1030,7 @@ static void program_copt1(unsigned long *dimm_populated, mcopt1 |= SDRAM_MCOPT1_DMWD_32; } else { printf("ERROR: Please install only 32 or 64 bit DDR-SDRAM DIMMs.\n\n"); - HANG(); + spd_ddr_init_hang (); } if (ecc_enabled == TRUE) @@ -1216,7 +1219,7 @@ static void program_initplr(unsigned long *dimm_populated, break; default: printf("ERROR: ucode error on selected_cas value %d", selected_cas); - HANG(); + spd_ddr_init_hang (); break; } @@ -1248,7 +1251,7 @@ static void program_initplr(unsigned long *dimm_populated, break; default: printf("ERROR: write recovery not support (%d)", write_recovery); - HANG(); + spd_ddr_init_hang (); break; } #else @@ -1266,7 +1269,7 @@ static void program_initplr(unsigned long *dimm_populated, ods = ODS_REDUCED; } else { printf("ERROR: Unsupported number of DIMM's (%d)", total_dimm); - HANG(); + spd_ddr_init_hang (); } mr = CMD_EMR | SELECT_MR | BURST_LEN_4 | wr | cas; @@ -1291,7 +1294,7 @@ static void program_initplr(unsigned long *dimm_populated, mtsdram(SDRAM_INITPLR13, 0x80800000 | emr); /* EMR OCD Exit */ } else { printf("ERROR: ucode error as unknown DDR type in program_initplr"); - HANG(); + spd_ddr_init_hang (); } } @@ -1396,7 +1399,7 @@ static void program_mode(unsigned long *dimm_populated, } else { printf("ERROR: SPD reported Tcyc is incorrect for DIMM " "in slot %d\n", (unsigned int)dimm_num); - HANG(); + spd_ddr_init_hang (); } } else { /* Convert from hex to decimal */ @@ -1533,7 +1536,7 @@ static void program_mode(unsigned long *dimm_populated, printf("ERROR: Cannot find a supported CAS latency with the installed DIMMs.\n"); printf("Only DIMMs DDR1 with CAS latencies of 2.0, 2.5, and 3.0 are supported.\n"); printf("Make sure the PLB speed is within the supported range of the DIMMs.\n\n"); - HANG(); + spd_ddr_init_hang (); } } else { /* DDR2 */ debug("cas_3_0_available=%d\n", cas_3_0_available); @@ -1556,7 +1559,7 @@ static void program_mode(unsigned long *dimm_populated, cas_3_0_available, cas_4_0_available, cas_5_0_available); printf("sdram_freq=%d cycle3=%d cycle4=%d cycle5=%d\n\n", sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); - HANG(); + spd_ddr_init_hang (); } } @@ -1665,7 +1668,7 @@ static void program_rtr(unsigned long *dimm_populated, printf("ERROR: DIMM %d unsupported refresh rate/type.\n", (unsigned int)dimm_num); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; } @@ -2073,7 +2076,7 @@ static void program_bxcf(unsigned long *dimm_populated, printf("ERROR: Unsupported value for number of " "column addresses: %d.\n", (unsigned int)num_col_addr); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } } @@ -2155,7 +2158,7 @@ static void program_memory_queue(unsigned long *dimm_populated, printf("ERROR: Unsupported value for the banksize: %d.\n", (unsigned int)rank_size_id); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } if ((dimm_populated[dimm_num] != SDRAM_NONE) && (dimm_num == 1)) @@ -2700,7 +2703,7 @@ calibration_loop: printf("\nERROR: Cannot determine a common read delay for the " "DIMM(s) installed.\n"); debug("%s[%d] ERROR : \n", __FUNCTION__,__LINE__); - HANG(); + spd_ddr_init_hang (); } blank_string(strlen(str)); @@ -2856,7 +2859,7 @@ static void test(void) if (window_found == FALSE) { printf("ERROR: Cannot determine a common read delay for the " "DIMM(s) installed.\n"); - HANG(); + spd_ddr_init_hang (); } /*------------------------------------------------------------------ diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index d4718088213..c2b5cb8f9f5 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -125,7 +125,6 @@ #undef CONFIG_DDR_ECC /* don't use ECC */ #define SPD_EEPROM_ADDRESS {0x50} #define CONFIG_PROG_SDRAM_TLB 1 -#define CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG 1 /*----------------------------------------------------------------------- * I2C -- cgit v1.3.1 From 4ef218f6fdf8d747f4589da5252b004e7d2c2876 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 10 Jul 2007 00:01:28 +0200 Subject: Coding style cleanup; update CHANGELOG. Signed-off-by: Wolfgang Denk --- CHANGELOG | 369 ++++++++++++++++++++++++++++ board/esd/cpci405/cpci405.c | 68 ++---- board/pcs440ep/pcs440ep.c | 16 +- cpu/ppc4xx/start.S | 2 +- include/configs/pcs440ep.h | 4 +- include/sha1.h | 50 ++-- lib_generic/sha1.c | 569 +++++++++++++++++++++----------------------- post/cpu/ppc4xx/cache_4xx.S | 2 +- post/cpu/ppc4xx/fpu.c | 2 +- post/cpu/ppc4xx/spr.c | 13 +- tools/ubsha1.c | 9 +- 11 files changed, 716 insertions(+), 388 deletions(-) (limited to 'include') diff --git a/CHANGELOG b/CHANGELOG index e3c21f9bd89..2397191fc97 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,133 @@ +commit f1152f8c28db4a22087c21c618a3f7baa48e9a4f +Author: Wolfgang Denk +Date: Fri Jul 6 02:50:19 2007 +0200 + + Code cleanup and default config update for STC GP3 SSA board. + + Signed-off-by: Wolfgang Denk + +commit b44896215a09c60fa40cae906f7ed207bbc2c492 +Author: Sergei Poselenov +Date: Thu Jul 5 08:17:37 2007 +0200 + + Merged POST framework with the current TOT. + + Signed-off-by: Sergei Poselenov + +commit f780b83316d9af1f61d71cc88b1917b387b9b995 +Author: Niklaus Giger +Date: Wed Jun 27 18:11:38 2007 +0200 + + resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX + + Signed-off-by: Niklaus Giger + +commit 04e6c38b766eaa2f3287561563c9e215e0c3a0d4 +Author: Stefan Roese +Date: Wed Jul 4 10:06:30 2007 +0200 + + ppc4xx: Update lwmon5 board + + - Add optional ECC generation routine to preserve existing + RAM values. This is needed for the Linux log-buffer support + - Add optional DDR2 setup with CL=4 + - GPIO50 not used anymore + - Lime register setup added + + Signed-off-by: Stefan Roese + +commit 1f2a05898658900dc5717761e27abf2052e67e13 +Author: Mushtaq Khan +Date: Sat Jun 30 18:50:48 2007 +0200 + + Fix S-ATA support. + + Signed-off-by: mushtaq khan + +commit a5d71e290f3673269be8eefb4ec44f53412f9461 +Author: Heiko Schocher +Date: Mon Jun 25 19:11:37 2007 +0200 + + [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG + + Signed-off-by: Heiko Schocher + +commit a1bd6200eccd3a02040a955d5f43d3ee1fc9f93b +Author: Niklaus Giger +Date: Mon Jun 25 17:03:13 2007 +0200 + + ppc4xx: PPC440EPx Emit DDR0 registers on machine check interrupt + + This patch prints the DDR status registers upon machine check + interrupt on the 440EPx/GRx. This can be useful especially when + ECC support is enabled. + + I added some small changes to the original patch from Niklaus to + make it compile clean. + + Signed-off-by: Niklaus Giger + Signed-off-by: Stefan Roese + +commit 807018fb7faceb429ce0cb47baa2073746b33a4e +Author: Niklaus Giger +Date: Mon Jun 25 16:50:55 2007 +0200 + + ppc4xx: Fix O=buildir builds + + This patch fixes the problem to assemble cpu/ppc4xx/start.S + experienced last week where building failed having specified + O=../build.sequoia. + + Signed-off-by: Niklaus Giger + +commit 466fff1a7bb5fe764a06450626f6098219f446b8 +Author: Stefan Roese +Date: Mon Jun 25 15:57:39 2007 +0200 + + ppc4xx: Add pci_pre_init() for 405 boards + + This patch removes the CFG_PCI_PRE_INIT option completely, since + it's not needed anymore with the patch from Matthias Fuchs with + the "weak" pci_pre_init() implementation. + + Signed-off-by: Stefan Roese + +commit 6f35c53166213c24a5a0e2390ed861136ff73870 +Author: Matthias Fuchs +Date: Sun Jun 24 17:41:21 2007 +0200 + + ppc4xx: Maintenance patch for esd's CPCI405 derivats + + -add pci_pre_init() for pci interrupt fixup code + -disable phy sleep mode via reset_phy() function + -use correct io accessors + -cleanup + + Signed-off-by: Matthias Fuchs + +commit 5a1c9ff0c44305b57cb4d8f9369bba90bcf0e1f8 +Author: Matthias Fuchs +Date: Sun Jun 24 17:23:41 2007 +0200 + + ppc4xx: Add pci_pre_init() for 405 boards + + This patch adds support for calling a plattform dependant + pci_pre_init() function for 405 boards. This can be used to + move the current pci_405gp_fixup_irq() function into the + board code. + + This patch also makes the CFG_PCI_PRE_INIT define obsolete. + A default function with 'weak' attribute is used when + a board specific pci_pre_init() is not implemented. + + Signed-off-by: Matthias Fuchs + +commit 1636d1c8529c006d106287cfbc20cd0a246fe1cb +Author: Wolfgang Denk +Date: Fri Jun 22 23:59:00 2007 +0200 + + Coding stylke cleanup; rebuild CHANGELOG + commit 2dc64451b4c08ffd619372abfdc2506a2e2363b9 Author: Igor Lisitsin Date: Wed Apr 18 14:55:19 2007 +0400 @@ -22,6 +152,34 @@ Date: Wed Mar 28 19:06:19 2007 +0400 Signed-off-by: Igor Lisitsin -- +commit 566a494f592ae3b3c0785d90d4e1ba45574880c4 +Author: Heiko Schocher +Date: Fri Jun 22 19:11:54 2007 +0200 + + [PCS440EP] upgrade the PCS440EP board: + - Show on the Status LEDs, some States of the board. + - Get the MAC addresses from the EEProm + - use PREBOOT + - use the CF on the board. + - check the U-Boot image in the Flash with a SHA1 + checksum. + - use dynamic TLB entries generation for the SDRAM + + Signed-off-by: Heiko Schocher + +commit 3a1f5c81b0b9557817a789bece839905581c2205 +Author: Stefan Roese +Date: Fri Jun 22 16:58:40 2007 +0200 + + ppc4xx: Fix problem with extended program_tlb() funtion + + The recently extended program_tlb() function had a problem when + multiple TLB's had to be setup (for example with 512MB of SDRAM). The + virtual address was not incremented. This patch fixes this issue + and is tested on Katmai with 512MB SDRAM. + + Signed-off-by: Stefan Roese + commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f Author: Rafal Jaworowski Date: Fri Jun 22 14:58:04 2007 +0200 @@ -526,6 +684,14 @@ Date: Thu May 24 08:22:09 2007 +0200 Signed-off-by: Stefan Roese +commit 822d55365bb557e084d0e33625a6dedcc866110b +Author: Jon Loeliger +Date: Wed May 23 14:09:46 2007 -0500 + + Add LIST_86xx MAKEALL target for PowerPC builds. + + Signed-off-by: Jon Loeliger + commit 9f0077abd69f7a7c756a915b961037302be3e6f2 Author: Stefan Roese Date: Tue May 22 12:48:09 2007 +0200 @@ -574,6 +740,17 @@ Date: Fri May 18 14:33:11 2007 +0100 Makefile permissions +commit 255a3577c848706441daee0174543efe205a77f8 +Author: Kim Phillips +Date: Wed May 16 16:52:19 2007 -0500 + + Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx + + For all practical u-boot purposes, TSECs don't differ throughout the + mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. + + Signed-off-by: Kim Phillips + commit 70124c2602ae2d4c5d3dba05b482d91548242de8 Author: Stefano Babic Date: Wed May 16 14:49:12 2007 +0200 @@ -615,6 +792,109 @@ Date: Wed May 16 00:13:33 2007 +0200 Coding Style Cleanup, new CHANGELOG +commit 3162eb836903c8b247fdc7470dd39bfa6996f495 +Author: Wolfgang Denk +Date: Tue May 15 23:38:05 2007 +0200 + + Minor coding style cleanup. + +commit 66d9dbec1cc27d6398ee6cf84639dbe14971251e +Author: mushtaq khan +Date: Fri Apr 20 14:23:02 2007 +0530 + + Add driver for S-ATA-controller on Intel processors with South + Bridge, ICH-5, ICH-6 and ICH-7. + + Implementation: + + 1. Code is divided in to two files. All functions, which are + controller specific are kept in "drivers/ata_piix.c" file and + functions, which are not controller specific, are kept in + "common/cmd_sata.c" file. + + 2. Reading and Writing from the S-ATA drive is done using PIO method. + + 3. Driver can be configured for 48-bit addressing by defining macro + CONFIG_LBA48, if this macro is not defined driver uses the 28-bit + addressing. + + 4. S-ATA read function is hooked to the File system, commands like + ext2ls and ext2load file can be used. This has been tested. + + 5. U-Boot command "SATA_init" is added, which initializes the S-ATA + controller and identifies the S-ATA drives connected to it. + + 6. U-Boot command "sata" is added, which is used to read/write, print + partition table and get info about the drives present. This I have + implemented in same way as "ide" command is implemented in U-Boot. + + 7. This driver is for S-ATA in native mode. + + 8. This driver does not support the Native command queuing and + Hot-plugging. + + Signed-off-by: Mushtaq Khan + +commit 644e6fb4eb8be90ea04ba34b643a8bf019d680e0 +Author: mushtaq khan +Date: Mon Apr 30 15:57:22 2007 +0530 + + Fixes bug clearing the bss section for i386 + + Hi, + There is a bug in the code of clearing the bss section for processor + i386.(File: cpu/i386/start.S) + In the code, bss_start addr (starting addr of bss section) is put into + the register %eax, but the code which clears the bss section refers to + the addr pointed by %edi. + + This patch fixes this bug by putting bss_start into %edi register. + + Signed-off-by: Mushtaq Khan + +commit c3243cf7b490057277d61acffe4ad0946f9eb4a4 +Author: Joe Hamman +Date: Mon Apr 30 16:47:28 2007 -0500 + + Add support for BCM5464 Quad Phy + + Added support for Broadcom's BCM5464 Quad Phy + + Signed-off-by: Joe Hamman + +commit 1b305bdc754c8468e1d5d858f5dcf8a7a0a4bb7a +Author: Zang Roy-r61911 +Date: Wed May 9 08:10:57 2007 +0800 + + Search the exception table with linear algorithm + + Search the exception table with linear algorithm instead of + bisecting algorithm. + Because the exception table might be unsorted. + + Signed-off-by: Roy Zang + +commit 5dfaa50eb819686bfba1927e8c5b8a70a4d65fd3 +Author: Aubrey.Li +Date: Mon May 14 11:47:35 2007 +0800 + + Fix compilation issues on MACOSX + + Singed-off-by: Marc Hoffman + Signed-off-by: Aubrey Li + +commit 56fd7162985c412317bbf763a225fba23c64fd31 +Author: Stephen Williams +Date: Tue May 15 07:55:42 2007 -0700 + + Fix for compile of JSE target + + The attached patch fixes the compile of the JSE board in the + denx git as of 14 may 2007. It is an extremely simple patch, + it just adds the missing define of CFG_SYSTEMACE_WIDTH. + + Fix to compile JSE against 20070514 git of u-boot + commit 61936667e86a250ae12fd2dc189d3588f0a59e0b Author: Stefan Roese Date: Fri May 11 12:01:49 2007 +0200 @@ -954,6 +1234,20 @@ Date: Sat May 5 08:29:01 2007 +0200 Signed-off-by: Stefan Roese +commit 2f550ab976405300f5b07bf2890800840d0aa05f +Author: Timur Tabi +Date: Sat May 5 08:12:30 2007 +0200 + + 5xxx: write MAC address to mac-address and local-mac-address + + Some device trees have a mac-address property, some have local-mac-address, + and some have both. To support all of these device trees, ftp_cpu_setup() + should write the MAC address to mac-address and local-mac-address, if they + exist. + + Signed-off-by: Timur Tabi + Acked-by: Grant Likely + commit a79886590593ba1d667c840caa4940c61639f18f Author: Thomas Knobloch Date: Sat May 5 07:04:42 2007 +0200 @@ -1117,12 +1411,35 @@ Date: Sun Apr 29 14:13:01 2007 +0200 Signed-off-by: Stefan Roese +commit 864aa6a6a466fcb92bf32b1d7dba79cd709b52c9 +Author: Grzegorz Wianecki +Date: Sun Apr 29 14:01:54 2007 +0200 + + [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message + + MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up + message. Use PVR to distinguish between the two variants, and print proper CPU + information. + + Signed-off-by: Grzegorz Wianecki + Signed-off-by: Bartlomiej Sieka + Signed-off-by: Grant Likely + commit 5c5d3242935cf3543af01142627494434834cf98 Author: Kim Phillips Date: Wed Apr 25 12:34:38 2007 -0500 mpc83xx: minor fixups for 8313rdb introduction +commit ada4d40091f6ed4a4f0040e08d20db21967e4a67 +Author: Ladislav Michl +Date: Wed Apr 25 16:01:26 2007 +0200 + + [PATCH] simplify silent console + + Signed-off-by: Ladislav Michl + Acked-by: Stefan Roese + commit 144876a380f5756f57412caf74c1d6dc201dd796 Author: Michal Simek Date: Tue Apr 24 23:01:02 2007 +0200 @@ -1419,6 +1736,58 @@ Date: Mon Apr 16 14:31:55 2007 -0500 Signed-off-by: Scott Wood +commit 7fc4c71a143be8666d70803fb25ae60379c95622 +Author: Stefan Roese +Date: Mon Apr 23 15:39:59 2007 +0200 + + Fix file mode + + Signed-off-by: Stefan Roese + +commit 38257988abfe74d459ca2ad748b109ca04e4efe1 +Author: Sergei Shtylyov +Date: Mon Apr 23 15:30:39 2007 +0200 + + [PATCH] Avoid assigning PCI resources from zero address + + If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE + core complains and IDE drivers fails to work. Also, assigning zero to a BAR + was illegal according to PCI 2.1 (the later revisions seem to have excluded the + sentence about "0" being considered an invalid address) -- so, use a reasonable + starting value of 0x1000 (that's what the most Linux archs are using). + + Alternatively, one might have fixed the calls to pci_set_region() individually + (some code even seems to have taken care of this issue) but that would have + been a lot more work. :-) + + Signed-off-by: Sergei Shtylyov + Acked-by: Stefan Roese + +commit afb903a2eb9436baa9270ccc0c27082d86497d89 +Author: Jeffrey Mann +Date: Mon Apr 23 14:00:11 2007 +0200 + + [patch] setenv(...) can delete environmentalvariables + + update setenv() function so that entering a NULL value for the + variable's value will delete the environmental variable + + Signed-off-by: Jeffrey Mann + Acked-by: Stefan Roese + +commit 36f104e5caa747d568eff26b369565af57c2ffa6 +Author: Mike Frysinger +Date: Mon Apr 23 13:54:24 2007 +0200 + + [patch] use unsigned char in smc91111 driver for mac + + the v_mac variable in the smc91111 driver is declared as a signed char ... + this causes problems when one of the bytes in the MAC is "signed" like 0xE0 + because when it gets printed out, you get a display like: + 0xFFFFFFE0 and that's no good + + Signed-off-by: Mike Frysinger + commit 323bfa8f436dc3bc57187c9b1488bc3146ff1522 Author: Stefan Roese Date: Mon Apr 23 12:00:22 2007 +0200 diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 2ed0fc27220..69cb8cef562 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; -extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/ #if 0 #define FPGA_DEBUG #endif @@ -54,8 +54,6 @@ const unsigned char fpgadata[] = * include common fpga code (for esd boards) */ #include "../common/fpga.c" - - #include "../common/auto_update.h" #ifdef CONFIG_CPCI405AB @@ -88,13 +86,11 @@ au_image_t au_image[] = { int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0])); - /* Prototypes */ int cpci405_version(void); int gunzip(void *, int, unsigned char *, unsigned long *); void lxt971_no_sleep(void); - int board_early_init_f (void) { #ifndef CONFIG_CPCI405_VER2 @@ -113,10 +109,10 @@ int board_early_init_f (void) /* * First pull fpga-prg pin low, to disable fpga logic (on version 2 board) */ - out32(GPIO0_ODR, 0x00000000); /* no open drain pins */ - out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */ + out32(GPIO0_ODR, 0x00000000); /* no open drain pins */ + out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */ out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */ - out32(GPIO0_OR, 0); /* pull prg low */ + out32(GPIO0_OR, 0); /* pull prg low */ /* * Boot onboard FPGA @@ -178,51 +174,48 @@ int board_early_init_f (void) * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive */ - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ - mtdcr(uicer, 0x00000000); /* disable all ints */ - mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr(uicer, 0x00000000); /* disable all ints */ + mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ #ifdef CONFIG_CPCI405_6U if (cpci405_version() == 3) { - mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */ + mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */ } else { - mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */ + mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */ } #else - mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */ + mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */ #endif - mtdcr(uictr, 0x10000000); /* set int trigger levels */ - mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr(uictr, 0x10000000); /* set int trigger levels */ + mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ return 0; } - /* ------------------------------------------------------------------------- */ int ctermm2(void) { #ifdef CONFIG_CPCI405_VER2 - return 0; /* no, board is cpci405 */ + return 0; /* no, board is cpci405 */ #else if ((*(unsigned char *)0xf0000400 == 0x00) && (*(unsigned char *)0xf0000401 == 0x01)) - return 0; /* no, board is cpci405 */ + return 0; /* no, board is cpci405 */ else - return -1; /* yes, board is cterm-m2 */ + return -1; /* yes, board is cterm-m2 */ #endif } - int cpci405_host(void) { if (mfdcr(strap) & PSR_PCI_ARBIT_EN) - return -1; /* yes, board is cpci405 host */ + return -1; /* yes, board is cpci405 host */ else - return 0; /* no, board is cpci405 adapter */ + return 0; /* no, board is cpci405 adapter */ } - int cpci405_version(void) { unsigned long cntrl0Reg; @@ -235,8 +228,8 @@ int cpci405_version(void) mtdcr(cntrl0, cntrl0Reg | 0x03000000); out_be32((void*)GPIO0_ODR, in_be32((void*)GPIO0_ODR) & ~0x00180000); out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) & ~0x00180000); - udelay(1000); /* wait some time before reading input */ - value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */ + udelay(1000); /* wait some time before reading input */ + value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */ /* * Restore GPIO settings @@ -262,13 +255,11 @@ int cpci405_version(void) } } - int misc_init_f (void) { return 0; /* dummy implementation */ } - int misc_init_r (void) { unsigned long cntrl0Reg; @@ -432,7 +423,6 @@ int misc_init_r (void) return (0); } - /* * Check Board Identity: */ @@ -488,7 +478,7 @@ int checkboard (void) } #ifndef CONFIG_CPCI405_VER2 - puts ("\nFPGA: "); + puts ("\nFPGA: "); /* display infos on fpgaimage */ index = 15; @@ -515,7 +505,6 @@ long int initdram (int board_type) return (4*1024*1024 << ((val & 0x000e0000) >> 17)); } - void reset_phy(void) { #ifdef CONFIG_LXT971_NO_SLEEP @@ -527,7 +516,6 @@ void reset_phy(void) #endif } - /* ------------------------------------------------------------------------- */ #ifdef CONFIG_CPCI405_VER2 @@ -550,7 +538,6 @@ void ide_set_reset(int on) #endif /* CONFIG_IDE_RESET */ #endif /* CONFIG_CPCI405_VER2 */ - #if defined(CONFIG_PCI) void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev) { @@ -585,14 +572,13 @@ int pci_pre_init(struct pci_controller *hose) #endif /* defined(CONFIG_PCI) */ - #ifdef CONFIG_CPCI405AB -#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \ +#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \ |= CFG_FPGA_MODE_1WIRE_DIR) -#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \ +#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \ &= ~CFG_FPGA_MODE_1WIRE_DIR) -#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \ +#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \ & CFG_FPGA_MODE_1WIRE) /* @@ -615,7 +601,6 @@ int OWTouchReset(void) return result; } - /* * Send 1 a 1-wire write bit. * Provide 10us recovery time. @@ -641,7 +626,6 @@ void OWWriteBit(int bit) } } - /* * Read a bit from the 1-wire bus and return it. * Provide 10us recovery time. @@ -661,7 +645,6 @@ int OWReadBit(void) return result; } - void OWWriteByte(int data) { int loop; @@ -672,7 +655,6 @@ void OWWriteByte(int data) } } - int OWReadByte(void) { int loop, result = 0; @@ -687,7 +669,6 @@ int OWReadByte(void) return result; } - int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { volatile unsigned short val; @@ -728,7 +709,6 @@ U_BOOT_CMD( NULL ); - #define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */ #define CFG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/ diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index da907fbc345..ada6b82c927 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -197,14 +197,13 @@ void load_sernum_ethaddr (void) * - The checksum, stored in the last 2 Bytes, is correct */ if ((strncmp (buf,"ATR",3) != 0) || - ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) || - ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) - { + ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) || + ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) { /* EEprom is not programmed */ printf("%s: EEPROM Checksum not OK\n", __FUNCTION__); } else { /* get the MACs */ - sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x", + sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x", buf[3], buf[4], buf[5], @@ -212,7 +211,7 @@ void load_sernum_ethaddr (void) buf[7], buf[8]); setenv ("ethaddr", (char *) mac); - sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x", + sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x", buf[9], buf[10], buf[11], @@ -378,7 +377,7 @@ static int pcs440ep_sha1 (int docheck) org[i] = ptroff[i]; ptroff[i] = 0; } - + sha1_csum ((unsigned char *) data, len, (unsigned char *)output); if (docheck == 2) { @@ -796,7 +795,7 @@ int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) unsigned char output[20]; int len; int i; - + data = (unsigned char *)simple_strtoul (argv[1], NULL, 16); len = simple_strtoul (argv[2], NULL, 16); sha1_csum (data, len, (unsigned char *)output); @@ -823,7 +822,7 @@ int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } else { rcode = pcs440ep_sha1 (0); } - return rcode; + return rcode; } return rcode; } @@ -861,4 +860,3 @@ void ide_set_reset (int idereset) udelay (10000); } #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */ - diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 6086b6ceae4..8ecaaea4d9a 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1222,7 +1222,7 @@ mck_return: */ #ifdef CONFIG_440 .globl dcache_disable - .globl icache_disable + .globl icache_disable .globl icache_enable dcache_disable: icache_disable: diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 0e83e4881a4..69d97d66ea1 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -480,9 +480,9 @@ /* Offset for alternate registers */ #define CFG_ATA_ALT_OFFSET (0x0000) -/* This addresses need to be shifted one place to the left +/* These addresses need to be shifted one place to the left * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0) - * This values are shifted + * These values are shifted */ #define CFG_ATA_PORT_ADDR(port) ((port) << 1) diff --git a/include/sha1.h b/include/sha1.h index 3030f2975f2..15ea13cd3a7 100644 --- a/include/sha1.h +++ b/include/sha1.h @@ -17,7 +17,7 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA + * MA 02110-1301 USA */ /* * The SHA-1 standard was published by NIST in 1993. @@ -35,76 +35,76 @@ extern "C" { #define SHA1_SUM_LEN 20 /** - * \brief SHA-1 context structure + * \brief SHA-1 context structure */ typedef struct { - unsigned long total[2]; /*!< number of bytes processed */ - unsigned long state[5]; /*!< intermediate digest state */ - unsigned char buffer[64]; /*!< data block being processed */ + unsigned long total[2]; /*!< number of bytes processed */ + unsigned long state[5]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ } sha1_context; /** - * \brief SHA-1 context setup + * \brief SHA-1 context setup * - * \param ctx SHA-1 context to be initialized + * \param ctx SHA-1 context to be initialized */ void sha1_starts( sha1_context *ctx ); /** - * \brief SHA-1 process buffer + * \brief SHA-1 process buffer * - * \param ctx SHA-1 context + * \param ctx SHA-1 context * \param input buffer holding the data - * \param ilen length of the input data + * \param ilen length of the input data */ void sha1_update( sha1_context *ctx, unsigned char *input, int ilen ); /** - * \brief SHA-1 final digest + * \brief SHA-1 final digest * - * \param ctx SHA-1 context + * \param ctx SHA-1 context * \param output SHA-1 checksum result */ void sha1_finish( sha1_context *ctx, unsigned char output[20] ); /** - * \brief Output = SHA-1( input buffer ) + * \brief Output = SHA-1( input buffer ) * * \param input buffer holding the data - * \param ilen length of the input data + * \param ilen length of the input data * \param output SHA-1 checksum result */ void sha1_csum( unsigned char *input, int ilen, - unsigned char output[20] ); + unsigned char output[20] ); /** - * \brief Output = SHA-1( file contents ) + * \brief Output = SHA-1( file contents ) * - * \param path input file name + * \param path input file name * \param output SHA-1 checksum result - * \return 0 if successful, or 1 if fopen failed + * \return 0 if successful, or 1 if fopen failed */ int sha1_file( char *path, unsigned char output[20] ); /** - * \brief Output = HMAC-SHA-1( input buffer, hmac key ) + * \brief Output = HMAC-SHA-1( input buffer, hmac key ) * - * \param key HMAC secret key + * \param key HMAC secret key * \param keylen length of the HMAC key * \param input buffer holding the data - * \param ilen length of the input data + * \param ilen length of the input data * \param output HMAC-SHA-1 result */ void sha1_hmac( unsigned char *key, int keylen, - unsigned char *input, int ilen, - unsigned char output[20] ); + unsigned char *input, int ilen, + unsigned char output[20] ); /** - * \brief Checkup routine + * \brief Checkup routine * - * \return 0 if successful, or 1 if the test failed + * \return 0 if successful, or 1 if the test failed */ int sha1_self_test( void ); diff --git a/lib_generic/sha1.c b/lib_generic/sha1.c index 0522d7ce67f..08ffa6b9bac 100644 --- a/lib_generic/sha1.c +++ b/lib_generic/sha1.c @@ -36,103 +36,99 @@ * 32-bit integer manipulation macros (big endian) */ #ifndef GET_UINT32_BE -#define GET_UINT32_BE(n,b,i) \ -{ \ - (n) = ( (unsigned long) (b)[(i) ] << 24 ) \ - | ( (unsigned long) (b)[(i) + 1] << 16 ) \ - | ( (unsigned long) (b)[(i) + 2] << 8 ) \ - | ( (unsigned long) (b)[(i) + 3] ); \ +#define GET_UINT32_BE(n,b,i) { \ + (n) = ( (unsigned long) (b)[(i) ] << 24 ) \ + | ( (unsigned long) (b)[(i) + 1] << 16 ) \ + | ( (unsigned long) (b)[(i) + 2] << 8 ) \ + | ( (unsigned long) (b)[(i) + 3] ); \ } #endif #ifndef PUT_UINT32_BE -#define PUT_UINT32_BE(n,b,i) \ -{ \ - (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ - (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ - (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ - (b)[(i) + 3] = (unsigned char) ( (n) ); \ +#define PUT_UINT32_BE(n,b,i) { \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ } #endif /* * SHA-1 context setup */ -void sha1_starts( sha1_context *ctx ) +void sha1_starts (sha1_context * ctx) { - ctx->total[0] = 0; - ctx->total[1] = 0; - - ctx->state[0] = 0x67452301; - ctx->state[1] = 0xEFCDAB89; - ctx->state[2] = 0x98BADCFE; - ctx->state[3] = 0x10325476; - ctx->state[4] = 0xC3D2E1F0; + ctx->total[0] = 0; + ctx->total[1] = 0; + + ctx->state[0] = 0x67452301; + ctx->state[1] = 0xEFCDAB89; + ctx->state[2] = 0x98BADCFE; + ctx->state[3] = 0x10325476; + ctx->state[4] = 0xC3D2E1F0; } -static void sha1_process( sha1_context *ctx, unsigned char data[64] ) +static void sha1_process (sha1_context * ctx, unsigned char data[64]) { - unsigned long temp, W[16], A, B, C, D, E; - - GET_UINT32_BE( W[0], data, 0 ); - GET_UINT32_BE( W[1], data, 4 ); - GET_UINT32_BE( W[2], data, 8 ); - GET_UINT32_BE( W[3], data, 12 ); - GET_UINT32_BE( W[4], data, 16 ); - GET_UINT32_BE( W[5], data, 20 ); - GET_UINT32_BE( W[6], data, 24 ); - GET_UINT32_BE( W[7], data, 28 ); - GET_UINT32_BE( W[8], data, 32 ); - GET_UINT32_BE( W[9], data, 36 ); - GET_UINT32_BE( W[10], data, 40 ); - GET_UINT32_BE( W[11], data, 44 ); - GET_UINT32_BE( W[12], data, 48 ); - GET_UINT32_BE( W[13], data, 52 ); - GET_UINT32_BE( W[14], data, 56 ); - GET_UINT32_BE( W[15], data, 60 ); - -#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n))) - -#define R(t) \ -( \ - temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \ - W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \ - ( W[t & 0x0F] = S(temp,1) ) \ + unsigned long temp, W[16], A, B, C, D, E; + + GET_UINT32_BE (W[0], data, 0); + GET_UINT32_BE (W[1], data, 4); + GET_UINT32_BE (W[2], data, 8); + GET_UINT32_BE (W[3], data, 12); + GET_UINT32_BE (W[4], data, 16); + GET_UINT32_BE (W[5], data, 20); + GET_UINT32_BE (W[6], data, 24); + GET_UINT32_BE (W[7], data, 28); + GET_UINT32_BE (W[8], data, 32); + GET_UINT32_BE (W[9], data, 36); + GET_UINT32_BE (W[10], data, 40); + GET_UINT32_BE (W[11], data, 44); + GET_UINT32_BE (W[12], data, 48); + GET_UINT32_BE (W[13], data, 52); + GET_UINT32_BE (W[14], data, 56); + GET_UINT32_BE (W[15], data, 60); + +#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n))) + +#define R(t) ( \ + temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \ + W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \ + ( W[t & 0x0F] = S(temp,1) ) \ ) -#define P(a,b,c,d,e,x) \ -{ \ - e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \ +#define P(a,b,c,d,e,x) { \ + e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \ } - A = ctx->state[0]; - B = ctx->state[1]; - C = ctx->state[2]; - D = ctx->state[3]; - E = ctx->state[4]; + A = ctx->state[0]; + B = ctx->state[1]; + C = ctx->state[2]; + D = ctx->state[3]; + E = ctx->state[4]; #define F(x,y,z) (z ^ (x & (y ^ z))) #define K 0x5A827999 - P( A, B, C, D, E, W[0] ); - P( E, A, B, C, D, W[1] ); - P( D, E, A, B, C, W[2] ); - P( C, D, E, A, B, W[3] ); - P( B, C, D, E, A, W[4] ); - P( A, B, C, D, E, W[5] ); - P( E, A, B, C, D, W[6] ); - P( D, E, A, B, C, W[7] ); - P( C, D, E, A, B, W[8] ); - P( B, C, D, E, A, W[9] ); - P( A, B, C, D, E, W[10] ); - P( E, A, B, C, D, W[11] ); - P( D, E, A, B, C, W[12] ); - P( C, D, E, A, B, W[13] ); - P( B, C, D, E, A, W[14] ); - P( A, B, C, D, E, W[15] ); - P( E, A, B, C, D, R(16) ); - P( D, E, A, B, C, R(17) ); - P( C, D, E, A, B, R(18) ); - P( B, C, D, E, A, R(19) ); + P (A, B, C, D, E, W[0]); + P (E, A, B, C, D, W[1]); + P (D, E, A, B, C, W[2]); + P (C, D, E, A, B, W[3]); + P (B, C, D, E, A, W[4]); + P (A, B, C, D, E, W[5]); + P (E, A, B, C, D, W[6]); + P (D, E, A, B, C, W[7]); + P (C, D, E, A, B, W[8]); + P (B, C, D, E, A, W[9]); + P (A, B, C, D, E, W[10]); + P (E, A, B, C, D, W[11]); + P (D, E, A, B, C, W[12]); + P (C, D, E, A, B, W[13]); + P (B, C, D, E, A, W[14]); + P (A, B, C, D, E, W[15]); + P (E, A, B, C, D, R (16)); + P (D, E, A, B, C, R (17)); + P (C, D, E, A, B, R (18)); + P (B, C, D, E, A, R (19)); #undef K #undef F @@ -140,26 +136,26 @@ static void sha1_process( sha1_context *ctx, unsigned char data[64] ) #define F(x,y,z) (x ^ y ^ z) #define K 0x6ED9EBA1 - P( A, B, C, D, E, R(20) ); - P( E, A, B, C, D, R(21) ); - P( D, E, A, B, C, R(22) ); - P( C, D, E, A, B, R(23) ); - P( B, C, D, E, A, R(24) ); - P( A, B, C, D, E, R(25) ); - P( E, A, B, C, D, R(26) ); - P( D, E, A, B, C, R(27) ); - P( C, D, E, A, B, R(28) ); - P( B, C, D, E, A, R(29) ); - P( A, B, C, D, E, R(30) ); - P( E, A, B, C, D, R(31) ); - P( D, E, A, B, C, R(32) ); - P( C, D, E, A, B, R(33) ); - P( B, C, D, E, A, R(34) ); - P( A, B, C, D, E, R(35) ); - P( E, A, B, C, D, R(36) ); - P( D, E, A, B, C, R(37) ); - P( C, D, E, A, B, R(38) ); - P( B, C, D, E, A, R(39) ); + P (A, B, C, D, E, R (20)); + P (E, A, B, C, D, R (21)); + P (D, E, A, B, C, R (22)); + P (C, D, E, A, B, R (23)); + P (B, C, D, E, A, R (24)); + P (A, B, C, D, E, R (25)); + P (E, A, B, C, D, R (26)); + P (D, E, A, B, C, R (27)); + P (C, D, E, A, B, R (28)); + P (B, C, D, E, A, R (29)); + P (A, B, C, D, E, R (30)); + P (E, A, B, C, D, R (31)); + P (D, E, A, B, C, R (32)); + P (C, D, E, A, B, R (33)); + P (B, C, D, E, A, R (34)); + P (A, B, C, D, E, R (35)); + P (E, A, B, C, D, R (36)); + P (D, E, A, B, C, R (37)); + P (C, D, E, A, B, R (38)); + P (B, C, D, E, A, R (39)); #undef K #undef F @@ -167,26 +163,26 @@ static void sha1_process( sha1_context *ctx, unsigned char data[64] ) #define F(x,y,z) ((x & y) | (z & (x | y))) #define K 0x8F1BBCDC - P( A, B, C, D, E, R(40) ); - P( E, A, B, C, D, R(41) ); - P( D, E, A, B, C, R(42) ); - P( C, D, E, A, B, R(43) ); - P( B, C, D, E, A, R(44) ); - P( A, B, C, D, E, R(45) ); - P( E, A, B, C, D, R(46) ); - P( D, E, A, B, C, R(47) ); - P( C, D, E, A, B, R(48) ); - P( B, C, D, E, A, R(49) ); - P( A, B, C, D, E, R(50) ); - P( E, A, B, C, D, R(51) ); - P( D, E, A, B, C, R(52) ); - P( C, D, E, A, B, R(53) ); - P( B, C, D, E, A, R(54) ); - P( A, B, C, D, E, R(55) ); - P( E, A, B, C, D, R(56) ); - P( D, E, A, B, C, R(57) ); - P( C, D, E, A, B, R(58) ); - P( B, C, D, E, A, R(59) ); + P (A, B, C, D, E, R (40)); + P (E, A, B, C, D, R (41)); + P (D, E, A, B, C, R (42)); + P (C, D, E, A, B, R (43)); + P (B, C, D, E, A, R (44)); + P (A, B, C, D, E, R (45)); + P (E, A, B, C, D, R (46)); + P (D, E, A, B, C, R (47)); + P (C, D, E, A, B, R (48)); + P (B, C, D, E, A, R (49)); + P (A, B, C, D, E, R (50)); + P (E, A, B, C, D, R (51)); + P (D, E, A, B, C, R (52)); + P (C, D, E, A, B, R (53)); + P (B, C, D, E, A, R (54)); + P (A, B, C, D, E, R (55)); + P (E, A, B, C, D, R (56)); + P (D, E, A, B, C, R (57)); + P (C, D, E, A, B, R (58)); + P (B, C, D, E, A, R (59)); #undef K #undef F @@ -194,169 +190,161 @@ static void sha1_process( sha1_context *ctx, unsigned char data[64] ) #define F(x,y,z) (x ^ y ^ z) #define K 0xCA62C1D6 - P( A, B, C, D, E, R(60) ); - P( E, A, B, C, D, R(61) ); - P( D, E, A, B, C, R(62) ); - P( C, D, E, A, B, R(63) ); - P( B, C, D, E, A, R(64) ); - P( A, B, C, D, E, R(65) ); - P( E, A, B, C, D, R(66) ); - P( D, E, A, B, C, R(67) ); - P( C, D, E, A, B, R(68) ); - P( B, C, D, E, A, R(69) ); - P( A, B, C, D, E, R(70) ); - P( E, A, B, C, D, R(71) ); - P( D, E, A, B, C, R(72) ); - P( C, D, E, A, B, R(73) ); - P( B, C, D, E, A, R(74) ); - P( A, B, C, D, E, R(75) ); - P( E, A, B, C, D, R(76) ); - P( D, E, A, B, C, R(77) ); - P( C, D, E, A, B, R(78) ); - P( B, C, D, E, A, R(79) ); + P (A, B, C, D, E, R (60)); + P (E, A, B, C, D, R (61)); + P (D, E, A, B, C, R (62)); + P (C, D, E, A, B, R (63)); + P (B, C, D, E, A, R (64)); + P (A, B, C, D, E, R (65)); + P (E, A, B, C, D, R (66)); + P (D, E, A, B, C, R (67)); + P (C, D, E, A, B, R (68)); + P (B, C, D, E, A, R (69)); + P (A, B, C, D, E, R (70)); + P (E, A, B, C, D, R (71)); + P (D, E, A, B, C, R (72)); + P (C, D, E, A, B, R (73)); + P (B, C, D, E, A, R (74)); + P (A, B, C, D, E, R (75)); + P (E, A, B, C, D, R (76)); + P (D, E, A, B, C, R (77)); + P (C, D, E, A, B, R (78)); + P (B, C, D, E, A, R (79)); #undef K #undef F - ctx->state[0] += A; - ctx->state[1] += B; - ctx->state[2] += C; - ctx->state[3] += D; - ctx->state[4] += E; + ctx->state[0] += A; + ctx->state[1] += B; + ctx->state[2] += C; + ctx->state[3] += D; + ctx->state[4] += E; } /* * SHA-1 process buffer */ -void sha1_update( sha1_context *ctx, unsigned char *input, int ilen ) +void sha1_update (sha1_context * ctx, unsigned char *input, int ilen) { - int fill; - unsigned long left; - - if( ilen <= 0 ) - return; - - left = ctx->total[0] & 0x3F; - fill = 64 - left; - - ctx->total[0] += ilen; - ctx->total[0] &= 0xFFFFFFFF; - - if( ctx->total[0] < (unsigned long) ilen ) - ctx->total[1]++; - - if( left && ilen >= fill ) - { - memcpy( (void *) (ctx->buffer + left), - (void *) input, fill ); - sha1_process( ctx, ctx->buffer ); - input += fill; - ilen -= fill; - left = 0; - } - - while( ilen >= 64 ) - { - sha1_process( ctx, input ); - input += 64; - ilen -= 64; - } - - if( ilen > 0 ) - { - memcpy( (void *) (ctx->buffer + left), - (void *) input, ilen ); - } + int fill; + unsigned long left; + + if (ilen <= 0) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if (ctx->total[0] < (unsigned long) ilen) + ctx->total[1]++; + + if (left && ilen >= fill) { + memcpy ((void *) (ctx->buffer + left), (void *) input, fill); + sha1_process (ctx, ctx->buffer); + input += fill; + ilen -= fill; + left = 0; + } + + while (ilen >= 64) { + sha1_process (ctx, input); + input += 64; + ilen -= 64; + } + + if (ilen > 0) { + memcpy ((void *) (ctx->buffer + left), (void *) input, ilen); + } } -static const unsigned char sha1_padding[64] = -{ - 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +static const unsigned char sha1_padding[64] = { + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; /* * SHA-1 final digest */ -void sha1_finish( sha1_context *ctx, unsigned char output[20] ) +void sha1_finish (sha1_context * ctx, unsigned char output[20]) { - unsigned long last, padn; - unsigned long high, low; - unsigned char msglen[8]; + unsigned long last, padn; + unsigned long high, low; + unsigned char msglen[8]; - high = ( ctx->total[0] >> 29 ) - | ( ctx->total[1] << 3 ); - low = ( ctx->total[0] << 3 ); + high = (ctx->total[0] >> 29) + | (ctx->total[1] << 3); + low = (ctx->total[0] << 3); - PUT_UINT32_BE( high, msglen, 0 ); - PUT_UINT32_BE( low, msglen, 4 ); + PUT_UINT32_BE (high, msglen, 0); + PUT_UINT32_BE (low, msglen, 4); - last = ctx->total[0] & 0x3F; - padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + last = ctx->total[0] & 0x3F; + padn = (last < 56) ? (56 - last) : (120 - last); - sha1_update( ctx, (unsigned char *) sha1_padding, padn ); - sha1_update( ctx, msglen, 8 ); + sha1_update (ctx, (unsigned char *) sha1_padding, padn); + sha1_update (ctx, msglen, 8); - PUT_UINT32_BE( ctx->state[0], output, 0 ); - PUT_UINT32_BE( ctx->state[1], output, 4 ); - PUT_UINT32_BE( ctx->state[2], output, 8 ); - PUT_UINT32_BE( ctx->state[3], output, 12 ); - PUT_UINT32_BE( ctx->state[4], output, 16 ); + PUT_UINT32_BE (ctx->state[0], output, 0); + PUT_UINT32_BE (ctx->state[1], output, 4); + PUT_UINT32_BE (ctx->state[2], output, 8); + PUT_UINT32_BE (ctx->state[3], output, 12); + PUT_UINT32_BE (ctx->state[4], output, 16); } /* * Output = SHA-1( input buffer ) */ -void sha1_csum( unsigned char *input, int ilen, - unsigned char output[20] ) +void sha1_csum (unsigned char *input, int ilen, unsigned char output[20]) { - sha1_context ctx; + sha1_context ctx; - sha1_starts( &ctx ); - sha1_update( &ctx, input, ilen ); - sha1_finish( &ctx, output ); + sha1_starts (&ctx); + sha1_update (&ctx, input, ilen); + sha1_finish (&ctx, output); } /* * Output = HMAC-SHA-1( input buffer, hmac key ) */ -void sha1_hmac( unsigned char *key, int keylen, - unsigned char *input, int ilen, - unsigned char output[20] ) +void sha1_hmac (unsigned char *key, int keylen, + unsigned char *input, int ilen, unsigned char output[20]) { - int i; - sha1_context ctx; - unsigned char k_ipad[64]; - unsigned char k_opad[64]; - unsigned char tmpbuf[20]; - - memset( k_ipad, 0x36, 64 ); - memset( k_opad, 0x5C, 64 ); - - for( i = 0; i < keylen; i++ ) - { - if( i >= 64 ) break; - - k_ipad[i] ^= key[i]; - k_opad[i] ^= key[i]; - } - - sha1_starts( &ctx ); - sha1_update( &ctx, k_ipad, 64 ); - sha1_update( &ctx, input, ilen ); - sha1_finish( &ctx, tmpbuf ); - - sha1_starts( &ctx ); - sha1_update( &ctx, k_opad, 64 ); - sha1_update( &ctx, tmpbuf, 20 ); - sha1_finish( &ctx, output ); - - memset( k_ipad, 0, 64 ); - memset( k_opad, 0, 64 ); - memset( tmpbuf, 0, 20 ); - memset( &ctx, 0, sizeof( sha1_context ) ); + int i; + sha1_context ctx; + unsigned char k_ipad[64]; + unsigned char k_opad[64]; + unsigned char tmpbuf[20]; + + memset (k_ipad, 0x36, 64); + memset (k_opad, 0x5C, 64); + + for (i = 0; i < keylen; i++) { + if (i >= 64) + break; + + k_ipad[i] ^= key[i]; + k_opad[i] ^= key[i]; + } + + sha1_starts (&ctx); + sha1_update (&ctx, k_ipad, 64); + sha1_update (&ctx, input, ilen); + sha1_finish (&ctx, tmpbuf); + + sha1_starts (&ctx); + sha1_update (&ctx, k_opad, 64); + sha1_update (&ctx, tmpbuf, 20); + sha1_finish (&ctx, output); + + memset (k_ipad, 0, 64); + memset (k_opad, 0, 64); + memset (tmpbuf, 0, 20); + memset (&ctx, 0, sizeof (sha1_context)); } static const char _sha1_src[] = "_sha1_src"; @@ -365,66 +353,61 @@ static const char _sha1_src[] = "_sha1_src"; /* * FIPS-180-1 test vectors */ -static const char sha1_test_str[3][57] = -{ - { "abc" }, - { "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" }, - { "" } +static const char sha1_test_str[3][57] = { + {"abc"}, + {"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"}, + {""} }; -static const unsigned char sha1_test_sum[3][20] = -{ - { 0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E, - 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D }, - { 0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE, - 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1 }, - { 0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E, - 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F } +static const unsigned char sha1_test_sum[3][20] = { + {0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E, + 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D}, + {0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE, + 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1}, + {0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E, + 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F} }; /* * Checkup routine */ -int sha1_self_test( void ) +int sha1_self_test (void) { - int i, j; - unsigned char buf[1000]; - unsigned char sha1sum[20]; - sha1_context ctx; - - for( i = 0; i < 3; i++ ) - { - printf( " SHA-1 test #%d: ", i + 1 ); - - sha1_starts( &ctx ); - - if( i < 2 ) - sha1_update( &ctx, (unsigned char *) sha1_test_str[i], - strlen( sha1_test_str[i] ) ); - else - { - memset( buf, 'a', 1000 ); - for( j = 0; j < 1000; j++ ) - sha1_update( &ctx, buf, 1000 ); - } - - sha1_finish( &ctx, sha1sum ); - - if( memcmp( sha1sum, sha1_test_sum[i], 20 ) != 0 ) - { - printf( "failed\n" ); - return( 1 ); - } - - printf( "passed\n" ); - } - - printf( "\n" ); - return( 0 ); + int i, j; + unsigned char buf[1000]; + unsigned char sha1sum[20]; + sha1_context ctx; + + for (i = 0; i < 3; i++) { + printf (" SHA-1 test #%d: ", i + 1); + + sha1_starts (&ctx); + + if (i < 2) + sha1_update (&ctx, (unsigned char *) sha1_test_str[i], + strlen (sha1_test_str[i])); + else { + memset (buf, 'a', 1000); + for (j = 0; j < 1000; j++) + sha1_update (&ctx, buf, 1000); + } + + sha1_finish (&ctx, sha1sum); + + if (memcmp (sha1sum, sha1_test_sum[i], 20) != 0) { + printf ("failed\n"); + return (1); + } + + printf ("passed\n"); + } + + printf ("\n"); + return (0); } #else -int sha1_self_test( void ) +int sha1_self_test (void) { - return( 0 ); + return (0); } #endif diff --git a/post/cpu/ppc4xx/cache_4xx.S b/post/cpu/ppc4xx/cache_4xx.S index 785b8d60b93..dddd76b2355 100644 --- a/post/cpu/ppc4xx/cache_4xx.S +++ b/post/cpu/ppc4xx/cache_4xx.S @@ -438,7 +438,7 @@ cache_post_test6_reloc: blr /* Test instructions. - */ + */ cache_post_test_inst: li r3, 0 li r3, -1 diff --git a/post/cpu/ppc4xx/fpu.c b/post/cpu/ppc4xx/fpu.c index c2eb4a9bf0b..27e9ed01afc 100644 --- a/post/cpu/ppc4xx/fpu.c +++ b/post/cpu/ppc4xx/fpu.c @@ -37,7 +37,7 @@ int fpu_status(void) { if (mfspr(ccr0) & CCR0_DAPUIB) return 0; /* Disabled */ - else + else return 1; /* Enabled */ } diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c index be5a701f317..3e746343d15 100644 --- a/post/cpu/ppc4xx/spr.c +++ b/post/cpu/ppc4xx/spr.c @@ -43,12 +43,11 @@ #include -static struct -{ - int number; - char * name; - unsigned long mask; - unsigned long value; +static struct { + int number; + char * name; + unsigned long mask; + unsigned long value; } spr_test_list [] = { /* Standard Special-Purpose Registers */ @@ -65,7 +64,7 @@ static struct {0x11f, "PVR", 0x00000000, 0x00000000}, /* Additional Special-Purpose Registers. - * The values must match the initialization + * The values must match the initialization * values from cpu/ppc4xx/start.S */ {0x30, "PID", 0x00000000, 0x00000000}, diff --git a/tools/ubsha1.c b/tools/ubsha1.c index bc877606d2f..b37b2b72242 100644 --- a/tools/ubsha1.c +++ b/tools/ubsha1.c @@ -84,7 +84,7 @@ int main (int argc, char **argv) cmdname, imagefile, strerror(errno)); exit (EXIT_FAILURE); } - + /* create a copy, so we can blank out the sha1 sum */ data = malloc (len); memcpy (data, ptr, len); @@ -93,12 +93,11 @@ int main (int argc, char **argv) for (i = 0; i < SHA1_SUM_LEN; i++) { ptroff[i] = 0; } - + sha1_csum ((unsigned char *) data, len, (unsigned char *)output); printf ("U-Boot sum:\n"); - for (i = 0; i < 20 ; i++) - { + for (i = 0; i < 20 ; i++) { printf ("%02X ", output[i]); } printf ("\n"); @@ -109,7 +108,7 @@ int main (int argc, char **argv) cmdname, imagefile, strerror(errno)); exit (EXIT_FAILURE); } - + free (data); (void) munmap((void *)ptr, len); (void) close (ifd); -- cgit v1.3.1