From 5cd4a355e0f0addb718642b877939819b772936c Mon Sep 17 00:00:00 2001 From: Masami Hiramatsu Date: Fri, 4 Jun 2021 18:45:10 +0900 Subject: board: synquacer: Add DeveloperBox 96boards EE support Add the DeveloperBox 96boards EE support. This board is also known as Socionext SynQuacer E-Series. It contians one "SC2A11" SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots, 3 PCIe slots (1 4x port and 2 1x ports which are expanded via PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard MicroATX Form Factor. For more information, see this page; https://www.96boards.org/product/developerbox/ Signed-off-by: Masami Hiramatsu --- include/configs/synquacer.h | 109 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 include/configs/synquacer.h (limited to 'include') diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h new file mode 100644 index 00000000000..0dab4de1f18 --- /dev/null +++ b/include/configs/synquacer.h @@ -0,0 +1,109 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2016-2017 Socionext Inc. + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* Timers for fasp(TIMCLK) */ +#define CONFIG_SYS_HZ 1000 /* 1 msec */ +#define CONFIG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */ + +/* + * SDRAM (for initialize) + */ +#define CONFIG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ +#define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */ + +#define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */ +#define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE + +#define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */ + +/* + * Boot info + */ +#define CONFIG_SYS_INIT_SP_ADDR (0xe0000000) /* stack of init proccess */ +#define CONFIG_SYS_MALLOC_LEN (0x01000000) /* 16Mbyte size of malloc() */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default kernel load address */ + +/* + * Hardware drivers support + */ + +/* RTC */ +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 + +/* Serial (pl011) */ +#define UART_CLK (62500000) +#define CONFIG_SERIAL_MULTI +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK UART_CLK +#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)} + +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ + +/* Support MTD */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BASE (0x08000000) +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} + +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (512 * 1024)) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_MAXARGS 128 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ +/* #define CONFIG_SYS_PCI_64BIT 1 */ + +/* Distro boot settings */ +#ifndef CONFIG_SPL_BUILD +#ifdef CONFIG_CMD_USB +#define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICE_USB(func) +#endif + +#ifdef CONFIG_CMD_MMC +#define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0) +#else +#define BOOT_TARGET_DEVICE_MMC(func) +#endif + +#ifdef CONFIG_CMD_NVME +#define BOOT_TARGET_DEVICE_NVME(func) func(NVME, nvme, 0) +#else +#define BOOT_TARGET_DEVICE_NVME(func) +#endif + +#ifdef CONFIG_CMD_SCSI +#define BOOT_TARGET_DEVICE_SCSI(func) func(SCSI, scsi, 0) func(SCSI, scsi, 1) +#else +#define BOOT_TARGET_DEVICE_SCSI(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_DEVICE_USB(func) \ + BOOT_TARGET_DEVICE_MMC(func) \ + BOOT_TARGET_DEVICE_SCSI(func) \ + BOOT_TARGET_DEVICE_NVME(func) \ + +#include +#else /* CONFIG_SPL_BUILD */ +#define BOOTENV +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_addr_r=0x9fe00000\0" \ + "kernel_addr_r=0x90000000\0" \ + "ramdisk_addr_r=0xa0000000\0" \ + "scriptaddr=0x88000000\0" \ + "pxefile_addr_r=0x88100000\0" \ + BOOTENV + +#endif /* __CONFIG_H */ -- cgit v1.2.3 From 3a37386f18c82f7270e892dbd51e3f00cf5d8a19 Mon Sep 17 00:00:00 2001 From: Masami Hiramatsu Date: Fri, 4 Jun 2021 18:45:31 +0900 Subject: configs: synquacer: Enable EFI capsule update support Enable EFI capsule update support. With the EFI capsule update, you can update U-Boot, TF-A and OP-TEE. TF-A and OP-TEE are usually combined as a FIP binary, but if the binary is bigger than 480KB, you have to modify FIP header, split the OP-TEE and stores the OP-TEE binary in the different place. This configuration supports both cases. Signed-off-by: Masami Hiramatsu --- include/configs/synquacer.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 0dab4de1f18..8fe10d74853 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -61,6 +61,11 @@ /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ /* #define CONFIG_SYS_PCI_64BIT 1 */ +#define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \ + "mtd nor1=u-boot.bin raw 200000 100000;" \ + "fip.bin raw 180000 78000;" \ + "optee.bin raw 500000 100000\0" + /* Distro boot settings */ #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_CMD_USB @@ -104,6 +109,7 @@ "ramdisk_addr_r=0xa0000000\0" \ "scriptaddr=0x88000000\0" \ "pxefile_addr_r=0x88100000\0" \ + DEFAULT_DFU_ALT_INFO \ BOOTENV #endif /* __CONFIG_H */ -- cgit v1.2.3 From bd4dbf9e435345cf859922fca74dc0603d7dac2b Mon Sep 17 00:00:00 2001 From: Trevor Woerner Date: Thu, 10 Jun 2021 22:37:02 -0400 Subject: lpc32xx: Kconfig: switch to CONFIG_CONS_INDEX There's nothing special or unique to the lpc32xx that requires its own config parameter for specifying the console uart index. Therefore instead of using the lpc32xx-specific CONFIG_SYS_LPC32XX_UART include parameter, use the already-available CONFIG_CONS_INDEX from Kconfig. Signed-off-by: Trevor Woerner Reviewed-by: Simon Glass --- include/configs/devkit3250.h | 5 ----- include/configs/work_92105.h | 5 ----- 2 files changed, 10 deletions(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 5d2b77b4a37..921a38c01ea 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -30,11 +30,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ - GENERATED_GBL_DATA_SIZE) -/* - * Serial Driver - */ -#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */ - /* * DMA */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 7874b77f3f8..076a1b065eb 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -35,11 +35,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ - GENERATED_GBL_DATA_SIZE) -/* - * Serial Driver - */ -#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 - NS16550 */ - /* * Ethernet Driver */ -- cgit v1.2.3 From eb5807e68f4334bcc610acd827c889e0abe9231b Mon Sep 17 00:00:00 2001 From: Trevor Woerner Date: Thu, 10 Jun 2021 22:37:03 -0400 Subject: lpc32xx: import device tree from Linux Import the dtsi, dts, and clock binding files for the lpc32xx ea3250 board directly and unmodified from the latest Linux kernel. Signed-off-by: Trevor Woerner --- include/dt-bindings/clock/lpc32xx-clock.h | 58 +++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 include/dt-bindings/clock/lpc32xx-clock.h (limited to 'include') diff --git a/include/dt-bindings/clock/lpc32xx-clock.h b/include/dt-bindings/clock/lpc32xx-clock.h new file mode 100644 index 00000000000..e624d3a5279 --- /dev/null +++ b/include/dt-bindings/clock/lpc32xx-clock.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2015 Vladimir Zapolskiy + * + * This code is released using a dual license strategy: BSD/GPL + * You can choose the licence that better fits your requirements. + * + * Released under the terms of 3-clause BSD License + * Released under the terms of GNU General Public License Version 2.0 + * + */ + +#ifndef __DT_BINDINGS_LPC32XX_CLOCK_H +#define __DT_BINDINGS_LPC32XX_CLOCK_H + +/* LPC32XX System Control Block clocks */ +#define LPC32XX_CLK_RTC 1 +#define LPC32XX_CLK_DMA 2 +#define LPC32XX_CLK_MLC 3 +#define LPC32XX_CLK_SLC 4 +#define LPC32XX_CLK_LCD 5 +#define LPC32XX_CLK_MAC 6 +#define LPC32XX_CLK_SD 7 +#define LPC32XX_CLK_DDRAM 8 +#define LPC32XX_CLK_SSP0 9 +#define LPC32XX_CLK_SSP1 10 +#define LPC32XX_CLK_UART3 11 +#define LPC32XX_CLK_UART4 12 +#define LPC32XX_CLK_UART5 13 +#define LPC32XX_CLK_UART6 14 +#define LPC32XX_CLK_IRDA 15 +#define LPC32XX_CLK_I2C1 16 +#define LPC32XX_CLK_I2C2 17 +#define LPC32XX_CLK_TIMER0 18 +#define LPC32XX_CLK_TIMER1 19 +#define LPC32XX_CLK_TIMER2 20 +#define LPC32XX_CLK_TIMER3 21 +#define LPC32XX_CLK_TIMER4 22 +#define LPC32XX_CLK_TIMER5 23 +#define LPC32XX_CLK_WDOG 24 +#define LPC32XX_CLK_I2S0 25 +#define LPC32XX_CLK_I2S1 26 +#define LPC32XX_CLK_SPI1 27 +#define LPC32XX_CLK_SPI2 28 +#define LPC32XX_CLK_MCPWM 29 +#define LPC32XX_CLK_HSTIMER 30 +#define LPC32XX_CLK_KEY 31 +#define LPC32XX_CLK_PWM1 32 +#define LPC32XX_CLK_PWM2 33 +#define LPC32XX_CLK_ADC 34 +#define LPC32XX_CLK_HCLK_PLL 35 +#define LPC32XX_CLK_PERIPH 36 + +/* LPC32XX USB clocks */ +#define LPC32XX_USB_CLK_I2C 1 +#define LPC32XX_USB_CLK_DEVICE 2 +#define LPC32XX_USB_CLK_HOST 3 + +#endif /* __DT_BINDINGS_LPC32XX_CLOCK_H */ -- cgit v1.2.3 From faf78fd464f46269887be90e5b9d2db405aa5f4e Mon Sep 17 00:00:00 2001 From: Trevor Woerner Date: Thu, 10 Jun 2021 22:37:04 -0400 Subject: arm: lpc32xx: add EA LPC3250 DevKitv2 board support Add basic support for running U-Boot on the Embedded Artists LPC3250 Developer's Kit v2 board by launching U-Boot from the board's s1l loader (which comes pre-installed on the board). Signed-off-by: Trevor Woerner --- include/configs/ea-lpc3250devkitv2.h | 37 ++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 include/configs/ea-lpc3250devkitv2.h (limited to 'include') diff --git a/include/configs/ea-lpc3250devkitv2.h b/include/configs/ea-lpc3250devkitv2.h new file mode 100644 index 00000000000..c1a37c8a790 --- /dev/null +++ b/include/configs/ea-lpc3250devkitv2.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Embedded Artists LPC3250 DevKit v2 + * Copyright (C) 2021 Trevor Woerner + */ + +#ifndef __CONFIG_EA_LPC3250DEVKITV2_H__ +#define __CONFIG_EA_LPC3250DEVKITV2_H__ + +#include +#include + +/* + * SoC and board defines + */ +#define CONFIG_MACH_TYPE MACH_TYPE_LPC3XXX +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_SIZE_LIMIT 0x000fffff /* maximum allowable size for full U-Boot binary */ + +/* + * RAM + */ +#define CONFIG_SYS_MALLOC_LEN SZ_4M +#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE + +/* + * cmd + */ +#define CONFIG_SYS_LOAD_ADDR 0x80100000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE) + +/* + * SoC-specific config + */ +#include + +#endif -- cgit v1.2.3 From 0705556bc4d82d0fe72b68bab3a83b4e52b128df Mon Sep 17 00:00:00 2001 From: Trevor Woerner Date: Thu, 10 Jun 2021 22:37:08 -0400 Subject: Kconfig: convert CONFIG_SYS_I2C_LPC32XX Convert the CONFIG_SYS_I2C_LPC32XX configuration symbol from an include directive to a Kconfig value. Signed-off-by: Trevor Woerner Reviewed-by: Simon Glass --- include/configs/devkit3250.h | 1 - include/configs/work_92105.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 921a38c01ea..465d9ce8e99 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -41,7 +41,6 @@ * I2C */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_LPC32XX #define CONFIG_SYS_I2C_SPEED 100000 /* diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 076a1b065eb..d498c8f3bc6 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -47,7 +47,6 @@ * I2C driver */ -#define CONFIG_SYS_I2C_LPC32XX #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_SPEED 350000 -- cgit v1.2.3