From 35f051ab666b71214873257577f7c9926120e2c4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 18 May 2018 11:15:09 +0200 Subject: arm64: zynqmp: Remove empty configuration file There is no reason to keep empty config file in the tree that's why remove it. Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h | 14 -------------- 1 file changed, 14 deletions(-) delete mode 100644 include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h (limited to 'include') diff --git a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h deleted file mode 100644 index bfebbb3cd19..00000000000 --- a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Xilinx ZynqMP zc1751 XM016 DC2 - * - * (C) Copyright 2015 Xilinx, Inc. - * Michal Simek - */ - -#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H -#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H - -#include - -#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */ -- cgit v1.3.1 From 95d565fdc246ba43de8f51aa799e33b0811d2823 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 21 May 2018 13:33:47 +0200 Subject: arm64: zynqmp: Remove CMD_UNZIP for mini configuration CMD_UNZIP is already disabled via Kconfig. Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp_mini.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 947d3083dae..96ff6c9f021 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -32,7 +32,6 @@ /* BOOTP options */ #undef CONFIG_BOOTP_BOOTFILESIZE #undef CONFIG_BOOTP_MAY_FAIL -#undef CONFIG_CMD_UNZIP #undef CONFIG_NR_DRAM_BANKS -- cgit v1.3.1 From c66f5620e6a63b1912c017781c7eec6400dde292 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Fri, 12 Jan 2018 12:33:50 -0300 Subject: arm: zynq: Add support for Bitmain Antminer S9 control board This is control board on Bitmain Antminer S9. There are 3 board variables with 256MB, 512MB and 1024MB DDR. DDR memory is automatically detected with using get_with using get_ram_size(). Bitmain is using 16MB space for FPGA which is handled via reserved-memory. Also U-Boot is allocating 16B for storing bootcounts. Watchdog is started but never service in U-Boot. SPL MMC is working. SPL NAND is not working because it is not supported as of now. Signed-off-by: Ezequiel Garcia Signed-off-by: Michal Simek Signed-off-by: Michal Simek --- arch/arm/dts/bitmain-antminer-s9.dts | 78 ++++++ board/bitmain/antminer_s9/MAINTAINERS | 6 + board/bitmain/antminer_s9/Makefile | 8 + .../antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c | 280 +++++++++++++++++++++ board/bitmain/antminer_s9/board.c | 2 + configs/bitmain_antminer_s9_defconfig | 66 +++++ include/configs/bitmain_antminer_s9.h | 30 +++ 7 files changed, 470 insertions(+) create mode 100644 arch/arm/dts/bitmain-antminer-s9.dts create mode 100644 board/bitmain/antminer_s9/MAINTAINERS create mode 100644 board/bitmain/antminer_s9/Makefile create mode 100644 board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c create mode 100644 board/bitmain/antminer_s9/board.c create mode 100644 configs/bitmain_antminer_s9_defconfig create mode 100644 include/configs/bitmain_antminer_s9.h (limited to 'include') diff --git a/arch/arm/dts/bitmain-antminer-s9.dts b/arch/arm/dts/bitmain-antminer-s9.dts new file mode 100644 index 00000000000..7362ad4e8f9 --- /dev/null +++ b/arch/arm/dts/bitmain-antminer-s9.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Bitmain Antminer S9 board DTS + * + * Copyright (C) 2018 Michal Simek + * Copyright (C) 2018 VanguardiaSur + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Bitmain Antminer S9 Board"; + compatible = "bitmain,antminer-s9", "xlnx,zynq-7000"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart1; + mmc0 = &sdhci0; + gpio0 = &gpio0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + bootcount@efffff0 { + reg = <0xefffff0 0x10>; + no-map; + }; + + fpga_space@f000000 { + reg = <0xf000000 0x1000000>; + no-map; + }; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; +}; + +&clkc { + ps-clk-frequency = <33333333>; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + /* 0362/5e62 */ + ethernet_phy: ethernet-phy@1 { + reg = <1>; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; + status = "okay"; + disable-wp; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&watchdog0 { + reset-on-timeout; + timeout-sec = <200>; +}; diff --git a/board/bitmain/antminer_s9/MAINTAINERS b/board/bitmain/antminer_s9/MAINTAINERS new file mode 100644 index 00000000000..302dd4807f3 --- /dev/null +++ b/board/bitmain/antminer_s9/MAINTAINERS @@ -0,0 +1,6 @@ +Bitmain Antminer S9 +M: Michal Simek +S: Maintained +F: board/bitmain/antminer_s9 +F: include/configs/bitmain_antminer_s9.h +F: configs/bitmain_antminer_s9_defconfig diff --git a/board/bitmain/antminer_s9/Makefile b/board/bitmain/antminer_s9/Makefile new file mode 100644 index 00000000000..93a1e77f72b --- /dev/null +++ b/board/bitmain/antminer_s9/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y := board.o + +# Remove quotes +hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE)) + +obj-$(CONFIG_SPL_BUILD) += $(hw-platform-y)/ps7_init_gpl.o diff --git a/board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c b/board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c new file mode 100644 index 00000000000..aee202996d1 --- /dev/null +++ b/board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2018 Michal Simek + */ + +#include + +static unsigned long ps7_pll_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000110, 0x003ffff0, 0x000fa220), + EMIT_MASKWRITE(0xf8000100, 0x0007f000, 0x00028000), + EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000010), + EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000000), + EMIT_MASKPOLL(0xf800010c, 0x00000001), + EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000000), + EMIT_MASKWRITE(0xf8000120, 0x1f003f30, 0x1f000200), + EMIT_MASKWRITE(0xf8000114, 0x003ffff0, 0x0012c220), + EMIT_MASKWRITE(0xf8000104, 0x0007f000, 0x00020000), + EMIT_MASKWRITE(0xf8000104, 0x00000010, 0x00000010), + EMIT_MASKWRITE(0xf8000104, 0x00000001, 0x000000), + EMIT_MASKWRITE(0xf8000104, 0x00000001, 0x00000000), + EMIT_MASKPOLL(0xf800010c, 0x00000002), + EMIT_MASKWRITE(0xf8000104, 0x00000010, 0x00000000), + EMIT_MASKWRITE(0xf8000124, 0xfff00003, 0x0c200003), + EMIT_MASKWRITE(0xf8000118, 0x003ffff0, 0x001452c0), + EMIT_MASKWRITE(0xf8000108, 0x0007f000, 0x0001e000), + EMIT_MASKWRITE(0xf8000108, 0x00000010, 0x00000010), + EMIT_MASKWRITE(0xf8000108, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000108, 0x00000001, 0x00000000), + EMIT_MASKPOLL(0xf800010c, 0x00000004), + EMIT_MASKWRITE(0xf8000108, 0x00000010, 0x00000000), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +static unsigned long ps7_clock_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000128, 0x03f03f01, 0x00302301), + EMIT_MASKWRITE(0xf8000138, 0x00000011, 0x00000001), + EMIT_MASKWRITE(0xf8000140, 0x03f03f71, 0x00100801), + EMIT_MASKWRITE(0xf8000148, 0x00003f31, 0x00000a01), + EMIT_MASKWRITE(0xf8000150, 0x00003f33, 0x00002801), + EMIT_MASKWRITE(0xf8000154, 0x00003f33, 0x00001402), + EMIT_MASKWRITE(0xf8000168, 0x00003f31, 0x00000501), + EMIT_MASKWRITE(0xf8000170, 0x03f03f30, 0x00101400), + EMIT_MASKWRITE(0xf8000180, 0x03f03f30, 0x00100a00), + EMIT_MASKWRITE(0xf8000190, 0x03f03f30, 0x00101e00), + EMIT_MASKWRITE(0xf80001a0, 0x03f03f30, 0x00101400), + EMIT_MASKWRITE(0xf80001c4, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf800012c, 0x01ffcccd, 0x016c044d), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +static unsigned long ps7_ddr_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8006000, 0x0001ffff, 0x00000080), + EMIT_MASKWRITE(0xf8006004, 0x0007ffff, 0x00001081), + EMIT_MASKWRITE(0xf8006008, 0x03ffffff, 0x03c0780f), + EMIT_MASKWRITE(0xf800600c, 0x03ffffff, 0x02001001), + EMIT_MASKWRITE(0xf8006010, 0x03ffffff, 0x00014001), + EMIT_MASKWRITE(0xf8006014, 0x001fffff, 0x0004281b), + EMIT_MASKWRITE(0xf8006018, 0xf7ffffff, 0x44e458d1), + EMIT_MASKWRITE(0xf800601c, 0xffffffff, 0xb2023584), + EMIT_MASKWRITE(0xf8006020, 0x7fdffffc, 0x2b08b2d0), + EMIT_MASKWRITE(0xf8006024, 0x0fffffc3, 0x00000000), + EMIT_MASKWRITE(0xf8006028, 0x00003fff, 0x00002007), + EMIT_MASKWRITE(0xf800602c, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf8006030, 0xffffffff, 0x00040970), + EMIT_MASKWRITE(0xf8006034, 0x13ff3fff, 0x000116d4), + EMIT_MASKWRITE(0xf8006038, 0x00000003, 0x00000000), + EMIT_MASKWRITE(0xf800603c, 0x000fffff, 0x00000777), + EMIT_MASKWRITE(0xf8006040, 0xffffffff, 0xfff00000), + EMIT_MASKWRITE(0xf8006044, 0x0fffffff, 0x0f666666), + EMIT_MASKWRITE(0xf8006048, 0x0003f03f, 0x0003c008), + EMIT_MASKWRITE(0xf8006050, 0xff0f8fff, 0x77010800), + EMIT_MASKWRITE(0xf8006058, 0x00010000, 0x00000000), + EMIT_MASKWRITE(0xf800605c, 0x0000ffff, 0x00005003), + EMIT_MASKWRITE(0xf8006060, 0x000017ff, 0x0000003e), + EMIT_MASKWRITE(0xf8006064, 0x00021fe0, 0x00020000), + EMIT_MASKWRITE(0xf8006068, 0x03ffffff, 0x00284545), + EMIT_MASKWRITE(0xf800606c, 0x0000ffff, 0x00001610), + EMIT_MASKWRITE(0xf8006078, 0x03ffffff, 0x00466111), + EMIT_MASKWRITE(0xf800607c, 0x000fffff, 0x00032222), + EMIT_MASKWRITE(0xf80060a4, 0xffffffff, 0x10200802), + EMIT_MASKWRITE(0xf80060a8, 0x0fffffff, 0x0690cb73), + EMIT_MASKWRITE(0xf80060ac, 0x000001ff, 0x000001fe), + EMIT_MASKWRITE(0xf80060b0, 0x1fffffff, 0x1cffffff), + EMIT_MASKWRITE(0xf80060b4, 0x00000200, 0x00000200), + EMIT_MASKWRITE(0xf80060b8, 0x01ffffff, 0x0020006a), + EMIT_MASKWRITE(0xf80060c4, 0x00000003, 0x00000003), + EMIT_MASKWRITE(0xf80060c4, 0x00000003, 0x00000000), + EMIT_MASKWRITE(0xf80060c8, 0x000000ff, 0x00000000), + EMIT_MASKWRITE(0xf80060dc, 0x00000001, 0x00000000), + EMIT_MASKWRITE(0xf80060f0, 0x0000ffff, 0x00000000), + EMIT_MASKWRITE(0xf80060f4, 0x0000000f, 0x00000008), + EMIT_MASKWRITE(0xf8006114, 0x000000ff, 0x00000000), + EMIT_MASKWRITE(0xf8006118, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf800611c, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf8006120, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf8006124, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf800612c, 0x000fffff, 0x0002c000), + EMIT_MASKWRITE(0xf8006130, 0x000fffff, 0x0002c400), + EMIT_MASKWRITE(0xf8006134, 0x000fffff, 0x0002f003), + EMIT_MASKWRITE(0xf8006138, 0x000fffff, 0x0002ec03), + EMIT_MASKWRITE(0xf8006140, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf8006144, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf8006148, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf800614c, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf8006154, 0x000fffff, 0x00000077), + EMIT_MASKWRITE(0xf8006158, 0x000fffff, 0x00000077), + EMIT_MASKWRITE(0xf800615c, 0x000fffff, 0x00000083), + EMIT_MASKWRITE(0xf8006160, 0x000fffff, 0x00000083), + EMIT_MASKWRITE(0xf8006168, 0x001fffff, 0x00000105), + EMIT_MASKWRITE(0xf800616c, 0x001fffff, 0x00000106), + EMIT_MASKWRITE(0xf8006170, 0x001fffff, 0x00000111), + EMIT_MASKWRITE(0xf8006174, 0x001fffff, 0x00000110), + EMIT_MASKWRITE(0xf800617c, 0x000fffff, 0x000000b7), + EMIT_MASKWRITE(0xf8006180, 0x000fffff, 0x000000b7), + EMIT_MASKWRITE(0xf8006184, 0x000fffff, 0x000000c3), + EMIT_MASKWRITE(0xf8006188, 0x000fffff, 0x000000c3), + EMIT_MASKWRITE(0xf8006190, 0x6ffffefe, 0x00040080), + EMIT_MASKWRITE(0xf8006194, 0x000fffff, 0x0001fd01), + EMIT_MASKWRITE(0xf8006204, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf8006208, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf800620c, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006210, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006214, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006218, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf800621c, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006220, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006224, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf80062a8, 0x00000ff5, 0x00000000), + EMIT_MASKWRITE(0xf80062ac, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf80062b0, 0x003fffff, 0x00005125), + EMIT_MASKWRITE(0xf80062b4, 0x0003ffff, 0x000012a8), + EMIT_MASKPOLL(0xf8000b74, 0x00002000), + EMIT_MASKWRITE(0xf8006000, 0x0001ffff, 0x00000081), + EMIT_MASKPOLL(0xf8006054, 0x00000007), + EMIT_EXIT(), +}; + +static unsigned long ps7_mio_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000b40, 0x00000fff, 0x00000600), + EMIT_MASKWRITE(0xf8000b44, 0x00000fff, 0x00000600), + EMIT_MASKWRITE(0xf8000b48, 0x00000fff, 0x00000672), + EMIT_MASKWRITE(0xf8000b4c, 0x00000fff, 0x00000672), + EMIT_MASKWRITE(0xf8000b50, 0x00000fff, 0x00000674), + EMIT_MASKWRITE(0xf8000b54, 0x00000fff, 0x00000674), + EMIT_MASKWRITE(0xf8000b58, 0x00000fff, 0x00000600), + EMIT_MASKWRITE(0xf8000b5c, 0xffffffff, 0x0018c068), + EMIT_MASKWRITE(0xf8000b60, 0xffffffff, 0x00f98068), + EMIT_MASKWRITE(0xf8000b64, 0xffffffff, 0x00f98068), + EMIT_MASKWRITE(0xf8000b68, 0xffffffff, 0x00f98068), + EMIT_MASKWRITE(0xf8000b6c, 0x00007fff, 0x00000205), + EMIT_MASKWRITE(0xf8000b70, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000b70, 0x00000021, 0x00000020), + EMIT_MASKWRITE(0xf8000b70, 0x07feffff, 0x00000823), + EMIT_MASKWRITE(0xf8000700, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000704, 0x00003fff, 0x00000600), + EMIT_MASKWRITE(0xf8000708, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf800070c, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000710, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000714, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000718, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf800071c, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000720, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000724, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000728, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf800072c, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000730, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000734, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000738, 0x00003fff, 0x00000611), + EMIT_MASKWRITE(0xf800073c, 0x00003fff, 0x00000600), + EMIT_MASKWRITE(0xf8000740, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000744, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000748, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf800074c, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000750, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000754, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000758, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf800075c, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000760, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000764, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000768, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf800076c, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000770, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000774, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000778, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf800077c, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000780, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000784, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000788, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf800078c, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000790, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000794, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000798, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf800079c, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf80007a0, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007a4, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007a8, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007ac, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007b0, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007b4, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007b8, 0x00003f01, 0x00000201), + EMIT_MASKWRITE(0xf80007bc, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf80007c0, 0x00003fff, 0x000002e0), + EMIT_MASKWRITE(0xf80007c4, 0x00003fff, 0x000002e1), + EMIT_MASKWRITE(0xf80007c8, 0x00003f01, 0x00000201), + EMIT_MASKWRITE(0xf80007cc, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf80007d0, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007d4, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf8000830, 0x003f003f, 0x002e0032), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +static unsigned long ps7_peripherals_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000b48, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000b4c, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000b50, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000b54, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_MASKWRITE(0xe0001034, 0x000000ff, 0x00000006), + EMIT_MASKWRITE(0xe0001018, 0x0000ffff, 0x0000003e), + EMIT_MASKWRITE(0xe0001000, 0x000001ff, 0x00000017), + EMIT_MASKWRITE(0xe0001004, 0x000003ff, 0x00000020), + EMIT_MASKWRITE(0xe000d000, 0x00080000, 0x00080000), + EMIT_MASKWRITE(0xf8007000, 0x20000000, 0x00000000), + EMIT_MASKWRITE(0xe000e014, 0x00ffffff, 0x00449144), + EMIT_MASKWRITE(0xe000e018, 0x00000003, 0x00000000), + EMIT_MASKWRITE(0xe000e010, 0x03e00000, 0x02400000), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_EXIT(), +}; + +static unsigned long ps7_post_config_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000900, 0x0000000f, 0x0000000f), + EMIT_MASKWRITE(0xf8000240, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf8008000, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8008014, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +int ps7_init(void) +{ + int ret; + + ret = ps7_config(ps7_mio_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_pll_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_clock_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_ddr_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_peripherals_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + return PS7_INIT_SUCCESS; +} + +int ps7_post_config(void) +{ + return ps7_config(ps7_post_config_3_0); +} diff --git a/board/bitmain/antminer_s9/board.c b/board/bitmain/antminer_s9/board.c new file mode 100644 index 00000000000..bb7cef318da --- /dev/null +++ b/board/bitmain/antminer_s9/board.c @@ -0,0 +1,2 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "../../xilinx/zynq/board.c" diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig new file mode 100644 index 00000000000..fc52da05bc2 --- /dev/null +++ b/configs/bitmain_antminer_s9_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_SYS_VENDOR="bitmain" +CONFIG_SYS_BOARD="antminer_s9" +CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_SPL=y +CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=3 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_STACK_R=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="antminer> " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_CMD_PART=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +# CONFIG_CMD_NFS is not set +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_PXE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQPL=y +CONFIG_DM_GPIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_NAND=y +CONFIG_NAND_ZYNQ=y +CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +# CONFIG_WATCHDOG is not set +CONFIG_WDT=y +CONFIG_WDT_CDNS=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/bitmain_antminer_s9.h b/include/configs/bitmain_antminer_s9.h new file mode 100644 index 00000000000..226750215e7 --- /dev/null +++ b/include/configs/bitmain_antminer_s9.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2018 Michal Simek + */ + +#ifndef __CONFIG_BITMAIN_ANTMINER_S9_H +#define __CONFIG_BITMAIN_ANTMINER_S9_H + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 + +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_OFFSET 0x300000 + +#define CONFIG_BOOTP_SERVERIP + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=no\0" \ + "pxefile_addr_r=0x2000000\0" \ + "scriptaddr=0x3000000\0" \ + "kernel_addr_r=0x2000000\0" \ + "fdt_high=0xefff000\0" \ + "initrd_high=0xefff000\0" \ + "devnum=0\0" \ + "wdstop=mw f8005000 ABC000\0" \ + BOOTENV + +#include + +#endif /* __CONFIG_BITMAIN_ANTMINER_S9_H */ -- cgit v1.3.1 From cedd48e2cdb752444444a97157025f16e63ee446 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Thu, 31 May 2018 15:10:22 +0530 Subject: cmd: fpga: Add support to load secure bitstreams This patch adds support to load secure bitstreams(authenticated or encrypted or both). As of now, this feature is added and tested only for xilinx bitstreams and the secure bitstream was generated using xilinx bootgen tool, but the command is defined in more generic way. Command example to load authenticated and device key encrypted bitstream is as follows "fpga loads 0 100000 2000000 0 1" Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- cmd/Kconfig | 7 ++++++ cmd/fpga.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++++- drivers/fpga/fpga.c | 29 +++++++++++++++++++++++++ include/fpga.h | 11 ++++++++++ 4 files changed, 108 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/cmd/Kconfig b/cmd/Kconfig index d532c9fc41c..c4e831eb4e0 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -697,6 +697,13 @@ config CMD_FPGA_LOADP Supports loading an FPGA device from a bitstream buffer containing a partial bitstream. +config CMD_FPGA_LOAD_SECURE + bool "fpga loads - loads secure bitstreams (Xilinx only)" + depends on CMD_FPGA + help + Enables the fpga loads command which is used to load secure + (authenticated or encrypted or both) bitstreams on to FPGA. + config CMD_FPGAD bool "fpgad - dump FPGA registers" help diff --git a/cmd/fpga.c b/cmd/fpga.c index 3f09d424135..74ae80c807e 100644 --- a/cmd/fpga.c +++ b/cmd/fpga.c @@ -27,6 +27,7 @@ enum { FPGA_LOADP, FPGA_LOADBP, FPGA_LOADFS, + FPGA_LOADS, }; /* ------------------------------------------------------------------------- */ @@ -54,6 +55,11 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) fpga_fs_info fpga_fsinfo; fpga_fsinfo.fstype = FS_TYPE_ANY; #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + struct fpga_secure_info fpga_sec_info; + + memset(&fpga_sec_info, 0, sizeof(fpga_sec_info)); +#endif if (devstr) dev = (int) simple_strtoul(devstr, NULL, 16); @@ -79,6 +85,19 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) fpga_fsinfo.filename = argv[8]; argc = 5; break; +#endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + case FPGA_LOADS: + if (argc < 7) + return CMD_RET_USAGE; + if (argc == 8) + fpga_sec_info.userkey_addr = (u8 *)(uintptr_t) + simple_strtoull(argv[7], + NULL, 16); + fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16); + fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16); + argc = 5; + break; #endif default: break; @@ -150,6 +169,22 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part || !fpga_fsinfo.filename) wrong_parms = 1; + break; +#endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + case FPGA_LOADS: + if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH && + fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) { + puts("ERR: use for NonSecure bitstream\n"); + wrong_parms = 1; + } + + if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY && + !fpga_sec_info.userkey_addr) { + wrong_parms = 1; + puts("ERR:User key not provided\n"); + } + break; #endif case FPGA_LOAD: case FPGA_LOADP: @@ -206,6 +241,12 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) break; #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + case FPGA_LOADS: + rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info); + break; +#endif + #if defined(CONFIG_CMD_FPGA_LOADMK) case FPGA_LOADMK: switch (genimg_get_format(fpga_data)) { @@ -339,6 +380,10 @@ static int fpga_get_op(char *opstr) #endif else if (!strcmp("dump", opstr)) op = FPGA_DUMP; +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + else if (!strcmp("loads", opstr)) + op = FPGA_LOADS; +#endif if (op == FPGA_NONE) printf("Unknown fpga operation \"%s\"\n", opstr); @@ -346,7 +391,7 @@ static int fpga_get_op(char *opstr) return op; } -#if defined(CONFIG_CMD_FPGA_LOADFS) +#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE) U_BOOT_CMD(fpga, 9, 1, do_fpga, #else U_BOOT_CMD(fpga, 6, 1, do_fpga, @@ -381,4 +426,19 @@ U_BOOT_CMD(fpga, 6, 1, do_fpga, "\tsubimage unit name in the form of addr:" #endif #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + "Load encrypted bitstream (Xilinx only)\n" + " loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n" + " [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n" + "Loads the secure bistreams(authenticated/encrypted/both\n" + "authenticated and encrypted) of [size] from [address].\n" + "The auth-OCM/DDR flag specifies to perform authentication\n" + "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n" + "The enc flag specifies which key to be used for decryption\n" + "0-device key, 1-user key, 2-no encryption.\n" + "The optional Userkey address specifies from which address key\n" + "has to be used for decryption if user key is selected.\n" + "NOTE: the sceure bitstream has to be created using xilinx\n" + "bootgen tool only.\n" +#endif ); diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index 55bdf9e7cf2..7e8bd7eae88 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -217,6 +217,35 @@ int fpga_fsload(int devnum, const void *buf, size_t size, } #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) +int fpga_loads(int devnum, const void *buf, size_t size, + struct fpga_secure_info *fpga_sec_info) +{ + int ret_val = FPGA_FAIL; + + const fpga_desc *desc = fpga_validate(devnum, buf, size, + (char *)__func__); + + if (desc) { + switch (desc->devtype) { + case fpga_xilinx: +#if defined(CONFIG_FPGA_XILINX) + ret_val = xilinx_loads(desc->devdesc, buf, size, + fpga_sec_info); +#else + fpga_no_sup((char *)__func__, "Xilinx devices"); +#endif + break; + default: + printf("%s: Invalid or unsupported device type %d\n", + __func__, desc->devtype); + } + } + + return ret_val; +} +#endif + /* * Generic multiplexing code */ diff --git a/include/fpga.h b/include/fpga.h index f4440933531..195f0bdd57a 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -20,6 +20,9 @@ /* device numbers must be non-negative */ #define FPGA_INVALID_DEVICE -1 +#define FPGA_ENC_USR_KEY 1 +#define FPGA_NO_ENC_OR_NO_AUTH 2 + /* root data type defintions */ typedef enum { /* typedef fpga_type */ fpga_min_type, /* range check value */ @@ -42,6 +45,12 @@ typedef struct { /* typedef fpga_desc */ int fstype; } fpga_fs_info; +struct fpga_secure_info { + u8 *userkey_addr; + u8 authflag; + u8 encflag; +}; + typedef enum { BIT_FULL = 0, BIT_PARTIAL, @@ -58,6 +67,8 @@ int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype); int fpga_fsload(int devnum, const void *buf, size_t size, fpga_fs_info *fpga_fsinfo); +int fpga_loads(int devnum, const void *buf, size_t size, + struct fpga_secure_info *fpga_sec_info); int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, bitstream_type bstype); int fpga_dump(int devnum, const void *buf, size_t bsize); -- cgit v1.3.1 From a18d09ea384fb66105fbfa24fd2d1288754b8f07 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Thu, 31 May 2018 15:10:23 +0530 Subject: fpga: zynqmp: Add secure bitstream loading for ZynqMP This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/sys_proto.h | 6 ++++ configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 1 + drivers/fpga/xilinx.c | 18 ++++++++++ drivers/fpga/zynqmppl.c | 48 +++++++++++++++++++++++++++ include/xilinx.h | 4 +++ include/zynqmppl.h | 3 ++ 6 files changed, 80 insertions(+) (limited to 'include') diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 6056bc6c0c5..773b930512b 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -13,8 +13,14 @@ #define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D #define KEY_PTR_LEN 32 +#define ZYNQMP_FPGA_BIT_AUTH_DDR 1 +#define ZYNQMP_FPGA_BIT_AUTH_OCM 2 +#define ZYNQMP_FPGA_BIT_ENC_USR_KEY 3 +#define ZYNQMP_FPGA_BIT_ENC_DEV_KEY 4 #define ZYNQMP_FPGA_BIT_NS 5 +#define ZYNQMP_FPGA_AUTH_DDR 1 + enum { IDCODE, VERSION, diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig index 4cb3959f362..1379f14e013 100644 --- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_FPGA_LOAD_SECURE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 724304a5451..f5135504eeb 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -171,6 +171,24 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize, } #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) +int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info) +{ + if (!xilinx_validate(desc, (char *)__func__)) { + printf("%s: Invalid device descriptor\n", __func__); + return FPGA_FAIL; + } + + if (!desc->operations || !desc->operations->loads) { + printf("%s: Missing loads operation\n", __func__); + return FPGA_FAIL; + } + + return desc->operations->loads(desc, buf, bsize, fpga_sec_info); +} +#endif + int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize) { if (!xilinx_validate (desc, (char *)__FUNCTION__)) { diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index b57623b6a75..03ffa8c11f2 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -223,6 +223,51 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, return ret; } +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD) +static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info) +{ + int ret; + u32 buf_lo, buf_hi; + u32 ret_payload[PAYLOAD_ARG_CNT]; + u8 flag = 0; + + flush_dcache_range((ulong)buf, (ulong)buf + + ALIGN(bsize, CONFIG_SYS_CACHELINE_SIZE)); + + if (!fpga_sec_info->encflag) + flag |= BIT(ZYNQMP_FPGA_BIT_ENC_DEV_KEY); + + if (fpga_sec_info->userkey_addr && + fpga_sec_info->encflag == FPGA_ENC_USR_KEY) { + flush_dcache_range((ulong)fpga_sec_info->userkey_addr, + (ulong)fpga_sec_info->userkey_addr + + ALIGN(KEY_PTR_LEN, + CONFIG_SYS_CACHELINE_SIZE)); + flag |= BIT(ZYNQMP_FPGA_BIT_ENC_USR_KEY); + } + + if (!fpga_sec_info->authflag) + flag |= BIT(ZYNQMP_FPGA_BIT_AUTH_OCM); + + if (fpga_sec_info->authflag == ZYNQMP_FPGA_AUTH_DDR) + flag |= BIT(ZYNQMP_FPGA_BIT_AUTH_DDR); + + buf_lo = lower_32_bits((ulong)buf); + buf_hi = upper_32_bits((ulong)buf); + + ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi, + (u32)(uintptr_t)fpga_sec_info->userkey_addr, + flag, ret_payload); + if (ret) + puts("PL FPGA LOAD fail\n"); + else + puts("Bitstream successfully loaded\n"); + + return ret; +} +#endif + static int zynqmp_pcap_info(xilinx_desc *desc) { int ret; @@ -238,5 +283,8 @@ static int zynqmp_pcap_info(xilinx_desc *desc) struct xilinx_fpga_op zynqmp_op = { .load = zynqmp_load, +#if defined CONFIG_CMD_FPGA_LOAD_SECURE + .loads = zynqmp_loads, +#endif .info = zynqmp_pcap_info, }; diff --git a/include/xilinx.h b/include/xilinx.h index 9429f51b48a..af40befa52d 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -48,6 +48,8 @@ typedef struct { /* typedef xilinx_desc */ struct xilinx_fpga_op { int (*load)(xilinx_desc *, const void *, size_t, bitstream_type); int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *); + int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info); int (*dump)(xilinx_desc *, const void *, size_t); int (*info)(xilinx_desc *); }; @@ -60,6 +62,8 @@ int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize); int xilinx_info(xilinx_desc *desc); int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize, fpga_fs_info *fpga_fsinfo); +int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info); /* Board specific implementation specific function types *********************************************************************/ diff --git a/include/zynqmppl.h b/include/zynqmppl.h index a0f4e68a0c1..5214db99fba 100644 --- a/include/zynqmppl.h +++ b/include/zynqmppl.h @@ -16,6 +16,9 @@ #define ZYNQMP_FPGA_OP_LOAD (1 << 1) #define ZYNQMP_FPGA_OP_DONE (1 << 2) +#define ZYNQMP_FPGA_FLAG_AUTHENTICATED BIT(2) +#define ZYNQMP_FPGA_FLAG_ENCRYPTED BIT(3) + #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15 #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \ ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT) -- cgit v1.3.1