From 487fa1aa97bb69eeaf620a229da0aa27b9375a52 Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Wed, 23 Aug 2023 16:25:46 +0300 Subject: fsl-layerscape: drop obsolete PPA secure firmware support PPA was a secure firmware developed in-house which is no longer supported and replaced by TF-A quite some years ago. Drop support for it. Signed-off-by: Laurentiu Tudor Signed-off-by: Peng Fan --- include/configs/ls1046a_common.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 38fb1d45bcb..867b098a073 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -21,8 +21,7 @@ (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT)) #define SPL_NO_MMC #endif -#if defined(CONFIG_SPL_BUILD) && \ - !defined(CONFIG_SPL_FSL_LS_PPA) +#if defined(CONFIG_SPL_BUILD) #define SPL_NO_IFC #endif -- cgit v1.3.1 From 1dd7b5663459daa2a443d0713fda0af8564e0fee Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Wed, 27 Sep 2023 18:30:47 +0300 Subject: drivers: net: fsl-mc: add support for MC reserved memory Add support for declaring in device tree the reserved memory ranges required for MC. Since the MC firmware acts as any DMA master present in the SoC, the reserved memory ranges need also be identity mapped in the SMMU, so create the required 'iommu-addresses' property in the reserved memory nodes. For now this support is used only on LX2160A SoCs. Signed-off-by: Laurentiu Tudor Signed-off-by: Peng Fan --- board/freescale/lx2160a/lx2160a.c | 1 + drivers/net/fsl-mc/mc.c | 110 ++++++++++++++++++++++++++++++++++++++ include/fsl-mc/fsl_mc.h | 1 + 3 files changed, 112 insertions(+) (limited to 'include') diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 2883848550a..b3187a14214 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -836,6 +836,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) #ifdef CONFIG_FSL_MC_ENET fdt_fsl_mc_fixup_iommu_map_entry(blob); fdt_fixup_board_enet(blob); + fdt_reserve_mc_mem(blob, 0x4000); #endif fdt_fixup_icid(blob); diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 984616fb65c..f5c5057bec1 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -30,6 +30,8 @@ #include #include #include +#include +#include #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024) #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1)) @@ -929,6 +931,114 @@ unsigned long mc_get_dram_block_size(void) return dram_block_size; } +/** + * Populate the device tree with MC reserved memory ranges. + */ +void fdt_reserve_mc_mem(void *blob, u32 mc_icid) +{ + u32 phandle, mc_ph; + int noff, ret, i; + char mem_name[16]; + struct fdt_memory mc_mem_ranges[] = { + { + .start = 0, + .end = 0 + }, + { + .start = CFG_SYS_FSL_MC_BASE, + .end = CFG_SYS_FSL_MC_BASE + CFG_SYS_FSL_MC_SIZE - 1 + }, + { + .start = CFG_SYS_FSL_NI_BASE, + .end = CFG_SYS_FSL_NI_BASE + CFG_SYS_FSL_NI_SIZE - 1 + }, + { + .start = CFG_SYS_FSL_QBMAN_BASE, + .end = CFG_SYS_FSL_QBMAN_BASE + + CFG_SYS_FSL_QBMAN_SIZE - 1 + }, + { + .start = CFG_SYS_FSL_PEBUF_BASE, + .end = CFG_SYS_FSL_PEBUF_BASE + + CFG_SYS_FSL_PEBUF_SIZE - 1 + }, + { + .start = CFG_SYS_FSL_CCSR_BASE, + .end = CFG_SYS_FSL_CCSR_BASE + CFG_SYS_FSL_CCSR_SIZE - 1 + } + }; + + mc_mem_ranges[0].start = gd->arch.resv_ram; + mc_mem_ranges[0].end = mc_mem_ranges[0].start + + mc_get_dram_block_size() - 1; + + for (i = 0; i < ARRAY_SIZE(mc_mem_ranges); i++) { + noff = fdt_node_offset_by_compatible(blob, -1, "fsl,qoriq-mc"); + if (noff < 0) { + printf("WARN: failed to get MC node: %d\n", noff); + return; + } + mc_ph = fdt_get_phandle(blob, noff); + if (!mc_ph) { + mc_ph = fdt_create_phandle(blob, noff); + if (!mc_ph) { + printf("WARN: failed to get MC node phandle\n"); + return; + } + } + + sprintf(mem_name, "mc-mem%d", i); + ret = fdtdec_add_reserved_memory(blob, mem_name, + &mc_mem_ranges[i], NULL, 0, + &phandle, 0); + if (ret < 0) { + printf("ERROR: failed to reserve MC memory: %d\n", ret); + return; + } + + noff = fdt_node_offset_by_phandle(blob, phandle); + if (noff < 0) { + printf("ERROR: failed get resvmem node offset: %d\n", + noff); + return; + } + ret = fdt_setprop_u32(blob, noff, "iommu-addresses", mc_ph); + if (ret < 0) { + printf("ERROR: failed to set 'iommu-addresses': %d\n", + ret); + return; + } + ret = fdt_appendprop_u64(blob, noff, "iommu-addresses", + mc_mem_ranges[i].start); + if (ret < 0) { + printf("ERROR: failed to set 'iommu-addresses': %d\n", + ret); + return; + } + ret = fdt_appendprop_u64(blob, noff, "iommu-addresses", + mc_mem_ranges[i].end - + mc_mem_ranges[i].start + 1); + if (ret < 0) { + printf("ERROR: failed to set 'iommu-addresses': %d\n", + ret); + return; + } + + noff = fdt_node_offset_by_phandle(blob, mc_ph); + if (noff < 0) { + printf("ERROR: failed get MC node offset: %d\n", noff); + return; + } + ret = fdt_appendprop_u32(blob, noff, "memory-region", phandle); + if (ret < 0) { + printf("ERROR: failed to set 'memory-region': %d\n", + ret); + } + } + + fdt_set_iommu_prop(blob, noff, fdt_get_smmu_phandle(blob), &mc_icid, 1); +} + int fsl_mc_ldpaa_init(struct bd_info *bis) { int i; diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h index c701dc1084b..258738dfc8c 100644 --- a/include/fsl-mc/fsl_mc.h +++ b/include/fsl-mc/fsl_mc.h @@ -66,6 +66,7 @@ int get_mc_boot_status(void); int get_dpl_apply_status(void); int is_lazy_dpl_addr_valid(void); void fdt_fixup_mc_ddr(u64 *base, u64 *size); +void fdt_reserve_mc_mem(void *blob, u32 mc_icid); #ifdef CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET int get_aiop_apply_status(void); #endif -- cgit v1.3.1