From 1db7377a70a8d931c32648e717695133120d5456 Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Thu, 13 Sep 2012 22:22:04 +0000 Subject: mmc: at91: add multi block read/write support. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it. Signed-off-by: Josh Wu Signed-off-by: Andreas Bießmann --- include/atmel_mci.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/atmel_mci.h b/include/atmel_mci.h index 3dd5d67be9d..c711881276b 100644 --- a/include/atmel_mci.h +++ b/include/atmel_mci.h @@ -38,7 +38,7 @@ typedef struct atmel_mci { u32 sdcr; /* 0x0c */ u32 argr; /* 0x10 */ u32 cmdr; /* 0x14 */ - u32 _18; /* 0x18 */ + u32 blkr; /* 0x18 */ u32 _1c; /* 0x1c */ u32 rspr; /* 0x20 */ u32 rspr1; /* 0x24 */ @@ -118,6 +118,11 @@ typedef struct atmel_mci { #define MMCI_TRTYP_OFFSET 19 #define MMCI_TRTYP_SIZE 2 +/* Bitfields in BLKR */ +/* MMCI_BLKLEN_OFFSET/SIZE already defined in MR */ +#define MMCI_BCNT_OFFSET 0 +#define MMCI_BCNT_SIZE 16 + /* Bitfields in RSPRx */ #define MMCI_RSP_OFFSET 0 #define MMCI_RSP_SIZE 32 -- cgit v1.3.1 From 3a49cd7e1a26af6708b05d4877bb0254a08dded3 Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Thu, 13 Sep 2012 22:22:05 +0000 Subject: ARM: at91sam9x5: enable MCI0 support for 9x5ek board. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Josh Wu Signed-off-by: Andreas Bießmann --- arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 15 +++++++++++++++ board/atmel/at91sam9x5ek/at91sam9x5ek.c | 10 ++++++++++ include/configs/at91sam9x5ek.h | 10 ++++++++++ 3 files changed, 35 insertions(+) (limited to 'include') diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c index 6d77219d0da..93485523b58 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c @@ -118,6 +118,21 @@ void at91_serial2_hw_init(void) writel(1 << ATMEL_ID_USART2, &pmc->pcer); } +void at91_mci_hw_init(void) +{ + /* Initialize the MCI0 */ + at91_set_a_periph(AT91_PIO_PORTA, 17, 1); /* MCCK */ + at91_set_a_periph(AT91_PIO_PORTA, 16, 1); /* MCCDA */ + at91_set_a_periph(AT91_PIO_PORTA, 15, 1); /* MCDA0 */ + at91_set_a_periph(AT91_PIO_PORTA, 18, 1); /* MCDA1 */ + at91_set_a_periph(AT91_PIO_PORTA, 19, 1); /* MCDA2 */ + at91_set_a_periph(AT91_PIO_PORTA, 20, 1); /* MCDA3 */ + + /* Enable clock for MCI0 */ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + writel(1 << ATMEL_ID_HSMCI0, &pmc->pcer); +} + #ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index 06028aa01e8..edb088680d0 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -31,6 +31,7 @@ #include #include #include +#include #ifdef CONFIG_MACB #include #endif @@ -258,6 +259,15 @@ void spi_cs_deactivate(struct spi_slave *slave) } #endif /* CONFIG_ATMEL_SPI */ +#ifdef CONFIG_GENERIC_ATMEL_MCI +int board_mmc_init(bd_t *bd) +{ + at91_mci_hw_init(); + + return atmel_mci_init((void *)ATMEL_BASE_HSMCI0); +} +#endif + int board_early_init_f(void) { at91_seriald_hw_init(); diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index cbdc3e93cbf..71f765b4942 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -89,6 +89,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND #define CONFIG_CMD_SF +#define CONFIG_CMD_MMC /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -138,6 +139,15 @@ #define CONFIG_CMD_UBIFS #endif +/* MMC */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_CMD_FAT +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#define CONFIG_DOS_PARTITION +#endif + /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -- cgit v1.3.1 From 669681104daac2bfbdc733d7426b19e358eced8a Mon Sep 17 00:00:00 2001 From: Andrew Bradford Date: Mon, 1 Oct 2012 05:06:52 +0000 Subject: configs: Fix usage of mmc rescan Fix usage of 'mmc rescan' by many configs. Proper use is 'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan the device. 'mmc rescan' itself does not take any arguments. Signed-off-by: Andrew Bradford --- include/configs/am335x_evm.h | 2 +- include/configs/am3517_crane.h | 2 +- include/configs/am3517_evm.h | 2 +- include/configs/cm_t35.h | 2 +- include/configs/devkit8000.h | 2 +- include/configs/igep00x0.h | 2 +- include/configs/mx28evk.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53ard.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/mx53smd.h | 2 +- include/configs/mx6qarm2.h | 2 +- include/configs/mx6qsabrelite.h | 2 +- include/configs/omap3_beagle.h | 2 +- include/configs/omap3_evm.h | 2 +- include/configs/omap3_logic.h | 2 +- include/configs/omap3_overo.h | 2 +- include/configs/omap3_zoom1.h | 2 +- include/configs/omap4_common.h | 2 +- include/configs/omap5_evm.h | 2 +- include/configs/tricorder.h | 2 +- 22 files changed, 22 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 339d4bdb631..9d807391bab 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -81,7 +81,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ "if run loadbootenv; then " \ "echo Loaded environment from ${bootenv};" \ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 8ddeff46f44..20a3df5db28 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -209,7 +209,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 698081100ee..ce71d1335c5 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -206,7 +206,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 46c556ddc8e..6f355c7af0c 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -231,7 +231,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 1e658067e04..da3263f4f59 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -233,7 +233,7 @@ "dhcp ${loadaddr}; " \ "run netargs; " \ "bootm ${loadaddr}\0" \ - "autoboot=if mmc rescan ${mmcdev}; then " \ + "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index b1071e892c8..c81ab7622eb 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -180,7 +180,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ "if run loadbootenv; then " \ "run importbootenv;" \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 7cdbec68dea..e188f029c75 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -313,7 +313,7 @@ "dhcp ${uimage}; bootm\0" #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 34b07831cb3..dcae53786bb 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -182,7 +182,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index fea93b4dc06..62cb42bc4c9 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -119,7 +119,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 832050ea970..69937d834e6 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -132,7 +132,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 6a6aaa1923f..55efeb741c3 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -140,7 +140,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index ff2a290d7ad..9e8331970cf 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -118,7 +118,7 @@ "dhcp ${uimage}; bootm\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 965bea37ca9..fbc51625bad 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -106,7 +106,7 @@ #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev};" \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index e7bf6582c33..ec9ab264932 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -164,7 +164,7 @@ #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev};" \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index f79f996450d..7a3cc16a09b 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -289,7 +289,7 @@ "userbutton_nonxm=gpio input 7;\0" /* "run userbutton" will return 1 (false) if is pressed and 0 (false) if not */ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run userbutton; then " \ "setenv bootenv uEnv.txt;" \ "else " \ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 632a13fa9f9..f6e4236998f 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -162,7 +162,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index b975a6c9a4d..b2457d0bc6e 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -202,7 +202,7 @@ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ - "autoboot=if mmc rescan ${mmcdev}; then " \ + "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index f6d6f75fca4..626cf7afd5c 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -188,7 +188,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 891e6f4363a..e152055a64e 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -198,7 +198,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index cbc9bdb4026..a32369af327 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -165,7 +165,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index 743edfdcc59..623da777faa 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -167,7 +167,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 00d02e8ca05..5859a7337b7 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -201,7 +201,7 @@ "run nandargs; " \ "run loaduimage_ubi; " \ "bootm ${loadaddr}\0" \ - "autoboot=if mmc rescan ${mmcdev}; then " \ + "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ -- cgit v1.3.1 From 3530a35d747508e98976a1d86a6d3f9b31cb3fd2 Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Sun, 7 Oct 2012 01:17:34 +0000 Subject: cm-t35: clean unused defines from config Neither cm-t35, nor cm-t3730 is using OneNAND or flash. Remove the related defines from config file. Signed-off-by: Igor Grinberg --- include/configs/cm_t35.h | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'include') diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 6f355c7af0c..568ae8e0972 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -289,25 +289,15 @@ */ /* **** PISMO SUPPORT *** */ - /* Configure the PISMO */ #define PISMO1_NAND_SIZE GPMC_SIZE_128M -#define PISMO1_ONEN_SIZE GPMC_SIZE_128M - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE -#endif /* Monitor at start of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_ENV_IS_IN_NAND -#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ - #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -- cgit v1.3.1 From e47c9e8608df6c95b6a324925573bac12045e059 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 16 Oct 2012 04:07:03 +0000 Subject: OMAP3: updated pinmux and environment for new revision of mcx board The mcx board was slightly modified and the pinmux must be updated. There is no need to support the old board, that becomes obsolete. Signed-off-by: Stefano Babic --- board/htkw/mcx/mcx.h | 26 +++++++++++++------------- include/configs/mcx.h | 12 +++++++----- 2 files changed, 20 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/board/htkw/mcx/mcx.h b/board/htkw/mcx/mcx.h index 867cc9e88da..1003bfddd92 100644 --- a/board/htkw/mcx/mcx.h +++ b/board/htkw/mcx/mcx.h @@ -143,28 +143,28 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA0), (IEN | PTU | EN | M4))\ - MUX_VAL(CP(DSS_DATA1), (IEN | PTU | EN | M4)) \ - MUX_VAL(CP(DSS_DATA2), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA8), (IEN | PTU | EN | M4)) \ - MUX_VAL(CP(DSS_DATA9), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0))\ - MUX_VAL(CP(DSS_DATA16), (IEN | PTU | EN | M4)) \ - MUX_VAL(CP(DSS_DATA17), (IEN | PTU | EN | M4)) \ - MUX_VAL(CP(DSS_DATA18), (IEN | PTU | EN | M4)) \ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \ /* CAMERA */\ @@ -313,11 +313,11 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(RMII_TXEN), (PTD | M0)) \ MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) \ /* HECC */\ - MUX_VAL(CP(HECC1_TXD), (IEN | PTD | EN | M4)) \ - MUX_VAL(CP(HECC1_RXD), (IEN | PTD | EN | M4)) \ + MUX_VAL(CP(HECC1_TXD), (IEN | PTD | EN | M0)) \ + MUX_VAL(CP(HECC1_RXD), (IEN | PTD | EN | M0)) \ /* HSUSB */\ MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) \ + MUX_VAL(CP(HSUSB0_STP), (IEN | PTU | DIS | M0)) \ MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) \ diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 359522a649c..d3061a294c2 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -256,22 +256,24 @@ "run nandargs; " \ "ubi part nand0,4;" \ "ubi readvol ${loadaddr} kernel;" \ - "run addip addtty addmtd addfb addeth addmisc;" \ + "run addtty addmtd addfb addeth addmisc;" \ "bootm ${loadaddr}\0" \ - "swupdate_args=setenv bootargs ubi.mtd=6 root=ubi0:fs_recovery "\ - "rootfstype=ubifs quiet loglevel=1 " \ - "consoleblank=0 ${swupdate_misc}\0" \ + "swupdate_args=setenv bootargs root=/dev/ram " \ + "quiet loglevel=1 " \ + "consoleblank=0 ${swupdate_misc}\0" \ "swupdate=echo Running Sw-Update...;" \ "if printenv mtdparts;then echo Starting SwUpdate...; " \ "else mtdparts default;fi; " \ "ubi part nand0,5;" \ "ubi readvol 0x82000000 kernel_recovery;" \ + "ubi part nand0,6;" \ + "ubi readvol 0x84000000 fs_recovery;" \ "run swupdate_args; " \ "setenv bootargs ${bootargs} " \ "${mtdparts} " \ "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ "omapdss.def_disp=lcd;" \ - "bootm ${loadaddr}\0" + "bootm 0x82000000 0x84000000\0" #define CONFIG_BOOTCOMMAND \ "run nandboot" -- cgit v1.3.1 From 8c735b990989bcd3909081aff7e6913222ac38e9 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 16 Oct 2012 04:07:04 +0000 Subject: OMAP3: mcx: updated to new hardware revision Some GPIOs differ in the new revision board. Previous revision are considered obsolete and they will not anymore supported. Signed-off-by: Stefano Babic --- board/htkw/mcx/mcx.c | 19 +++---------------- board/htkw/mcx/mcx.h | 2 +- include/configs/mcx.h | 3 +-- 3 files changed, 5 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c index 7c9d34ab842..1f9840c34d0 100644 --- a/board/htkw/mcx/mcx.c +++ b/board/htkw/mcx/mcx.c @@ -37,12 +37,12 @@ DECLARE_GLOBAL_DATA_PTR; -#define HOT_WATER_BUTTON 38 +#define HOT_WATER_BUTTON 42 #ifdef CONFIG_USB_EHCI static struct omap_usbhs_board_data usbhs_bdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, + .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, }; @@ -87,6 +87,7 @@ int board_late_init(void) return 0; setenv("bootcmd", "run swupdate"); + return 0; } #endif @@ -108,17 +109,3 @@ int board_mmc_init(bd_t *bis) return omap_mmc_init(0, 0, 0); } #endif - -#ifdef CONFIG_USB_EHCI_OMAP -#define USB_HOST_PWR_EN 132 -int board_usb_init(void) -{ - if (gpio_request(USB_HOST_PWR_EN, "USB_HOST_PWR_EN") < 0) { - puts("Failed to get USB_HOST_PWR_EN pin\n"); - return -ENODEV; - } - gpio_direction_output(USB_HOST_PWR_EN, 1); - - return 0; -} -#endif diff --git a/board/htkw/mcx/mcx.h b/board/htkw/mcx/mcx.h index 1003bfddd92..f9601c641fd 100644 --- a/board/htkw/mcx/mcx.h +++ b/board/htkw/mcx/mcx.h @@ -96,7 +96,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_A7), (IEN | PTU | EN | M4)) \ MUX_VAL(CP(GPMC_A8), (IEN | PTU | EN | M4)) \ MUX_VAL(CP(GPMC_A9), (IEN | PTU | EN | M4)) \ - MUX_VAL(CP(GPMC_A10), (IDIS | PTU | DIS | M4)) \ + MUX_VAL(CP(GPMC_A10), (IEN | PTU | EN | M4)) \ /* GPIO_43 LCD buffer enable */ \ MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) \ MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) \ diff --git a/include/configs/mcx.h b/include/configs/mcx.h index d3061a294c2..96e10599651 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -115,8 +115,7 @@ #define CONFIG_USB_ULPI #define CONFIG_USB_ULPI_VIEWPORT_OMAP /*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 154 -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 152 +#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 /* commands to include */ -- cgit v1.3.1 From 8f1fae26a7fb4c0c2897f2f086fe8a3e1da58a9a Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 20 Oct 2012 23:56:07 +0000 Subject: OMAP3: add video support to the mcx board Add video support to the board with the display focaltech etm070003dh6. Signed-off-by: Stefano Babic --- board/htkw/mcx/mcx.c | 41 +++++++++++++++++++++++++++++++++++++++++ board/htkw/mcx/mcx.h | 2 ++ include/configs/mcx.h | 16 +++++++++++++++- 3 files changed, 58 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c index 1f9840c34d0..9fe6408ecf9 100644 --- a/board/htkw/mcx/mcx.c +++ b/board/htkw/mcx/mcx.c @@ -27,6 +27,8 @@ #include #include #include +#include +#include #include "errno.h" #include #ifdef CONFIG_USB_EHCI @@ -38,6 +40,10 @@ DECLARE_GLOBAL_DATA_PTR; #define HOT_WATER_BUTTON 42 +#define LCD_OUTPUT 55 + +/* Address of the framebuffer in RAM. */ +#define FB_START_ADDRESS 0x88000000 #ifdef CONFIG_USB_EHCI static struct omap_usbhs_board_data usbhs_bdata = { @@ -67,6 +73,8 @@ int board_init(void) /* boot param addr */ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + gpio_direction_output(LCD_OUTPUT, 0); + return 0; } @@ -109,3 +117,36 @@ int board_mmc_init(bd_t *bis) return omap_mmc_init(0, 0, 0); } #endif + +#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD) + +static struct panel_config lcd_cfg = { + .timing_h = PANEL_TIMING_H(40, 40, 48), + .timing_v = PANEL_TIMING_V(29, 13, 3), + .pol_freq = 0x00003000, /* Pol Freq */ + .divisor = 0x0001000E, + .panel_type = 0x01, /* TFT */ + .data_lines = 0x03, /* 24 Bit RGB */ + .load_mode = 0x02, /* Frame Mode */ + .panel_color = 0, + .lcd_size = PANEL_LCD_SIZE(800, 480), +}; + +int board_video_init(void) +{ + struct prcm *prcm_base = (struct prcm *)PRCM_BASE; + void *fb; + + fb = (void *)FB_START_ADDRESS; + + lcd_cfg.frame_buffer = fb; + + setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON); + setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON); + + omap3_dss_panel_config(&lcd_cfg); + omap3_dss_enable(); + + return 0; +} +#endif diff --git a/board/htkw/mcx/mcx.h b/board/htkw/mcx/mcx.h index f9601c641fd..0d4c6422034 100644 --- a/board/htkw/mcx/mcx.h +++ b/board/htkw/mcx/mcx.h @@ -264,6 +264,8 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) \ MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) \ MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) \ + MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M4)) \ + /* GPIO_170 Touchscreen ISR */\ /* McSPI */\ MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) \ diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 96e10599651..bf49cc13813 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -181,7 +181,7 @@ #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ /* Environment information */ -#define CONFIG_BOOTDELAY 10 +#define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "uImage" @@ -257,6 +257,10 @@ "ubi readvol ${loadaddr} kernel;" \ "run addtty addmtd addfb addeth addmisc;" \ "bootm ${loadaddr}\0" \ + "preboot=ubi part nand0,7;" \ + "ubi readvol ${loadaddr} splash;" \ + "bmp display ${loadaddr};" \ + "gpio set 55\0" \ "swupdate_args=setenv bootargs root=/dev/ram " \ "quiet loglevel=1 " \ "consoleblank=0 ${swupdate_misc}\0" \ @@ -303,6 +307,7 @@ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ +#define CONFIG_PREBOOT /* * AM3517 has 12 GP timers, they can be driven by the system clock @@ -422,4 +427,13 @@ #define CONFIG_NET_RETRY_COUNT 10 #endif +#define CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_CMD_BMP +#define CONFIG_VIDEO_OMAP3 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 69916bcf71766d85cc6a7131a1d5716a724a8475 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 16 Oct 2012 13:06:07 +0000 Subject: am33xx: Add SPI SPL as an option Add the required config.mk logic for this SoC as well as the BOOT_DEVICE define. Finally, enable the options on the am335x_evm. Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/config.mk | 1 + arch/arm/include/asm/arch-am33xx/spl.h | 1 + include/configs/am335x_evm.h | 7 +++++++ 3 files changed, 9 insertions(+) (limited to 'include') diff --git a/arch/arm/cpu/armv7/am33xx/config.mk b/arch/arm/cpu/armv7/am33xx/config.mk index 5750bbdcb69..babf0eb5cc8 100644 --- a/arch/arm/cpu/armv7/am33xx/config.mk +++ b/arch/arm/cpu/armv7/am33xx/config.mk @@ -13,6 +13,7 @@ # ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/MLO +ALL-$(CONFIG_SPL_SPI_SUPPORT) += $(OBJTREE)/MLO.byteswap else ALL-y += $(obj)u-boot.img endif diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index 63ed10b257a..644ff353feb 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -27,6 +27,7 @@ #define BOOT_DEVICE_NAND 5 #define BOOT_DEVICE_MMC1 8 #define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */ +#define BOOT_DEVICE_SPI 11 #define BOOT_DEVICE_UART 65 #define BOOT_DEVICE_CPGMAC 70 #define BOOT_DEVICE_MMC2_2 0xFF diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 9d807391bab..58d62d0c7d4 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -218,6 +218,13 @@ #define CONFIG_SPL_NET_SUPPORT #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" #define CONFIG_SPL_ETH_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" /* -- cgit v1.3.1 From 6f62f4207112013852be87dc2b9c7c570eba11c9 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 3 Oct 2012 08:54:08 +0000 Subject: arm: Remove support for lpc2292 This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut --- arch/arm/cpu/arm720t/cpu.c | 2 +- arch/arm/cpu/arm720t/interrupts.c | 28 +-- arch/arm/cpu/arm720t/lpc2292/Makefile | 50 ----- arch/arm/cpu/arm720t/lpc2292/flash.c | 249 --------------------- arch/arm/cpu/arm720t/lpc2292/iap_entry.S | 7 - arch/arm/cpu/arm720t/lpc2292/mmc.c | 131 ----------- arch/arm/cpu/arm720t/lpc2292/mmc_hw.c | 233 ------------------- arch/arm/cpu/arm720t/lpc2292/mmc_hw.h | 29 --- arch/arm/cpu/arm720t/lpc2292/spi.c | 40 ---- arch/arm/cpu/arm720t/start.S | 69 +----- arch/arm/include/asm/arch-lpc2292/hardware.h | 33 --- .../include/asm/arch-lpc2292/lpc2292_registers.h | 225 ------------------- arch/arm/include/asm/arch-lpc2292/spi.h | 82 ------- doc/driver-model/UDM-serial.txt | 30 ++- drivers/i2c/soft_i2c.c | 3 - drivers/serial/Makefile | 1 - drivers/serial/serial.c | 2 - drivers/serial/serial_lpc2292.c | 117 ---------- include/flash.h | 1 - 19 files changed, 16 insertions(+), 1316 deletions(-) delete mode 100644 arch/arm/cpu/arm720t/lpc2292/Makefile delete mode 100644 arch/arm/cpu/arm720t/lpc2292/flash.c delete mode 100644 arch/arm/cpu/arm720t/lpc2292/iap_entry.S delete mode 100644 arch/arm/cpu/arm720t/lpc2292/mmc.c delete mode 100644 arch/arm/cpu/arm720t/lpc2292/mmc_hw.c delete mode 100644 arch/arm/cpu/arm720t/lpc2292/mmc_hw.h delete mode 100644 arch/arm/cpu/arm720t/lpc2292/spi.c delete mode 100644 arch/arm/include/asm/arch-lpc2292/hardware.h delete mode 100644 arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h delete mode 100644 arch/arm/include/asm/arch-lpc2292/spi.h delete mode 100644 drivers/serial/serial_lpc2292.c (limited to 'include') diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c index ce7b3c9c24e..e25f6f2ea7a 100644 --- a/arch/arm/cpu/arm720t/cpu.c +++ b/arch/arm/cpu/arm720t/cpu.c @@ -46,7 +46,7 @@ int cleanup_before_linux (void) * and we set the CPU-speed to 73 MHz - see start.S for details */ -#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292) +#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) disable_interrupts (); /* Nothing more needed */ #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index c2f898f2cc9..5b21cc3ceaf 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -37,11 +37,6 @@ /* macro to read the 16 bit timer */ #define READ_TIMER (IO_TC1D & 0xffff) -#ifdef CONFIG_LPC2292 -#undef READ_TIMER -#define READ_TIMER (0xFFFFFFFF - GET32(T0TC)) -#endif - #else #define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE)) #define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL)) @@ -73,13 +68,6 @@ void do_irq (struct pt_regs *pt_regs) } #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) /* No do_irq() for IntegratorAP/CM720T as yet */ -#elif defined(CONFIG_LPC2292) - - void (*pfnct)(void); - - pfnct = (void (*)(void))VICVectAddr; - - (*pfnct)(); #else #error do_irq() not defined for this CPU type #endif @@ -172,14 +160,6 @@ int timer_init (void) /* Start timer */ SET_REG( REG_TMOD, TM0_RUN); -#elif defined(CONFIG_LPC2292) - PUT32(T0IR, 0); /* disable all timer0 interrupts */ - PUT32(T0TCR, 0); /* disable timer0 */ - PUT32(T0PR, CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ); - PUT32(T0MCR, 0); - PUT32(T0TC, 0); - PUT32(T0TCR, 1); /* enable timer0 */ - #elif defined(CONFIG_TEGRA) /* No timer routines for tegra as yet */ lastdec = 0; @@ -198,7 +178,7 @@ int timer_init (void) */ -#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292) +#if defined(CONFIG_NETARM) ulong get_timer (ulong base) { @@ -216,12 +196,6 @@ void __udelay (unsigned long usec) tmo += get_timer (0); while (get_timer_masked () < tmo) -#ifdef CONFIG_LPC2292 - /* GJ - not sure whether this is really needed or a misunderstanding */ - __asm__ __volatile__(" nop"); -#else - /*NOP*/; -#endif } ulong get_timer_masked (void) diff --git a/arch/arm/cpu/arm720t/lpc2292/Makefile b/arch/arm/cpu/arm720t/lpc2292/Makefile deleted file mode 100644 index 1b930086856..00000000000 --- a/arch/arm/cpu/arm720t/lpc2292/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2000-2007 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(SOC).o - -COBJS = flash.o mmc.o mmc_hw.o spi.o -SOBJS = $(obj)iap_entry.o - -SRCS := $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) - -all: $(obj).depend $(LIB) - -$(LIB): $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -# this MUST be compiled as thumb code! -$(SOBJS): - $(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/arch/arm/cpu/arm720t/lpc2292/flash.c b/arch/arm/cpu/arm720t/lpc2292/flash.c deleted file mode 100644 index 3d2dc32231e..00000000000 --- a/arch/arm/cpu/arm720t/lpc2292/flash.c +++ /dev/null @@ -1,249 +0,0 @@ -/* - * (C) Copyright 2006 Embedded Artists AB - * - * Modified to remove all but the IAP-command related code by - * Gary Jennejohn - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -/* IAP commands use 32 bytes at the top of CPU internal sram, we - use 512 bytes below that */ -#define COPY_BUFFER_LOCATION 0x40003de0 - -#define IAP_LOCATION 0x7ffffff1 -#define IAP_CMD_PREPARE 50 -#define IAP_CMD_COPY 51 -#define IAP_CMD_ERASE 52 -#define IAP_CMD_CHECK 53 -#define IAP_CMD_ID 54 -#define IAP_CMD_VERSION 55 -#define IAP_CMD_COMPARE 56 - -#define IAP_RET_CMD_SUCCESS 0 - -static unsigned long command[5]; -static unsigned long result[2]; - -extern void iap_entry(unsigned long * command, unsigned long * result); - -/*----------------------------------------------------------------------- - * - */ -static int get_flash_sector(flash_info_t * info, ulong flash_addr) -{ - int i; - - for(i = 1; i < (info->sector_count); i++) { - if (flash_addr < (info->start[i])) - break; - } - - return (i-1); -} - -/*----------------------------------------------------------------------- - * This function assumes that flash_addr is aligned on 512 bytes boundary - * in flash. This function also assumes that prepare have been called - * for the sector in question. - */ -int lpc2292_copy_buffer_to_flash(flash_info_t * info, ulong flash_addr) -{ - int first_sector; - int last_sector; - - first_sector = get_flash_sector(info, flash_addr); - last_sector = get_flash_sector(info, flash_addr + 512 - 1); - - /* prepare sectors for write */ - command[0] = IAP_CMD_PREPARE; - command[1] = first_sector; - command[2] = last_sector; - iap_entry(command, result); - if (result[0] != IAP_RET_CMD_SUCCESS) { - printf("IAP prepare failed\n"); - return ERR_PROG_ERROR; - } - - command[0] = IAP_CMD_COPY; - command[1] = flash_addr; - command[2] = COPY_BUFFER_LOCATION; - command[3] = 512; - command[4] = CONFIG_SYS_SYS_CLK_FREQ >> 10; - iap_entry(command, result); - if (result[0] != IAP_RET_CMD_SUCCESS) { - printf("IAP copy failed\n"); - return 1; - } - - return 0; -} - -/*----------------------------------------------------------------------- - */ - -int lpc2292_flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag; - int prot; - int sect; - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - if (prot) - return ERR_PROTECTED; - - - flag = disable_interrupts(); - - printf ("Erasing %d sectors starting at sector %2d.\n" - "This make take some time ... ", - s_last - s_first + 1, s_first); - - command[0] = IAP_CMD_PREPARE; - command[1] = s_first; - command[2] = s_last; - iap_entry(command, result); - if (result[0] != IAP_RET_CMD_SUCCESS) { - printf("IAP prepare failed\n"); - return ERR_PROTECTED; - } - - command[0] = IAP_CMD_ERASE; - command[1] = s_first; - command[2] = s_last; - command[3] = CONFIG_SYS_SYS_CLK_FREQ >> 10; - iap_entry(command, result); - if (result[0] != IAP_RET_CMD_SUCCESS) { - printf("IAP erase failed\n"); - return ERR_PROTECTED; - } - - if (flag) - enable_interrupts(); - - return ERR_OK; -} - -int lpc2292_write_buff (flash_info_t * info, uchar * src, ulong addr, - ulong cnt) -{ - int first_copy_size; - int last_copy_size; - int first_block; - int last_block; - int nbr_mid_blocks; - uchar memmap_value; - ulong i; - uchar* src_org; - uchar* dst_org; - int ret = ERR_OK; - - src_org = src; - dst_org = (uchar*)addr; - - first_block = addr / 512; - last_block = (addr + cnt) / 512; - nbr_mid_blocks = last_block - first_block - 1; - - first_copy_size = 512 - (addr % 512); - last_copy_size = (addr + cnt) % 512; - - debug("\ncopy first block: (1) %lX -> %lX 0x200 bytes, " - "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n", - (ulong)(first_block * 512), - (ulong)COPY_BUFFER_LOCATION, - (ulong)src, - (ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size), - first_copy_size, - (ulong)COPY_BUFFER_LOCATION, - (ulong)(first_block * 512)); - - /* copy first block */ - memcpy((void*)COPY_BUFFER_LOCATION, - (void*)(first_block * 512), 512); - memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size), - src, first_copy_size); - lpc2292_copy_buffer_to_flash(info, first_block * 512); - src += first_copy_size; - addr += first_copy_size; - - /* copy middle blocks */ - for (i = 0; i < nbr_mid_blocks; i++) { - debug("copy middle block: %lX -> %lX 512 bytes, " - "%lX -> %lX 512 bytes\n", - (ulong)src, - (ulong)COPY_BUFFER_LOCATION, - (ulong)COPY_BUFFER_LOCATION, - (ulong)addr); - - memcpy((void*)COPY_BUFFER_LOCATION, src, 512); - lpc2292_copy_buffer_to_flash(info, addr); - src += 512; - addr += 512; - } - - - if (last_copy_size > 0) { - debug("copy last block: (1) %lX -> %lX 0x200 bytes, " - "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n", - (ulong)(last_block * 512), - (ulong)COPY_BUFFER_LOCATION, - (ulong)src, - (ulong)(COPY_BUFFER_LOCATION), - last_copy_size, - (ulong)COPY_BUFFER_LOCATION, - (ulong)addr); - - /* copy last block */ - memcpy((void*)COPY_BUFFER_LOCATION, - (void*)(last_block * 512), 512); - memcpy((void*)COPY_BUFFER_LOCATION, - src, last_copy_size); - lpc2292_copy_buffer_to_flash(info, addr); - } - - /* verify write */ - memmap_value = GET8(MEMMAP); - - disable_interrupts(); - - PUT8(MEMMAP, 01); /* we must make sure that initial 64 - bytes are taken from flash when we - do the compare */ - - for (i = 0; i < cnt; i++) { - if (*dst_org != *src_org){ - printf("Write failed. Byte %lX differs\n", i); - ret = ERR_PROG_ERROR; - break; - } - dst_org++; - src_org++; - } - - PUT8(MEMMAP, memmap_value); - enable_interrupts(); - - return ret; -} diff --git a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S deleted file mode 100644 index c31d5190bd7..00000000000 --- a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S +++ /dev/null @@ -1,7 +0,0 @@ -IAP_ADDRESS: .word 0x7FFFFFF1 - -.globl iap_entry -iap_entry: - ldr r2, IAP_ADDRESS - bx r2 - mov pc, lr diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc.c b/arch/arm/cpu/arm720t/lpc2292/mmc.c deleted file mode 100644 index beaffe944c7..00000000000 --- a/arch/arm/cpu/arm720t/lpc2292/mmc.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include "mmc_hw.h" -#include - -#ifdef CONFIG_MMC - -#undef MMC_DEBUG - -static block_dev_desc_t mmc_dev; - -/* these are filled out by a call to mmc_hw_get_parameters */ -static int hw_size; /* in kbytes */ -static int hw_nr_sects; -static int hw_sect_size; /* in bytes */ - -block_dev_desc_t * mmc_get_dev(int dev) -{ - return (block_dev_desc_t *)(&mmc_dev); -} - -unsigned long mmc_block_read(int dev, - unsigned long start, - lbaint_t blkcnt, - void *buffer) -{ - unsigned long rc = 0; - unsigned char *p = (unsigned char *)buffer; - unsigned long i; - unsigned long addr = start; - -#ifdef MMC_DEBUG - printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start, - (unsigned long)blkcnt); -#endif - - for(i = 0; i < (unsigned long)blkcnt; i++) { -#ifdef MMC_DEBUG - printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p); -#endif - (void)mmc_read_sector(addr, p); - rc++; - addr++; - p += hw_sect_size; - } - - return rc; -} - -/*----------------------------------------------------------------------------- - * Read hardware paramterers (sector size, size, number of sectors) - */ -static int mmc_hw_get_parameters(void) -{ - unsigned char csddata[16]; - unsigned int sizemult; - unsigned int size; - - mmc_read_csd(csddata); - hw_sect_size = 1<<(csddata[5] & 0x0f); - size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0); - sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1); - hw_nr_sects = (size+1)*(1<<(sizemult+2)); - hw_size = hw_nr_sects*hw_sect_size/1024; - -#ifdef MMC_DEBUG - printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, " - "hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size); -#endif - - return 0; -} - -int mmc_legacy_init(int verbose) -{ - int ret = -ENODEV; - - if (verbose) - printf("mmc_legacy_init\n"); - - spi_init(); - /* this meeds to be done twice */ - mmc_hw_init(); - udelay(1000); - mmc_hw_init(); - - mmc_hw_get_parameters(); - - mmc_dev.if_type = IF_TYPE_MMC; - mmc_dev.part_type = PART_TYPE_DOS; - mmc_dev.dev = 0; - mmc_dev.lun = 0; - mmc_dev.type = 0; - mmc_dev.blksz = hw_sect_size; - mmc_dev.lba = hw_nr_sects; - sprintf((char*)mmc_dev.vendor, "Unknown vendor"); - sprintf((char*)mmc_dev.product, "Unknown product"); - sprintf((char*)mmc_dev.revision, "N/A"); - mmc_dev.removable = 0; /* should be true??? */ - mmc_dev.block_read = mmc_block_read; - - fat_register_device(&mmc_dev, 1); - - ret = 0; - - return ret; -} - -#endif /* CONFIG_MMC */ diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c deleted file mode 100644 index bd6a5b12060..00000000000 --- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - This code was original written by Ulrich Radig and modified by - Embedded Artists AB (www.embeddedartists.com). - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include -#include -#include -#include - -#define MMC_Enable() PUT32(IO1CLR, 1l << 22) -#define MMC_Disable() PUT32(IO1SET, 1l << 22) -#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0); - -static unsigned char Write_Command_MMC (unsigned char *CMD); -static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, - unsigned short int Bytes); - -/* initialize the hardware */ -int mmc_hw_init(void) -{ - unsigned long a; - unsigned short int Timeout = 0; - unsigned char b; - unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95}; - - /* set-up GPIO and SPI */ - (*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */ - (*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */ - - MMC_Disable(); - - spi_lock(); - spi_set_clock(248); - spi_set_cfg(0, 1, 0); - MMC_Enable(); - - /* waste some time */ - for(a=0; a < 20000; a++) - asm("nop"); - - /* Put the MMC/SD-card into SPI-mode */ - for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */ - spi_write(0xff); - - /* Sends command CMD0 to MMC/SD-card */ - while (Write_Command_MMC(CMD) != 1) { - if (Timeout++ > 200) { - MMC_Disable(); - spi_unlock(); - return(1); /* Abort with command 1 (return 1) */ - } - } - /* Sends Command CMD1 an MMC/SD-card */ - Timeout = 0; - CMD[0] = 0x41;/* Command 1 */ - CMD[5] = 0xFF; - - while (Write_Command_MMC(CMD) != 0) { - if (Timeout++ > 200) { - MMC_Disable(); - spi_unlock(); - return (2); /* Abort with command 2 (return 2) */ - } - } - - MMC_Disable(); - spi_unlock(); - - return 0; -} - -/* ############################################################################ - Sends a command to the MMC/SD-card - ######################################################################### */ -static unsigned char Write_Command_MMC (unsigned char *CMD) -{ - unsigned char a, tmp = 0xff; - unsigned short int Timeout = 0; - - MMC_Disable(); - spi_write(0xFF); - MMC_Enable(); - - for (a = 0; a < 0x06; a++) - spi_write(*CMD++); - - while (tmp == 0xff) { - tmp = spi_read(); - if (Timeout++ > 5000) - break; - } - - return (tmp); -} - -/* ############################################################################ - Routine to read the CID register from the MMC/SD-card (16 bytes) - ######################################################################### */ -void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short - int Bytes) -{ - unsigned short int a; - - spi_lock(); - mmc_spi_cfg(); - MMC_Enable(); - - if (Write_Command_MMC(CMD) != 0) { - MMC_Disable(); - spi_unlock(); - return; - } - - while (spi_read() != 0xfe) {}; - for (a = 0; a < Bytes; a++) - *Buffer++ = spi_read(); - - /* Read the CRC-byte */ - spi_read(); /* CRC - byte is discarded */ - spi_read(); /* CRC - byte is discarded */ - /* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */ - MMC_Disable(); - spi_unlock(); - - return; -} - -/* ############################################################################ - Routine to read a block (512 bytes) from the MMC/SD-card - ######################################################################### */ -unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer) -{ - /* Command 16 to read aBlocks from the MMC/SD - caed */ - unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF}; - - /* The address on the MMC/SD-card is in bytes, - addr is transformed from blocks to bytes and the result is - placed into the command */ - - addr = addr << 9; /* addr = addr * 512 */ - - CMD[1] = ((addr & 0xFF000000) >> 24); - CMD[2] = ((addr & 0x00FF0000) >> 16); - CMD[3] = ((addr & 0x0000FF00) >> 8 ); - - MMC_Read_Block(CMD, Buffer, 512); - - return (0); -} - -/* ############################################################################ - Routine to write a block (512 byte) to the MMC/SD-card - ######################################################################### */ -unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer) -{ - unsigned char tmp, a; - unsigned short int b; - /* Command 24 to write a block to the MMC/SD - card */ - unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF}; - - /* The address on the MMC/SD-card is in bytes, - addr is transformed from blocks to bytes and the result is - placed into the command */ - - addr = addr << 9; /* addr = addr * 512 */ - - CMD[1] = ((addr & 0xFF000000) >> 24); - CMD[2] = ((addr & 0x00FF0000) >> 16); - CMD[3] = ((addr & 0x0000FF00) >> 8 ); - - spi_lock(); - mmc_spi_cfg(); - MMC_Enable(); - - /* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */ - tmp = Write_Command_MMC(CMD); - if (tmp != 0) { - MMC_Disable(); - spi_unlock(); - return(tmp); - } - - /* Do a short delay and send a clock-pulse to the MMC/SD-card */ - for (a = 0; a < 100; a++) - spi_read(); - - /* Send a start byte to the MMC/SD-card */ - spi_write(0xFE); - - /* Write the block (512 bytes) to the MMC/SD-card */ - for (b = 0; b < 512; b++) - spi_write(*Buffer++); - - /* write the CRC-Byte */ - spi_write(0xFF); /* write a dummy CRC */ - spi_write(0xFF); /* CRC code is not used */ - - /* Wait for MMC/SD-card busy */ - while (spi_read() != 0xff) {}; - - /* set MMC_Chip_Select to high (MMC/SD-card inactive) */ - MMC_Disable(); - spi_unlock(); - return (0); -} - -/* ######################################################################### - Routine to read the CSD register from the MMC/SD-card (16 bytes) - ######################################################################### */ -unsigned char mmc_read_csd (unsigned char *Buffer) -{ - /* Command to read the CSD register */ - unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF}; - - MMC_Read_Block(CMD, Buffer, 16); - - return (0); -} diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h deleted file mode 100644 index 3687dbf6969..00000000000 --- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - This module implements a linux character device driver for the 24c256 chip. - Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com) - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#ifndef _MMC_HW_ -#define _MMC_HW_ - -unsigned char mmc_read_csd(unsigned char *Buffer); -unsigned char mmc_read_sector (unsigned long addr, - unsigned char *Buffer); -unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer); -int mmc_hw_init(void); - -#endif /* _MMC_HW_ */ diff --git a/arch/arm/cpu/arm720t/lpc2292/spi.c b/arch/arm/cpu/arm720t/lpc2292/spi.c deleted file mode 100644 index d296bdac686..00000000000 --- a/arch/arm/cpu/arm720t/lpc2292/spi.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - This module implements an interface to the SPI on the lpc22xx. - Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com) - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include -#include -#include -#include -#include - -unsigned long spi_flags; -unsigned char spi_idle = 0x00; - -int spi_init(void) -{ - unsigned long pinsel0_value; - - /* activate spi pins */ - pinsel0_value = GET32(PINSEL0); - pinsel0_value &= ~(0xFFl << 8); - pinsel0_value |= (0x55l << 8); - PUT32(PINSEL0, pinsel0_value); - - return 0; -} diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 2f914e9b4e2..0daf84811aa 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -43,11 +43,7 @@ _start: b reset ldr pc, _software_interrupt ldr pc, _prefetch_abort ldr pc, _data_abort -#ifdef CONFIG_LPC2292 - .word 0xB4405F76 /* 2's complement of the checksum of the vectors */ -#else ldr pc, _not_used -#endif ldr pc, _irq ldr pc, _fiq @@ -151,10 +147,6 @@ reset: bl cpu_init_crit #endif -#ifdef CONFIG_LPC2292 - bl lowlevel_init -#endif - /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) @@ -291,16 +283,6 @@ _dynsym_start_ofs: ************************************************************************* */ -#if defined(CONFIG_LPC2292) -PLLCFG_ADR: .word PLLCFG -PLLFEED_ADR: .word PLLFEED -PLLCON_ADR: .word PLLCON -PLLSTAT_ADR: .word PLLSTAT -VPBDIV_ADR: .word VPBDIV -MEMMAP_ADR: .word MEMMAP - -#endif - cpu_init_crit: #if defined(CONFIG_NETARM) /* @@ -371,50 +353,6 @@ cpu_init_crit: #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) /* No specific initialisation for IntegratorAP/CM720T as yet */ -#elif defined(CONFIG_LPC2292) - /* Set-up PLL */ - mov r3, #0xAA - mov r4, #0x55 - /* First disconnect and disable the PLL */ - ldr r0, PLLCON_ADR - mov r1, #0x00 - str r1, [r0] - ldr r0, PLLFEED_ADR /* start feed sequence */ - str r3, [r0] - str r4, [r0] /* feed sequence done */ - /* Set new M and P values */ - ldr r0, PLLCFG_ADR - mov r1, #0x23 /* M=4 and P=2 */ - str r1, [r0] - ldr r0, PLLFEED_ADR /* start feed sequence */ - str r3, [r0] - str r4, [r0] /* feed sequence done */ - /* Then enable the PLL */ - ldr r0, PLLCON_ADR - mov r1, #0x01 /* PLL enable bit */ - str r1, [r0] - ldr r0, PLLFEED_ADR /* start feed sequence */ - str r3, [r0] - str r4, [r0] /* feed sequence done */ - /* Wait for the lock */ - ldr r0, PLLSTAT_ADR - mov r1, #0x400 /* lock bit */ -lock_loop: - ldr r2, [r0] - and r2, r1, r2 - cmp r2, #0 - beq lock_loop - /* And finally connect the PLL */ - ldr r0, PLLCON_ADR - mov r1, #0x03 /* PLL enable bit and connect bit */ - str r1, [r0] - ldr r0, PLLFEED_ADR /* start feed sequence */ - str r3, [r0] - str r4, [r0] /* feed sequence done */ - /* Set-up VPBDIV register */ - ldr r0, VPBDIV_ADR - mov r1, #0x01 /* VPB clock is same as process clock */ - str r1, [r0] #elif defined(CONFIG_TEGRA) /* No cpu_init_crit for tegra as yet */ #else @@ -432,7 +370,7 @@ lock_loop: str r1, [r0] #endif -#if !defined(CONFIG_LPC2292) && !defined(CONFIG_TEGRA) +#if !defined(CONFIG_TEGRA) mov ip, lr /* * before relocating, we have to setup RAM timing @@ -636,11 +574,6 @@ reset_cpu: * on external peripherals such as watchdog timers, etc. */ #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) /* No specific reset actions for IntegratorAP/CM720T as yet */ -#elif defined(CONFIG_LPC2292) - .align 5 -.globl reset_cpu -reset_cpu: - mov pc, r0 #elif defined(CONFIG_TEGRA) /* No specific reset actions for tegra as yet */ #else diff --git a/arch/arm/include/asm/arch-lpc2292/hardware.h b/arch/arm/include/asm/arch-lpc2292/hardware.h deleted file mode 100644 index 5e227e367cd..00000000000 --- a/arch/arm/include/asm/arch-lpc2292/hardware.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#if defined(CONFIG_LPC2292) -#include -#else -#error No hardware file defined for this configuration -#endif - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h b/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h deleted file mode 100644 index 5715f3ef745..00000000000 --- a/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h +++ /dev/null @@ -1,225 +0,0 @@ -#ifndef __LPC2292_REGISTERS_H -#define __LPC2292_REGISTERS_H - -#include - -/* Macros for reading/writing registers */ -#define PUT8(reg, value) (*(volatile unsigned char*)(reg) = (value)) -#define PUT16(reg, value) (*(volatile unsigned short*)(reg) = (value)) -#define PUT32(reg, value) (*(volatile unsigned int*)(reg) = (value)) -#define GET8(reg) (*(volatile unsigned char*)(reg)) -#define GET16(reg) (*(volatile unsigned short*)(reg)) -#define GET32(reg) (*(volatile unsigned int*)(reg)) - -/* External Memory Controller */ - -#define BCFG0 0xFFE00000 /* 32-bits */ -#define BCFG1 0xFFE00004 /* 32-bits */ -#define BCFG2 0xFFE00008 /* 32-bits */ -#define BCFG3 0xFFE0000c /* 32-bits */ - -/* System Control Block */ - -#define EXTINT 0xE01FC140 -#define EXTWAKE 0xE01FC144 -#define EXTMODE 0xE01FC148 -#define EXTPOLAR 0xE01FC14C -#define MEMMAP 0xE01FC040 -#define PLLCON 0xE01FC080 -#define PLLCFG 0xE01FC084 -#define PLLSTAT 0xE01FC088 -#define PLLFEED 0xE01FC08C -#define PCON 0xE01FC0C0 -#define PCONP 0xE01FC0C4 -#define VPBDIV 0xE01FC100 - -/* Memory Acceleration Module */ - -#define MAMCR 0xE01FC000 -#define MAMTIM 0xE01FC004 - -/* Vectored Interrupt Controller */ - -#define VICIRQStatus 0xFFFFF000 -#define VICFIQStatus 0xFFFFF004 -#define VICRawIntr 0xFFFFF008 -#define VICIntSelect 0xFFFFF00C -#define VICIntEnable 0xFFFFF010 -#define VICIntEnClr 0xFFFFF014 -#define VICSoftInt 0xFFFFF018 -#define VICSoftIntClear 0xFFFFF01C -#define VICProtection 0xFFFFF020 -#define VICVectAddr 0xFFFFF030 -#define VICDefVectAddr 0xFFFFF034 -#define VICVectAddr0 0xFFFFF100 -#define VICVectAddr1 0xFFFFF104 -#define VICVectAddr2 0xFFFFF108 -#define VICVectAddr3 0xFFFFF10C -#define VICVectAddr4 0xFFFFF110 -#define VICVectAddr5 0xFFFFF114 -#define VICVectAddr6 0xFFFFF118 -#define VICVectAddr7 0xFFFFF11C -#define VICVectAddr8 0xFFFFF120 -#define VICVectAddr9 0xFFFFF124 -#define VICVectAddr10 0xFFFFF128 -#define VICVectAddr11 0xFFFFF12C -#define VICVectAddr12 0xFFFFF130 -#define VICVectAddr13 0xFFFFF134 -#define VICVectAddr14 0xFFFFF138 -#define VICVectAddr15 0xFFFFF13C -#define VICVectCntl0 0xFFFFF200 -#define VICVectCntl1 0xFFFFF204 -#define VICVectCntl2 0xFFFFF208 -#define VICVectCntl3 0xFFFFF20C -#define VICVectCntl4 0xFFFFF210 -#define VICVectCntl5 0xFFFFF214 -#define VICVectCntl6 0xFFFFF218 -#define VICVectCntl7 0xFFFFF21C -#define VICVectCntl8 0xFFFFF220 -#define VICVectCntl9 0xFFFFF224 -#define VICVectCntl10 0xFFFFF228 -#define VICVectCntl11 0xFFFFF22C -#define VICVectCntl12 0xFFFFF230 -#define VICVectCntl13 0xFFFFF234 -#define VICVectCntl14 0xFFFFF238 -#define VICVectCntl15 0xFFFFF23C - -/* Pin connect block */ - -#define PINSEL0 0xE002C000 /* 32 bits */ -#define PINSEL1 0xE002C004 /* 32 bits */ -#define PINSEL2 0xE002C014 /* 32 bits */ - -/* GPIO */ - -#define IO0PIN 0xE0028000 -#define IO0SET 0xE0028004 -#define IO0DIR 0xE0028008 -#define IO0CLR 0xE002800C -#define IO1PIN 0xE0028010 -#define IO1SET 0xE0028014 -#define IO1DIR 0xE0028018 -#define IO1CLR 0xE002801C -#define IO2PIN 0xE0028020 -#define IO2SET 0xE0028024 -#define IO2DIR 0xE0028028 -#define IO2CLR 0xE002802C -#define IO3PIN 0xE0028030 -#define IO3SET 0xE0028034 -#define IO3DIR 0xE0028038 -#define IO3CLR 0xE002803C - -/* Uarts */ - -#define U0RBR 0xE000C000 -#define U0THR 0xE000C000 -#define U0IER 0xE000C004 -#define U0IIR 0xE000C008 -#define U0FCR 0xE000C008 -#define U0LCR 0xE000C00C -#define U0LSR 0xE000C014 -#define U0SCR 0xE000C01C -#define U0DLL 0xE000C000 -#define U0DLM 0xE000C004 - -#define U1RBR 0xE0010000 -#define U1THR 0xE0010000 -#define U1IER 0xE0010004 -#define U1IIR 0xE0010008 -#define U1FCR 0xE0010008 -#define U1LCR 0xE001000C -#define U1MCR 0xE0010010 -#define U1LSR 0xE0010014 -#define U1MSR 0xE0010018 -#define U1SCR 0xE001001C -#define U1DLL 0xE0010000 -#define U1DLM 0xE0010004 - -/* I2C */ - -#define I2CONSET 0xE001C000 -#define I2STAT 0xE001C004 -#define I2DAT 0xE001C008 -#define I2ADR 0xE001C00C -#define I2SCLH 0xE001C010 -#define I2SCLL 0xE001C014 -#define I2CONCLR 0xE001C018 - -/* SPI */ - -#define S0SPCR 0xE0020000 -#define S0SPSR 0xE0020004 -#define S0SPDR 0xE0020008 -#define S0SPCCR 0xE002000C -#define S0SPINT 0xE002001C - -#define S1SPCR 0xE0030000 -#define S1SPSR 0xE0030004 -#define S1SPDR 0xE0030008 -#define S1SPCCR 0xE003000C -#define S1SPINT 0xE003001C - -/* CAN controller */ - -/* skip for now */ - -/* Timers */ - -#define T0IR 0xE0004000 -#define T0TCR 0xE0004004 -#define T0TC 0xE0004008 -#define T0PR 0xE000400C -#define T0PC 0xE0004010 -#define T0MCR 0xE0004014 -#define T0MR0 0xE0004018 -#define T0MR1 0xE000401C -#define T0MR2 0xE0004020 -#define T0MR3 0xE0004024 -#define T0CCR 0xE0004028 -#define T0CR0 0xE000402C -#define T0CR1 0xE0004030 -#define T0CR2 0xE0004034 -#define T0CR3 0xE0004038 -#define T0EMR 0xE000403C - -#define T1IR 0xE0008000 -#define T1TCR 0xE0008004 -#define T1TC 0xE0008008 -#define T1PR 0xE000800C -#define T1PC 0xE0008010 -#define T1MCR 0xE0008014 -#define T1MR0 0xE0008018 -#define T1MR1 0xE000801C -#define T1MR2 0xE0008020 -#define T1MR3 0xE0008024 -#define T1CCR 0xE0008028 -#define T1CR0 0xE000802C -#define T1CR1 0xE0008030 -#define T1CR2 0xE0008034 -#define T1CR3 0xE0008038 -#define T1EMR 0xE000803C - -/* PWM */ - -/* skip for now */ - -/* A/D converter */ - -/* skip for now */ - -/* Real Time Clock */ - -/* skip for now */ - -/* Watchdog */ - -#define WDMOD 0xE0000000 -#define WDTC 0xE0000004 -#define WDFEED 0xE0000008 -#define WDTV 0xE000000C - -/* EmbeddedICE LOGIC */ - -/* skip for now */ - -#endif diff --git a/arch/arm/include/asm/arch-lpc2292/spi.h b/arch/arm/include/asm/arch-lpc2292/spi.h deleted file mode 100644 index 6ae66e8ba74..00000000000 --- a/arch/arm/include/asm/arch-lpc2292/spi.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - This file defines the interface to the lpc22xx SPI module. - Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com) - - This file may be included in software not adhering to the GPL. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#ifndef SPI_H -#define SPI_H - -#include -#include -#include -#include - -#define SPIF 0x80 - -#define spi_lock() disable_interrupts(); -#define spi_unlock() enable_interrupts(); - -extern unsigned long spi_flags; -extern unsigned char spi_idle; - -int spi_init(void); - -static inline unsigned char spi_read(void) -{ - unsigned char b; - - PUT8(S0SPDR, spi_idle); - while (!(GET8(S0SPSR) & SPIF)); - b = GET8(S0SPDR); - - return b; -} - -static inline void spi_write(unsigned char b) -{ - PUT8(S0SPDR, b); - while (!(GET8(S0SPSR) & SPIF)); - GET8(S0SPDR); /* this will clear the SPIF bit */ -} - -static inline void spi_set_clock(unsigned char clk_value) -{ - PUT8(S0SPCCR, clk_value); -} - -static inline void spi_set_cfg(unsigned char phase, - unsigned char polarity, - unsigned char lsbf) -{ - unsigned char v = 0x20; /* master bit set */ - - if (phase) - v |= 0x08; /* set phase bit */ - if (polarity) { - v |= 0x10; /* set polarity bit */ - spi_idle = 0xFF; - } else { - spi_idle = 0x00; - } - if (lsbf) - v |= 0x40; /* set lsbf bit */ - - PUT8(S0SPCR, v); -} -#endif /* SPI_H */ diff --git a/doc/driver-model/UDM-serial.txt b/doc/driver-model/UDM-serial.txt index 9feb2e55a31..c6a8ab05212 100644 --- a/doc/driver-model/UDM-serial.txt +++ b/doc/driver-model/UDM-serial.txt @@ -125,63 +125,59 @@ III) Analysis of in-tree drivers ------------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 17) serial_lpc2292.c + 17) serial_max3100.c -------------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 18) serial_max3100.c - -------------------- - No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - - 19) serial_mxc.c + 18) serial_mxc.c ---------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 20) serial_netarm.c + 19) serial_netarm.c ------------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 21) serial_pl01x.c + 20) serial_pl01x.c ------------------ No support for CONFIG_SERIAL_MULTI. Simple conversion possible, though this driver in fact contains two drivers in total. - 22) serial_pxa.c + 21) serial_pxa.c ---------------- This driver is a bit complicated, but due to clean support for CONFIG_SERIAL_MULTI, there are no expected obstructions throughout the conversion process. - 23) serial_s3c24x0.c + 22) serial_s3c24x0.c -------------------- This driver, being quite ad-hoc might need some work to bring back to shape. - 24) serial_s3c44b0.c + 23) serial_s3c44b0.c -------------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 25) serial_s5p.c + 24) serial_s5p.c ---------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 26) serial_sa1100.c + 25) serial_sa1100.c ------------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 27) serial_sh.c + 26) serial_sh.c --------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 28) serial_xuartlite.c + 27) serial_xuartlite.c ---------------------- No support for CONFIG_SERIAL_MULTI. Simple conversion possible. - 29) usbtty.c + 28) usbtty.c ------------ This driver seems very complicated and entangled with USB framework. The conversion might be complicated here. - 30) arch/powerpc/cpu/mpc512x/serial.c + 29) arch/powerpc/cpu/mpc512x/serial.c ------------------------------------- This driver supports CONFIG_SERIAL_MULTI. This driver will need to be moved to proper place. diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index 36c6114e3cc..1595c0714a8 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -41,9 +41,6 @@ #ifdef CONFIG_IXP425 /* only valid for IXP425 */ #include #endif -#ifdef CONFIG_LPC2292 -#include -#endif #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866) #include #endif diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 920ce6910ef..51af313f518 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -44,7 +44,6 @@ COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o -COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_MXC_UART) += serial_mxc.o COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index e0886d562e1..1d68f5568d2 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -104,7 +104,6 @@ serial_initfunc(imx_serial_initialize); serial_initfunc(ixp_serial_initialize); serial_initfunc(ks8695_serial_initialize); serial_initfunc(lh7a40x_serial_initialize); -serial_initfunc(lpc2292_serial_initialize); serial_initfunc(max3100_serial_initialize); serial_initfunc(mxc_serial_initialize); serial_initfunc(netarm_serial_initialize); @@ -202,7 +201,6 @@ void serial_initialize(void) ixp_serial_initialize(); ks8695_serial_initialize(); lh7a40x_serial_initialize(); - lpc2292_serial_initialize(); max3100_serial_initialize(); mxc_serial_initialize(); netarm_serial_initialize(); diff --git a/drivers/serial/serial_lpc2292.c b/drivers/serial/serial_lpc2292.c deleted file mode 100644 index 8abc4767135..00000000000 --- a/drivers/serial/serial_lpc2292.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * (C) Copyright 2002-2004 - * Wolfgang Denk, DENX Software Engineering, - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -static void lpc2292_serial_setbrg(void) -{ - unsigned short divisor = 0; - - switch (gd->baudrate) { - case 1200: divisor = 3072; break; - case 9600: divisor = 384; break; - case 19200: divisor = 192; break; - case 38400: divisor = 96; break; - case 57600: divisor = 64; break; - case 115200: divisor = 32; break; - default: hang (); break; - } - - /* init serial UART0 */ - PUT8(U0LCR, 0); - PUT8(U0IER, 0); - PUT8(U0LCR, 0x80); /* DLAB=1 */ - PUT8(U0DLL, (unsigned char)(divisor & 0x00FF)); - PUT8(U0DLM, (unsigned char)(divisor >> 8)); - PUT8(U0LCR, 0x03); /* 8N1, DLAB=0 */ - PUT8(U0FCR, 1); /* Enable RX and TX FIFOs */ -} - -static int lpc2292_serial_init(void) -{ - unsigned long pinsel0; - - serial_setbrg (); - - pinsel0 = GET32(PINSEL0); - pinsel0 &= ~(0x00000003); - pinsel0 |= 5; - PUT32(PINSEL0, pinsel0); - - return (0); -} - -static void lpc2292_serial_putc(const char c) -{ - if (c == '\n') - { - while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */ - PUT8(U0THR, '\r'); - } - - while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */ - PUT8(U0THR, c); -} - -static int lpc2292_serial_getc(void) -{ - while((GET8(U0LSR) & 1) == 0); - return GET8(U0RBR); -} - -/* Test if there is a byte to read */ -static int lpc2292_serial_tstc(void) -{ - return (GET8(U0LSR) & 1); -} - -static struct serial_device lpc2292_serial_drv = { - .name = "lpc2292_serial", - .start = lpc2292_serial_init, - .stop = NULL, - .setbrg = lpc2292_serial_setbrg, - .putc = lpc2292_serial_putc, - .puts = default_serial_puts, - .getc = lpc2292_serial_getc, - .tstc = lpc2292_serial_tstc, -}; - -void lpc2292_serial_initialize(void) -{ - serial_register(&lpc2292_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &lpc2292_serial_drv; -} diff --git a/include/flash.h b/include/flash.h index 6d70bdd81d8..7db599e783a 100644 --- a/include/flash.h +++ b/include/flash.h @@ -348,7 +348,6 @@ extern flash_info_t *flash_get_info(ulong base); #define TOSH_ID_FVT160 0xC2 /* TC58FVT160 ID (16 M, top ) */ #define TOSH_ID_FVB160 0x43 /* TC58FVT160 ID (16 M, bottom ) */ -#define PHILIPS_LPC2292 0x0401FF13 /* LPC2292 internal FLASH */ #define NUMONYX_256MBIT 0x8922 /* Numonyx P33/30 256MBit 65nm */ /*----------------------------------------------------------------------- -- cgit v1.3.1 From f2e0801565b7106da0f96784389c397794ce3906 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 3 Oct 2012 08:54:11 +0000 Subject: stdio: Remove the CLPS7111 serial driver This driver is no longer used, remove it. Signed-off-by: Marek Vasut --- arch/arm/cpu/arm720t/cpu.c | 1 - arch/arm/cpu/arm720t/interrupts.c | 1 - drivers/serial/Makefile | 1 - drivers/serial/serial_clps7111.c | 134 ------------------ include/clps7111.h | 276 -------------------------------------- 5 files changed, 413 deletions(-) delete mode 100644 drivers/serial/serial_clps7111.c delete mode 100644 include/clps7111.h (limited to 'include') diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c index 85c1a2c7f03..2e2f543d0ad 100644 --- a/arch/arm/cpu/arm720t/cpu.c +++ b/arch/arm/cpu/arm720t/cpu.c @@ -32,7 +32,6 @@ #include #include -#include #include #include diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index 998efd844a7..352d55dd151 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -27,7 +27,6 @@ */ #include -#include #include #include diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index b6d20f84465..5e8b64873d9 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -39,7 +39,6 @@ COBJS-$(CONFIG_SYS_NS16550) += ns16550.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_S5P) += serial_s5p.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o -COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o diff --git a/drivers/serial/serial_clps7111.c b/drivers/serial/serial_clps7111.c deleted file mode 100644 index c292ed87560..00000000000 --- a/drivers/serial/serial_clps7111.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * (C) Copyright 2002-2004 - * Wolfgang Denk, DENX Software Engineering, - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -static void clps7111_serial_setbrg(void) -{ - unsigned int reg = 0; - - switch (gd->baudrate) { - case 1200: reg = 191; break; - case 9600: reg = 23; break; - case 19200: reg = 11; break; - case 38400: reg = 5; break; - case 57600: reg = 3; break; - case 115200: reg = 1; break; - default: hang (); break; - } - - /* init serial serial 1,2 */ - IO_SYSCON1 = SYSCON1_UART1EN; - IO_SYSCON2 = SYSCON2_UART2EN; - - reg |= UBRLCR_WRDLEN8; - - IO_UBRLCR1 = reg; - IO_UBRLCR2 = reg; -} - - -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - * - */ -static int clps7111_serial_init(void) -{ - serial_setbrg (); - - return (0); -} - - -/* - * Output a single byte to the serial port. - */ -static void clps7111_serial_putc(const char c) -{ - int tmo; - - /* If \n, also do \r */ - if (c == '\n') - serial_putc ('\r'); - - tmo = get_timer (0) + 1 * CONFIG_SYS_HZ; - while (IO_SYSFLG1 & SYSFLG1_UTXFF) - if (get_timer (0) > tmo) - break; - - IO_UARTDR1 = c; -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -static int clps7111_serial_tstc(void) -{ - return !(IO_SYSFLG1 & SYSFLG1_URXFE); -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -static int clps7111_serial_getc(void) -{ - while (IO_SYSFLG1 & SYSFLG1_URXFE); - - return IO_UARTDR1 & 0xff; -} - -static struct serial_device clps7111_serial_drv = { - .name = "clps7111_serial", - .start = clps7111_serial_init, - .stop = NULL, - .setbrg = clps7111_serial_setbrg, - .putc = clps7111_serial_putc, - .puts = default_serial_puts, - .getc = clps7111_serial_getc, - .tstc = clps7111_serial_tstc, -}; - -void clps7111_serial_initialize(void) -{ - serial_register(&clps7111_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &clps7111_serial_drv; -} diff --git a/include/clps7111.h b/include/clps7111.h deleted file mode 100644 index baf600773bb..00000000000 --- a/include/clps7111.h +++ /dev/null @@ -1,276 +0,0 @@ -/* - * linux/include/asm-arm/hardware/clps7111.h - * - * This file contains the hardware definitions of the CLPS7111 internal - * registers. - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_HARDWARE_CLPS7111_H -#define __ASM_HARDWARE_CLPS7111_H - -#define CLPS7111_PHYS_BASE (0x80000000) - -#ifndef __ASSEMBLY__ -#define clps_readb(off) __raw_readb(CLPS7111_BASE + (off)) -#define clps_readl(off) __raw_readl(CLPS7111_BASE + (off)) -#define clps_writeb(val,off) __raw_writeb(val, CLPS7111_BASE + (off)) -#define clps_writel(val,off) __raw_writel(val, CLPS7111_BASE + (off)) -#endif - -#define PADR (0x0000) -#define PBDR (0x0001) -#define PDDR (0x0003) -#define PADDR (0x0040) -#define PBDDR (0x0041) -#define PDDDR (0x0043) -#define PEDR (0x0080) -#define PEDDR (0x00c0) -#define SYSCON1 (0x0100) -#define SYSFLG1 (0x0140) -#define MEMCFG1 (0x0180) -#define MEMCFG2 (0x01c0) -#define DRFPR (0x0200) -#define INTSR1 (0x0240) -#define INTMR1 (0x0280) -#define LCDCON (0x02c0) -#define TC1D (0x0300) -#define TC2D (0x0340) -#define RTCDR (0x0380) -#define RTCMR (0x03c0) -#define PMPCON (0x0400) -#define CODR (0x0440) -#define UARTDR1 (0x0480) -#define UBRLCR1 (0x04c0) -#define SYNCIO (0x0500) -#define PALLSW (0x0540) -#define PALMSW (0x0580) -#define STFCLR (0x05c0) -#define BLEOI (0x0600) -#define MCEOI (0x0640) -#define TEOI (0x0680) -#define TC1EOI (0x06c0) -#define TC2EOI (0x0700) -#define RTCEOI (0x0740) -#define UMSEOI (0x0780) -#define COEOI (0x07c0) -#define HALT (0x0800) -#define STDBY (0x0840) - -#define FBADDR (0x1000) -#define SYSCON2 (0x1100) -#define SYSFLG2 (0x1140) -#define INTSR2 (0x1240) -#define INTMR2 (0x1280) -#define UARTDR2 (0x1480) -#define UBRLCR2 (0x14c0) -#define SS2DR (0x1500) -#define SRXEOF (0x1600) -#define SS2POP (0x16c0) -#define KBDEOI (0x1700) - -/* common bits: SYSCON1 / SYSCON2 */ -#define SYSCON_UARTEN (1 << 8) - -#define SYSCON1_KBDSCAN(x) ((x) & 15) -#define SYSCON1_KBDSCANMASK (15) -#define SYSCON1_TC1M (1 << 4) -#define SYSCON1_TC1S (1 << 5) -#define SYSCON1_TC2M (1 << 6) -#define SYSCON1_TC2S (1 << 7) -#define SYSCON1_UART1EN SYSCON_UARTEN -#define SYSCON1_BZTOG (1 << 9) -#define SYSCON1_BZMOD (1 << 10) -#define SYSCON1_DBGEN (1 << 11) -#define SYSCON1_LCDEN (1 << 12) -#define SYSCON1_CDENTX (1 << 13) -#define SYSCON1_CDENRX (1 << 14) -#define SYSCON1_SIREN (1 << 15) -#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16) -#define SYSCON1_ADCKSEL_MASK (3 << 16) -#define SYSCON1_EXCKEN (1 << 18) -#define SYSCON1_WAKEDIS (1 << 19) -#define SYSCON1_IRTXM (1 << 20) - -/* common bits: SYSFLG1 / SYSFLG2 */ -#define SYSFLG_UBUSY (1 << 11) -#define SYSFLG_URXFE (1 << 22) -#define SYSFLG_UTXFF (1 << 23) - -#define SYSFLG1_MCDR (1 << 0) -#define SYSFLG1_DCDET (1 << 1) -#define SYSFLG1_WUDR (1 << 2) -#define SYSFLG1_WUON (1 << 3) -#define SYSFLG1_CTS (1 << 8) -#define SYSFLG1_DSR (1 << 9) -#define SYSFLG1_DCD (1 << 10) -#define SYSFLG1_UBUSY SYSFLG_UBUSY -#define SYSFLG1_NBFLG (1 << 12) -#define SYSFLG1_RSTFLG (1 << 13) -#define SYSFLG1_PFFLG (1 << 14) -#define SYSFLG1_CLDFLG (1 << 15) -#define SYSFLG1_URXFE SYSFLG_URXFE -#define SYSFLG1_UTXFF SYSFLG_UTXFF -#define SYSFLG1_CRXFE (1 << 24) -#define SYSFLG1_CTXFF (1 << 25) -#define SYSFLG1_SSIBUSY (1 << 26) -#define SYSFLG1_ID (1 << 29) - -#define SYSFLG2_SSRXOF (1 << 0) -#define SYSFLG2_RESVAL (1 << 1) -#define SYSFLG2_RESFRM (1 << 2) -#define SYSFLG2_SS2RXFE (1 << 3) -#define SYSFLG2_SS2TXFF (1 << 4) -#define SYSFLG2_SS2TXUF (1 << 5) -#define SYSFLG2_CKMODE (1 << 6) -#define SYSFLG2_UBUSY SYSFLG_UBUSY -#define SYSFLG2_URXFE SYSFLG_URXFE -#define SYSFLG2_UTXFF SYSFLG_UTXFF - -#define LCDCON_GSEN (1 << 30) -#define LCDCON_GSMD (1 << 31) - -#define SYSCON2_SERSEL (1 << 0) -#define SYSCON2_KBD6 (1 << 1) -#define SYSCON2_DRAMZ (1 << 2) -#define SYSCON2_KBWEN (1 << 3) -#define SYSCON2_SS2TXEN (1 << 4) -#define SYSCON2_PCCARD1 (1 << 5) -#define SYSCON2_PCCARD2 (1 << 6) -#define SYSCON2_SS2RXEN (1 << 7) -#define SYSCON2_UART2EN SYSCON_UARTEN -#define SYSCON2_SS2MAEN (1 << 9) -#define SYSCON2_OSTB (1 << 12) -#define SYSCON2_CLKENSL (1 << 13) -#define SYSCON2_BUZFREQ (1 << 14) - -/* common bits: UARTDR1 / UARTDR2 */ -#define UARTDR_FRMERR (1 << 8) -#define UARTDR_PARERR (1 << 9) -#define UARTDR_OVERR (1 << 10) - -/* common bits: UBRLCR1 / UBRLCR2 */ -#define UBRLCR_BAUD_MASK ((1 << 12) - 1) -#define UBRLCR_BREAK (1 << 12) -#define UBRLCR_PRTEN (1 << 13) -#define UBRLCR_EVENPRT (1 << 14) -#define UBRLCR_XSTOP (1 << 15) -#define UBRLCR_FIFOEN (1 << 16) -#define UBRLCR_WRDLEN5 (0 << 17) -#define UBRLCR_WRDLEN6 (1 << 17) -#define UBRLCR_WRDLEN7 (2 << 17) -#define UBRLCR_WRDLEN8 (3 << 17) -#define UBRLCR_WRDLEN_MASK (3 << 17) - -#define SYNCIO_SMCKEN (1 << 13) -#define SYNCIO_TXFRMEN (1 << 14) - -#define SYSCON3 0x2200 /* System Control register 3 ----------------------- */ -#define ADCCON 0x00000001 /* ADC configuration */ -#define CLKCTL 0x00000006 /* processor clock control */ -#define CLKCTL_18 0x0 /* 18.432 MHz */ -#define CLKCTL_36 0x2 /* 36.864 MHz */ -#define CLKCTL_49 0x4 /* 49.152 MHz */ -#define CLKCTL_73 0x6 /* 73.728 MHz */ -#define MCPSEL 0x00000008 /* MCP select */ -#define ADCCKNSEN 0x000010 /* ADC clock sense */ -#define VERSN 0x000000e0 /* additional version bits */ -#define VERSN_SHIFT 5 -#define FASTWAKE 0x0000100 /* Wakeup clock select: 0=8Hz, 1=4kHz */ - -#define INTSR3 0x2240 /* Interrupt Status register 3 --------------------- */ -#define MCPINT 0x00000001 /* MCP interface interrupt (FIQ) */ - -#define INTMR3 0x2280 /* Interrupt Mask register 3 ----------------------- */ -#define LEDFLSH 0x22C0 /* LED Flash control register ---------------------- */ -#define LEDFLSH_RATE 0x03 /* flash rate */ -#define LEDFLSH_RATE_SHIFT 0 -#define LEDFLSH_DUTY 0x3c /* duty ratio */ -#define LEDFLSH_DUTY_SHIFT 2 -#define LEDFLSH_ENABLE 0x40 /* enable */ - -#define IO_START CLPS7111_PHYS_BASE - -#define IO(offset) (IO_START + (offset)) - -#define IO_BYTE(offset) (*(volatile unsigned char *)(IO_START + (offset))) -#define IO_WORD(offset) (*(volatile unsigned long *)(IO_START + (offset))) - -#define IO_PADR IO_BYTE(PADR) -#define IO_PBDR IO_BYTE(PBDR) -#define IO_PDDR IO_BYTE(PDDR) -#define IO_PADDR IO_BYTE(PADDR) -#define IO_PBDDR IO_BYTE(PBDDR) -#define IO_PDDDR IO_BYTE(PDDDR) -#define IO_PEDR IO_BYTE(PEDR) -#define IO_PEDDR IO_BYTE(PEDDR) -#define IO_SYSCON IO_WORD(SYSCON) -#define IO_SYSFLG IO_WORD(SYSFLG) -#define IO_MEMCFG1 IO_WORD(MEMCFG1) -#define IO_MEMCFG2 IO_WORD(MEMCFG2) -#define IO_DRFPR IO_WORD(DRFPR) -#define IO_INTSR IO_WORD(INTSR) -#define IO_INTMR IO_WORD(INTMR) -#define IO_LCDCON IO_WORD(LCDCON) -#define IO_TC1D IO_WORD(TC1D) -#define IO_TC2D IO_WORD(TC2D) -#define IO_RTCDR IO_WORD(RTCDR) -#define IO_RTCMR IO_WORD(RTCMR) -#define IO_PMPCON IO_WORD(PMPCON) -#define IO_CODR IO_BYTE(CODR) -#define IO_UARTDR IO_WORD(UARTDR) -#define IO_UBRLCR IO_WORD(UBRLCR) -#define IO_SYNCIO IO_WORD(SYNCIO) -#define IO_PALLSW IO_WORD(PALLSW) -#define IO_PALMSW IO_WORD(PALMSW) -#define IO_STFCLR IO_WORD(STFCLR) -#define IO_BLEOI IO_WORD(BLEOI) -#define IO_MCEOI IO_WORD(MCEOI) -#define IO_TEOI IO_WORD(TEOI) -#define IO_TC1EOI IO_WORD(TC1EOI) -#define IO_TC2EOI IO_WORD(TC2EOI) -#define IO_RTCEOI IO_WORD(RTCEOI) -#define IO_UMSEOI IO_WORD(UMSEOI) -#define IO_COEOI IO_WORD(COEOI) -#define IO_HALT IO_WORD(HALT) -#define IO_STDBY IO_WORD(STDBY) -#define IO_SYSCON1 IO_WORD(SYSCON1) -#define IO_SYSFLG1 IO_WORD(SYSFLG1) -#define IO_INTSR1 IO_WORD(INTSR1) -#define IO_INTMR1 IO_WORD(INTMR1) -#define IO_UARTDR1 IO_WORD(UARTDR1) -#define IO_UBRLCR1 IO_WORD(UBRLCR1) -#define IO_FRBADDR IO_WORD(FRBADDR) -#define IO_SYSCON2 IO_WORD(SYSCON2) -#define IO_SYSFLG2 IO_WORD(SYSFLG2) -#define IO_INTSR2 IO_WORD(INTSR2) -#define IO_INTMR2 IO_WORD(INTMR2) -#define IO_UARTDR2 IO_WORD(UARTDR2) -#define IO_UBRLCR2 IO_WORD(UBRLCR2) -#define IO_KBDEOI IO_WORD(KBDEOI) - -#define IO_MCCR IO_WORD(MCCR) -#define IO_MCDR0 IO_WORD(MCDR0) -#define IO_MCDR1 IO_WORD(MCDR1) -#define IO_MCDR2 IO_WORD(MCDR2) -#define IO_MCSR IO_WORD(MCSR) -#define IO_SYSCON3 IO_WORD(SYSCON3) -#define IO_INTSR3 IO_WORD(INTSR3) -#define IO_INTMR3 IO_WORD(INTMR3) -#define IO_LEDFLSH IO_WORD(LEDFLSH) - -#endif /* __ASM_HARDWARE_CLPS7111_H */ -- cgit v1.3.1 From 53c41548a9fd7f0595c81c47e1ac3d9671d753e4 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Thu, 18 Oct 2012 10:15:45 +0000 Subject: arm: arm925t: remove SX1 board SX1 does not build properly by itself, is not built as part of MAKEALL arm or MAKEALL -a arm, and is only present in Makefile, not boards.cfg. As it also has no entry in MAINTAINERS, it is orphan and non-functional. Remove it. Signed-off-by: Albert ARIBAUD --- Makefile | 14 -- board/sx1/Makefile | 45 ------ board/sx1/config.mk | 19 --- board/sx1/lowlevel_init.S | 397 ---------------------------------------------- board/sx1/sx1.c | 123 -------------- doc/README.scrapyard | 3 +- include/configs/SX1.h | 189 ---------------------- 7 files changed, 2 insertions(+), 788 deletions(-) delete mode 100644 board/sx1/Makefile delete mode 100644 board/sx1/config.mk delete mode 100644 board/sx1/lowlevel_init.S delete mode 100644 board/sx1/sx1.c delete mode 100644 include/configs/SX1.h (limited to 'include') diff --git a/Makefile b/Makefile index 328347d1775..d385467e8e2 100644 --- a/Makefile +++ b/Makefile @@ -754,20 +754,6 @@ $(obj).boards.depend: boards.cfg lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/') ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/') -#======================================================================== -# ARM -#======================================================================== - -SX1_stdout_serial_config \ -SX1_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _stdout_serial_, $@)" ] ; then \ - echo "#undef CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \ - else \ - echo "#define CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \ - fi; - @$(MKCONFIG) -n $@ SX1 arm arm925t sx1 - ######################################################################### ## ARM1176 Systems ######################################################################### diff --git a/board/sx1/Makefile b/board/sx1/Makefile deleted file mode 100644 index 292459f2542..00000000000 --- a/board/sx1/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2004-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := sx1.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/sx1/config.mk b/board/sx1/config.mk deleted file mode 100644 index 441bea2a034..00000000000 --- a/board/sx1/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# (C) Copyright 2004 -# Wolfgang Denk, DENX Software Engineering, -# -# SX1 board with OMAP1510 (ARM925T) cpu -# see http://www.ti.com/ for more information on Texas Insturments -# -# SX1 has 1 bank of 256 MB SDRAM -# Physical Address: -# 1000'0000 to 2000'0000 -# -# -# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000 (mem base + reserved) -# -# we load ourself to 1108'0000 -# -# - -CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/sx1/lowlevel_init.S b/board/sx1/lowlevel_init.S deleted file mode 100644 index c1a811aa8e8..00000000000 --- a/board/sx1/lowlevel_init.S +++ /dev/null @@ -1,397 +0,0 @@ -/* - * Board specific setup info - * - * (C) Copyright 2003 - * Texas Instruments, - * - * -- Some bits of code used from rrload's head_OMAP1510.s -- - * Copyright (C) 2002 RidgeRun, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#if defined(CONFIG_OMAP1510) -#include <./configs/omap1510.h> -#endif - -#define OMAP1510_CLKS ((1< - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -DECLARE_GLOBAL_DATA_PTR; - -static void flash__init (void); -static void ether__init (void); - -static inline void delay (unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); -} - -/* - * Miscellaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* arch number of SX1 Board */ - gd->bd->bi_arch_number = MACH_TYPE_SX1; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x10000100; - -/* kk - this speeds up your boot a quite a bit. However to make it - * work, you need make sure your kernel startup flush bug is fixed. - * ... rkw ... - */ - icache_enable (); - - flash__init (); - ether__init (); - return 0; -} - - -int misc_init_r (void) -{ - /* volatile ushort *gdir = (ushort *) (GPIO_DIR_CONTROL_REG); */ - /* volatile ushort *mdir = (ushort *) (MPUIO_DIR_CONTROL_REG); */ - - /* setup gpio direction to match board (no floats!) */ - /**gdir = 0xCFF9; */ - /**mdir = 0x103F; */ - - return (0); -} - -/****************************** - Routine: - Description: -******************************/ -static void flash__init (void) -{ -#define CS0_CHIP_SELECT_REG 0xfffecc10 -#define CS3_CHIP_SELECT_REG 0xfffecc1c -#define EMIFS_GlB_Config_REG 0xfffecc0c - - unsigned int regval; - - regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG); - regval = regval | 0x0001; /* Turn off write protection for flash devices. */ - if (regval & 0x0002) { - regval = regval & 0xfffd; /* Swap CS0 and CS3 so that flash is visible at 0x0 and eeprom at 0x0c000000. */ - /* If, instead, you want to reference flash at 0x0c000000, then it seemed the following were necessary. */ - /* *((volatile unsigned int *)CS0_CHIP_SELECT_REG) = 0x202090; / * Overrides head.S setting of 0x212090 */ - /* *((volatile unsigned int *)CS3_CHIP_SELECT_REG) = 0x202090; / * Let's flash chips be fully functional. */ - } - *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval; -} - - -/****************************** - Routine: - Description: -******************************/ -static void ether__init (void) -{ -#define ETH_CONTROL_REG 0x0800000b - /* take the Ethernet controller out of reset and wait - * for the EEPROM load to complete. - */ - *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01; - udelay (3); -} - - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} diff --git a/doc/README.scrapyard b/doc/README.scrapyard index d0f47164d7e..ed779e245f9 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,7 +11,8 @@ easily if here is something they might want to dig for... Board Arch CPU removed Commit last known maintainer/contact ============================================================================= -TQM85xx powerpc MPC85xx - - Stefan Roese +SX1 arm arm925t - - +TQM85xx powerpc MPC85xx d923a5d5 2012-10-04 Stefan Roese apollon arm omap24xx 535c74f 2012-09-18 Kyungmin Park tb0229 mips mips32 3f3110d 2011-12-12 rmu powerpc MPC850 fb82fd7 2011-12-07 Wolfgang Denk diff --git a/include/configs/SX1.h b/include/configs/SX1.h deleted file mode 100644 index 93d031ca853..00000000000 --- a/include/configs/SX1.h +++ /dev/null @@ -1,189 +0,0 @@ -/* - * (C) Copyright 2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM925T 1 /* This is an arm925t CPU */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */ -#define CONFIG_OMAP_SX1 1 /* a SX1 Board */ - -/* input clock of PLL */ -#define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */ - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */ -#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */ - -/* - * select serial console configuration - */ -#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */ - -/* - * USB device configuration - */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 - -#define CONFIG_USBD_VENDORID 0x1234 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Siemens" -#define CONFIG_USBD_PRODUCT_NAME "SX1" - -/* - * I2C configuration - */ -#define CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_DRIVER_OMAP1510_I2C - -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_I2C - -#undef CONFIG_CMD_NET - - -#include - -#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw" -#ifdef CONFIG_STDOUT_USBTTY -#define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty" -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SX1# " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ - -/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1. - * This time is further subdivided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - * V1 - * PHYS_FLASH_SIZE_1 (16 << 10) 16 MB - * PHYS_FLASH_SIZE_2 (8 << 10) 8 MB - * V2 only 1 flash - * PHYS_FLASH_SIZE_1 (32 << 10) 32 MB - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */ -#define CONFIG_SYS_MAX_FLASH_SECT (256) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ -#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, PHYS_FLASH_2 } - -/*----------------------------------------------------------------------- - * FLASH driver setup - */ -#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */ -#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_SIZE_REDUND 0x20000 -#define CONFIG_ENV_OFFSET_REDUND 0x40000 - -#endif /* __CONFIG_H */ -- cgit v1.3.1