From 9d7f90782d0a768af76718e0cbc17c954d6731e5 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Fri, 6 Jun 2025 12:38:38 +0200 Subject: ARM: imx: mxs: Add support for imx287 based BTT devices The btt[c3] devices are based on imx287 SoC. U-Boot SPL 2025.04-01081-g07e086681d26 (Apr 16 2025 - 12:24:36 +0200) Trying to boot from MMC1 U-Boot 2025.04-01081-g07e086681d26 (Apr 16 2025 - 12:24:36 +0200) CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SPI #3, master, 3V3 NOR Model: BTT3 Board: LWE BTT SoM HW rev 0 DRAM: 256 MiB Core: 86 devices, 15 uclasses, devicetree: separate MMC: MXS MMC: 0 Loading Environment from SPIFlash... SF: Detected is25lp128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB OK In: serial@80074000 Out: serial@80074000 Err: serial@80074000 Net: eth0: ethernet@800f0000 Hit any key to stop autoboot: 0 Signed-off-by: Lukasz Majewski --- include/configs/btt.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 include/configs/btt.h (limited to 'include') diff --git a/include/configs/btt.h b/include/configs/btt.h new file mode 100644 index 00000000000..dea87fa9b77 --- /dev/null +++ b/include/configs/btt.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2025 DENX Software Engineering + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + */ +#ifndef __CONFIGS_BTT_H__ +#define __CONFIGS_BTT_H__ + +#include +/* Memory configuration */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE SZ_256M /* Max 256 MB RAM */ +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* The rest of the configuration is shared */ +#include + +#endif /* __CONFIGS_BTT_H__ */ -- cgit v1.3.1