From d622c240587477b1b56acfc11f9eaf120e0405dd Mon Sep 17 00:00:00 2001 From: Joel Johnson Date: Fri, 19 Jun 2020 22:45:47 -0600 Subject: zfs: fix missing include for disk_partition definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 0528979fa7ab ("part: Drop disk_partition_t typedef") changed to a struct. As a result it uncovered an apparent missing include in zfs_common.h for part.h which actually contains the definition. The ZFS handles the struct exclusively as pointers so it was only a warning. warning: ‘struct disk_partition’ declared inside parameter list will not be visible outside of this definition or declaration void zfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info); Signed-off-by: Joel Johnson Series-CC: Simon Glass --- include/zfs_common.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/zfs_common.h b/include/zfs_common.h index 027ba91b287..cb83e59e836 100644 --- a/include/zfs_common.h +++ b/include/zfs_common.h @@ -22,6 +22,8 @@ #ifndef __ZFS_COMMON__ #define __ZFS_COMMON__ +#include + #define SECTOR_SIZE 0x200 #define SECTOR_BITS 9 -- cgit v1.3.1 From 1c078ad7d954759d9021b126ad05d063a90ebae6 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 20 May 2020 09:32:39 +0900 Subject: psci: add 'static inline' to invoke_psci_fn() stub Avoid potential multiple definitions when CONFIG_ARM_PSCI_FW is disabled. Signed-off-by: Masahiro Yamada --- include/linux/psci.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/psci.h b/include/linux/psci.h index 9433df836b6..841dbc8da7e 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -91,8 +91,8 @@ unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3); #else -unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, - unsigned long a2, unsigned long a3) +static inline unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3) { return PSCI_RET_DISABLED; } -- cgit v1.3.1 From 135c10a7834aa7e0f26f52e5173925e695cba48f Mon Sep 17 00:00:00 2001 From: Haibo Chen Date: Mon, 22 Jun 2020 19:38:03 +0800 Subject: mmc: fsl_esdhc_imx: fix the mask for tuning start point According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is TUNING_START_TAP, bit[7] of this register is to disable the command CRC check for standard tuning. So fix it here. Fixes: fa33d207494c ("mmc: split fsl_esdhc driver for i.MX") Signed-off-by: Haibo Chen --- include/fsl_esdhc_imx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index 33c6d52bfe9..220a76b9ee5 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -203,7 +203,7 @@ #define ESDHC_STD_TUNING_EN BIT(24) /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ #define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff +#define ESDHC_TUNING_START_TAP_MASK 0x7f #define ESDHC_TUNING_STEP_MASK 0x00070000 #define ESDHC_TUNING_STEP_SHIFT 16 -- cgit v1.3.1 From ba61676ff9f8225ebc0ea33ad9f48862e718fd01 Mon Sep 17 00:00:00 2001 From: Haibo Chen Date: Mon, 22 Jun 2020 19:38:04 +0800 Subject: mmc: fsl_esdhc_imx: disable the CMD CRC check for standard tuning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In current code, we add 1ms dealy after each tuning command for standard tuning method. Adding this 1ms dealy is because USDHC default check the CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning IC logic do not wait for the tuning data sending out by the card, trigger the buffer read ready interrupt immediately, and step to next cycle. So when next time the new tuning command send out by USDHC, card may still not send out the tuning data of the upper command，then some eMMC cards may stuck, can't response to any command, block the whole tuning procedure. If do not check the CMD CRC for tuning, then do not has this issue. USDHC will wait for the tuning data of each tuning command and check them. If the tuning data pass the check, it also means the CMD line also okay for tuning. So this patch disable the CMD CRC check for tuning, save some time for the whole tuning procedure. Signed-off-by: Haibo Chen --- drivers/mmc/fsl_esdhc_imx.c | 22 ++++++++++++---------- include/fsl_esdhc_imx.h | 1 + 2 files changed, 13 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index f42e0184343..5b61eeb2146 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -907,19 +907,9 @@ static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) ctrl = readl(®s->autoc12err); if ((!(ctrl & MIX_CTRL_EXE_TUNE)) && (ctrl & MIX_CTRL_SMPCLK_SEL)) { - /* - * need to wait some time, make sure sd/mmc fininsh - * send out tuning data, otherwise, the sd/mmc can't - * response to any command when the card still out - * put the tuning data. - */ - mdelay(1); ret = 0; break; } - - /* Add 1ms delay for SD and eMMC */ - mdelay(1); } writel(irqstaten, ®s->irqstaten); @@ -1267,6 +1257,18 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, val |= priv->tuning_start_tap; val &= ~ESDHC_TUNING_STEP_MASK; val |= (priv->tuning_step) << ESDHC_TUNING_STEP_SHIFT; + + /* Disable the CMD CRC check for tuning, if not, need to + * add some delay after every tuning command, because + * hardware standard tuning logic will directly go to next + * step once it detect the CMD CRC error, will not wait for + * the card side to finally send out the tuning data, trigger + * the buffer read ready interrupt immediately. If usdhc send + * the next tuning command some eMMC card will stuck, can't + * response, block the tuning procedure or the first command + * after the whole tuning procedure always can't get any response. + */ + val |= ESDHC_TUNING_CMD_CRC_CHECK_DISABLE; writel(val, ®s->tuning_ctrl); } } diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index 220a76b9ee5..279a66d9bff 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -204,6 +204,7 @@ /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ #define ESDHC_TUNING_START_TAP_DEFAULT 0x1 #define ESDHC_TUNING_START_TAP_MASK 0x7f +#define ESDHC_TUNING_CMD_CRC_CHECK_DISABLE BIT(7) #define ESDHC_TUNING_STEP_MASK 0x00070000 #define ESDHC_TUNING_STEP_SHIFT 16 -- cgit v1.3.1 From 6a28dc3322982ac67b01c66d9aa34531978deb16 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Mon, 8 Jun 2020 10:17:08 -0400 Subject: rk3399: Add BOOTENV_SF command Add missing BOOTENV_SF command in rk3399 config. Fix it. Fixes: f263b860acf8 ("rk3399: Enable SF distro bootcmd") Signed-off-by: Jagan Teki Reported-by: Suniel Mahesh Tested-by: Suniel Mahesh Reviewed-by: Kever Yang --- include/configs/rk3399_common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index f0ae6e67a71..e63ebb14f72 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -67,6 +67,7 @@ "partitions=" PARTS_DEFAULT \ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV \ + BOOTENV_SF \ "altbootcmd=" \ "setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \ "run distro_bootcmd\0" -- cgit v1.3.1 From 36e66e3cd6067c2b38f97047193fc447a1842834 Mon Sep 17 00:00:00 2001 From: Yannick Fertre Date: Wed, 24 Jun 2020 10:45:39 +0200 Subject: video: mipi update panel platform data Add new fields "lanes, format & mode_flags" to structure mipi_dsi_panel_plat. Signed-off-by: Yannick Fertre Reviewed-by: Patrick Delaunay --- include/mipi_dsi.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/mipi_dsi.h b/include/mipi_dsi.h index 83c5163cf8e..c8a7d3daefa 100644 --- a/include/mipi_dsi.h +++ b/include/mipi_dsi.h @@ -221,9 +221,15 @@ static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt) /** * struct mipi_dsi_panel_plat - DSI panel platform data * @device: DSI peripheral device + * @lanes: number of active data lanes + * @format: pixel format for video mode + * @mode_flags: DSI operation mode related flags */ struct mipi_dsi_panel_plat { struct mipi_dsi_device *device; + unsigned int lanes; + enum mipi_dsi_pixel_format format; + unsigned long mode_flags; }; /** -- cgit v1.3.1 From b92b8f48fb47c48b3f9df91ea1009b5789d55e19 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 17 May 2020 18:24:12 +0200 Subject: net: pcnet: Drop PCNET_HAS_PROM All of one PCNET users has this option set, make this default and drop this config option. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Joe Hershberger --- drivers/net/pcnet.c | 5 ----- include/configs/malta.h | 1 - 2 files changed, 6 deletions(-) (limited to 'include') diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c index c6f080d956b..edc4dba24cb 100644 --- a/drivers/net/pcnet.c +++ b/drivers/net/pcnet.c @@ -241,10 +241,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr) { int chip_version; char *chipname; - -#ifdef PCNET_HAS_PROM int i; -#endif /* Reset the PCnet controller */ pcnet_reset(dev); @@ -279,7 +276,6 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr) PCNET_DEBUG1("AMD %s\n", chipname); -#ifdef PCNET_HAS_PROM /* * In most chips, after a chip reset, the ethernet address is read from * the station address PROM at the base address and programmed into the @@ -293,7 +289,6 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr) dev->enetaddr[2 * i] = val & 0x0ff; dev->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff; } -#endif /* PCNET_HAS_PROM */ return 0; } diff --git a/include/configs/malta.h b/include/configs/malta.h index 773d7c23ed8..82c90042d98 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -16,7 +16,6 @@ #define CONFIG_PCI_GT64120 #define CONFIG_PCI_MSC01 #define CONFIG_PCNET -#define PCNET_HAS_PROM #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 -- cgit v1.3.1 From d8553d6ee3146bc06b8f86787138293d3f6453c3 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 17 May 2020 18:24:25 +0200 Subject: net: pcnet: Add Kconfig entries Add Kconfig entries for the pcnet driver and convert MIPS malta to use those. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Joe Hershberger --- configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + drivers/net/Kconfig | 6 ++++++ include/configs/malta.h | 1 - 6 files changed, 10 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index e5a19a6e546..a16abc7fa9c 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -27,6 +27,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PCNET=y CONFIG_PCI=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index e9de5bea6e1..a9efe7736e5 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -28,6 +28,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PCNET=y CONFIG_PCI=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 2b43818c81f..0680f595dbd 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -26,6 +26,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PCNET=y CONFIG_PCI=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index ec984b5a356..31c9ff6a777 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -27,6 +27,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PCNET=y CONFIG_PCI=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index bb23f73fc23..19703d42cd6 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -392,6 +392,12 @@ config MII help Enable support of the Media-Independent Interface (MII) +config PCNET + bool "AMD PCnet series Ethernet controller driver" + help + This driver supports AMD PCnet series fast ethernet family of + PCI chipsets/adapters. + config RTL8139 bool "Realtek 8139 series Ethernet controller driver" help diff --git a/include/configs/malta.h b/include/configs/malta.h index 82c90042d98..9602773ff91 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -15,7 +15,6 @@ #define CONFIG_PCI_GT64120 #define CONFIG_PCI_MSC01 -#define CONFIG_PCNET #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 -- cgit v1.3.1