From 6067aa66b3bb44e35742e60fda49eb3fe664ac23 Mon Sep 17 00:00:00 2001 From: Judith Mendez Date: Thu, 17 Apr 2025 18:43:33 -0500 Subject: mmc: am654_sdhci: Add am654_sdhci_set_control_reg This patch adds am654_sdhci_set_control_reg to am654_sdhci. This is required to fix UHS_MODE_SELECT for TI K3 boards. If any of HIGH_SPEED_ENA, V1P8_SIGNAL_ENA, UHS_MODE_SELECT are set, then data will be launched on the pos-edge of the clock. Since K3 SoCs did not meet timing requirements for High Speed SDR mode at rising clock edge, none of these three should be set, therefore limit UHS_MODE_SELECT to only be set for modes above MMC_HS_52. This fixes MMC write issue on am64x evm at mode High Speed SDR. Signed-off-by: Judith Mendez Reviewed-by: Bryan Brattlof --- include/sdhci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/sdhci.h b/include/sdhci.h index 31a49ca6a2f..2372697b743 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -518,6 +518,7 @@ void sdhci_set_uhs_timing(struct sdhci_host *host); /* Export the operations to drivers */ int sdhci_probe(struct udevice *dev); int sdhci_set_clock(struct mmc *mmc, unsigned int clock); +void sdhci_set_voltage(struct sdhci_host *host); /** * sdhci_set_control_reg - Set control registers -- cgit v1.2.3