From 52ae8d6cc8b2f4ec53228e1d9216b5d9071cb325 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Wed, 30 Mar 2022 13:39:02 -0700 Subject: board: gateworks: venice: determine dram size at runtime The SPL does not update the memory node with the dram size from EEPROM but instead we can use get_ram_size which does a simple memory test to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that is the max used on the Venice boards. Signed-off-by: Tim Harvey Reviewed-by: Fabio Estevam --- include/configs/imx8mm_venice.h | 2 +- include/configs/imx8mn_venice.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index d9a86a62ed0..455a8d0187d 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -83,7 +83,7 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 -#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ +#define PHYS_SDRAM_SIZE SZ_4G #define CONFIG_SYS_BOOTM_LEN SZ_256M /* UART */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index e7bfcd70af2..401084c16b6 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -80,7 +80,7 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 -#define PHYS_SDRAM_SIZE SZ_1G +#define PHYS_SDRAM_SIZE SZ_4G #define CONFIG_SYS_BOOTM_LEN SZ_256M /* UART */ -- cgit v1.2.3