From e07f4a8033b6270b8103049adb6456f660ff4a89 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Mon, 1 Sep 2008 13:09:39 -0400 Subject: ppc44x: Unification of virtex5 pp440 boards This patch provides an unificated way of handling xilinx v5 ppc440 boards. It unificates 3 different things: 1) Source code A new board called ppc440-generic has been created. This board includes a generic tlb initialization (Maps the whole memory into virtual) and defines board_pre_init, checkboard, initdram and get_sys_info weakly, so, they can be replaced by specific functions. If a new board needs to redefine any of the previous functions (specific initialization) it can create a new directory with the specific initializations needed. (see the example ml507 board). 2) Configuration file Common configurations are located under configs/xilinx-ppc440.h, this header file interpretes the xparameters file generated by EDK and configurates u-boot in correspondence. Example: if there is a Temac, allows CMD_CONFIG_NET Specific configuration are located under specific configuration file. (see the example ml507 board) 3) Makefile Some work has been done in order to not duplicate work in the Main Makefile. Please see the attached code. In order to support new boards they can be implemented in the next way: a) Simple Generic Board (90% of the time) Using EDK generates a new xparameters.h file, replace ppc440-generic/xparameters.h and run make xilinx-ppc440-generic_config && make b) Simple Boards with special u-boot parameters (9 % of the time) Create a new file under configs for it (use ml507.h as example) and change your paramaters. Create a new Makefile paragraph and compile c) Complex boards (1% of the time) Create a new folder for the board, like the ml507 Finally, it adds support for the Avnet FX30T Evaluation board, following the new generic structure: Cheap board by Avnet for evaluating the Virtex5 FX technology. This patch adds support for: - UartLite - 16MB Flash - 64MB RAM Prior using U-boot in this board, read carefully the ERRATA by Avnet to solve some memory initialization issues. Signed-off-by: Ricardo Ribalda Delgado Signed-off-by: Stefan Roese --- include/configs/ml507.h | 91 +++------------------------ include/configs/v5fx30teval.h | 49 +++++++++++++++ include/configs/xilinx-ppc440-generic.h | 49 +++++++++++++++ include/configs/xilinx-ppc440.h | 106 ++++++++++++++++++++++++++++++++ 4 files changed, 213 insertions(+), 82 deletions(-) create mode 100644 include/configs/v5fx30teval.h create mode 100644 include/configs/xilinx-ppc440-generic.h create mode 100644 include/configs/xilinx-ppc440.h (limited to 'include') diff --git a/include/configs/ml507.h b/include/configs/ml507.h index f8cd499985b..37d93bb3c70 100644 --- a/include/configs/ml507.h +++ b/include/configs/ml507.h @@ -17,106 +17,33 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* -#define DEBUG -#define ET_DEBUG -*/ - /*CPU*/ -#define CONFIG_XILINX_ML507 1 -#define CONFIG_XILINX_440 1 + +/*CPU*/ #define CONFIG_440 1 -#define CONFIG_4xx 1 +#define CONFIG_XILINX_ML507 1 #include "../board/xilinx/ml507/xparameters.h" /*Mem Map*/ -#define CFG_SDRAM_BASE 0x0 #define CFG_SDRAM_SIZE_MB 256 -#define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN ( 192 * 1024 ) -#define CFG_MALLOC_LEN ( CFG_ENV_SIZE + 128 * 1024 ) - -/*Uart*/ -#define CONFIG_XILINX_UARTLITE -#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE -#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE } -#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR - -/*Cmd*/ -#include -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_ELF -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_JFFS2 -#define CONFIG_JFFS2_CMDLINE -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_PING -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_IMLS /*Env*/ -#define CFG_ENV_IS_IN_FLASH +#define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_SIZE 0x20000 #define CFG_ENV_SECT_SIZE 0x20000 -#define CFG_ENV_OFFSET 0x340000 -#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) +#define CFG_ENV_OFFSET 0x340000 +#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) /*Misc*/ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) -#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 ) -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ -#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ -#define CFG_LOAD_ADDR 0x00400000 /* default load address */ -#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */ -#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#define CONFIG_LOOPW /* enable loopw command */ -#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_VERSION_VARIABLE /* include version env variable */ -#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */ -#define CFG_HUSH_PARSER /* Use the HUSH parser */ -#define CFG_PROMPT_HUSH_PS2 "> " -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */ -#define CFG_BOOTMAPSZ ( 8 << 20 ) /* Initial Memory map for Linux */ +#define CFG_PROMPT "ml507:/# " /* Monitor Command Prompt */ #define CONFIG_PREBOOT "echo U-Boot is up and runnining;" -/*Stack*/ -#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */ -#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ -#define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE ) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -/*Speed*/ -#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ - /*Flash*/ -#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR #define CFG_FLASH_SIZE (32*1024*1024) -#define CFG_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CFG_FLASH_EMPTY_INFO 1 -#define CFG_MAX_FLASH_BANKS 1 #define CFG_MAX_FLASH_SECT 259 -#define CFG_FLASH_PROTECTION #define MTDIDS_DEFAULT "nor0=ml507-flash" #define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" +/*Generic Configs*/ +#include #endif /* __CONFIG_H */ diff --git a/include/configs/v5fx30teval.h b/include/configs/v5fx30teval.h new file mode 100644 index 00000000000..67d8d7f6314 --- /dev/null +++ b/include/configs/v5fx30teval.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*CPU*/ +#define CONFIG_440 1 +#define CONFIG_XILINX_ML507 1 +#include "../board/avnet/v5fx30teval/xparameters.h" + +/*Mem Map*/ +#define CFG_SDRAM_SIZE_MB 64 + +/*Env*/ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x20000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_OFFSET 0x1A0000 +#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) + +/*Misc*/ +#define CFG_PROMPT "v5fx30t:/# " /* Monitor Command Prompt */ +#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" + +/*Flash*/ +#define CFG_FLASH_SIZE (16*1024*1024) +#define CFG_MAX_FLASH_SECT 131 +#define MTDIDS_DEFAULT "nor0=v5fx30t-flash" +#define MTDPARTS_DEFAULT "mtdparts=v5fx30t-flash:-(user)" + +/*Generic Configs*/ +#include + +#endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc440-generic.h b/include/configs/xilinx-ppc440-generic.h new file mode 100644 index 00000000000..4e8080bf6bf --- /dev/null +++ b/include/configs/xilinx-ppc440-generic.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*CPU*/ +#define CONFIG_440 1 +#define CONFIG_XILINX_PPC440_GENERIC 1 +#include "../board/xilinx/ppc440-generic/xparameters.h" + +/*Mem Map*/ +#define CFG_SDRAM_SIZE_MB 256 + +/*Env*/ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x20000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_OFFSET 0x340000 +#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) + +/*Misc*/ +#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */ +#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" + +/*Flash*/ +#define CFG_FLASH_SIZE (32*1024*1024) +#define CFG_MAX_FLASH_SECT 259 +#define MTDIDS_DEFAULT "nor0=ml507-flash" +#define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" + +/*Generic Configs*/ +#include + +#endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc440.h b/include/configs/xilinx-ppc440.h new file mode 100644 index 00000000000..40293cd8429 --- /dev/null +++ b/include/configs/xilinx-ppc440.h @@ -0,0 +1,106 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#ifndef __CONFIG_GEN_H +#define __CONFIG_GEN_H +/* +#define DEBUG +#define ET_DEBUG +*/ + /*CPU*/ +#define CONFIG_XILINX_440 1 +#define CONFIG_440 1 +#define CONFIG_4xx 1 + +/*Mem Map*/ +#define CFG_SDRAM_BASE 0x0 +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MONITOR_LEN (192 * 1024) +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024) + +/*Uart*/ +#define CONFIG_XILINX_UARTLITE +#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE +#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE } +#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR + +/*Cmd*/ +#include +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_JFFS2 +#define CONFIG_JFFS2_CMDLINE +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_DTT +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_IMLS + +/*Misc*/ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#define CFG_LONGHELP /* undef to save memory */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ +#define CFG_LOAD_ADDR 0x00400000 /* default load address */ +#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */ +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_LOOPW /* enable loopw command */ +#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_VERSION_VARIABLE /* include version env variable */ +#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CFG_HUSH_PARSER /* Use the HUSH parser */ +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */ +#define CFG_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */ + +/*Stack*/ +#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */ +#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ +#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +/*Speed*/ +#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ + +/*Flash*/ +#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR +#define CFG_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CFG_FLASH_EMPTY_INFO 1 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_FLASH_PROTECTION + +#endif /* __CONFIG_H */ -- cgit v1.2.3 From f6b6c45840f9b4671d2d97243a12a1f3ffb64765 Mon Sep 17 00:00:00 2001 From: Adam Graham Date: Wed, 3 Sep 2008 12:26:59 -0700 Subject: ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines Signed-off-by: Adam Graham Signed-off-by: Stefan Roese --- include/asm-ppc/ppc4xx-sdram.h | 3 ++- include/common.h | 21 +++++++++++++++++++++ include/configs/kilauea.h | 19 +++++++++++++++++++ include/ppc440.h | 13 ------------- include/ppc4xx.h | 13 +++++++++++++ 5 files changed, 55 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h index 0174d623515..a1ef0290e5f 100644 --- a/include/asm-ppc/ppc4xx-sdram.h +++ b/include/asm-ppc/ppc4xx-sdram.h @@ -29,6 +29,7 @@ /* * SDRAM Controller */ + /* * XXX - ToDo: Revisit file to change all these lower case defines into * upper case. Also needs to be done in the controller setup code too @@ -256,6 +257,7 @@ #define SDRAM_DLYCAL_DLCV_ENCODE(x) (((x)<<2) & SDRAM_DLYCAL_DLCV_MASK) #define SDRAM_DLYCAL_DLCV_DECODE(x) (((x) & SDRAM_DLYCAL_DLCV_MASK)>>2) +#if !defined(CONFIG_405EX) /* * Memory queue defines */ @@ -293,7 +295,6 @@ #define SDRAM_PLBADDUHB (SDRAMQ_DCR_BASE+0x10) /* PLB base address upper 32 LL */ -#if !defined(CONFIG_405EX) /* * Memory Bank 0-7 configuration */ diff --git a/include/common.h b/include/common.h index a394988b5ce..2516bfd30c0 100644 --- a/include/common.h +++ b/include/common.h @@ -287,6 +287,27 @@ void pciinfo (int, int); #endif #endif +/* + * Prototypes + */ +#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2) +void blank_string(int); +inline void ppc4xx_ibm_ddr2_register_dump(void); +#if defined(CONFIG_440) +u32 mfdcr_any(u32); +void mtdcr_any(u32, u32); +#endif +#if defined(CONFIG_SPD_EEPROM) +u32 ddr_wrdtr(u32); +u32 ddr_clktr(u32); +void spd_ddr_init_hang(void); +#endif +#endif /* defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2) */ + +#if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) +u32 DQS_autocalibration(void); +#endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ + int misc_init_f (void); int misc_init_r (void); diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index a475f97e625..f9eaa777725 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -223,6 +223,22 @@ *----------------------------------------------------------------------*/ #define CFG_MBYTES_SDRAM (256) /* 256MB */ +/* + * CONFIG_PPC4xx_DDR_AUTOCALIBRATION + * + * Note: DDR Autocalibration Method_A scans the full range of possible PPC4xx + * SDRAM Controller DDR autocalibration values and takes a lot longer + * to run than Method_B. + * (See the Method_A and Method_B algorithm discription in the file: + * cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c) + * Define CONFIG_PPC4xx_DDR_METHOD_A to use DDR autocalibration Method_A + * + * DDR Autocalibration Method_B is the default. + */ +#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION /* IBM DDR autocalibration */ +#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION /* dynamic DDR autocal debug */ +#undef CONFIG_PPC4xx_DDR_METHOD_A + #define CFG_SDRAM0_MB0CF_BASE (( 0 << 20) + CFG_SDRAM_BASE) /* DDR1/2 SDRAM Device Control Register Data Values */ @@ -386,6 +402,9 @@ #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ #define CONFIG_PHY1_ADDR 2 +/* Debug messages for the DDR autocalibration */ +#define CONFIG_AUTOCALIB "silent\0" /* default is non-verbose */ + /* * Default environment variables */ diff --git a/include/ppc440.h b/include/ppc440.h index 3584fd24e82..be8d3ffef79 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -2064,19 +2064,6 @@ #ifndef __ASSEMBLY__ -static inline u32 get_mcsr(void) -{ - u32 val; - - asm volatile("mfspr %0, 0x23c" : "=r" (val) :); - return val; -} - -static inline void set_mcsr(u32 val) -{ - asm volatile("mtspr 0x23c, %0" : "=r" (val) :); -} - #endif /* _ASMLANGUAGE */ #endif /* __PPC440_H__ */ diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 59a3b06b71c..e216663a86d 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -203,6 +203,19 @@ typedef struct unsigned long pllPlbDiv; } PPC4xx_SYS_INFO; +static inline u32 get_mcsr(void) +{ + u32 val; + + asm volatile("mfspr %0, 0x23c" : "=r" (val) :); + return val; +} + +static inline void set_mcsr(u32 val) +{ + asm volatile("mtspr 0x23c, %0" : "=r" (val) :); +} + #endif /* __ASSEMBLY__ */ #endif /* __PPC4XX_H__ */ -- cgit v1.2.3 From 78d78236896d62bb8ca7302af38d8f1493eb2651 Mon Sep 17 00:00:00 2001 From: Victor Gallardo Date: Thu, 4 Sep 2008 23:49:36 -0700 Subject: ppc4xx: Add support for GPCS, SGMII and M88E1112 PHY This patch adds GPCS, SGMII and M88E1112 PHY support for the AMCC PPC460GT/EX processors. Signed-off-by: Victor Gallardo Signed-off-by: Stefan Roese --- include/ppc4xx_enet.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/ppc4xx_enet.h b/include/ppc4xx_enet.h index b74c6fcafde..00669a717aa 100644 --- a/include/ppc4xx_enet.h +++ b/include/ppc4xx_enet.h @@ -376,6 +376,7 @@ typedef struct emac_4xx_hw_st { #define EMAC_M1_APP (0x08000000) #define EMAC_M1_RSVD (0x06000000) #define EMAC_M1_IST (0x01000000) +#define EMAC_M1_MF_1000GPCS (0x00C00000) #define EMAC_M1_MF_1000MBPS (0x00800000) /* 0's for 10MBPS */ #define EMAC_M1_MF_100MBPS (0x00400000) #define EMAC_M1_RFS_MASK (0x00380000) @@ -394,6 +395,8 @@ typedef struct emac_4xx_hw_st { #define EMAC_M1_MWSW (0x00007000) #define EMAC_M1_JUMBO_ENABLE (0x00000800) #define EMAC_M1_IPPA (0x000007c0) +#define EMAC_M1_IPPA_SET(id) (((id) & 0x1f) << 6) +#define EMAC_M1_IPPA_GET(id) (((id) >> 6) & 0x1f) #define EMAC_M1_OBCI_GT100 (0x00000020) #define EMAC_M1_OBCI_100 (0x00000018) #define EMAC_M1_OBCI_83 (0x00000010) -- cgit v1.2.3 From f071f01fd09e9bf1cf09de37a7416aacce71bae1 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 8 Sep 2008 10:01:48 +0200 Subject: ppc4xx: Remove CONFIG_CS8952_PHY define Since this define is only used on one board that was never really in production, removing this compile time option doesn't hurt and makes the code more readable. Signed-off-by: Stefan Roese --- include/configs/PIP405.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 2ceda001cab..86ea6c69b93 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -281,7 +281,6 @@ ***********************************************************/ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ -#define CONFIG_CS8952_PHY 1 /* its a CS8952 PHY */ /************************************************************ * RTC ***********************************************************/ -- cgit v1.2.3 From ac53ee8318678190bf3c68da477a84a657d86fb0 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Fri, 5 Sep 2008 15:34:04 +0200 Subject: ppc4xx: Update CPCI405(AB) configuration This patch add FDT support and command line editing capabilities for CPCI405 and CPCI405AB boards. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- include/configs/CPCI4052.h | 6 ++++++ include/configs/CPCI405AB.h | 6 ++++++ 2 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index fd49f569aeb..9ec1721897b 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -146,6 +146,8 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ + #define CONFIG_LOOPW 1 /* enable loopw command */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ @@ -219,6 +221,10 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP + /*----------------------------------------------------------------------- * FLASH organization */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 55dd6296de0..78995984f78 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -144,6 +144,8 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ + #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ @@ -215,6 +217,10 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP + /*----------------------------------------------------------------------- * FLASH organization */ -- cgit v1.2.3 From 5ff889349d2ace13f10c9335e09365fcec8247cc Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 8 Sep 2008 14:11:12 +0200 Subject: ppc4xx: Move ppc4xx specific prototypes to ppc4xx header This patch moves some 4xx specific prototypes out of include common.h to a ppc4xx specific header. Signed-off-by: Stefan Roese --- include/asm-ppc/ppc4xx-sdram.h | 14 ++++++++++++++ include/common.h | 21 --------------------- 2 files changed, 14 insertions(+), 21 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h index a1ef0290e5f..8efa557972e 100644 --- a/include/asm-ppc/ppc4xx-sdram.h +++ b/include/asm-ppc/ppc4xx-sdram.h @@ -1402,4 +1402,18 @@ #endif /* CONFIG_SDRAM_PPC4xx_DENALI_DDR2 */ +#ifndef __ASSEMBLY__ +/* + * Prototypes + */ +void inline blank_string(int size); +inline void ppc4xx_ibm_ddr2_register_dump(void); +u32 mfdcr_any(u32); +void mtdcr_any(u32, u32); +u32 ddr_wrdtr(u32); +u32 ddr_clktr(u32); +void spd_ddr_init_hang(void); +u32 DQS_autocalibration(void); +#endif /* __ASSEMBLY__ */ + #endif /* _PPC4xx_SDRAM_H_ */ diff --git a/include/common.h b/include/common.h index 2516bfd30c0..a394988b5ce 100644 --- a/include/common.h +++ b/include/common.h @@ -287,27 +287,6 @@ void pciinfo (int, int); #endif #endif -/* - * Prototypes - */ -#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2) -void blank_string(int); -inline void ppc4xx_ibm_ddr2_register_dump(void); -#if defined(CONFIG_440) -u32 mfdcr_any(u32); -void mtdcr_any(u32, u32); -#endif -#if defined(CONFIG_SPD_EEPROM) -u32 ddr_wrdtr(u32); -u32 ddr_clktr(u32); -void spd_ddr_init_hang(void); -#endif -#endif /* defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2) */ - -#if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) -u32 DQS_autocalibration(void); -#endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ - int misc_init_f (void); int misc_init_r (void); -- cgit v1.2.3 From 4394f9a8c42bb1b0abc4fc04bd582d4db5f8b726 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Mon, 8 Sep 2008 22:37:45 +0200 Subject: BMW, PCIPPC2, PCIPPC6, RBC82: fix compile warnings missing doc_probe() prototype. Signed-off-by: Wolfgang Denk --- include/common.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/common.h b/include/common.h index a394988b5ce..33c6e1087d1 100644 --- a/include/common.h +++ b/include/common.h @@ -236,6 +236,9 @@ int autoscript (ulong addr, const char *fit_uname); extern ulong load_addr; /* Default Load Address */ +/* common/cmd_doc.c */ +void doc_probe(unsigned long physadr); + /* common/cmd_nvedit.c */ int env_init (void); void env_relocate (void); -- cgit v1.2.3 From 3221b074a0ab199f6ae47c19cc22f42ddf3ef819 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 9 Sep 2008 00:59:40 +0200 Subject: onenand_uboot: fix warning: 'struct mtd_oob_ops' declared inside parameter list Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/onenand_uboot.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h index 6605e4f218d..e9602574b78 100644 --- a/include/onenand_uboot.h +++ b/include/onenand_uboot.h @@ -15,6 +15,7 @@ #define __UBOOT_ONENAND_H #include +#include struct mtd_info; struct erase_info; -- cgit v1.2.3 From 965de106ba8900372c8b16dc60d5acab7f925e38 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 9 Sep 2008 10:03:47 +0200 Subject: NETTA2: remove empty CONFIG_SHOW_ACTIVITY functions Signed-off-by: Wolfgang Denk --- include/configs/NETTA2.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index 9a1f1d6da5c..ea5d1604cc9 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -745,7 +745,6 @@ typedef unsigned int led_id_t; /* use board specific hardware */ #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_HW_WATCHDOG -#define CONFIG_SHOW_ACTIVITY /*************************************************************************************************/ -- cgit v1.2.3 From fe876787f8743883ce58fed61525eaa2f34da4c5 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 9 Sep 2008 10:06:44 +0200 Subject: stxxtc: remove empty CONFIG_SHOW_ACTIVITY functions Signed-off-by: Wolfgang Denk --- include/configs/stxxtc.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 37a52cf7edb..0dc9f8a010d 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -580,7 +580,6 @@ typedef unsigned int led_id_t; /* use board specific hardware */ #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_HW_WATCHDOG -#define CONFIG_SHOW_ACTIVITY /*****************************************************************************/ -- cgit v1.2.3 From e8d18541c6ceab821f75faab031740b33fdbfa4b Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Fri, 18 Jul 2008 16:52:23 +0200 Subject: Update Freescale 85xx boards to sys_eeprom.c The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale 86xx boards already use sys_eeprom.c, so this patch migrates the remaining Freescale 85xx boards to use it as well. cds_eeprom.c is deleted. Signed-off-by: Timur Tabi --- include/configs/MPC8541CDS.h | 9 +++++++-- include/configs/MPC8548CDS.h | 9 +++++++-- include/configs/MPC8555CDS.h | 10 ++++++++-- 3 files changed, 22 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 29dff32ea75..bfd86f50696 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -44,7 +44,6 @@ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_FSL_VIA -#define CONFIG_FSL_CDS_EEPROM /* * When initializing flash, if we cannot find the manufacturer ID, @@ -328,11 +327,17 @@ extern unsigned long get_clock_freq(void); #define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CFG_I2C_EEPROM_ADDR 0x57 #define CFG_I2C_SLAVE 0x7F #define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */ #define CFG_I2C_OFFSET 0x3000 +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CFG_I2C_EEPROM_CCID +#define CFG_ID_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_ADDR_LEN 2 + /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index ec0b4ffc660..06965ed4b49 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -50,7 +50,6 @@ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_FSL_VIA -#define CONFIG_FSL_CDS_EEPROM /* * When initializing flash, if we cannot find the manufacturer ID, @@ -352,11 +351,17 @@ extern unsigned long get_clock_freq(void); #define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CFG_I2C_EEPROM_ADDR 0x57 #define CFG_I2C_SLAVE 0x7F #define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */ #define CFG_I2C_OFFSET 0x3000 +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CFG_I2C_EEPROM_CCID +#define CFG_ID_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_ADDR_LEN 2 + /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index c07a725f9b0..a92c0fe301f 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -43,7 +43,7 @@ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_FSL_VIA -#define CONFIG_FSL_CDS_EEPROM + /* * When initializing flash, if we cannot find the manufacturer ID, @@ -325,11 +325,17 @@ extern unsigned long get_clock_freq(void); #define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CFG_I2C_EEPROM_ADDR 0x57 #define CFG_I2C_SLAVE 0x7F #define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */ #define CFG_I2C_OFFSET 0x3000 +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CFG_I2C_EEPROM_CCID +#define CFG_ID_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_ADDR_LEN 2 + /* * General PCI * Addresses are mapped 1-1. -- cgit v1.2.3 From 3e79b588b5199f35016f178fc0d5d1266382097f Mon Sep 17 00:00:00 2001 From: Detlev Zundel Date: Fri, 15 Aug 2008 15:42:12 +0200 Subject: 85xx: Socrates: Major code update. - Update the local bus ranges in the FDT for Linux for the various devices connected to the local bus via chip-select. - Set the LCRR_DBYP bit in the LCRR for local bus frequencies lower than 66 MHz and uses I/O accessor functions consequently. - UPM data update. - Update of default environment and configuration. Use I2C multibus as we do have two I2C buses. Also enable sdram and ext2 commands. Signed-off-by: Wolfgang Grandegger Signed-off-by: Sergei Poselenov Signed-off-by: Detlev Zundel --- include/configs/socrates.h | 110 +++++++++++++++++++++++++++------------------ 1 file changed, 67 insertions(+), 43 deletions(-) (limited to 'include') diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 5cc4213debc..197ed78d5db 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -45,6 +45,7 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ +#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ @@ -141,13 +142,12 @@ #define CFG_FLASH_BASE CFG_LBC_FLASH_BASE /* start of FLASH */ #define CFG_BR0_PRELIM 0xfe001001 /* port size 16bit */ -#define CFG_OR0_PRELIM 0xfe000ff7 /* 32MB Flash */ +#define CFG_OR0_PRELIM 0xfe000030 /* 32MB Flash */ #define CFG_BR1_PRELIM 0xfc001001 /* port size 16bit */ -#define CFG_OR1_PRELIM 0xfe000ff7 /* 32MB Flash */ +#define CFG_OR1_PRELIM 0xfe000030 /* 32MB Flash */ #define CFG_FLASH_CFI /* flash is CFI compat. */ #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/ -#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector */ #define CFG_MAX_FLASH_BANKS 2 /* number of banks */ #define CFG_MAX_FLASH_SECT 256 /* sectors per device */ @@ -157,7 +157,7 @@ #define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */ -#define CFG_LBC_LCRR 0x00030008 /* LB clock ratio reg */ +#define CFG_LBC_LCRR 0x00030004 /* LB clock ratio reg */ #define CFG_LBC_LBCR 0x00000000 /* LB config reg */ #define CFG_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CFG_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ @@ -171,8 +171,20 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256kB for Mon*/ -#define CFG_MALLOC_LEN (256 * 1024) /* Reserved for malloc */ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256kB for Mon */ +#define CFG_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc */ + +/* FPGA and NAND */ +#define CFG_FPGA_BASE 0xc0000000 +#define CFG_FPGA_SIZE 0x00100000 /* 1 MB */ +#define CFG_HMI_BASE 0xc0010000 +#define CFG_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */ +#define CFG_OR3_PRELIM 0xfff00000 /* 1 MB */ + +#define CFG_NAND_BASE (CFG_FPGA_BASE + 0x70) +#define CFG_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_CMD_NAND /* Serial Port */ @@ -204,11 +216,14 @@ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CFG_I2C_SPEED 102124 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F -#define CFG_I2C_NOPROBES {0x48} /* Don't probe these addrs */ #define CFG_I2C_OFFSET 0x3000 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE +#define CFG_I2C2_OFFSET 0x3100 + /* I2C RTC */ #define CONFIG_RTC_RX8025 /* Use Epson rx8025 rtc via i2c */ #define CFG_I2C_RTC_ADDR 0x32 /* at address 0x32 */ @@ -302,18 +317,18 @@ #define CONFIG_CMD_DTT #undef CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C +#define CONFIG_CMD_SDRAM #define CONFIG_CMD_MII #define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB - +#define CONFIG_CMD_EXT2 /* EXT2 Support */ #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI #endif - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* @@ -357,50 +372,69 @@ #define CONFIG_LOADADDR 200000 /* default addr for tftp & bootm*/ -#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ +#define CONFIG_BOOTDELAY 1 /* -1 disables auto-boot */ #define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ + "echo Welcome on the ABB Socrates Board;" \ "echo" #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "bootfile=$hostname/uImage\0" \ "netdev=eth0\0" \ "consdev=ttyS0\0" \ - "hostname=socrates\0" \ + "uboot_file=/home/tftp/syscon3/u-boot.bin\0" \ + "bootfile=/home/tftp/syscon3/uImage\0" \ + "fdt_file=/home/tftp/syscon3/socrates.dtb\0" \ + "initrd_file=/home/tftp/syscon3/uinitrd.gz\0" \ + "uboot_addr=FFFA0000\0" \ + "kernel_addr=FE000000\0" \ + "fdt_addr=FE1E0000\0" \ + "ramdisk_addr=FE200000\0" \ + "fdt_addr_r=B00000\0" \ + "kernel_addr_r=200000\0" \ + "ramdisk_addr_r=400000\0" \ + "rootpath=/opt/eldk/ppc_85xxDP\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=$serverip:$rootpath\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addcons=setenv bootargs $bootargs " \ + "console=$consdev,$baudrate\0" \ "addip=setenv bootargs $bootargs " \ "ip=$ipaddr:$serverip:$gatewayip:$netmask" \ ":$hostname:$netdev:off panic=1\0" \ - "addcons=setenv bootargs $bootargs " \ - "console=$consdev,$baudrate\0" \ - "flash_self=run ramargs addip addcons;" \ + "boot_nor=run ramargs addcons;" \ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ - "flash_nfs=run nfsargs addip addcons;" \ - "bootm ${kernel_addr} - ${fdt_addr}\0" \ "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ "tftp ${fdt_addr_r} ${fdt_file}; " \ "run nfsargs addip addcons;" \ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "fdt_file=$hostname/socrates.dtb\0" \ - "fdt_addr_r=B00000\0" \ - "fdt_addr=FC1E0000\0" \ - "rootpath=/opt/eldk/ppc_85xxDP\0" \ - "kernel_addr=FC000000\0" \ - "kernel_addr_r=200000\0" \ - "ramdisk_addr=FC200000\0" \ - "ramdisk_addr_r=400000\0" \ - "load=tftp 100000 $hostname/u-boot.bin\0" \ - "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \ - "cp.b 100000 fffc0000 40000;" \ + "update_uboot=tftp 100000 ${uboot_file};" \ + "protect off fffa0000 ffffffff;" \ + "era fffa0000 ffffffff;" \ + "cp.b 100000 fffa0000 ${filesize};" \ + "setenv filesize;saveenv\0" \ + "update_kernel=tftp 100000 ${bootfile};" \ + "era fe000000 fe1dffff;" \ + "cp.b 100000 fe000000 ${filesize};" \ "setenv filesize;saveenv\0" \ - "upd=run load update\0" \ + "update_fdt=tftp 100000 ${fdt_file};" \ + "era fe1e0000 fe1fffff;" \ + "cp.b 100000 fe1e0000 ${filesize};" \ + "setenv filesize;saveenv\0" \ + "update_initrd=tftp 100000 ${initrd_file};" \ + "era fe200000 fe9fffff;" \ + "cp.b 100000 fe200000 ${filesize};" \ + "setenv filesize;saveenv\0" \ + "clean_data=era fea00000 fff5ffff\0" \ + "usbargs=setenv bootargs root=/dev/sda1 rw\0" \ + "load_usb=usb start;" \ + "ext2load usb 0:1 ${kernel_addr_r} /boot/uImage\0" \ + "boot_usb=run load_usb usbargs addcons;" \ + "bootm ${kernel_addr_r} - ${fdt_addr};" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ "" -#define CONFIG_BOOTCOMMAND "run flash_self" +#define CONFIG_BOOTCOMMAND "run boot_nor" /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 @@ -417,14 +451,4 @@ #define CONFIG_DOS_PARTITION 1 #define CONFIG_USB_STORAGE 1 -/* FPGA and NAND */ -#define CFG_FPGA_BASE 0xc0000000 -#define CFG_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */ -#define CFG_OR3_PRELIM 0xfff00000 /* 1 MB */ - -#define CFG_NAND_BASE (CFG_FPGA_BASE + 0x70) -#define CFG_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 -#define CONFIG_CMD_NAND - #endif /* __CONFIG_H */ -- cgit v1.2.3 From e64987a892353f3d49eb242d997820ef8f538912 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Fri, 15 Aug 2008 15:42:13 +0200 Subject: 85xx: socrates: Enable Lime support. This patch adds Lime GDC support together with support for the PWM backlight control through the w83782d chip. The reset pin of the latter is attached to GPIO, so we need to reset it in early_board_init_r. Signed-off-by: Anatolij Gustschin --- include/configs/socrates.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'include') diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 197ed78d5db..a981a8fe953 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -186,6 +186,26 @@ #define NAND_MAX_CHIPS 1 #define CONFIG_CMD_NAND +/* LIME GDC */ +#define CFG_LIME_BASE 0xc8000000 +#define CFG_LIME_SIZE 0x04000000 /* 64 MB */ +#define CFG_BR2_PRELIM 0xc80018a1 /* UPMB, 32-bit */ +#define CFG_OR2_PRELIM 0xfc000000 /* 64 MB */ + +#define CONFIG_VIDEO +#define CONFIG_VIDEO_MB862xx +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_CONSOLE_EXTRA_INFO +#define VIDEO_FB_16BPP_PIXEL_SWAP +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CFG_CONSOLE_IS_IN_ENV +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_BMP_GZIP +#define CFG_VIDEO_LOGO_MAX_SIZE (2 << 20) /* decompressed img */ + /* Serial Port */ #define CONFIG_CONS_INDEX 1 @@ -228,6 +248,9 @@ #define CONFIG_RTC_RX8025 /* Use Epson rx8025 rtc via i2c */ #define CFG_I2C_RTC_ADDR 0x32 /* at address 0x32 */ +/* I2C W83782G HW-Monitoring IC */ +#define CFG_I2C_W83782G_ADDR 0x28 /* W83782G address */ + /* I2C temp sensor */ /* Socrates uses Maxim's DS75, which is compatible with LM75 */ #define CONFIG_DTT_LM75 1 @@ -324,6 +347,7 @@ #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB #define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_BMP #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -- cgit v1.2.3 From 3ef96ded38a8d33b58b9fab9cd879d51ddac4cbd Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Sun, 7 Sep 2008 07:08:42 +1000 Subject: Update i386 code (sc520_cdp) Attempt to bring i386 / sc520 inline with master Signed-off-by: Graeme Russ --- include/asm-i386/byteorder.h | 4 ++-- include/asm-i386/global_data.h | 4 ++-- include/asm-i386/ic/ssi.h | 34 ++++++++++++++++++++++++++++++++++ include/asm-i386/pci.h | 1 - include/asm-i386/string.h | 2 ++ include/configs/sc520_cdp.h | 24 ++++++++++++++++++++++++ 6 files changed, 64 insertions(+), 5 deletions(-) create mode 100644 include/asm-i386/ic/ssi.h (limited to 'include') diff --git a/include/asm-i386/byteorder.h b/include/asm-i386/byteorder.h index a9c69d5b1f2..7dfeb8bbed2 100644 --- a/include/asm-i386/byteorder.h +++ b/include/asm-i386/byteorder.h @@ -6,7 +6,7 @@ #ifdef __GNUC__ -static __inline__ __const__ __u32 ___arch__swab32(__u32 x) +static __inline__ __u32 ___arch__swab32(__u32 x) { #ifdef CONFIG_X86_BSWAP __asm__("bswap %0" : "=r" (x) : "0" (x)); @@ -20,7 +20,7 @@ static __inline__ __const__ __u32 ___arch__swab32(__u32 x) return x; } -static __inline__ __const__ __u16 ___arch__swab16(__u16 x) +static __inline__ __u16 ___arch__swab16(__u16 x) { __asm__("xchgb %b0,%h0" /* swap bytes */ \ : "=q" (x) \ diff --git a/include/asm-i386/global_data.h b/include/asm-i386/global_data.h index 35bad23c17c..cc30689d210 100644 --- a/include/asm-i386/global_data.h +++ b/include/asm-i386/global_data.h @@ -59,8 +59,8 @@ typedef struct { #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ -extern gd_t *global_data; +extern gd_t *gd; -#define DECLARE_GLOBAL_DATA_PTR gd_t *gd = global_data +#define DECLARE_GLOBAL_DATA_PTR #endif /* __ASM_GBL_DATA_H */ diff --git a/include/asm-i386/ic/ssi.h b/include/asm-i386/ic/ssi.h new file mode 100644 index 00000000000..bd48eab1610 --- /dev/null +++ b/include/asm-i386/ic/ssi.h @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2008 + * Graeme Russ . + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_IC_SSI_H_ +#define _ASM_IC_SSI_H_ 1 + +int ssi_set_interface(int, int, int, int); +void ssi_chip_select(int); +u8 ssi_txrx_byte(u8); +void ssi_tx_byte(u8); +u8 ssi_rx_byte(void); + + +#endif diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h index bde95509a4b..050a2bb8683 100644 --- a/include/asm-i386/pci.h +++ b/include/asm-i386/pci.h @@ -31,5 +31,4 @@ int pci_enable_legacy_video_ports(struct pci_controller* hose); int pci_shadow_rom(pci_dev_t dev, unsigned char *dest); void pci_remove_rom_window(struct pci_controller* hose, u32 addr); u32 pci_get_rom_window(struct pci_controller* hose, int size); - #endif diff --git a/include/asm-i386/string.h b/include/asm-i386/string.h index 91a23f951ca..3643a79fdfc 100644 --- a/include/asm-i386/string.h +++ b/include/asm-i386/string.h @@ -5,6 +5,8 @@ * We don't do inline string functions, since the * optimised inline asm versions are not small. */ +#undef __HAVE_ARCH_STRNCPY +extern char *strncpy(char *__dest, __const__ char *__src, __kernel_size_t __n); #undef __HAVE_ARCH_STRRCHR extern char * strrchr(const char * s, int c); diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h index e29655e6362..dfe7b7d3e49 100644 --- a/include/configs/sc520_cdp.h +++ b/include/configs/sc520_cdp.h @@ -28,6 +28,7 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define GRUSS_TESTING /* * High Level Configuration Options * (easy to change) @@ -81,7 +82,11 @@ #include #define CONFIG_CMD_PCI +#ifndef GRUSS_TESTING #define CONFIG_CMD_SATA +#else +#undef CONFIG_CMD_SATA +#endif #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NET #define CONFIG_CMD_EEPROM @@ -175,10 +180,18 @@ /************************************************************ *SATA/Native Stuff ************************************************************/ +#ifndef GRUSS_TESTING #define CFG_SATA_MAXBUS 2 /*Max Sata buses supported */ #define CFG_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */ #define CFG_SATA_MAX_DEVICE (CFG_SATA_MAXBUS* CFG_SATA_DEVS_PER_BUS) #define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */ +#else +#undef CFG_SATA_MAXBUS +#undef CFG_SATA_DEVS_PER_BUS +#undef CFG_SATA_MAX_DEVICE +#undef CONFIG_ATA_PIIX +#endif + /************************************************************ * DISK Partition support @@ -190,7 +203,11 @@ /************************************************************ * Video/Keyboard support ************************************************************/ +#ifndef GRUSS_TESTING #define CONFIG_VIDEO /* To enable video controller support */ +#else +#undef CONFIG_VIDEO +#endif #define CONFIG_I8042_KBD #define CFG_ISA_IO 0 @@ -203,6 +220,7 @@ /* * PCI stuff */ +#ifndef GRUSS_TESTING #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_PNP /* pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW @@ -211,5 +229,11 @@ #define CFG_SECOND_PCI_IRQ 9 #define CFG_THIRD_PCI_IRQ 11 #define CFG_FORTH_PCI_IRQ 15 +#else +#undef CONFIG_PCI +#undef CONFIG_PCI_PNP +#undef CONFIG_PCI_SCAN_SHOW +#endif + #endif /* __CONFIG_H */ -- cgit v1.2.3 From 48d0192fe869948fef14b460b5f0c85bca933693 Mon Sep 17 00:00:00 2001 From: Andreas Engel Date: Mon, 8 Sep 2008 14:30:53 +0200 Subject: Moved conditional compile into Makefile Signed-off-by: Andreas Engel --- include/configs/integratorap.h | 2 +- include/configs/integratorcp.h | 2 +- include/configs/versatile.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 1452bf2c467..ba3c5315e9f 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -58,7 +58,7 @@ /* * PL010 Configuration */ -#define CFG_PL010_SERIAL +#define CONFIG_PL010_SERIAL #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 38400 #define CONFIG_PL01x_PORTS { (void *) (CFG_SERIAL0), (void *) (CFG_SERIAL1) } diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 347fa0201d0..5340f7c2d1d 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -61,7 +61,7 @@ /* * NS16550 Configuration */ -#define CFG_PL011_SERIAL +#define CONFIG_PL011_SERIAL #define CONFIG_PL011_CLOCK 14745600 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 } #define CONFIG_CONS_INDEX 0 diff --git a/include/configs/versatile.h b/include/configs/versatile.h index a88d356b17c..c18a248147e 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -86,7 +86,7 @@ /* * NS16550 Configuration */ -#define CFG_PL011_SERIAL +#define CONFIG_PL011_SERIAL #define CONFIG_PL011_CLOCK 24000000 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 } #define CONFIG_CONS_INDEX 0 -- cgit v1.2.3 From 9ba2e2c8191353d75b2d535e672a125be7b84c03 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 8 Sep 2008 13:57:12 -0500 Subject: Remove support for booting ARTOS images Pantelis Antoniou stated: AFAIK, it is still used but the products using PPC are long gone. Nuke it plz (from orbit). So remove it since it cleans up a usage of env_get_char outside of the environment code. Signed-off-by: Kumar Gala --- include/configs/NETPHONE.h | 2 -- include/configs/NETTA.h | 2 -- include/configs/NETTA2.h | 2 -- include/configs/NETVIA.h | 2 -- 4 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 6c18b816914..1494190bf97 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -487,8 +487,6 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ -#define CONFIG_ARTOS /* include ARTOS support */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 1f1bc540bb4..64806342aeb 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -496,8 +496,6 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ -#define CONFIG_ARTOS /* include ARTOS support */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /*********************************************************************************************************** diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index ea5d1604cc9..efa91e304a2 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -488,8 +488,6 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ -#define CONFIG_ARTOS /* include ARTOS support */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index c0295941870..40e09fba620 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -357,8 +357,6 @@ /* Ethernet at SCC2 */ #define CONFIG_SCC2_ENET -#define CONFIG_ARTOS /* include ARTOS support */ - /****************************************************************/ #define DSP_SIZE 0x00010000 /* 64K */ -- cgit v1.2.3 From f5ed9e39088ecfa5a5f3ef47b08e5bda7890d764 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 8 Sep 2008 14:56:49 -0500 Subject: Add support for booting of INTEGRITY operating system uImages Signed-off-by: Peter Tyser --- include/image.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index 9be806e12d7..46544858c86 100644 --- a/include/image.h +++ b/include/image.h @@ -85,6 +85,7 @@ #define IH_OS_RTEMS 18 /* RTEMS */ #define IH_OS_ARTOS 19 /* ARTOS */ #define IH_OS_UNITY 20 /* Unity OS */ +#define IH_OS_INTEGRITY 21 /* INTEGRITY */ /* * CPU Architecture Codes (supported by Linux) -- cgit v1.2.3 From 919f550dc11a13abf01c6bc713c968de790b8d7c Mon Sep 17 00:00:00 2001 From: Bartlomiej Sieka Date: Tue, 9 Sep 2008 12:58:15 +0200 Subject: FIT: add ability to check hashes of all images in FIT, improve output - add function fit_all_image_check_hashes() that verifies if all hashes of all images in the FIT are valid - improve output of fit_image_check_hashes() when the hash check fails Signed-off-by: Bartlomiej Sieka --- include/image.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index 46544858c86..8c63686d4de 100644 --- a/include/image.h +++ b/include/image.h @@ -574,6 +574,7 @@ int fit_image_hash_set_value (void *fit, int noffset, uint8_t *value, int value_len); int fit_image_check_hashes (const void *fit, int noffset); +int fit_all_image_check_hashes (const void *fit); int fit_image_check_os (const void *fit, int noffset, uint8_t os); int fit_image_check_arch (const void *fit, int noffset, uint8_t arch); int fit_image_check_type (const void *fit, int noffset, uint8_t type); -- cgit v1.2.3