From ead4864fa6ccd552b1c2b6941e4b16ed6128b02f Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Wed, 11 Aug 2021 10:08:04 +0200 Subject: arm: mvebu: a38x: Define supported UART baudrates MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Define all standard baudrates plus 3 non-standard high speed: 3125000 4000000 5150000 3125000 matches divisor 5 with 250 MHz TCLK and divisor 4 with 200 MHz TCLK. 4000000 is the rounded value for divisor 4 with 250 MHz TCLK (3906250) and divisor 3 with 200 MHz TCLK (4166666). 5150000 is the rounded value (5208333) for divisor 3 with 250 MHz TCLK. Testing showed that rounded value is more stable then exactly calculated. And it is the highest possible baudrate which is stable on A38x platform. Any other baudrate values above 2500000 are unstable, which is reason why e.g. standard value 3000000 is not defined, and it is needed to use non-standard value 3125000. Tested all defined UART baudrates on Turris Omnia (A38x with 250 MHz TCLK). Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Reviewed-by: Stefan Roese --- include/configs/mv-common.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index d61c90a4315..53d7acbb103 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -39,6 +39,15 @@ #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif +#if defined(CONFIG_ARMADA_38X) && !defined(CONFIG_SYS_BAUDRATE_TABLE) +#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ + 9600, 19200, 38400, 57600, 115200, \ + 230400, 460800, 500000, 576000, \ + 921600, 1000000, 1152000, 1500000, \ + 2000000, 2500000, 3125000, 4000000, \ + 5150000 } +#endif + /* auto boot */ /* -- cgit v1.3.1 From 9ef82e29478c76f17b536f8f289fd0406067ab01 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 25 Aug 2021 19:13:24 +0200 Subject: efi_loader: don't load signature database from file The UEFI specification requires that the signature database may only be stored in tamper-resistant storage. So these variable may not be read from an unsigned file. Signed-off-by: Heinrich Schuchardt --- include/efi_variable.h | 5 ++++- lib/efi_loader/efi_var_common.c | 2 -- lib/efi_loader/efi_var_file.c | 41 +++++++++++++++++++++++++---------------- lib/efi_loader/efi_variable.c | 2 +- 4 files changed, 30 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/efi_variable.h b/include/efi_variable.h index 4623a641427..2d97655e1f1 100644 --- a/include/efi_variable.h +++ b/include/efi_variable.h @@ -161,10 +161,13 @@ efi_status_t __maybe_unused efi_var_collect(struct efi_var_file **bufp, loff_t * /** * efi_var_restore() - restore EFI variables from buffer * + * Only if @safe is set secure boot related variables will be restored. + * * @buf: buffer + * @safe: restoring from tamper-resistant storage * Return: status code */ -efi_status_t efi_var_restore(struct efi_var_file *buf); +efi_status_t efi_var_restore(struct efi_var_file *buf, bool safe); /** * efi_var_from_file() - read variables from file diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c index 3d92afe2ebd..005c03ea5f8 100644 --- a/lib/efi_loader/efi_var_common.c +++ b/lib/efi_loader/efi_var_common.c @@ -32,10 +32,8 @@ static const struct efi_auth_var_name_type name_type[] = { {u"KEK", &efi_global_variable_guid, EFI_AUTH_VAR_KEK}, {u"db", &efi_guid_image_security_database, EFI_AUTH_VAR_DB}, {u"dbx", &efi_guid_image_security_database, EFI_AUTH_VAR_DBX}, - /* not used yet {u"dbt", &efi_guid_image_security_database, EFI_AUTH_VAR_DBT}, {u"dbr", &efi_guid_image_security_database, EFI_AUTH_VAR_DBR}, - */ }; static bool efi_secure_boot; diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c index de076b8cbc4..c7c6805ed05 100644 --- a/lib/efi_loader/efi_var_file.c +++ b/lib/efi_loader/efi_var_file.c @@ -148,9 +148,10 @@ error: #endif } -efi_status_t efi_var_restore(struct efi_var_file *buf) +efi_status_t efi_var_restore(struct efi_var_file *buf, bool safe) { struct efi_var_entry *var, *last_var; + u16 *data; efi_status_t ret; if (buf->reserved || buf->magic != EFI_VAR_FILE_MAGIC || @@ -160,21 +161,29 @@ efi_status_t efi_var_restore(struct efi_var_file *buf) return EFI_INVALID_PARAMETER; } - var = buf->var; last_var = (struct efi_var_entry *)((u8 *)buf + buf->length); - while (var < last_var) { - u16 *data = var->name + u16_strlen(var->name) + 1; - - if (var->attr & EFI_VARIABLE_NON_VOLATILE && var->length) { - ret = efi_var_mem_ins(var->name, &var->guid, var->attr, - var->length, data, 0, NULL, - var->time); - if (ret != EFI_SUCCESS) - log_err("Failed to set EFI variable %ls\n", - var->name); - } - var = (struct efi_var_entry *) - ALIGN((uintptr_t)data + var->length, 8); + for (var = buf->var; var < last_var; + var = (struct efi_var_entry *) + ALIGN((uintptr_t)data + var->length, 8)) { + + data = var->name + u16_strlen(var->name) + 1; + + /* + * Secure boot related and non-volatile variables shall only be + * restored from U-Boot's preseed. + */ + if (!safe && + (efi_auth_var_get_type(var->name, &var->guid) != + EFI_AUTH_VAR_NONE || + !(var->attr & EFI_VARIABLE_NON_VOLATILE))) + continue; + if (!var->length) + continue; + ret = efi_var_mem_ins(var->name, &var->guid, var->attr, + var->length, data, 0, NULL, + var->time); + if (ret != EFI_SUCCESS) + log_err("Failed to set EFI variable %ls\n", var->name); } return EFI_SUCCESS; } @@ -213,7 +222,7 @@ efi_status_t efi_var_from_file(void) log_err("Failed to load EFI variables\n"); goto error; } - if (buf->length != len || efi_var_restore(buf) != EFI_SUCCESS) + if (buf->length != len || efi_var_restore(buf, false) != EFI_SUCCESS) log_err("Invalid EFI variables file\n"); error: free(buf); diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index ba0874e9e78..a7d305ffbc7 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -426,7 +426,7 @@ efi_status_t efi_init_variables(void) if (IS_ENABLED(CONFIG_EFI_VARIABLES_PRESEED)) { ret = efi_var_restore((struct efi_var_file *) - __efi_var_file_begin); + __efi_var_file_begin, true); if (ret != EFI_SUCCESS) log_err("Invalid EFI variable seed\n"); } -- cgit v1.3.1 From b191aa429e509ba6bf9eb446ae27b1a4fcd83276 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 26 Aug 2021 04:30:24 +0200 Subject: efi_loader: efi_auth_var_type for AuditMode, DeployedMode Writing variables AuditMode and DeployedMode serves to switch between Secure Boot modes. Provide a separate value for these in efi_auth_var_type. With this patch the variables will not be read from from file even if they are marked as non-volatile by mistake. Signed-off-by: Heinrich Schuchardt --- include/efi_variable.h | 1 + lib/efi_loader/efi_var_common.c | 2 ++ lib/efi_loader/efi_variable.c | 4 ++-- 3 files changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/efi_variable.h b/include/efi_variable.h index 2d97655e1f1..0440d356bc8 100644 --- a/include/efi_variable.h +++ b/include/efi_variable.h @@ -12,6 +12,7 @@ enum efi_auth_var_type { EFI_AUTH_VAR_NONE = 0, + EFI_AUTH_MODE, EFI_AUTH_VAR_PK, EFI_AUTH_VAR_KEK, EFI_AUTH_VAR_DB, diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c index 005c03ea5f8..c744e2fd910 100644 --- a/lib/efi_loader/efi_var_common.c +++ b/lib/efi_loader/efi_var_common.c @@ -34,6 +34,8 @@ static const struct efi_auth_var_name_type name_type[] = { {u"dbx", &efi_guid_image_security_database, EFI_AUTH_VAR_DBX}, {u"dbt", &efi_guid_image_security_database, EFI_AUTH_VAR_DBT}, {u"dbr", &efi_guid_image_security_database, EFI_AUTH_VAR_DBR}, + {u"AuditMode", &efi_global_variable_guid, EFI_AUTH_MODE}, + {u"DeployedMode", &efi_global_variable_guid, EFI_AUTH_MODE}, }; static bool efi_secure_boot; diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index a7d305ffbc7..fa2b6bc7a86 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -247,7 +247,7 @@ efi_status_t efi_set_variable_int(u16 *variable_name, const efi_guid_t *vendor, return EFI_WRITE_PROTECTED; if (IS_ENABLED(CONFIG_EFI_VARIABLES_PRESEED)) { - if (var_type != EFI_AUTH_VAR_NONE) + if (var_type >= EFI_AUTH_VAR_PK) return EFI_WRITE_PROTECTED; } @@ -268,7 +268,7 @@ efi_status_t efi_set_variable_int(u16 *variable_name, const efi_guid_t *vendor, return EFI_NOT_FOUND; } - if (var_type != EFI_AUTH_VAR_NONE) { + if (var_type >= EFI_AUTH_VAR_PK) { /* authentication is mandatory */ if (!(attributes & EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)) { -- cgit v1.3.1 From db3ed2cf9c67ed6a0da0bab6e43edae90ced4bf2 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Fri, 3 Sep 2021 10:55:51 +0900 Subject: efi_loader: fix boot_service_capability_min calculation TCG EFI Protocol Specification requires to the input ProtocolCapability.Size < size of the EFI_TCG2_BOOT_SERVICE_CAPABILITY up to and including the vendor ID field. Current implementation does different calculation, let's fix it. Signed-off-by: Masahisa Kojima Reviewed-by: Ilias Apalodimas Reviewed-by: Heinrich Schuchardt --- include/efi_tcg2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h index b6b958da514..a8c43e415f3 100644 --- a/include/efi_tcg2.h +++ b/include/efi_tcg2.h @@ -127,8 +127,8 @@ struct efi_tcg2_boot_service_capability { efi_tcg_event_algorithm_bitmap active_pcr_banks; }; +/* up to and including the vendor ID (manufacturer_id) field */ #define boot_service_capability_min \ - sizeof(struct efi_tcg2_boot_service_capability) - \ offsetof(struct efi_tcg2_boot_service_capability, number_of_pcr_banks) #define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03" -- cgit v1.3.1 From 538c0f2d3798261161a28a05e445d0c85af56276 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Fri, 3 Sep 2021 10:55:52 +0900 Subject: efi_loader: fix efi_tcg2_hash_log_extend_event() parameter check TCG EFI Protocol Specification defines that PCRIndex parameter passed from caller must be 0 to 23. TPM2_MAX_PCRS is currently used to check the range of PCRIndex, but TPM2_MAX_PCRS is tpm2 device dependent and may have larger value. This commit newly adds EFI_TCG2_MAX_PCR_INDEX macro, it is used to check the range of PCRIndex parameter. Signed-off-by: Masahisa Kojima Acked-by: Heinrich Schuchardt Reviewed-by: Ilias Apalodimas --- include/efi_tcg2.h | 2 ++ lib/efi_loader/efi_tcg2.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h index a8c43e415f3..c99384fb005 100644 --- a/include/efi_tcg2.h +++ b/include/efi_tcg2.h @@ -28,6 +28,8 @@ #define EFI_TCG2_EXTEND_ONLY 0x0000000000000001 #define PE_COFF_IMAGE 0x0000000000000010 +#define EFI_TCG2_MAX_PCR_INDEX 23 + /* Algorithm Registry */ #define EFI_TCG2_BOOT_HASH_ALG_SHA1 0x00000001 #define EFI_TCG2_BOOT_HASH_ALG_SHA256 0x00000002 diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index c4e9f61fd6d..b268a02976c 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -958,7 +958,7 @@ efi_tcg2_hash_log_extend_event(struct efi_tcg2_protocol *this, u64 flags, goto out; } - if (efi_tcg_event->header.pcr_index > TPM2_MAX_PCRS) { + if (efi_tcg_event->header.pcr_index > EFI_TCG2_MAX_PCR_INDEX) { ret = EFI_INVALID_PARAMETER; goto out; } -- cgit v1.3.1 From 7383432fa1f5fb738599abbd29b24c6ac866efe4 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 25 Aug 2021 18:21:57 +0200 Subject: riscv: enable booting HiFive Unmatched from SATA On the HiFive Unmatched a PCI to SATA adapter may be used to install a SATA drive. Enable booting from it. Signed-off-by: Heinrich Schuchardt Reviewed-by: Bin Meng Reviewed-by: Mark Kettenis --- configs/sifive_unmatched_defconfig | 5 +++++ include/configs/sifive-unmatched.h | 3 +++ 2 files changed, 8 insertions(+) (limited to 'include') diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 38b7acd536e..1dde98e0aef 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_AHCI=y CONFIG_TARGET_SIFIVE_UNMATCHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y @@ -28,12 +29,16 @@ CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SCSI_AHCI=y +CONFIG_AHCI_PCI=y CONFIG_SPL_CLK=y CONFIG_E1000=y CONFIG_NVME=y CONFIG_PCI=y CONFIG_PCIE_DW_SIFIVE=y CONFIG_DM_RESET=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_PCI=y diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index d63a5f62fbc..bea0eebe230 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -40,6 +40,8 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 + /* Environment options */ #ifndef CONFIG_SPL_BUILD @@ -47,6 +49,7 @@ func(NVME, nvme, 0) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ + func(SCSI, scsi, 0) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) -- cgit v1.3.1 From eb5171ddec9d3b04c2517b60e69dc707e92cf716 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Thu, 2 Sep 2021 19:54:17 -0500 Subject: common: Remove unused CONFIG_FIT_SHAxxx selectors Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only for hash_calculate() in common/image-fit.c. However, since commit 14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"), the correct selector was changed to CONFIG_SHAxxx. The extra "_FIT_" variants are neither used, nor needed. Remove them. One defconfig disables FIT_SHA256, which is now changed to 'SHA256'. CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined references to "sha256_*()". bubt.c needs sha256, so this selection is correct. It is not clear why this problem did not manifest before. Note that SHA selection in SPL is broken for this exact reason. There is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of this change. Also note that we make CONFIG_FIT now imply SHA256, to make up for FIT_SHA256 previously being a default y option. Signed-off-by: Alexandru Gagniuc [trini: Add imply SHA256 to FIT] Signed-off-by: Tom Rini --- cmd/mvebu/Kconfig | 1 + common/Kconfig.boot | 29 +-------------------------- common/spl/Kconfig | 42 ---------------------------------------- configs/mt8516_pumpkin_defconfig | 2 +- include/image.h | 3 --- 5 files changed, 3 insertions(+), 74 deletions(-) (limited to 'include') diff --git a/cmd/mvebu/Kconfig b/cmd/mvebu/Kconfig index 7c42c75afbe..340fb3aff6b 100644 --- a/cmd/mvebu/Kconfig +++ b/cmd/mvebu/Kconfig @@ -4,6 +4,7 @@ depends on ARCH_MVEBU config CMD_MVEBU_BUBT bool "bubt" default n + select SHA256 if ARMADA_3700 help bubt - Burn a u-boot image to flash For details about bubt command please see the documentation diff --git a/common/Kconfig.boot b/common/Kconfig.boot index 0d4c38402c1..8736e6af476 100644 --- a/common/Kconfig.boot +++ b/common/Kconfig.boot @@ -13,6 +13,7 @@ config FIT bool "Support Flattened Image Tree" select MD5 select SHA1 + imply SHA256 help This option allows you to boot the new uImage structure, Flattened Image Tree. FIT is formally a FDT, which can include @@ -35,34 +36,6 @@ config FIT_EXTERNAL_OFFSET could be put in the hole between data payload and fit image header, such as CSF data on i.MX platform. -config FIT_SHA256 - bool "Support SHA256 checksum of FIT image contents" - default y - select SHA256 - help - Enable this to support SHA256 checksum of FIT image contents. A - SHA256 checksum is a 256-bit (32-byte) hash value used to check that - the image contents have not been corrupted. - -config FIT_SHA384 - bool "Support SHA384 checksum of FIT image contents" - default n - select SHA384 - help - Enable this to support SHA384 checksum of FIT image contents. A - SHA384 checksum is a 384-bit (48-byte) hash value used to check that - the image contents have not been corrupted. Use this for the highest - security. - -config FIT_SHA512 - bool "Support SHA512 checksum of FIT image contents" - default n - select SHA512 - help - Enable this to support SHA512 checksum of FIT image contents. A - SHA512 checksum is a 512-bit (64-byte) hash value used to check that - the image contents have not been corrupted. - config FIT_FULL_CHECK bool "Do a full check of the FIT before using it" default y diff --git a/common/spl/Kconfig b/common/spl/Kconfig index c155a3b5fcc..d69d1fa5f78 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -439,48 +439,6 @@ config SPL_MD5 applications where images may be changed maliciously, you should consider SHA256 or SHA384. -config SPL_FIT_SHA1 - bool "Support SHA1" - depends on SPL_FIT - select SHA1 - help - Enable this to support SHA1 in FIT images within SPL. A SHA1 - checksum is a 160-bit (20-byte) hash value used to check that the - image contents have not been corrupted or maliciously altered. - While SHA1 is fairly secure it is coming to the end of its life - due to the expanding computing power available to brute-force - attacks. For more security, consider SHA256 or SHA384. - -config SPL_FIT_SHA256 - bool "Support SHA256" - depends on SPL_FIT - select SHA256 - help - Enable this to support SHA256 in FIT images within SPL. A SHA256 - checksum is a 256-bit (32-byte) hash value used to check that the - image contents have not been corrupted. - -config SPL_FIT_SHA384 - bool "Support SHA384" - depends on SPL_FIT - select SHA384 - select SHA512_ALGO - help - Enable this to support SHA384 in FIT images within SPL. A SHA384 - checksum is a 384-bit (48-byte) hash value used to check that the - image contents have not been corrupted. Use this for the highest - security. - -config SPL_FIT_SHA512 - bool "Support SHA512" - depends on SPL_FIT - select SHA512 - select SHA512_ALGO - help - Enable this to support SHA512 in FIT images within SPL. A SHA512 - checksum is a 512-bit (64-byte) hash value used to check that the - image contents have not been corrupted. - config SPL_FIT_IMAGE_TINY bool "Remove functionality from SPL FIT loading to reduce size" depends on SPL_FIT diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index 0a6c1fccaed..1478b017162 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -13,7 +13,7 @@ CONFIG_DEBUG_UART_CLOCK=26000000 # CONFIG_PSCI_RESET is not set CONFIG_DEBUG_UART=y CONFIG_FIT=y -# CONFIG_FIT_SHA256 is not set +# CONFIG_SHA256 is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_DEFAULT_FDT_FILE="mt8516-pumpkin" # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/include/image.h b/include/image.h index e20f0b69d58..489b220eba4 100644 --- a/include/image.h +++ b/include/image.h @@ -31,9 +31,6 @@ struct fdt_region; #define IMAGE_ENABLE_OF_LIBFDT 1 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ #define CONFIG_FIT_RSASSA_PSS 1 -#define CONFIG_FIT_SHA256 -#define CONFIG_FIT_SHA384 -#define CONFIG_FIT_SHA512 #define CONFIG_SHA1 #define CONFIG_SHA256 #define CONFIG_SHA384 -- cgit v1.3.1 From 0721209699c5092b4d364c3b57256840d3a7dcbc Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Thu, 2 Sep 2021 19:54:19 -0500 Subject: common/spl: Drop [ST]PL_HASH_SUPPORT in favor of [ST]PL_HASH All of these configs exist. Stick to using CONFIG_[ST]PL_HASH, and drop all references to CONFIG_[ST]PL_HASH_SUPPORT. This means we need for CHAIN_OF_TRUST to select SPL_HASH now. Signed-off-by: Alexandru Gagniuc [trini: Add TPL case, fix CHAIN_OF_TRUST, other tweaks] Signed-off-by: Tom Rini --- board/freescale/common/Kconfig | 1 + common/Kconfig.boot | 2 +- common/Makefile | 4 +--- common/spl/Kconfig | 23 +--------------------- .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 - configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 - configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 - configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 - .../ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 - include/configs/xilinx_zynqmp.h | 2 +- lib/Makefile | 2 +- 11 files changed, 6 insertions(+), 33 deletions(-) (limited to 'include') diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index ab9c14ae885..35a6115e5e4 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -4,6 +4,7 @@ config CHAIN_OF_TRUST imply CMD_HASH if ARM select FSL_CAAM select SPL_BOARD_INIT if (ARM && SPL) + select SPL_HASH if (ARM && SPL) select SHA_HW_ACCEL select SHA_PROG_HW_ACCEL select ENV_IS_NOWHERE diff --git a/common/Kconfig.boot b/common/Kconfig.boot index 8736e6af476..1f365d4a810 100644 --- a/common/Kconfig.boot +++ b/common/Kconfig.boot @@ -158,7 +158,7 @@ config SPL_FIT_SIGNATURE select FIT_SIGNATURE select SPL_FIT select SPL_CRYPTO - select SPL_HASH_SUPPORT + select SPL_HASH imply SPL_RSA imply SPL_RSA_VERIFY select SPL_IMAGE_SIGN_INFO diff --git a/common/Makefile b/common/Makefile index 9063ed93910..ae0430c35fe 100644 --- a/common/Makefile +++ b/common/Makefile @@ -8,7 +8,6 @@ ifndef CONFIG_SPL_BUILD obj-y += init/ obj-y += main.o obj-y += exports.o -obj-$(CONFIG_HASH) += hash.o obj-$(CONFIG_HUSH_PARSER) += cli_hush.o obj-$(CONFIG_AUTOBOOT) += autoboot.o @@ -66,8 +65,6 @@ ifdef CONFIG_SPL_BUILD ifdef CONFIG_SPL_DFU obj-$(CONFIG_DFU_OVER_USB) += dfu.o endif -obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o -obj-$(CONFIG_TPL_HASH_SUPPORT) += hash.o obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o @@ -105,6 +102,7 @@ endif endif obj-y += image.o +obj-$(CONFIG_$(SPL_TPL_)HASH) += hash.o obj-$(CONFIG_ANDROID_AB) += android_ab.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o image-android-dt.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o diff --git a/common/spl/Kconfig b/common/spl/Kconfig index d69d1fa5f78..29a46c47877 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -477,27 +477,6 @@ config SPL_CRYPTO this option to build the drivers in drivers/crypto as part of an SPL build. -config SPL_HASH_SUPPORT - bool "Support hashing drivers" - select SHA1 - select SHA256 - help - Enable hashing drivers in SPL. These drivers can be used to - accelerate secure boot processing in secure applications. Enable - this option to build system-specific drivers for hash acceleration - as part of an SPL build. - -config TPL_HASH_SUPPORT - bool "Support hashing drivers in TPL" - depends on TPL - select SHA1 - select SHA256 - help - Enable hashing drivers in SPL. These drivers can be used to - accelerate secure boot processing in secure applications. Enable - this option to build system-specific drivers for hash acceleration - as part of an SPL build. - config SPL_DMA bool "Support DMA drivers" help @@ -1193,7 +1172,7 @@ config SPL_USB_ETHER config SPL_DFU bool "Support DFU (Device Firmware Upgrade)" - select SPL_HASH_SUPPORT + select SPL_HASH select SPL_DFU_NO_RESET depends on SPL_RAM_SUPPORT help diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 78196e6485d..f9d551c6a89 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -31,7 +31,6 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_CRYPTO=y -CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 3736445d47c..2733ca83587 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -27,7 +27,6 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_CRYPTO=y -CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index b879a0c3614..392ef1cbd55 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -27,7 +27,6 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_CRYPTO=y -CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index c46d0dbedd3..3d5783aa260 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -27,7 +27,6 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_CRYPTO=y -CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 96d44799fa8..0d94027ccb9 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -33,7 +33,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_CRYPTO=y -CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 262154cdffd..42758ba7589 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -258,7 +258,7 @@ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) # define CONFIG_SPL_ENV_SUPPORT -# define CONFIG_SPL_HASH_SUPPORT +# define CONFIG_SPL_HASH # define CONFIG_ENV_MAX_ENTRIES 10 #endif diff --git a/lib/Makefile b/lib/Makefile index 6aa48ca3d50..93be86c34a0 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -87,7 +87,7 @@ endif ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o -obj-$(CONFIG_$(SPL_TPL_)HASH_SUPPORT) += crc16.o +obj-$(CONFIG_$(SPL_TPL_)HASH) += crc16.o obj-y += net_utils.o endif obj-$(CONFIG_ADDR_MAP) += addr_map.o -- cgit v1.3.1 From fe54aeaa4acbb41880b05acef9ef949e62d299dd Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Thu, 2 Sep 2021 19:54:20 -0500 Subject: common: Move MD5 hash to hash_algo[] array. MD5 is being called directly in some places, but it is not available via hash_lookup_algo("md5"). This is inconsistent with other hasing routines. To resolve this, add an "md5" entry to hash_algos[]. The #ifdef clause looks funnier than those for other entries. This is because both MD5 and SPL_MD5 configs exist, whereas the other hashes do not have "SPL_" entries. The long term plan is to get rid of the ifdefs, so those should not be expected to survive much longer. The md5 entry does not have .hash_init/update/finish members. That's okay because hash_progressive_lookup_algo() will catch that, and return -EPROTONOSUPPORT, while hash_lookup_algo() will return the correct pointer. Signed-off-by: Alexandru Gagniuc [trini: Use CONFIG_IS_ENABLED not IS_ENABLED for MD5 check] Signed-off-by: Tom Rini --- common/hash.c | 13 +++++++++++++ include/image.h | 1 + include/u-boot/md5.h | 6 ++++-- lib/md5.c | 4 ++-- 4 files changed, 20 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/common/hash.c b/common/hash.c index dca23635abe..6277fe65b3e 100644 --- a/common/hash.c +++ b/common/hash.c @@ -207,12 +207,25 @@ static int hash_finish_crc32(struct hash_algo *algo, void *ctx, void *dest_buf, return 0; } +#ifdef USE_HOSTCC +# define I_WANT_MD5 1 +#else +# define I_WANT_MD5 CONFIG_IS_ENABLED(MD5) +#endif /* * These are the hash algorithms we support. If we have hardware acceleration * is enable we will use that, otherwise a software version of the algorithm. * Note that algorithm names must be in lower case. */ static struct hash_algo hash_algo[] = { +#if I_WANT_MD5 + { + .name = "md5", + .digest_size = MD5_SUM_LEN, + .chunk_size = CHUNKSZ_MD5, + .hash_func_ws = md5_wd, + }, +#endif #ifdef CONFIG_SHA1 { .name = "sha1", diff --git a/include/image.h b/include/image.h index 489b220eba4..e4b9cd0df2d 100644 --- a/include/image.h +++ b/include/image.h @@ -31,6 +31,7 @@ struct fdt_region; #define IMAGE_ENABLE_OF_LIBFDT 1 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ #define CONFIG_FIT_RSASSA_PSS 1 +#define CONFIG_MD5 #define CONFIG_SHA1 #define CONFIG_SHA256 #define CONFIG_SHA384 diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h index e09c16a6e3f..6d48592aa64 100644 --- a/include/u-boot/md5.h +++ b/include/u-boot/md5.h @@ -8,6 +8,8 @@ #include "compiler.h" +#define MD5_SUM_LEN 16 + struct MD5Context { __u32 buf[4]; __u32 bits[2]; @@ -28,7 +30,7 @@ void md5 (unsigned char *input, int len, unsigned char output[16]); * 'output' must have enough space to hold 16 bytes. If 'chunk' Trigger the * watchdog every 'chunk_sz' bytes of input processed. */ -void md5_wd (unsigned char *input, int len, unsigned char output[16], - unsigned int chunk_sz); +void md5_wd(const unsigned char *input, unsigned int len, + unsigned char output[16], unsigned int chunk_sz); #endif /* _MD5_H */ diff --git a/lib/md5.c b/lib/md5.c index 2ae4a06319c..e2ba622ea4e 100644 --- a/lib/md5.c +++ b/lib/md5.c @@ -284,12 +284,12 @@ md5 (unsigned char *input, int len, unsigned char output[16]) * watchdog every 'chunk_sz' bytes of input processed. */ void -md5_wd (unsigned char *input, int len, unsigned char output[16], +md5_wd(const unsigned char *input, unsigned int len, unsigned char output[16], unsigned int chunk_sz) { struct MD5Context context; #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - unsigned char *end, *curr; + const unsigned char *end, *curr; int chunk; #endif -- cgit v1.3.1 From 0b905e25813a0b4e368730a147dadc7f55150edc Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Thu, 2 Sep 2021 19:54:22 -0500 Subject: image: Drop IMAGE_ENABLE_{MD5, CRC32} #defines These are no longer used, so drop them. Signed-off-by: Alexandru Gagniuc --- include/image.h | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'include') diff --git a/include/image.h b/include/image.h index e4b9cd0df2d..98b33d0629d 100644 --- a/include/image.h +++ b/include/image.h @@ -60,26 +60,6 @@ struct fdt_region; #include #include #include -# ifdef CONFIG_SPL_BUILD -# ifdef CONFIG_SPL_CRC32 -# define IMAGE_ENABLE_CRC32 1 -# endif -# ifdef CONFIG_SPL_MD5 -# define IMAGE_ENABLE_MD5 1 -# endif -# else -# define IMAGE_ENABLE_CRC32 1 -# define IMAGE_ENABLE_MD5 1 -# endif - -#ifndef IMAGE_ENABLE_CRC32 -#define IMAGE_ENABLE_CRC32 0 -#endif - -#ifndef IMAGE_ENABLE_MD5 -#define IMAGE_ENABLE_MD5 0 -#endif - #endif /* IMAGE_ENABLE_FIT */ #ifdef CONFIG_SYS_BOOT_GET_CMDLINE -- cgit v1.3.1 From a4a06a180d622b86183b0825891d2bdd37f3b4db Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Thu, 2 Sep 2021 12:00:51 +0200 Subject: arm: mvebu: a38x: Fix 5200000 baudrate MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix baudrate value 5150000 which was added in commit ead4864fa6cc ("arm: mvebu: a38x: Define supported UART baudrates"). Exact value for divisor 3 with 250 MHz TCLK is 5208333 baudrate. In above commit I incorrectly rounded it to 5150000 value due to testing with USB-UART hw which incorrectly reported exact value and divisor configured on other other end of UART link. Fix this value to 520000 baudrate which is more close to the exact hardware value and also has less fraction parts. Signed-off-by: Pali Rohár Fixes: ead4864fa6cc ("arm: mvebu: a38x: Define supported UART baudrates") Reviewed-by: Stefan Roese --- include/configs/mv-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 53d7acbb103..6036bf4fa5d 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -45,7 +45,7 @@ 230400, 460800, 500000, 576000, \ 921600, 1000000, 1152000, 1500000, \ 2000000, 2500000, 3125000, 4000000, \ - 5150000 } + 5200000 } #endif /* auto boot */ -- cgit v1.3.1 From 19f7a34a4642e25aa8b80c6d75129fe7848a158d Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Fri, 13 Aug 2021 23:04:41 +0530 Subject: mmc: Add support for enumerating MMC card in a given mode using mmc command Add support for enumerating MMC card in a given mode using mmc rescan and mmc dev commands. The speed mode is provided as the last argument in these commands and is indicated using the index from enum bus_mode in include/mmc.h. A speed mode can be set only if it has already been enabled in the device tree. Signed-off-by: Aswath Govindraju Reviewed-by: Jaehoon Chung Tested-by: Jaehoon Chung --- cmd/Kconfig | 10 ++++++++++ cmd/mmc.c | 52 ++++++++++++++++++++++++++++++++++++++++-------- drivers/mmc/mmc-uclass.c | 5 ++++- drivers/mmc/mmc.c | 22 +++++++++++++++++++- include/mmc.h | 2 ++ 5 files changed, 81 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/cmd/Kconfig b/cmd/Kconfig index ffef3cc76ca..3a857b3f6e2 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -2389,4 +2389,14 @@ config CMD_UBIFS help UBIFS is a file system for flash devices which works on top of UBI. +config MMC_SPEED_MODE_SET + bool "set speed mode using mmc command" + depends on CMD_MMC + default n + help + Enable setting speed mode using mmc rescan and mmc dev commands. + The speed mode is provided as the last argument in these commands + and is indicated using the index from enum bus_mode in + include/mmc.h. A speed mode can be set only if it has already + been enabled in the device tree. endmenu diff --git a/cmd/mmc.c b/cmd/mmc.c index c67ad762422..f1e30d0cf64 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -120,7 +120,9 @@ static void print_mmcinfo(struct mmc *mmc) } } } -static struct mmc *init_mmc_device(int dev, bool force_init) + +static struct mmc *__init_mmc_device(int dev, bool force_init, + enum bus_mode speed_mode) { struct mmc *mmc; mmc = find_mmc_device(dev); @@ -134,6 +136,10 @@ static struct mmc *init_mmc_device(int dev, bool force_init) if (force_init) mmc->has_init = 0; + + if (IS_ENABLED(CONFIG_MMC_SPEED_MODE_SET)) + mmc->user_speed_mode = speed_mode; + if (mmc_init(mmc)) return NULL; @@ -145,6 +151,11 @@ static struct mmc *init_mmc_device(int dev, bool force_init) return mmc; } +static struct mmc *init_mmc_device(int dev, bool force_init) +{ + return __init_mmc_device(dev, force_init, MMC_MODES_END); +} + static int do_mmcinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -482,8 +493,17 @@ static int do_mmc_rescan(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { struct mmc *mmc; + enum bus_mode speed_mode = MMC_MODES_END; + + if (argc == 1) { + mmc = init_mmc_device(curr_device, true); + } else if (argc == 2) { + speed_mode = (int)dectoul(argv[1], NULL); + mmc = __init_mmc_device(curr_device, true, speed_mode); + } else { + return CMD_RET_USAGE; + } - mmc = init_mmc_device(curr_device, true); if (!mmc) return CMD_RET_FAILURE; @@ -515,11 +535,14 @@ static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag, { int dev, part = 0, ret; struct mmc *mmc; + enum bus_mode speed_mode = MMC_MODES_END; if (argc == 1) { dev = curr_device; + mmc = init_mmc_device(dev, true); } else if (argc == 2) { - dev = dectoul(argv[1], NULL); + dev = (int)dectoul(argv[1], NULL); + mmc = init_mmc_device(dev, true); } else if (argc == 3) { dev = (int)dectoul(argv[1], NULL); part = (int)dectoul(argv[2], NULL); @@ -528,11 +551,21 @@ static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag, PART_ACCESS_MASK); return CMD_RET_FAILURE; } + mmc = init_mmc_device(dev, true); + } else if (argc == 4) { + dev = (int)dectoul(argv[1], NULL); + part = (int)dectoul(argv[2], NULL); + if (part > PART_ACCESS_MASK) { + printf("#part_num shouldn't be larger than %d\n", + PART_ACCESS_MASK); + return CMD_RET_FAILURE; + } + speed_mode = (int)dectoul(argv[3], NULL); + mmc = __init_mmc_device(dev, true, speed_mode); } else { return CMD_RET_USAGE; } - mmc = init_mmc_device(dev, true); if (!mmc) return CMD_RET_FAILURE; @@ -983,9 +1016,9 @@ static struct cmd_tbl cmd_mmc[] = { #if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) U_BOOT_CMD_MKENT(swrite, 3, 0, do_mmc_sparse_write, "", ""), #endif - U_BOOT_CMD_MKENT(rescan, 1, 1, do_mmc_rescan, "", ""), + U_BOOT_CMD_MKENT(rescan, 2, 1, do_mmc_rescan, "", ""), U_BOOT_CMD_MKENT(part, 1, 1, do_mmc_part, "", ""), - U_BOOT_CMD_MKENT(dev, 3, 0, do_mmc_dev, "", ""), + U_BOOT_CMD_MKENT(dev, 4, 0, do_mmc_dev, "", ""), U_BOOT_CMD_MKENT(list, 1, 1, do_mmc_list, "", ""), #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) U_BOOT_CMD_MKENT(hwpartition, 28, 0, do_mmc_hwpartition, "", ""), @@ -1042,9 +1075,12 @@ U_BOOT_CMD( "mmc swrite addr blk#\n" #endif "mmc erase blk# cnt\n" - "mmc rescan\n" + "mmc rescan [mode]\n" "mmc part - lists available partition on current mmc device\n" - "mmc dev [dev] [part] - show or set current mmc device [partition]\n" + "mmc dev [dev] [part] [mode] - show or set current mmc device [partition] and set mode\n" + " - the required speed mode is passed as the index from the following list\n" + " [MMC_LEGACY, MMC_HS, SD_HS, MMC_HS_52, MMC_DDR_52, UHS_SDR12, UHS_SDR25,\n" + " UHS_SDR50, UHS_DDR50, UHS_SDR104, MMC_HS_200, MMC_HS_400, MMC_HS_400_ES]\n" "mmc list - lists available devices\n" "mmc wp - power on write protect boot partitions\n" #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 0e13238c7e7..3ee92d03ca2 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -342,6 +342,9 @@ void mmc_do_preinit(void) if (!m) continue; + + m->user_speed_mode = MMC_MODES_END; /* Initialising user set speed mode */ + if (m->preinit) mmc_start_init(m); } @@ -414,7 +417,7 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg) /* setup initial part type */ bdesc->part_type = cfg->part_type; mmc->dev = dev; - + mmc->user_speed_mode = MMC_MODES_END; return 0; } diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 8078a89f18c..bd348974ae7 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2862,7 +2862,25 @@ int mmc_start_init(struct mmc *mmc) * timings. */ mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(MMC_LEGACY) | - MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT; + MMC_MODE_1BIT; + + if (IS_ENABLED(CONFIG_MMC_SPEED_MODE_SET)) { + if (mmc->user_speed_mode != MMC_MODES_END) { + int i; + /* set host caps */ + if (mmc->host_caps & MMC_CAP(mmc->user_speed_mode)) { + /* Remove all existing speed capabilities */ + for (i = MMC_LEGACY; i < MMC_MODES_END; i++) + mmc->host_caps &= ~MMC_CAP(i); + mmc->host_caps |= (MMC_CAP(mmc->user_speed_mode) + | MMC_CAP(MMC_LEGACY) | + MMC_MODE_1BIT); + } else { + pr_err("bus_mode requested is not supported\n"); + return -EINVAL; + } + } + } #if CONFIG_IS_ENABLED(DM_MMC) mmc_deferred_probe(mmc); #endif @@ -3060,6 +3078,8 @@ int mmc_init_device(int num) } m = mmc_get_mmc_dev(dev); + m->user_speed_mode = MMC_MODES_END; /* Initialising user set speed mode */ + if (!m) return 0; if (m->preinit) diff --git a/include/mmc.h b/include/mmc.h index 0bf19de20e5..b92e2553402 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -726,6 +726,8 @@ struct mmc { */ u32 quirks; u8 hs400_tuning; + + enum bus_mode user_speed_mode; /* input speed mode from user */ }; #if CONFIG_IS_ENABLED(DM_MMC) -- cgit v1.3.1 From 11e2ab3f0bc8d339c66a4bab26216278c3c20553 Mon Sep 17 00:00:00 2001 From: "Derald D. Woods" Date: Mon, 2 Aug 2021 03:46:19 +0000 Subject: ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGS This commit uses the existing DEFAULT_MMC_TI_ARGS and DEFAULT_FIT_TI_ARGS defintions to replace the 'mmc*' environment variables in the configuration. The check for the 'boot_fit' is handled like the 'am335x_*' boards with 'CONFIG_BOOTCOMMAND'. Signed-off-by: Derald D. Woods --- configs/omap3_evm_defconfig | 1 + include/configs/omap3_evm.h | 45 +++++---------------------------------------- 2 files changed, 6 insertions(+), 40 deletions(-) (limited to 'include') diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 2571545f0e4..9d4db33f646 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_OMAP3_EVM=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run envboot; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index e2e871a9cb6..2ce3c867cb1 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -50,9 +50,6 @@ #endif /* CONFIG_SPL_OS_BOOT */ #endif /* CONFIG_MTD_RAW_NAND */ -#define MEM_LAYOUT_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV - #define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \ "bootcmd_" #devtypel #instance "=" \ "setenv mmcdev " #instance "; " \ @@ -88,8 +85,12 @@ #include +#include + #define CONFIG_EXTRA_ENV_SETTINGS \ - MEM_LAYOUT_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + DEFAULT_MMC_TI_ARGS \ + DEFAULT_FIT_TI_ARGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ @@ -102,42 +103,6 @@ "bootubivol=rootfs\0" \ "bootubipart=rootfs\0" \ "optargs=\0" \ - "mmcdev=0\0" \ - "mmcpart=2\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "${mtdparts} " \ - "${optargs} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ - "ext4bootenv=ext4load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootenv}\0" \ - "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ - "env import -t ${loadaddr} ${filesize}\0" \ - "mmcbootenv=setenv bootpart ${mmcdev}:${mmcpart}; " \ - "mmc dev ${mmcdev}; " \ - "if mmc rescan; then " \ - "run loadbootenv && run importbootenv; " \ - "run ext4bootenv && run importbootenv; " \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...; " \ - "run uenvcmd; " \ - "fi; " \ - "fi\0" \ - "loadimage=ext4load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loaddtb=ext4load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ - "mmcboot=run mmcbootenv; " \ - "if run loadimage && run loaddtb; then " \ - "echo Booting ${bootdir}/${bootfile} from mmc ${bootpart} ...; " \ - "run mmcargs; " \ - "if test ${bootfile} = uImage; then " \ - "bootm ${loadaddr} - ${fdtaddr}; " \ - "fi; " \ - "if test ${bootfile} = zImage; then " \ - "bootz ${loadaddr} - ${fdtaddr}; " \ - "fi; " \ - "fi\0" \ "nandroot=ubi0:rootfs ubi.mtd=rootfs rw noinitrd\0" \ "nandrootfstype=ubifs rootwait\0" \ "nandargs=setenv bootargs console=${console} " \ -- cgit v1.3.1 From e34ab0e01f3e7e1d6d8264e3050b6053cc14eba1 Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 4 Aug 2021 18:42:45 +0530 Subject: environment: ti: mmc.h: Make the finduuid generic for usage across different device types Make finduuid generic by making it dependent on the boot variable. For example, this can now be used for finding the uuid of partitions in usb device too. Signed-off-by: Aswath Govindraju --- include/environment/ti/mmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/environment/ti/mmc.h b/include/environment/ti/mmc.h index b86c8dc7a4f..769ea9d5ef7 100644 --- a/include/environment/ti/mmc.h +++ b/include/environment/ti/mmc.h @@ -11,7 +11,7 @@ #define DEFAULT_MMC_TI_ARGS \ "mmcdev=0\0" \ "mmcrootfstype=ext4 rootwait\0" \ - "finduuid=part uuid mmc ${bootpart} uuid\0" \ + "finduuid=part uuid ${boot} ${bootpart} uuid\0" \ "args_mmc=run finduuid;setenv bootargs console=${console} " \ "${optargs} " \ "root=PARTUUID=${uuid} rw " \ -- cgit v1.3.1 From 3c01557df8971f59628f156c69bd1989f69d168c Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 4 Aug 2021 18:42:46 +0530 Subject: include: configs: am64x_evm: Add env variables for booting to kernel using USB MSC device Add env variables for booting to kernel from USB MSC device. The second partition in the USB MSC device needs to formatted as ext4 file system with kernel and dtb images, present in the /boot folder. Signed-off-by: Aswath Govindraju --- include/configs/am64x_evm.h | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 7c520f4395b..57cd520234b 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -96,6 +96,34 @@ "${bootdir}/${name_fit}\0" \ "partitions=" PARTS_DEFAULT +#define EXTRA_ENV_AM642_BOARD_SETTING_USBMSC \ + "args_usb=run finduuid;setenv bootargs console=${console} " \ + "${optargs} " \ + "root=PARTUUID=${uuid} rw " \ + "rootfstype=${mmcrootfstype}\0" \ + "init_usb=run args_all args_usb\0" \ + "get_fdt_usb=load usb ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "get_overlay_usb=" \ + "fdt address ${fdtaddr};" \ + "fdt resize 0x100000;" \ + "for overlay in $name_overlays;" \ + "do;" \ + "load usb ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \ + "fdt apply ${dtboaddr};" \ + "done;\0" \ + "get_kern_usb=load usb ${bootpart} ${loadaddr} " \ + "${bootdir}/${name_kern}\0" \ + "get_fit_usb=load usb ${bootpart} ${addr_fit} " \ + "${bootdir}/${name_fit}\0" \ + "usbboot=setenv boot usb;" \ + "setenv bootpart 0:2;" \ + "usb start;" \ + "run findfdt;" \ + "run init_usb;" \ + "run get_kern_usb;" \ + "run get_fdt_usb;" \ + "run run_kern\0" + #define EXTRA_ENV_DFUARGS \ DFU_ALT_INFO_MMC \ DFU_ALT_INFO_EMMC \ @@ -108,7 +136,8 @@ DEFAULT_MMC_TI_ARGS \ EXTRA_ENV_AM642_BOARD_SETTINGS \ EXTRA_ENV_AM642_BOARD_SETTINGS_MMC \ - EXTRA_ENV_DFUARGS + EXTRA_ENV_DFUARGS \ + EXTRA_ENV_AM642_BOARD_SETTING_USBMSC /* Now for the remaining common defines */ #include -- cgit v1.3.1 From 7026b88844f3b3313c390cd57a119164319377a4 Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Thu, 26 Aug 2021 21:28:58 +0530 Subject: environment: ti: k3_dfu: Increase the size allocated for bootloader images in dfu_alt_info_ram The size of u-boot.img is above 1MB and that of tispl.bin is close to 1MB, in case of j721e. Therefore, increase the sizes allocated for tispl.bin and u-boot.img to 2 MB and 4 MB respectively, in dfu_alt_info_ram environment variable. Signed-off-by: Aswath Govindraju --- include/environment/ti/k3_dfu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/environment/ti/k3_dfu.h b/include/environment/ti/k3_dfu.h index 2f503b8de88..a16a3adecaf 100644 --- a/include/environment/ti/k3_dfu.h +++ b/include/environment/ti/k3_dfu.h @@ -40,7 +40,7 @@ #define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ - "tispl.bin ram 0x80080000 0x100000;" \ - "u-boot.img ram 0x81000000 0x100000\0" \ + "tispl.bin ram 0x80080000 0x200000;" \ + "u-boot.img ram 0x81000000 0x400000\0" \ #endif /* __TI_DFU_H */ -- cgit v1.3.1 From cab1306a0990474032a7523e73ff185507488e3b Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Thu, 26 Aug 2021 21:28:59 +0530 Subject: configs: j72*_evm: Define the buffer sizes for dfu On J721e R5 SPL, dfu buffer for loading sysfw.itb image gets allocated before DRAM gets initialized. So, the buffer gets allocated in MCU L3 RAM. The current buffer size to be allocated is 256KB and the available total heap memory is 0x70000 (448KB). This leads to NOMEM errors during allocation. In other cases when constraints such as above are not present fix the size of buffers to the sector size in OSPI for proper functioning. Also, if CONFIG_SYS_DFU_DATA_BUF_SIZE is defined and CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then the max file size for dfu transfer is defined as CONFIG_SYS_DFU_DATA_BUF_SIZE. Fix these by setting appropriate buffer sizes in their respective defconfig files and defining the max file size as 8 MB which is the default dfu buffer size. Signed-off-by: Aswath Govindraju --- configs/j7200_evm_a72_defconfig | 2 ++ configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_a72_defconfig | 2 ++ configs/j721e_evm_r5_defconfig | 1 + include/configs/j721e_evm.h | 2 -- 5 files changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 6fc7cabd603..a449705a405 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -97,6 +97,8 @@ CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_TI_SCI=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index f9fe41a434a..b12a6414ce0 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -53,6 +53,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DFU=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index d01bacdea19..ea83fec69f1 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -96,6 +96,8 @@ CONFIG_CLK_TI_SCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x20000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_USB_FUNCTION_FASTBOOT=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index e8841ba953c..cd72d27b639 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DFU=y diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 18b80ef8ce7..10555d1a6ca 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -155,9 +155,7 @@ #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY #endif -/* set default dfu_bufsiz to 128KB (sector size of OSPI) */ #define EXTRA_ENV_DFUARGS \ - "dfu_bufsiz=0x20000\0" \ DFU_ALT_INFO_MMC \ DFU_ALT_INFO_EMMC \ DFU_ALT_INFO_RAM \ -- cgit v1.3.1 From bad49da2bc4702dc3a12b6a4f07a87a70bf521b4 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Mon, 6 Sep 2021 12:04:12 +0900 Subject: efi_loader: boot_service_capability_min should be capitalized boot_service_capability_min is constant, it should be capitalized. Signed-off-by: Masahisa Kojima Acked-by: Ilias Apalodimas Reviewed-by: Heinrich Schuchardt --- include/efi_tcg2.h | 2 +- lib/efi_loader/efi_tcg2.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h index c99384fb005..5a1a36212e5 100644 --- a/include/efi_tcg2.h +++ b/include/efi_tcg2.h @@ -130,7 +130,7 @@ struct efi_tcg2_boot_service_capability { }; /* up to and including the vendor ID (manufacturer_id) field */ -#define boot_service_capability_min \ +#define BOOT_SERVICE_CAPABILITY_MIN \ offsetof(struct efi_tcg2_boot_service_capability, number_of_pcr_banks) #define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03" diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index b268a02976c..62ae102033f 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -607,8 +607,8 @@ efi_tcg2_get_capability(struct efi_tcg2_protocol *this, goto out; } - if (capability->size < boot_service_capability_min) { - capability->size = boot_service_capability_min; + if (capability->size < BOOT_SERVICE_CAPABILITY_MIN) { + capability->size = BOOT_SERVICE_CAPABILITY_MIN; efi_ret = EFI_BUFFER_TOO_SMALL; goto out; } -- cgit v1.3.1 From 46596c653b7aa08eceef3b4ccea3c438144fd6f8 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 1 Aug 2021 18:54:15 -0600 Subject: ppc: Remove UCP1020 board This board has not been converted to CONFIG_DM_PCI by the deadline. Remove it. Note that we have to add CONFIG_SPIFLASH to scripts/config_whitelist.txt because it's not really migrated at this point. Acked-by: Michael Durrant Acked-by: Oleksandr Zhadan Acked-by: Oleksandr Zhadan and Michael Durrant Signed-off-by: Simon Glass [trini: Handle CONFIG_SPIFLASH differently and delete Kconfig file] Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 7 - board/Arcturus/ucp1020/Kconfig | 36 -- board/Arcturus/ucp1020/MAINTAINERS | 7 - board/Arcturus/ucp1020/Makefile | 31 -- board/Arcturus/ucp1020/README | 54 --- board/Arcturus/ucp1020/cmd_arc.c | 408 ----------------- board/Arcturus/ucp1020/ddr.c | 161 ------- board/Arcturus/ucp1020/law.c | 24 - board/Arcturus/ucp1020/spl.c | 127 ------ board/Arcturus/ucp1020/spl_minimal.c | 67 --- board/Arcturus/ucp1020/tlb.c | 100 ----- board/Arcturus/ucp1020/ucp1020.c | 372 ---------------- board/Arcturus/ucp1020/ucp1020.h | 45 -- configs/UCP1020_defconfig | 58 --- include/configs/UCP1020.h | 832 ----------------------------------- scripts/config_whitelist.txt | 1 + 16 files changed, 1 insertion(+), 2329 deletions(-) delete mode 100644 board/Arcturus/ucp1020/Kconfig delete mode 100644 board/Arcturus/ucp1020/MAINTAINERS delete mode 100644 board/Arcturus/ucp1020/Makefile delete mode 100644 board/Arcturus/ucp1020/README delete mode 100644 board/Arcturus/ucp1020/cmd_arc.c delete mode 100644 board/Arcturus/ucp1020/ddr.c delete mode 100644 board/Arcturus/ucp1020/law.c delete mode 100644 board/Arcturus/ucp1020/spl.c delete mode 100644 board/Arcturus/ucp1020/spl_minimal.c delete mode 100644 board/Arcturus/ucp1020/tlb.c delete mode 100644 board/Arcturus/ucp1020/ucp1020.c delete mode 100644 board/Arcturus/ucp1020/ucp1020.h delete mode 100644 configs/UCP1020_defconfig delete mode 100644 include/configs/UCP1020.h (limited to 'include') diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 395423582a8..66ebaf529ff 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -178,12 +178,6 @@ config TARGET_KMCENT2 bool "Support kmcent2" select VENDOR_KM -config TARGET_UCP1020 - bool "Support uCP1020" - select ARCH_P1020 - imply CMD_SATA - imply PANIC_HANG - endchoice config ARCH_B4420 @@ -1147,6 +1141,5 @@ source "board/freescale/t208xrdb/Kconfig" source "board/freescale/t4rdb/Kconfig" source "board/keymile/Kconfig" source "board/socrates/Kconfig" -source "board/Arcturus/ucp1020/Kconfig" endmenu diff --git a/board/Arcturus/ucp1020/Kconfig b/board/Arcturus/ucp1020/Kconfig deleted file mode 100644 index fe2c3be1b7a..00000000000 --- a/board/Arcturus/ucp1020/Kconfig +++ /dev/null @@ -1,36 +0,0 @@ -if TARGET_UCP1020 - -config SYS_BOARD - string - default "ucp1020" - -config SYS_VENDOR - string - default "Arcturus" - -config SYS_CONFIG_NAME - string - default "UCP1020" - -choice - prompt "Target image select" - -config TARGET_UCP1020_NOR - bool "NOR flash u-boot image" - -config TARGET_UCP1020_SPIFLASH - bool "SPI flash u-boot image" - -endchoice - -if TARGET_UCP1020_SPIFLASH -config UCBOOT - bool - default y - -config SPIFLASH - bool - default y -endif - -endif diff --git a/board/Arcturus/ucp1020/MAINTAINERS b/board/Arcturus/ucp1020/MAINTAINERS deleted file mode 100644 index e4a4718188f..00000000000 --- a/board/Arcturus/ucp1020/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -UCP1020 BOARD -M: Oleksandr Zhadan and Michael Durrant -S: Maintained -F: board/Arcturus/ucp1020/ -F: include/configs/UCP1020.h -F: configs/UCP1020_defconfig -F: configs/UCP1020_SPIFLASH_defconfig diff --git a/board/Arcturus/ucp1020/Makefile b/board/Arcturus/ucp1020/Makefile deleted file mode 100644 index 46d04fb78c1..00000000000 --- a/board/Arcturus/ucp1020/Makefile +++ /dev/null @@ -1,31 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright 2013-2015 Arcturus Networks, Inc. -# based on board/freescale/p1_p2_rdb_pc/Makefile -# original copyright follows: -# Copyright 2010-2011 Freescale Semiconductor, Inc. - -MINIMAL= - -ifdef CONFIG_SPL_BUILD -ifdef CONFIG_SPL_INIT_MINIMAL -MINIMAL=y -endif -endif - -ifdef MINIMAL - -obj-y += spl_minimal.o tlb.o law.o - -else -ifdef CONFIG_SPL_BUILD -obj-y += spl.o -endif - -obj-y += ucp1020.o -obj-y += ddr.o -obj-y += law.o -obj-y += tlb.o -obj-y += cmd_arc.o - -endif diff --git a/board/Arcturus/ucp1020/README b/board/Arcturus/ucp1020/README deleted file mode 100644 index 555c4ef79fe..00000000000 --- a/board/Arcturus/ucp1020/README +++ /dev/null @@ -1,54 +0,0 @@ -The uCP1020 product family (ucp1020) is an Arcturus Networks Inc. System on Modules -product featuring a Freescale P1020 CPU, optionally populated with 1, 2 or 3 Gig-Ethernet PHYs, -DDR3, NOR Flash, eMMC NAND Flash and/or SPI Flash. - -Information on the generic product family can be found here: - http://www.arcturusnetworks.com/products/ucp1020 - -The UCP1020 several configurable options -======================================== - -- the selection of populated phy(s): - KSZ9031 (current default for eTSEC 1 and 3) - -- the selection of boot location: - SPI Flash or NOR flash - -The UCP1020 includes 2 default configurations -============================================= -NOR boot image: - configs/UCP1020_defconfig -SPI boot image: - configs/UCP1020_SPIFLASH_defconfig - -The UCP1020 adds an additional command in cmd_arc.c to access and program -SPI resident factory defaults for serial number, and 1, 2 or 3 Ethernet -HW Addresses. - - -Build example -============= - -make distclean -make UCP1020_defconfig -make - -Default Scripts -=============== -A default upgrade scripts is included in the default environment variable example: - -B$ run tftpflash - -Dual Environment -================ - -This build enables dual / failover environment environment. - -NOR Flash Partition declarations and scripts -============================================ -Several scripts are available to allow TFTP of images and programming directly -into defined NOR flash partitions. Examples: - -B$ run program0 -B$ run program1 -B$ run program2 diff --git a/board/Arcturus/ucp1020/cmd_arc.c b/board/Arcturus/ucp1020/cmd_arc.c deleted file mode 100644 index 4b30b66e208..00000000000 --- a/board/Arcturus/ucp1020/cmd_arc.c +++ /dev/null @@ -1,408 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Command for accessing Arcturus factory environment. - * - * Copyright 2013-2019 Arcturus Networks Inc. - * https://www.arcturusnetworks.com/products/ - * by Oleksandr G Zhadan et al. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static ulong fwenv_addr[MAX_FWENV_ADDR]; -const char mystrerr[] = "ERROR: Failed to save factory info"; - -static int ishwaddr(char *hwaddr) -{ - if (strlen(hwaddr) == MAX_HWADDR_SIZE) - if (hwaddr[2] == ':' && - hwaddr[5] == ':' && - hwaddr[8] == ':' && - hwaddr[11] == ':' && - hwaddr[14] == ':') - return 0; - return -1; -} - -#if (FWENV_TYPE == FWENV_MMC) - -static char smac[29][18] __attribute__ ((aligned(0x200))); /* 1 MMC block is 512 bytes */ - -int set_mmc_arc_product(int argc, char *const argv[]) -{ - struct mmc *mmc; - u32 blk, cnt, n; - int i, err = 1; - void *addr; - const u8 mmc_dev_num = CONFIG_SYS_MMC_ENV_DEV; - - mmc = find_mmc_device(mmc_dev_num); - if (!mmc) { - printf("No SD/MMC/eMMC card found\n"); - return 0; - } - if (mmc_init(mmc)) { - printf("%s(%d) init failed\n", IS_SD(mmc) ? "SD" : "MMC", - mmc_dev_num); - return 0; - } - if (mmc_getwp(mmc) == 1) { - printf("Error: card is write protected!\n"); - return CMD_RET_FAILURE; - } - - /* Save factory defaults */ - addr = (void *)smac; - cnt = 1; /* One 512 bytes block */ - - for (i = 0; i < MAX_FWENV_ADDR; i++) - if (fwenv_addr[i] != -1) { - blk = fwenv_addr[i] / 512; - n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, addr); - if (n != cnt) - printf("%s: %s [%d]\n", __func__, mystrerr, i); - else - err = 0; - } - if (err) - return -2; - - return err; -} - -static int read_mmc_arc_info(void) -{ - struct mmc *mmc; - u32 blk, cnt, n; - int i; - void *addr; - const u8 mmc_dev_num = CONFIG_SYS_MMC_ENV_DEV; - - mmc = find_mmc_device(mmc_dev_num); - if (!mmc) { - printf("No SD/MMC/eMMC card found\n"); - return 0; - } - if (mmc_init(mmc)) { - printf("%s(%d) init failed\n", IS_SD(mmc) ? "SD" : "MMC", - mmc_dev_num); - return 0; - } - - addr = (void *)smac; - cnt = 1; /* One 512 bytes block */ - - for (i = 0; i < MAX_FWENV_ADDR; i++) - if (fwenv_addr[i] != -1) { - blk = fwenv_addr[i] / 512; - n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); - flush_cache((ulong) addr, 512); - if (n == cnt) - return (i + 1); - } - return 0; -} -#endif - -#if (FWENV_TYPE == FWENV_SPI_FLASH) - -static struct spi_flash *flash; -static char smac[4][18]; - -int set_spi_arc_product(int argc, char *const argv[]) -{ - int i, err = 1; - - flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); - if (!flash) { - printf("Failed to initialize SPI flash at %u:%u\n", - CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS); - return -1; - } - - /* Save factory defaults */ - for (i = 0; i < MAX_FWENV_ADDR; i++) - if (fwenv_addr[i] != -1) - if (spi_flash_write - (flash, fwenv_addr[i], sizeof(smac), smac)) - printf("%s: %s [%d]\n", __func__, mystrerr, i); - else - err = 0; - if (err) - return -2; - - return err; -} - -static int read_spi_arc_info(void) -{ - int i; - - flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); - if (!flash) { - printf("Failed to initialize SPI flash at %u:%u\n", - CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS); - return 0; - } - for (i = 0; i < MAX_FWENV_ADDR; i++) - if (fwenv_addr[i] != -1) - if (!spi_flash_read - (flash, fwenv_addr[i], sizeof(smac), smac)) - return (i + 1); - return 0; -} -#endif - -#if (FWENV_TYPE == FWENV_NOR_FLASH) - -static char smac[4][18]; - -int set_nor_arc_product(int argc, char *const argv[]) -{ - int i, err = 1; - - /* Save factory defaults */ - for (i = 0; i < MAX_FWENV_ADDR; i++) - if (fwenv_addr[i] != -1) { - ulong fwenv_end = fwenv_addr[i] + 4; - - flash_sect_roundb(&fwenv_end); - flash_sect_protect(0, fwenv_addr[i], fwenv_end); - if (flash_write - ((char *)smac, fwenv_addr[i], sizeof(smac))) - printf("%s: %s [%d]\n", __func__, mystrerr, i); - else - err = 0; - flash_sect_protect(1, fwenv_addr[i], fwenv_end); - } - if (err) - return -2; - - return err; -} - -static int read_nor_arc_info(void) -{ - int i; - - for (i = 0; i < MAX_FWENV_ADDR; i++) - if (fwenv_addr[i] != -1) { - memcpy(smac, (void *)fwenv_addr[i], sizeof(smac)); - return (i + 1); - } - - return 0; -} -#endif - -int set_arc_product(int argc, char *const argv[]) -{ - if (argc != 5) - return -1; - - /* Check serial number */ - if (strlen(argv[1]) != MAX_SERIAL_SIZE) - return -1; - - /* Check HWaddrs */ - if (ishwaddr(argv[2]) || ishwaddr(argv[3]) || ishwaddr(argv[4])) - return -1; - - strcpy(smac[0], argv[1]); - strcpy(smac[1], argv[2]); - strcpy(smac[2], argv[3]); - strcpy(smac[3], argv[4]); - -#if (FWENV_TYPE == FWENV_NOR_FLASH) - return set_nor_arc_product(argc, argv); -#endif -#if (FWENV_TYPE == FWENV_SPI_FLASH) - return set_spi_arc_product(argc, argv); -#endif -#if (FWENV_TYPE == FWENV_MMC) - return set_mmc_arc_product(argc, argv); -#endif - return -2; -} - -static int read_arc_info(void) -{ -#if (FWENV_TYPE == FWENV_NOR_FLASH) - return read_nor_arc_info(); -#endif -#if (FWENV_TYPE == FWENV_SPI_FLASH) - return read_spi_arc_info(); -#endif -#if (FWENV_TYPE == FWENV_MMC) - return read_mmc_arc_info(); -#endif - return 0; -} - -static int do_get_arc_info(void) -{ - int l = read_arc_info(); - char *oldserial = env_get("SERIAL"); - char *oldversion = env_get("VERSION"); - - if (oldversion != NULL) - if (strcmp(oldversion, U_BOOT_VERSION) != 0) - oldversion = NULL; - - if (l == 0) { - printf("%s: failed to read factory info\n", __func__); - return -2; - } - - printf("\rSERIAL: "); - if (smac[0][0] == EMPY_CHAR) { - printf("\n"); - } else { - printf("%s\n", smac[0]); - env_set("SERIAL", smac[0]); - } - - if (strcmp(smac[1], "00:00:00:00:00:00") == 0) { - env_set("ethaddr", NULL); - env_set("eth1addr", NULL); - env_set("eth2addr", NULL); - goto done; - } - - printf("HWADDR0: "); - if (smac[1][0] == EMPY_CHAR) { - printf("\n"); - } else { - char *ret = env_get("ethaddr"); - - if (ret == NULL) { - env_set("ethaddr", smac[1]); - printf("%s\n", smac[1]); - } else if (strcmp(ret, __stringify(CONFIG_ETHADDR)) == 0) { - env_set("ethaddr", smac[1]); - printf("%s (factory)\n", smac[1]); - } else { - printf("%s\n", ret); - } - } - - if (strcmp(smac[2], "00:00:00:00:00:00") == 0) { - env_set("eth1addr", NULL); - env_set("eth2addr", NULL); - goto done; - } - - printf("HWADDR1: "); - if (smac[2][0] == EMPY_CHAR) { - printf("\n"); - } else { - char *ret = env_get("eth1addr"); - - if (ret == NULL) { - env_set("ethaddr", smac[2]); - printf("%s\n", smac[2]); - } else if (strcmp(ret, __stringify(CONFIG_ETH1ADDR)) == 0) { - env_set("eth1addr", smac[2]); - printf("%s (factory)\n", smac[2]); - } else { - printf("%s\n", ret); - } - } - - if (strcmp(smac[3], "00:00:00:00:00:00") == 0) { - env_set("eth2addr", NULL); - goto done; - } - - printf("HWADDR2: "); - if (smac[3][0] == EMPY_CHAR) { - printf("\n"); - } else { - char *ret = env_get("eth2addr"); - - if (ret == NULL) { - env_set("ethaddr", smac[3]); - printf("%s\n", smac[3]); - } else if (strcmp(ret, __stringify(CONFIG_ETH2ADDR)) == 0) { - env_set("eth2addr", smac[3]); - printf("%s (factory)\n", smac[3]); - } else { - printf("%s\n", ret); - } - } -done: - if (oldserial == NULL || oldversion == NULL) { - if (oldversion == NULL) - env_set("VERSION", U_BOOT_VERSION); - env_save(); - } - - return 0; -} - -static int init_fwenv(void) -{ - int i, ret = -1; - - fwenv_addr[0] = FWENV_ADDR1; - fwenv_addr[1] = FWENV_ADDR2; - fwenv_addr[2] = FWENV_ADDR3; - fwenv_addr[3] = FWENV_ADDR4; - - for (i = 0; i < MAX_FWENV_ADDR; i++) - if (fwenv_addr[i] != -1) - ret = 0; - if (ret) - printf("%s: No firmfare info storage address is defined\n", - __func__); - return ret; -} - -void get_arc_info(void) -{ - if (!init_fwenv()) - do_get_arc_info(); -} - -static int do_arc_cmd(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - const char *cmd; - int ret = -1; - - cmd = argv[1]; - --argc; - ++argv; - - if (init_fwenv()) - return ret; - - if (strcmp(cmd, "product") == 0) - ret = set_arc_product(argc, argv); - else if (strcmp(cmd, "info") == 0) - ret = do_get_arc_info(); - - if (ret == -1) - return CMD_RET_USAGE; - - return ret; -} - -U_BOOT_CMD(arc, 6, 1, do_arc_cmd, - "Arcturus product command sub-system", - "product serial hwaddr0 hwaddr1 hwaddr2 - save Arcturus factory env\n" - "info - show Arcturus factory env\n\n"); diff --git a/board/Arcturus/ucp1020/ddr.c b/board/Arcturus/ucp1020/ddr.c deleted file mode 100644 index a3285ebe5cd..00000000000 --- a/board/Arcturus/ucp1020/ddr.c +++ /dev/null @@ -1,161 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013-2015 Arcturus Networks, Inc. - * http://www.arcturusnetworks.com/products/ucp1020/ - * based on board/freescale/p1_p2_rdb_pc/spl.c - * original copyright follows: - * Copyright 2013 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_SYS_DDR_RAW_TIMING -#if defined(CONFIG_UCP1020) || defined(CONFIG_UCP1020T1) -/* - * Micron MT41J128M16HA-15E - * */ -dimm_params_t ddr_raw_timing = { - .n_ranks = 1, - .rank_density = 536870912u, - .capacity = 536870912u, - .primary_sdram_width = 32, - .ec_sdram_width = 8, - .registered_dimm = 0, - .mirrored_dimm = 0, - .n_row_addr = 14, - .n_col_addr = 10, - .n_banks_per_sdram_device = 8, - .edc_config = 2, - .burst_lengths_bitmask = 0x0c, - - .tckmin_x_ps = 1650, - .caslat_x = 0x7e << 4, /* 5,6,7,8,9,10 */ - .taa_ps = 14050, - .twr_ps = 15000, - .trcd_ps = 13500, - .trrd_ps = 75000, - .trp_ps = 13500, - .tras_ps = 40000, - .trc_ps = 49500, - .trfc_ps = 160000, - .twtr_ps = 75000, - .trtp_ps = 75000, - .refresh_rate_ps = 7800000, - .tfaw_ps = 30000, -}; - -#else -#error Missing raw timing data for this board -#endif - -int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, - unsigned int controller_number, - unsigned int dimm_number) -{ - const char dimm_model[] = "Fixed DDR on board"; - - if ((controller_number == 0) && (dimm_number == 0)) { - memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); - memset(pdimm->mpart, 0, sizeof(pdimm->mpart)); - memcpy(pdimm->mpart, dimm_model, sizeof(dimm_model) - 1); - } - - return 0; -} -#endif /* CONFIG_SYS_DDR_RAW_TIMING */ - -#ifdef CONFIG_SYS_DDR_CS0_BNDS -/* Fixed sdram init -- doesn't use serial presence detect. */ -phys_size_t fixed_sdram(void) -{ - sys_info_t sysinfo; - char buf[32]; - size_t ddr_size; - fsl_ddr_cfg_regs_t ddr_cfg_regs = { - .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS, - .cs[0].config = CONFIG_SYS_DDR_CS0_CONFIG, - .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, -#if CONFIG_CHIP_SELECTS_PER_CTRL > 1 - .cs[1].bnds = CONFIG_SYS_DDR_CS1_BNDS, - .cs[1].config = CONFIG_SYS_DDR_CS1_CONFIG, - .cs[1].config_2 = CONFIG_SYS_DDR_CS1_CONFIG_2, -#endif - .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3, - .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0, - .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1, - .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2, - .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL, - .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2, - .ddr_sdram_mode = CONFIG_SYS_DDR_MODE_1, - .ddr_sdram_mode_2 = CONFIG_SYS_DDR_MODE_2, - .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, - .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, - .ddr_data_init = CONFIG_SYS_DDR_DATA_INIT, - .ddr_sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL, - .ddr_init_addr = CONFIG_SYS_DDR_INIT_ADDR, - .ddr_init_ext_addr = CONFIG_SYS_DDR_INIT_EXT_ADDR, - .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4, - .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5, - .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL, - .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL, - .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR, - .ddr_sdram_rcw_1 = CONFIG_SYS_DDR_RCW_1, - .ddr_sdram_rcw_2 = CONFIG_SYS_DDR_RCW_2 - }; - - get_sys_info(&sysinfo); - printf("Configuring DDR for %s MT/s data rate\n", - strmhz(buf, sysinfo.freq_ddrbus)); - - ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; - - fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0); - - if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, - ddr_size, LAW_TRGT_IF_DDR_1) < 0) { - printf("ERROR setting Local Access Windows for DDR\n"); - return 0; - }; - - return ddr_size; -} -#endif - -void fsl_ddr_board_options(memctl_options_t *popts, - dimm_params_t *pdimm, - unsigned int ctrl_num) -{ - int i; - - popts->clk_adjust = 6; - popts->cpo_override = 0x1f; - popts->write_data_delay = 2; - popts->half_strength_driver_enable = 1; - /* Write leveling override */ - popts->wrlvl_en = 1; - popts->wrlvl_override = 1; - popts->wrlvl_sample = 0xf; - popts->wrlvl_start = 0x8; - popts->trwt_override = 1; - popts->trwt = 0; - - if (pdimm->primary_sdram_width == 64) - popts->data_bus_width = 0; - else if (pdimm->primary_sdram_width == 32) - popts->data_bus_width = 1; - else - printf("Error in DDR bus width configuration!\n"); - - for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { - popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER; - popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS; - } -} diff --git a/board/Arcturus/ucp1020/law.c b/board/Arcturus/ucp1020/law.c deleted file mode 100644 index cb53692a32b..00000000000 --- a/board/Arcturus/ucp1020/law.c +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013-2015 Arcturus Networks, Inc. - * http://www.arcturusnetworks.com/products/ucp1020/ - * based on board/freescale/p1_p2_rdb_pc/spl.c - * original copyright follows: - * Copyright 2013 Freescale Semiconductor, Inc. - */ - -#include -#include -#include - -struct law_entry law_table[] = { -#ifdef CONFIG_VSC7385_ENET - SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), -#endif - SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC), -#ifdef CONFIG_SYS_NAND_BASE_PHYS - SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC), -#endif -}; - -int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/Arcturus/ucp1020/spl.c b/board/Arcturus/ucp1020/spl.c deleted file mode 100644 index f7c4960da7c..00000000000 --- a/board/Arcturus/ucp1020/spl.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013-2015 Arcturus Networks, Inc. - * http://www.arcturusnetworks.com/products/ucp1020/ - * based on board/freescale/p1_p2_rdb_pc/spl.c - * original copyright follows: - * Copyright 2013 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -static const u32 sysclk_tbl[] = { - 66666000, 7499900, 83332500, 8999900, - 99999000, 11111000, 12499800, 13333200 -}; - -phys_size_t get_effective_memsize(void) -{ - return CONFIG_SYS_L2_SIZE; -} - -void board_init_f(ulong bootflag) -{ - u32 plat_ratio, bus_clk; - ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; - - console_init_f(); - - /* Set pmuxcr to allow both i2c1 and i2c2 */ - setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); - setbits_be32(&gur->pmuxcr, - in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); - - /* Read back the register to synchronize the write. */ - in_be32(&gur->pmuxcr); - -#ifdef CONFIG_SPL_SPI_BOOT - clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); -#endif - - /* initialize selected port with appropriate baud rate */ - plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; - plat_ratio >>= 1; - bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; - gd->bus_clk = bus_clk; - - ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, - bus_clk / 16 / CONFIG_BAUDRATE); -#ifdef CONFIG_SPL_MMC_BOOT - puts("\nSD boot...\n"); -#elif defined(CONFIG_SPL_SPI_BOOT) - puts("\nSPI Flash boot...\n"); -#endif - - /* copy code to RAM and jump to it - this should not return */ - /* NOTE - code has to be copied out of NAND buffer before - * other blocks can be read. - */ - relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); -} - -void board_init_r(gd_t *gd, ulong dest_addr) -{ - /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *)CONFIG_SPL_GD_ADDR; - struct bd_info *bd; - - memset(gd, 0, sizeof(gd_t)); - bd = (struct bd_info *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); - memset(bd, 0, sizeof(struct bd_info)); - gd->bd = bd; - - arch_cpu_init(); - get_clocks(); - mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, - CONFIG_SPL_RELOC_MALLOC_SIZE); - -#ifndef CONFIG_SPL_NAND_BOOT - env_init(); -#endif -#ifdef CONFIG_SPL_MMC_BOOT - mmc_initialize(bd); -#endif - /* relocate environment function pointers etc. */ -#ifdef CONFIG_SPL_NAND_BOOT - nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, - (uchar *)CONFIG_ENV_ADDR); - gd->env_addr = (ulong)(CONFIG_ENV_ADDR); - gd->env_valid = ENV_VALID; -#else - env_relocate(); -#endif - -#ifdef CONFIG_SYS_I2C_LEGACY - i2c_init_all(); -#else - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -#endif - - dram_init(); -#ifdef CONFIG_SPL_NAND_BOOT - puts("Tertiary program loader running in sram..."); -#else - puts("Second program loader running in sram...\n"); -#endif - -#ifdef CONFIG_SPL_MMC_BOOT - mmc_boot(); -#elif defined(CONFIG_SPL_NAND_BOOT) - nand_boot(); -#endif -} diff --git a/board/Arcturus/ucp1020/spl_minimal.c b/board/Arcturus/ucp1020/spl_minimal.c deleted file mode 100644 index 90abec9cce5..00000000000 --- a/board/Arcturus/ucp1020/spl_minimal.c +++ /dev/null @@ -1,67 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013-2015 Arcturus Networks, Inc. - * http://www.arcturusnetworks.com/products/ucp1020/ - * based on board/freescale/p1_p2_rdb_pc/spl_minimal.c - * original copyright follows: - * Copyright 2011 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -void board_init_f(ulong bootflag) -{ - u32 plat_ratio; - ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; - -#if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM) - set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM); - set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM); -#endif - - /* initialize selected port with appropriate baud rate */ - plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; - plat_ratio >>= 1; - gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; - - ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, - gd->bus_clk / 16 / CONFIG_BAUDRATE); - - puts("\nNAND boot... "); - - /* copy code to RAM and jump to it - this should not return */ - /* NOTE - code has to be copied out of NAND buffer before - * other blocks can be read. - */ - relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); -} - -void board_init_r(gd_t *gd, ulong dest_addr) -{ - puts("\nSecond program loader running in sram..."); - nand_boot(); -} - -void putc(char c) -{ - if (c == '\n') - ns16550_putc((struct ns16550 *)CONFIG_SYS_NS16550_COM1, '\r'); - - ns16550_putc((struct ns16550 *)CONFIG_SYS_NS16550_COM1, c); -} - -void puts(const char *str) -{ - while (*str) - putc(*str++); -} diff --git a/board/Arcturus/ucp1020/tlb.c b/board/Arcturus/ucp1020/tlb.c deleted file mode 100644 index 2c07df63e5b..00000000000 --- a/board/Arcturus/ucp1020/tlb.c +++ /dev/null @@ -1,100 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013-2015 Arcturus Networks, Inc - * http://www.arcturusnetworks.com/products/ucp1020/ - * based on board/freescale/p1_p2_rdb_pc/tlb.c - * original copyright follows: - * Copyright 2010-2011 Freescale Semiconductor, Inc. - */ - -#include -#include - -struct fsl_e_tlb_entry tlb_table[] = { - /* TLB 0 - for temp stack in cache */ - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, - CONFIG_SYS_INIT_RAM_ADDR_PHYS, - MAS3_SX | MAS3_SW | MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, - CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024, - MAS3_SX | MAS3_SW | MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, - CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024, - MAS3_SX | MAS3_SW | MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, - CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024, - MAS3_SX | MAS3_SW | MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - - /* TLB 1 */ - /* *I*** - Covers boot page */ - SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I, - 0, 0, BOOKE_PAGESZ_4K, 1), - - /* *I*G* - CCSRBAR */ - SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, - 0, 1, BOOKE_PAGESZ_1M, 1), - -#ifndef CONFIG_SPL_BUILD - /* W**G* - Flash/promjet, localbus */ - /* This will be changed to *I*G* after relocation to RAM. */ - SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, - MAS3_SX | MAS3_SR, MAS2_W | MAS2_G, - 0, 2, BOOKE_PAGESZ_64M, 1), - -#ifdef CONFIG_PCI - /* *I*G* - PCI memory 1.5G */ - SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, - 0, 3, BOOKE_PAGESZ_1G, 1), - - /* *I*G* - PCI I/O effective: 192K */ - SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, - 0, 4, BOOKE_PAGESZ_256K, 1), -#endif - -#ifdef CONFIG_VSC7385_ENET - /* *I*G - VSC7385 Switch */ - SET_TLB_ENTRY(1, CONFIG_SYS_VSC7385_BASE, CONFIG_SYS_VSC7385_BASE_PHYS, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, - 0, 5, BOOKE_PAGESZ_1M, 1), -#endif -#endif /* not SPL */ - -#ifdef CONFIG_SYS_NAND_BASE - /* *I*G - NAND */ - SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, - 0, 7, BOOKE_PAGESZ_1M, 1), -#endif - -#if defined(CONFIG_SYS_RAMBOOT) || \ - (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) - /* *I*G - eSDHC/eSPI/NAND boot */ - SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_M, - 0, 8, BOOKE_PAGESZ_1G, 1), - -#endif /* RAMBOOT/SPL */ - -#ifdef CONFIG_SYS_INIT_L2_ADDR - /* *I*G - L2SRAM */ - SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_G, - 0, 11, BOOKE_PAGESZ_256K, 1), -#if CONFIG_SYS_L2_SIZE >= (256 << 10) - SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000, - CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000, - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, - 0, 12, BOOKE_PAGESZ_256K, 1) -#endif -#endif -}; - -int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/board/Arcturus/ucp1020/ucp1020.c b/board/Arcturus/ucp1020/ucp1020.c deleted file mode 100644 index ee8a9e0a5e4..00000000000 --- a/board/Arcturus/ucp1020/ucp1020.c +++ /dev/null @@ -1,372 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013-2019 Arcturus Networks, Inc. - * https://www.arcturusnetworks.com/products/ucp1020/ - * by Oleksandr G Zhadan et al. - * based on board/freescale/p1_p2_rdb_pc/spl.c - * original copyright follows: - * Copyright 2013 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "ucp1020.h" - -void spi_set_speed(struct spi_slave *slave, uint hz) -{ - /* TO DO: It's actially have to be in spi/ */ -} - -/* - * To be compatible with cmd_gpio - */ -int name_to_gpio(const char *name) -{ - int gpio = 31 - dectoul(name, NULL); - - if (gpio < 16) - gpio = -1; - - return gpio; -} - -void board_gpio_init(void) -{ - int i; - char envname[8], *val; - - for (i = 0; i < GPIO_MAX_NUM; i++) { - sprintf(envname, "GPIO%d", i); - val = env_get(envname); - if (val) { - char direction = toupper(val[0]); - char level = toupper(val[1]); - - if (direction == 'I') { - gpio_direction_input(i); - } else { - if (direction == 'O') { - if (level == '1') - gpio_direction_output(i, 1); - else - gpio_direction_output(i, 0); - } - } - } - } - - val = env_get("PCIE_OFF"); - if (val) { - gpio_direction_input(GPIO_PCIE1_EN); - gpio_direction_input(GPIO_PCIE2_EN); - } else { - gpio_direction_output(GPIO_PCIE1_EN, 1); - gpio_direction_output(GPIO_PCIE2_EN, 1); - } - - val = env_get("SDHC_CDWP_OFF"); - if (!val) { - ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - - setbits_be32(&gur->pmuxcr, - (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP)); - } -} - -int board_early_init_f(void) -{ - return 0; /* Just in case. Could be disable in config file */ -} - -int checkboard(void) -{ - printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL); - board_gpio_init(); -#ifdef CONFIG_MMC - printf("SD/MMC: 4-bit Mode\n"); -#endif - - return 0; -} - -#ifdef CONFIG_PCI -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} -#endif - -int board_early_init_r(void) -{ - const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; - const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); - - /* - * Remap Boot flash region to caching-inhibited - * so that flash can be erased properly. - */ - - /* Flush d-cache and invalidate i-cache of any FLASH data */ - flush_dcache(); - invalidate_icache(); - - /* invalidate existing TLB entry for flash */ - disable_tlb(flash_esel); - - set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */ - MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, /* perms, wimge */ - 0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */ - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ -#if defined(CONFIG_PHY_MICREL_KSZ9021) - int regval; - static int cnt; - - if (cnt++ == 0) - printf("PHYs address ["); - - if (phydev->addr == TSEC1_PHY_ADDR || phydev->addr == TSEC3_PHY_ADDR) { - regval = - ksz9021_phy_extended_read(phydev, - MII_KSZ9021_EXT_STRAP_STATUS); - /* - * min rx data delay - */ - ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x6666); - /* - * max rx/tx clock delay, min rx/tx control - */ - ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf6f6); - printf("0x%x", (regval & 0x1f)); - } else { - printf("0x%x", (TSEC2_PHY_ADDR & 0x1f)); - } - if (cnt == 3) - printf("] "); - else - printf(","); -#endif - -#if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG) - regval = ksz9031_phy_extended_read(phydev, 2, 0x01, 0x4000); - if (regval >= 0) - printf(" (ADDR 0x%x) ", regval & 0x1f); -#endif - - return 0; -} - -int last_stage_init(void) -{ - static char newkernelargs[256]; - static u8 id1[16]; - static u8 id2; -#ifdef CONFIG_MMC - struct mmc *mmc; -#endif - char *sval, *kval; - - if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) { - printf("Error reading i2c IDT6V49205B information!\n"); - } else { - printf("IDT6V49205B(0x%02x): ready\n", id1[1]); - i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2); - if (!(id1[1] & 0x02)) { - id1[1] |= 0x02; - i2c_write(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2); - asm("nop; nop"); - } - } - - if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR, 0xFE, 1, &id2, 1) < 0) - printf("Error reading i2c NCT72 information!\n"); - else - printf("NCT72(0x%x): ready\n", id2); - - kval = env_get("kernelargs"); - -#ifdef CONFIG_MMC - mmc = find_mmc_device(0); - if (mmc) - if (!mmc_init(mmc)) { - printf("MMC/SD card detected\n"); - if (kval) { - int n = strlen(defkargs); - char *tmp = strstr(kval, defkargs); - - *tmp = 0; - strcpy(newkernelargs, kval); - strcat(newkernelargs, " "); - strcat(newkernelargs, mmckargs); - strcat(newkernelargs, " "); - strcat(newkernelargs, &tmp[n]); - env_set("kernelargs", newkernelargs); - } else { - env_set("kernelargs", mmckargs); - } - } -#endif - get_arc_info(); - - if (kval) { - sval = env_get("SERIAL"); - if (sval) { - strcpy(newkernelargs, "SN="); - strcat(newkernelargs, sval); - strcat(newkernelargs, " "); - strcat(newkernelargs, kval); - env_set("kernelargs", newkernelargs); - } - } else { - printf("Error reading kernelargs env variable!\n"); - } - - return 0; -} - -int board_eth_init(struct bd_info *bis) -{ - struct fsl_pq_mdio_info mdio_info; - struct tsec_info_struct tsec_info[4]; -#ifdef CONFIG_TSEC2 - ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -#endif - int num = 0; - -#ifdef CONFIG_TSEC1 - SET_STD_TSEC_INFO(tsec_info[num], 1); - num++; -#endif -#ifdef CONFIG_TSEC2 - SET_STD_TSEC_INFO(tsec_info[num], 2); - if (is_serdes_configured(SGMII_TSEC2)) { - if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII2_DIS)) { - puts("eTSEC2 is in sgmii mode.\n"); - tsec_info[num].flags |= TSEC_SGMII; - tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII; - } - } - num++; -#endif -#ifdef CONFIG_TSEC3 - SET_STD_TSEC_INFO(tsec_info[num], 3); - num++; -#endif - - if (!num) { - printf("No TSECs initialized\n"); - return 0; - } - - mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; - mdio_info.name = DEFAULT_MII_NAME; - - fsl_pq_mdio_init(bis, &mdio_info); - - tsec_eth_init(bis, tsec_info, num); - - return pci_eth_init(bis); -} - -#ifdef CONFIG_OF_BOARD_SETUP -int ft_board_setup(void *blob, struct bd_info *bd) -{ - phys_addr_t base; - phys_size_t size; - const char *soc_usb_compat = "fsl-usb2-dr"; - int err, usb1_off, usb2_off; - - ft_cpu_setup(blob, bd); - - base = env_get_bootm_low(); - size = env_get_bootm_size(); - - fdt_fixup_memory(blob, (u64)base, (u64)size); - - FT_FSL_PCI_SETUP; - -#if defined(CONFIG_HAS_FSL_DR_USB) - fsl_fdt_fixup_dr_usb(blob, bd); -#endif - -#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) - /* Delete eLBC node as it is muxed with USB2 controller */ - if (hwconfig("usb2")) { - const char *soc_elbc_compat = "fsl,p1020-elbc"; - int off = fdt_node_offset_by_compatible(blob, -1, - soc_elbc_compat); - if (off < 0) { - printf - ("WARNING: could not find compatible node %s: %s\n", - soc_elbc_compat, fdt_strerror(off)); - return off; - } - err = fdt_del_node(blob, off); - if (err < 0) { - printf("WARNING: could not remove %s: %s\n", - soc_elbc_compat, fdt_strerror(err)); - } - return err; - } -#endif - -/* Delete USB2 node as it is muxed with eLBC */ - usb1_off = fdt_node_offset_by_compatible(blob, -1, soc_usb_compat); - if (usb1_off < 0) { - printf("WARNING: could not find compatible node %s: %s.\n", - soc_usb_compat, fdt_strerror(usb1_off)); - return usb1_off; - } - usb2_off = - fdt_node_offset_by_compatible(blob, usb1_off, soc_usb_compat); - if (usb2_off < 0) { - printf("WARNING: could not find compatible node %s: %s.\n", - soc_usb_compat, fdt_strerror(usb2_off)); - return usb2_off; - } - err = fdt_del_node(blob, usb2_off); - if (err < 0) { - printf("WARNING: could not remove %s: %s.\n", - soc_usb_compat, fdt_strerror(err)); - } - return 0; -} -#endif diff --git a/board/Arcturus/ucp1020/ucp1020.h b/board/Arcturus/ucp1020/ucp1020.h deleted file mode 100644 index 1b527cdb1cf..00000000000 --- a/board/Arcturus/ucp1020/ucp1020.h +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2013-2019 Arcturus Networks, Inc. - * https://www.arcturusnetworks.com/products/ucp1020/ - * by Oleksandr G Zhadan et al. - */ - -#ifndef __UCP1020_H__ -#define __UCP1020_H__ - -#define GPIO0 31 -#define GPIO1 30 -#define GPIO2 29 -#define GPIO3 28 -#define GPIO4 27 -#define GPIO5 26 -#define GPIO6 25 -#define GPIO7 24 -#define GPIO8 23 -#define GPIO9 22 -#define GPIO10 21 -#define GPIO11 20 -#define GPIO12 19 -#define GPIO13 18 -#define GPIO14 17 -#define GPIO15 16 -#define GPIO_MAX_NUM 16 - -#define GPIO_SDHC_CD GPIO8 -#define GPIO_SDHC_WP GPIO9 -#define GPIO_USB_PCTL0 GPIO10 -#define GPIO_PCIE1_EN GPIO11 -#define GPIO_PCIE2_EN GPIO10 -#define GPIO_USB_PCTL1 GPIO11 - -#define GPIO_WD GPIO15 - -#ifdef CONFIG_MMC -static char *defkargs = "root=/dev/mtdblock1 rootfstype=cramfs ro"; -static char *mmckargs = "root=/dev/mmcblk0p1 rootwait rw"; -#endif - -int get_arc_info(void); - -#endif diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig deleted file mode 100644 index 1fdb1952c8f..00000000000 --- a/configs/UCP1020_defconfig +++ /dev/null @@ -1,58 +0,0 @@ -CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0xEFF80000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_MPC85xx=y -CONFIG_TARGET_UCP1020=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -CONFIG_OF_BOARD_SETUP=y -CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" -CONFIG_AUTOBOOT_STOP_STR="\x1b" -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_LAST_STAGE_INIT=y -# CONFIG_MISC_INIT_R is not set -CONFIG_HUSH_PARSER=y -# CONFIG_AUTO_COMPLETE is not set -CONFIG_SYS_PROMPT="B$ " -CONFIG_CMD_IMLS=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_PCI is not set -# CONFIG_CMD_SATA is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y -CONFIG_MP=y -# CONFIG_CMD_HASH is not set -CONFIG_CMD_CRAMFS=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0xEC0C0000 -# CONFIG_MMC is not set -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_PHY_ATHEROS=y -CONFIG_PHY_BROADCOM=y -CONFIG_PHY_DAVICOM=y -CONFIG_PHY_LXT=y -CONFIG_PHY_MARVELL=y -CONFIG_PHY_NATSEMI=y -CONFIG_PHY_REALTEK=y -CONFIG_PHY_SMSC=y -CONFIG_PHY_VITESSE=y -CONFIG_PHY_GIGE=y -CONFIG_E1000=y -CONFIG_MII=y -CONFIG_TSEC_ENET=y -CONFIG_SYS_NS16550=y -CONFIG_FS_CRAMFS=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h deleted file mode 100644 index d9a777ea1a0..00000000000 --- a/include/configs/UCP1020.h +++ /dev/null @@ -1,832 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2013-2019 Arcturus Networks, Inc. - * https://www.arcturusnetworks.com/products/ucp1020/ - * based on include/configs/p1_p2_rdb_pc.h - * original copyright follows: - * Copyright 2009-2011 Freescale Semiconductor, Inc. - */ - -/* - * QorIQ uCP1020-xx boards configuration file - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -/*** Arcturus FirmWare Environment */ - -#define MAX_SERIAL_SIZE 15 -#define MAX_HWADDR_SIZE 17 - -#define MAX_FWENV_ADDR 4 - -#define FWENV_MMC 1 -#define FWENV_SPI_FLASH 2 -#define FWENV_NOR_FLASH 3 -/* - #define FWENV_TYPE FWENV_MMC - #define FWENV_TYPE FWENV_SPI_FLASH -*/ -#define FWENV_TYPE FWENV_NOR_FLASH - -#if (FWENV_TYPE == FWENV_MMC) -#define FWENV_ADDR1 -1 -#define FWENV_ADDR2 -1 -#define FWENV_ADDR3 -1 -#define FWENV_ADDR4 -1 -#define EMPY_CHAR 0 -#endif - -#if (FWENV_TYPE == FWENV_SPI_FLASH) -#ifndef CONFIG_SF_DEFAULT_SPEED -#define CONFIG_SF_DEFAULT_SPEED 1000000 -#endif -#ifndef CONFIG_SF_DEFAULT_MODE -#define CONFIG_SF_DEFAULT_MODE SPI_MODE0 -#endif -#ifndef CONFIG_SF_DEFAULT_CS -#define CONFIG_SF_DEFAULT_CS 0 -#endif -#ifndef CONFIG_SF_DEFAULT_BUS -#define CONFIG_SF_DEFAULT_BUS 0 -#endif -#define FWENV_ADDR1 (0x200 - sizeof(smac)) -#define FWENV_ADDR2 (0x400 - sizeof(smac)) -#define FWENV_ADDR3 (CONFIG_ENV_SECT_SIZE + 0x200 - sizeof(smac)) -#define FWENV_ADDR4 (CONFIG_ENV_SECT_SIZE + 0x400 - sizeof(smac)) -#define EMPY_CHAR 0xff -#endif - -#if (FWENV_TYPE == FWENV_NOR_FLASH) -#define FWENV_ADDR1 0xEC080000 -#define FWENV_ADDR2 -1 -#define FWENV_ADDR3 -1 -#define FWENV_ADDR4 -1 -#define EMPY_CHAR 0xff -#endif -/***********************************/ - -#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ - -#if defined(CONFIG_TARTGET_UCP1020T1) - -#define CONFIG_UCP1020_REV_1_3 - -#define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1" - -#define CONFIG_TSEC1 -#define CONFIG_TSEC3 -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_ETHADDR 00:19:D3:FF:FF:FF -#define CONFIG_ETH1ADDR 00:19:D3:FF:FF:FE -#define CONFIG_ETH2ADDR 00:19:D3:FF:FF:FD -#define CONFIG_IPADDR 10.80.41.229 -#define CONFIG_SERVERIP 10.80.41.227 -#define CONFIG_NETMASK 255.255.252.0 -#define CONFIG_ETHPRIME "eTSEC3" - -#define CONFIG_SYS_L2_SIZE (256 << 10) - -#endif - -#if defined(CONFIG_TARGET_UCP1020) - -#define CONFIG_UCP1020 -#define CONFIG_UCP1020_REV_1_3 - -#define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR" - -#define CONFIG_TSEC1 -#define CONFIG_TSEC3 -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#define CONFIG_ETHADDR 00:06:3B:FF:FF:FF -#define CONFIG_ETH1ADDR 00:06:3B:FF:FF:FE -#define CONFIG_ETH2ADDR 00:06:3B:FF:FF:FD -#define CONFIG_IPADDR 192.168.1.81 -#define CONFIG_IPADDR1 192.168.1.82 -#define CONFIG_IPADDR2 192.168.1.83 -#define CONFIG_SERVERIP 192.168.1.80 -#define CONFIG_GATEWAYIP 102.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_ETHPRIME "eTSEC1" - -#define CONFIG_SYS_L2_SIZE (256 << 10) - -#endif - -#ifdef CONFIG_SDCARD -#define CONFIG_RAMBOOT_SDCARD -#define CONFIG_SYS_RAMBOOT -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc -#endif - -#ifdef CONFIG_SPIFLASH -#define CONFIG_RAMBOOT_SPIFLASH -#define CONFIG_SYS_RAMBOOT -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc -#endif - -#define CONFIG_SYS_TEXT_BASE_NOR 0xeff80000 - -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc -#endif - -#ifndef CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - -#define CONFIG_SYS_SATA_MAX_DEVICE 2 -#define CONFIG_LBA48 - -#define CONFIG_SYS_CLK_FREQ 66666666 -#define CONFIG_DDR_CLK_FREQ 66666666 - -#define CONFIG_HWCONFIG - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE -#define CONFIG_BTB - -#define CONFIG_ENABLE_36BIT_PHYS - -#define CONFIG_SYS_CCSRBAR 0xffe00000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k - SPL code*/ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif - -/* DDR Setup */ -#define CONFIG_DDR_ECC_ENABLE -#ifndef CONFIG_DDR_ECC_ENABLE -#define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_DDR_SPD -#endif -#define CONFIG_SYS_SPD_BUS_NUM 1 - -#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_512M -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 -#define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19)) -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 - -/* Default settings for DDR3 */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302 -#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 -#define CONFIG_SYS_DDR_CS1_BNDS 0x0040007f -#define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302 -#define CONFIG_SYS_DDR_CS1_CONFIG_2 0x00000000 - -#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef -#define CONFIG_SYS_DDR_INIT_ADDR 0x00000000 -#define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000 -#define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 - -#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600 -#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8655A608 -#define CONFIG_SYS_DDR_SR_CNTR 0x00000000 -#define CONFIG_SYS_DDR_RCW_1 0x00000000 -#define CONFIG_SYS_DDR_RCW_2 0x00000000 -#ifdef CONFIG_DDR_ECC_ENABLE -#define CONFIG_SYS_DDR_CONTROL 0xE70C0000 /* Type = DDR3 & ECC */ -#else -#define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ -#endif -#define CONFIG_SYS_DDR_CONTROL_2 0x04401050 -#define CONFIG_SYS_DDR_TIMING_4 0x00220001 -#define CONFIG_SYS_DDR_TIMING_5 0x03402400 - -#define CONFIG_SYS_DDR_TIMING_3 0x00020000 -#define CONFIG_SYS_DDR_TIMING_0 0x00330004 -#define CONFIG_SYS_DDR_TIMING_1 0x6f6B4846 -#define CONFIG_SYS_DDR_TIMING_2 0x0FA8C8CF -#define CONFIG_SYS_DDR_CLK_CTRL 0x03000000 -#define CONFIG_SYS_DDR_MODE_1 0x40461520 -#define CONFIG_SYS_DDR_MODE_2 0x8000c000 -#define CONFIG_SYS_DDR_INTERVAL 0x0C300000 - -/* - * Memory map - * - * 0x0000_0000 0x7fff_ffff DDR Up to 2GB cacheable - * 0x8000_0000 0xdfff_ffff PCI Express Mem 1G non-cacheable(PCIe * 2) - * 0xec00_0000 0xefff_ffff NOR flash Up to 64M non-cacheable CS0/1 - * 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 256K cacheable - * (early boot only) - * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable - * 0xffd0_0000 0xffd0_3fff L1 for stack 16K cacheable - * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable - */ - -/* - * Local Bus Definitions - */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 /* 64M */ -#define CONFIG_SYS_FLASH_BASE 0xec000000 - -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE - -#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ - | BR_PS_16 | BR_V) - -#define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 - -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} -#define CONFIG_SYS_FLASH_QUIET_TEST -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ - -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ -/* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS -/* Size of used area in RAM */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024)/* Reserve 256 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)/* Reserved for malloc */ - -#define CONFIG_SYS_PMC_BASE 0xff980000 -#define CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PMC_BASE -#define CONFIG_PMC_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \ - BR_PS_8 | BR_V) -#define CONFIG_PMC_OR_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \ - OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \ - OR_GPCM_EAD) - -#define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ -#ifdef CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ -#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#endif - -/* Serial Port - controlled on board with jumper J8 - * open - index 2 - * shorted - index 1 - */ -#undef CONFIG_SERIAL_SOFTWARE_FIFO -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) -#define CONFIG_NS16550_MIN_FUNCTIONS -#endif - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600) - -/* I2C */ -#define CONFIG_SYS_I2C_LEGACY -#define CONFIG_SYS_I2C_FSL -#define CONFIG_SYS_FSL_I2C_SPEED 400000 -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 -#define CONFIG_SYS_FSL_I2C2_SPEED 400000 -#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } -#define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */ - -#define CONFIG_RTC_DS1337 -#define CONFIG_RTC_DS1337_NOOSC -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_I2C_PCA9557_ADDR 0x18 -#define CONFIG_SYS_I2C_NCT72_ADDR 0x4C -#define CONFIG_SYS_I2C_IDT6V49205B 0x69 - -#if defined(CONFIG_PCI) -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ - -/* controller 2, direct to uli, tgtid 2, Base address 9000 */ -#define CONFIG_SYS_PCIE2_NAME "PCIe SLOT CON9" -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ - -/* controller 1, Slot 2, tgtid 1, Base address a000 */ -#define CONFIG_SYS_PCIE1_NAME "PCIe SLOT CON10" -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - -/* - * Environment - */ -#if !defined(CONFIG_ENV_FIT_UCBOOT) && defined(CONFIG_RAMBOOT_SDCARD) -#define CONFIG_FSL_FIXED_MMC_LOCATION -#endif - -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* - * USB - */ -#define CONFIG_HAS_FSL_DR_USB - -#if defined(CONFIG_HAS_FSL_DR_USB) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 - -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_USB_EHCI_FSL -#endif -#endif - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#endif - -/* Misc Extra Settings */ -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms tick */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Environment Configuration - */ - -#if defined(CONFIG_TSEC_ENET) - -#if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3) -#else -#error "UCP1020 module revision is not defined !!!" -#endif - -#define CONFIG_BOOTP_SERVERIP - -#define CONFIG_TSEC1_NAME "eTSEC1" -#define CONFIG_TSEC2_NAME "eTSEC2" -#define CONFIG_TSEC3_NAME "eTSEC3" - -#define TSEC1_PHY_ADDR 4 -#define TSEC2_PHY_ADDR 0 -#define TSEC2_PHY_ADDR_SGMII 0x00 -#define TSEC3_PHY_ADDR 6 - -#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC3_PHYIDX 0 - -#endif - -#define CONFIG_HOSTNAME "UCP1020" -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ - -/* default location for tftp and bootm */ -#define CONFIG_LOADADDR 1000000 - -#if defined(CONFIG_DONGLE) - -#define CONFIG_EXTRA_ENV_SETTINGS \ -"bootcmd=run prog_spi_mbrbootcramfs\0" \ -"bootfile=uImage\0" \ -"consoledev=ttyS0\0" \ -"cramfsfile=image.cramfs\0" \ -"dtbaddr=0x00c00000\0" \ -"dtbfile=image.dtb\0" \ -"ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \ -"eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0" \ -"eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0" \ -"fileaddr=0x01000000\0" \ -"filesize=0x00080000\0" \ -"flashmbr=sf probe 0; " \ - "tftp $loadaddr $mbr; " \ - "sf erase $mbr_offset +$filesize; " \ - "sf write $loadaddr $mbr_offset $filesize\0" \ -"flashrecovery=tftp $recoveryaddr $cramfsfile; " \ - "protect off $nor_recoveryaddr +$filesize; " \ - "erase $nor_recoveryaddr +$filesize; " \ - "cp.b $recoveryaddr $nor_recoveryaddr $filesize; " \ - "protect on $nor_recoveryaddr +$filesize\0 " \ -"flashuboot=tftp $ubootaddr $ubootfile; " \ - "protect off $nor_ubootaddr +$filesize; " \ - "erase $nor_ubootaddr +$filesize; " \ - "cp.b $ubootaddr $nor_ubootaddr $filesize; " \ - "protect on $nor_ubootaddr +$filesize\0 " \ -"flashworking=tftp $workingaddr $cramfsfile; " \ - "protect off $nor_workingaddr +$filesize; " \ - "erase $nor_workingaddr +$filesize; " \ - "cp.b $workingaddr $nor_workingaddr $filesize; " \ - "protect on $nor_workingaddr +$filesize\0 " \ -"hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 " \ -"kerneladdr=0x01100000\0" \ -"kernelfile=uImage\0" \ -"loadaddr=0x01000000\0" \ -"mbr=uCP1020d.mbr\0" \ -"mbr_offset=0x00000000\0" \ -"mmbr=uCP1020Quiet.mbr\0" \ -"mmcpart=0:2\0" \ -"mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; " \ - "mmc erase 1 1; " \ - "mmc write $loadaddr 1 1\0" \ -"mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; " \ - "mmc erase 0x40 0x400; " \ - "mmc write $loadaddr 0x40 0x400\0" \ -"netdev=eth0\0" \ -"nor_recoveryaddr=0xEC0A0000\0" \ -"nor_ubootaddr=0xEFF80000\0" \ -"nor_workingaddr=0xECFA0000\0" \ -"norbootrecovery=setenv bootargs $recoverybootargs" \ - " console=$consoledev,$baudrate $othbootargs; " \ - "run norloadrecovery; " \ - "bootm $kerneladdr - $dtbaddr\0" \ -"norbootworking=setenv bootargs $workingbootargs" \ - " console=$consoledev,$baudrate $othbootargs; " \ - "run norloadworking; " \ - "bootm $kerneladdr - $dtbaddr\0" \ -"norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; " \ - "setenv cramfsaddr $nor_recoveryaddr; " \ - "cramfsload $dtbaddr $dtbfile; " \ - "cramfsload $kerneladdr $kernelfile\0" \ -"norloadworking=mw.l $kerneladdr 0x0 0x00a00000; " \ - "setenv cramfsaddr $nor_workingaddr; " \ - "cramfsload $dtbaddr $dtbfile; " \ - "cramfsload $kerneladdr $kernelfile\0" \ -"prog_spi_mbr=run spi__mbr\0" \ -"prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0" \ -"prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \ - "run spi__cramfs\0" \ -"ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro" \ - " console=$consoledev,$baudrate $othbootargs; " \ - "tftp $rootfsaddr $rootfsfile; " \ - "tftp $loadaddr $kernelfile; " \ - "tftp $dtbaddr $dtbfile; " \ - "bootm $loadaddr $rootfsaddr $dtbaddr\0" \ -"ramdisk_size=120000\0" \ -"ramdiskfile=rootfs.ext2.gz.uboot\0" \ -"recoveryaddr=0x02F00000\0" \ -"recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0" \ -"releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; " \ - "mw.l 0xffe0f008 0x00400000\0" \ -"rootfsaddr=0x02F00000\0" \ -"rootfsfile=rootfs.ext2.gz.uboot\0" \ -"rootpath=/opt/nfsroot\0" \ -"spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; " \ - "protect off 0xeC000000 +$filesize; " \ - "erase 0xEC000000 +$filesize; " \ - "cp.b $loadaddr 0xEC000000 $filesize; " \ - "cmp.b $loadaddr 0xEC000000 $filesize; " \ - "protect on 0xeC000000 +$filesize\0" \ -"spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; " \ - "protect off 0xeFF80000 +$filesize; " \ - "erase 0xEFF80000 +$filesize; " \ - "cp.b $loadaddr 0xEFF80000 $filesize; " \ - "cmp.b $loadaddr 0xEFF80000 $filesize; " \ - "protect on 0xeFF80000 +$filesize\0" \ -"spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; " \ - "sf probe 0; sf erase 0x8000 +$filesize; " \ - "sf write $loadaddr 0x8000 $filesize\0" \ -"spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; " \ - "protect off 0xec0a0000 +$filesize; " \ - "erase 0xeC0A0000 +$filesize; " \ - "cp.b $loadaddr 0xeC0A0000 $filesize; " \ - "protect on 0xec0a0000 +$filesize\0" \ -"spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; " \ - "sf probe 1; sf erase 0 +$filesize; " \ - "sf write $loadaddr 0 $filesize\0" \ -"spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; " \ - "sf probe 0; sf erase 0 +$filesize; " \ - "sf write $loadaddr 0 $filesize\0" \ -"tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\ -"uboot= " __stringify(CONFIG_UBOOTPATH) "\0" \ -"ubootaddr=0x01000000\0" \ -"ubootfile=u-boot.bin\0" \ -"ubootd=u-boot4dongle.bin\0" \ -"upgrade=run flashworking\0" \ -"usb_phy_type=ulpi\0 " \ -"workingaddr=0x02F00000\0" \ -"workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0" - -#else - -#if defined(CONFIG_UCP1020T1) - -#define CONFIG_EXTRA_ENV_SETTINGS \ -"bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0" \ -"bootfile=uImage\0" \ -"consoledev=ttyS0\0" \ -"cramfsfile=image.cramfs\0" \ -"dtbaddr=0x00c00000\0" \ -"dtbfile=image.dtb\0" \ -"ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \ -"eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0" \ -"eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0" \ -"fileaddr=0x01000000\0" \ -"filesize=0x00080000\0" \ -"flashmbr=sf probe 0; " \ - "tftp $loadaddr $mbr; " \ - "sf erase $mbr_offset +$filesize; " \ - "sf write $loadaddr $mbr_offset $filesize\0" \ -"flashrecovery=tftp $recoveryaddr $cramfsfile; " \ - "protect off $nor_recoveryaddr +$filesize; " \ - "erase $nor_recoveryaddr +$filesize; " \ - "cp.b $recoveryaddr $nor_recoveryaddr $filesize; " \ - "protect on $nor_recoveryaddr +$filesize\0 " \ -"flashuboot=tftp $ubootaddr $ubootfile; " \ - "protect off $nor_ubootaddr +$filesize; " \ - "erase $nor_ubootaddr +$filesize; " \ - "cp.b $ubootaddr $nor_ubootaddr $filesize; " \ - "protect on $nor_ubootaddr +$filesize\0 " \ -"flashworking=tftp $workingaddr $cramfsfile; " \ - "protect off $nor_workingaddr +$filesize; " \ - "erase $nor_workingaddr +$filesize; " \ - "cp.b $workingaddr $nor_workingaddr $filesize; " \ - "protect on $nor_workingaddr +$filesize\0 " \ -"hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 " \ -"kerneladdr=0x01100000\0" \ -"kernelfile=uImage\0" \ -"loadaddr=0x01000000\0" \ -"mbr=uCP1020.mbr\0" \ -"mbr_offset=0x00000000\0" \ -"netdev=eth0\0" \ -"nor_recoveryaddr=0xEC0A0000\0" \ -"nor_ubootaddr=0xEFF80000\0" \ -"nor_workingaddr=0xECFA0000\0" \ -"norbootrecovery=setenv bootargs $recoverybootargs" \ - " console=$consoledev,$baudrate $othbootargs; " \ - "run norloadrecovery; " \ - "bootm $kerneladdr - $dtbaddr\0" \ -"norbootworking=setenv bootargs $workingbootargs" \ - " console=$consoledev,$baudrate $othbootargs; " \ - "run norloadworking; " \ - "bootm $kerneladdr - $dtbaddr\0" \ -"norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; " \ - "setenv cramfsaddr $nor_recoveryaddr; " \ - "cramfsload $dtbaddr $dtbfile; " \ - "cramfsload $kerneladdr $kernelfile\0" \ -"norloadworking=mw.l $kerneladdr 0x0 0x00a00000; " \ - "setenv cramfsaddr $nor_workingaddr; " \ - "cramfsload $dtbaddr $dtbfile; " \ - "cramfsload $kerneladdr $kernelfile\0" \ -"othbootargs=quiet\0" \ -"ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro" \ - " console=$consoledev,$baudrate $othbootargs; " \ - "tftp $rootfsaddr $rootfsfile; " \ - "tftp $loadaddr $kernelfile; " \ - "tftp $dtbaddr $dtbfile; " \ - "bootm $loadaddr $rootfsaddr $dtbaddr\0" \ -"ramdisk_size=120000\0" \ -"ramdiskfile=rootfs.ext2.gz.uboot\0" \ -"recoveryaddr=0x02F00000\0" \ -"recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0" \ -"releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; " \ - "mw.l 0xffe0f008 0x00400000\0" \ -"rootfsaddr=0x02F00000\0" \ -"rootfsfile=rootfs.ext2.gz.uboot\0" \ -"rootpath=/opt/nfsroot\0" \ -"silent=1\0" \ -"tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\ -"uboot= " __stringify(CONFIG_UBOOTPATH) "\0" \ -"ubootaddr=0x01000000\0" \ -"ubootfile=u-boot.bin\0" \ -"upgrade=run flashworking\0" \ -"workingaddr=0x02F00000\0" \ -"workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0" - -#else /* For Arcturus Modules */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ -"bootcmd=run norkernel\0" \ -"bootfile=uImage\0" \ -"consoledev=ttyS0\0" \ -"dtbaddr=0x00c00000\0" \ -"dtbfile=image.dtb\0" \ -"ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \ -"eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0" \ -"eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0" \ -"fileaddr=0x01000000\0" \ -"filesize=0x00080000\0" \ -"flashmbr=sf probe 0; " \ - "tftp $loadaddr $mbr; " \ - "sf erase $mbr_offset +$filesize; " \ - "sf write $loadaddr $mbr_offset $filesize\0" \ -"flashuboot=tftp $loadaddr $ubootfile; " \ - "protect off $nor_ubootaddr0 +$filesize; " \ - "erase $nor_ubootaddr0 +$filesize; " \ - "cp.b $loadaddr $nor_ubootaddr0 $filesize; " \ - "protect on $nor_ubootaddr0 +$filesize; " \ - "protect off $nor_ubootaddr1 +$filesize; " \ - "erase $nor_ubootaddr1 +$filesize; " \ - "cp.b $loadaddr $nor_ubootaddr1 $filesize; " \ - "protect on $nor_ubootaddr1 +$filesize\0 " \ -"format0=protect off $part0base +$part0size; " \ - "erase $part0base +$part0size\0" \ -"format1=protect off $part1base +$part1size; " \ - "erase $part1base +$part1size\0" \ -"format2=protect off $part2base +$part2size; " \ - "erase $part2base +$part2size\0" \ -"format3=protect off $part3base +$part3size; " \ - "erase $part3base +$part3size\0" \ -"hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 " \ -"kerneladdr=0x01100000\0" \ -"kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0" \ -"kernelfile=uImage\0" \ -"loadaddr=0x01000000\0" \ -"mbr=uCP1020.mbr\0" \ -"mbr_offset=0x00000000\0" \ -"netdev=eth0\0" \ -"nor_ubootaddr0=0xEC000000\0" \ -"nor_ubootaddr1=0xEFF80000\0" \ -"norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \ - "run norkernelload; " \ - "bootm $kerneladdr - $dtbaddr\0" \ -"norkernelload=mw.l $kerneladdr 0x0 0x00a00000; " \ - "setenv cramfsaddr $part0base; " \ - "cramfsload $dtbaddr $dtbfile; " \ - "cramfsload $kerneladdr $kernelfile\0" \ -"part0base=0xEC100000\0" \ -"part0size=0x00700000\0" \ -"part1base=0xEC800000\0" \ -"part1size=0x02000000\0" \ -"part2base=0xEE800000\0" \ -"part2size=0x00800000\0" \ -"part3base=0xEF000000\0" \ -"part3size=0x00F80000\0" \ -"partENVbase=0xEC080000\0" \ -"partENVsize=0x00080000\0" \ -"program0=tftp part0-000000.bin; " \ - "protect off $part0base +$filesize; " \ - "erase $part0base +$filesize; " \ - "cp.b $loadaddr $part0base $filesize; " \ - "echo Verifying...; " \ - "cmp.b $loadaddr $part0base $filesize\0" \ -"program1=tftp part1-000000.bin; " \ - "protect off $part1base +$filesize; " \ - "erase $part1base +$filesize; " \ - "cp.b $loadaddr $part1base $filesize; " \ - "echo Verifying...; " \ - "cmp.b $loadaddr $part1base $filesize\0" \ -"program2=tftp part2-000000.bin; " \ - "protect off $part2base +$filesize; " \ - "erase $part2base +$filesize; " \ - "cp.b $loadaddr $part2base $filesize; " \ - "echo Verifying...; " \ - "cmp.b $loadaddr $part2base $filesize\0" \ -"ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro" \ - " console=$consoledev,$baudrate $othbootargs; " \ - "tftp $rootfsaddr $rootfsfile; " \ - "tftp $loadaddr $kernelfile; " \ - "tftp $dtbaddr $dtbfile; " \ - "bootm $loadaddr $rootfsaddr $dtbaddr\0" \ -"ramdisk_size=120000\0" \ -"ramdiskfile=rootfs.ext2.gz.uboot\0" \ -"releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; " \ - "mw.l 0xffe0f008 0x00400000\0" \ -"rootfsaddr=0x02F00000\0" \ -"rootfsfile=rootfs.ext2.gz.uboot\0" \ -"rootpath=/opt/nfsroot\0" \ -"spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; " \ - "sf probe 0; sf erase 0 +$filesize; " \ - "sf write $loadaddr 0 $filesize\0" \ -"spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; " \ - "protect off 0xeC000000 +$filesize; " \ - "erase 0xEC000000 +$filesize; " \ - "cp.b $loadaddr 0xEC000000 $filesize; " \ - "cmp.b $loadaddr 0xEC000000 $filesize; " \ - "protect on 0xeC000000 +$filesize\0" \ -"tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\ -"uboot= " __stringify(CONFIG_UBOOTPATH) "\0" \ -"ubootfile=u-boot.bin\0" \ -"upgrade=run flashuboot\0" \ -"usb_phy_type=ulpi\0 " \ -"boot_nfs= " \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr\0" \ -"boot_hd = " \ - "setenv bootargs root=/dev/$bdev rw rootdelay=30 " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "usb start;" \ - "ext2load usb 0:1 $loadaddr /boot/$bootfile;" \ - "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;" \ - "bootm $loadaddr - $fdtaddr\0" \ -"boot_usb_fat = " \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs " \ - "ramdisk_size=$ramdisk_size;" \ - "usb start;" \ - "fatload usb 0:2 $loadaddr $bootfile;" \ - "fatload usb 0:2 $fdtaddr $fdtfile;" \ - "fatload usb 0:2 $ramdiskaddr $ramdiskfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr\0 " \ -"boot_usb_ext2 = " \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs " \ - "ramdisk_size=$ramdisk_size;" \ - "usb start;" \ - "ext2load usb 0:4 $loadaddr $bootfile;" \ - "ext2load usb 0:4 $fdtaddr $fdtfile;" \ - "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr\0 " \ -"boot_nor = " \ - "setenv bootargs root=/dev/$jffs2nor rw " \ - "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;" \ - "bootm $norbootaddr - $norfdtaddr\0 " \ -"boot_ram = " \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs " \ - "ramdisk_size=$ramdisk_size;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr\0" - -#endif -#endif - -#endif /* __CONFIG_H */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index d86f35856f7..fd891e0bf27 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1354,6 +1354,7 @@ CONFIG_SOFT_I2C_GPIO_SCL CONFIG_SOFT_I2C_GPIO_SDA CONFIG_SOFT_I2C_READ_REPEATED_START CONFIG_SPD_EEPROM +CONFIG_SPIFLASH CONFIG_SPI_ADDR CONFIG_SPI_BOOTING CONFIG_SPI_DATAFLASH_WRITE_VERIFY -- cgit v1.3.1 From 26543cc6fa69adb65cd40657d4ddb8ea9b1ba9d5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 1 Aug 2021 18:54:16 -0600 Subject: pci: Drop old code from header file We don't need this code anymore since when PCI is enabled, driver model is always used. Signed-off-by: Simon Glass --- include/pci.h | 60 +++-------------------------------------------------------- 1 file changed, 3 insertions(+), 57 deletions(-) (limited to 'include') diff --git a/include/pci.h b/include/pci.h index 4d771133b2a..2c2930e7a74 100644 --- a/include/pci.h +++ b/include/pci.h @@ -623,13 +623,9 @@ extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev * about a small subset of PCI devices. This is normally false. */ struct pci_controller { -#ifdef CONFIG_DM_PCI struct udevice *bus; struct udevice *ctlr; bool skip_auto_config_until_reloc; -#else - struct pci_controller *next; -#endif int first_busno; int last_busno; @@ -655,54 +651,16 @@ struct pci_controller { struct pci_config_table *config_table; void (*fixup_irq)(struct pci_controller *, pci_dev_t); -#ifndef CONFIG_DM_PCI - /* Low-level architecture-dependent routines */ - int (*read_byte)(struct pci_controller*, pci_dev_t, int where, u8 *); - int (*read_word)(struct pci_controller*, pci_dev_t, int where, u16 *); - int (*read_dword)(struct pci_controller*, pci_dev_t, int where, u32 *); - int (*write_byte)(struct pci_controller*, pci_dev_t, int where, u8); - int (*write_word)(struct pci_controller*, pci_dev_t, int where, u16); - int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32); -#endif /* Used by auto config */ struct pci_region *pci_mem, *pci_io, *pci_prefetch; - -#ifndef CONFIG_DM_PCI - int current_busno; - - void *priv_data; -#endif }; -#ifndef CONFIG_DM_PCI -static inline void pci_set_ops(struct pci_controller *hose, - int (*read_byte)(struct pci_controller*, - pci_dev_t, int where, u8 *), - int (*read_word)(struct pci_controller*, - pci_dev_t, int where, u16 *), - int (*read_dword)(struct pci_controller*, - pci_dev_t, int where, u32 *), - int (*write_byte)(struct pci_controller*, - pci_dev_t, int where, u8), - int (*write_word)(struct pci_controller*, - pci_dev_t, int where, u16), - int (*write_dword)(struct pci_controller*, - pci_dev_t, int where, u32)) { - hose->read_byte = read_byte; - hose->read_word = read_word; - hose->read_dword = read_dword; - hose->write_byte = write_byte; - hose->write_word = write_word; - hose->write_dword = write_dword; -} -#endif - #ifdef CONFIG_PCI_INDIRECT_BRIDGE extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data); #endif -#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) +#if defined(CONFIG_DM_PCI_COMPAT) extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, pci_addr_t addr, unsigned long flags); extern pci_addr_t pci_hose_phys_to_bus(struct pci_controller* hose, @@ -752,15 +710,6 @@ extern int pci_hose_write_config_dword(struct pci_controller *hose, pci_dev_t dev, int where, u32 val); #endif -#ifndef CONFIG_DM_PCI -extern int pci_read_config_byte(pci_dev_t dev, int where, u8 *val); -extern int pci_read_config_word(pci_dev_t dev, int where, u16 *val); -extern int pci_read_config_dword(pci_dev_t dev, int where, u32 *val); -extern int pci_write_config_byte(pci_dev_t dev, int where, u8 val); -extern int pci_write_config_word(pci_dev_t dev, int where, u16 val); -extern int pci_write_config_dword(pci_dev_t dev, int where, u32 val); -#endif - void pciauto_region_init(struct pci_region *res); void pciauto_region_align(struct pci_region *res, pci_size_t size); void pciauto_config_init(struct pci_controller *hose); @@ -780,7 +729,7 @@ void pciauto_config_init(struct pci_controller *hose); int pciauto_region_allocate(struct pci_region *res, pci_size_t size, pci_addr_t *bar, bool supports_64bit); -#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) +#if defined(CONFIG_DM_PCI_COMPAT) extern int pci_hose_read_config_byte_via_dword(struct pci_controller *hose, pci_dev_t dev, int where, u8 *val); extern int pci_hose_read_config_word_via_dword(struct pci_controller *hose, @@ -827,7 +776,7 @@ int pci_find_next_ext_capability(struct pci_controller *hose, int pci_hose_find_ext_capability(struct pci_controller *hose, pci_dev_t dev, int cap); -#endif /* !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) */ +#endif /* defined(CONFIG_DM_PCI_COMPAT) */ const char * pci_class_str(u8 class); int pci_last_busno(void); @@ -890,7 +839,6 @@ enum pci_size_t { struct udevice; -#ifdef CONFIG_DM_PCI /** * struct pci_child_plat - information stored about each PCI device * @@ -1691,8 +1639,6 @@ int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp); */ extern void board_pci_fixup_dev(struct udevice *bus, struct udevice *dev); -#endif /* CONFIG_DM_PCI */ - /** * PCI_DEVICE - macro used to describe a specific pci device * @vend: the 16 bit PCI Vendor ID -- cgit v1.3.1 From d6d504d7ba8dc61dc0015ddd682bfce1dafa7dfc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 1 Aug 2021 18:54:25 -0600 Subject: pci: acpi: Drop DM_PCI check from ahci We don't need these checks anymore since when PCI is enabled, driver model is always used. Drop them. Signed-off-by: Simon Glass --- drivers/ata/ahci.c | 55 ------------------------------------------------------ include/ahci.h | 4 ---- 2 files changed, 59 deletions(-) (limited to 'include') diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index d4047c04f5d..2062197afcd 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -170,13 +170,8 @@ int ahci_reset(void __iomem *base) static int ahci_host_init(struct ahci_uc_priv *uc_priv) { #if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI) -# ifdef CONFIG_DM_PCI struct udevice *dev = uc_priv->dev; struct pci_child_plat *pplat = dev_get_parent_plat(dev); -# else - pci_dev_t pdev = uc_priv->dev; - unsigned short vendor; -# endif u16 tmp16; #endif void __iomem *mmio = uc_priv->mmio_base; @@ -200,23 +195,12 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) writel_with_flush(0xf, mmio + HOST_PORTS_IMPL); #if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI) -# ifdef CONFIG_DM_PCI if (pplat->vendor == PCI_VENDOR_ID_INTEL) { u16 tmp16; dm_pci_read_config16(dev, 0x92, &tmp16); dm_pci_write_config16(dev, 0x92, tmp16 | 0xf); } -# else - pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor); - - if (vendor == PCI_VENDOR_ID_INTEL) { - u16 tmp16; - pci_read_config_word(pdev, 0x92, &tmp16); - tmp16 |= 0xf; - pci_write_config_word(pdev, 0x92, tmp16); - } -# endif #endif uc_priv->cap = readl(mmio + HOST_CAP); uc_priv->port_map = readl(mmio + HOST_PORTS_IMPL); @@ -331,15 +315,9 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) debug("HOST_CTL 0x%x\n", tmp); #if !defined(CONFIG_DM_SCSI) #ifndef CONFIG_SCSI_AHCI_PLAT -# ifdef CONFIG_DM_PCI dm_pci_read_config16(dev, PCI_COMMAND, &tmp16); tmp |= PCI_COMMAND_MASTER; dm_pci_write_config16(dev, PCI_COMMAND, tmp16); -# else - pci_read_config_word(pdev, PCI_COMMAND, &tmp16); - tmp |= PCI_COMMAND_MASTER; - pci_write_config_word(pdev, PCI_COMMAND, tmp16); -# endif #endif #endif return 0; @@ -349,11 +327,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) static void ahci_print_info(struct ahci_uc_priv *uc_priv) { #if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI) -# if defined(CONFIG_DM_PCI) struct udevice *dev = uc_priv->dev; -# else - pci_dev_t pdev = uc_priv->dev; -# endif u16 cc; #endif void __iomem *mmio = uc_priv->mmio_base; @@ -379,11 +353,7 @@ static void ahci_print_info(struct ahci_uc_priv *uc_priv) #if defined(CONFIG_SCSI_AHCI_PLAT) || defined(CONFIG_DM_SCSI) scc_s = "SATA"; #else -# ifdef CONFIG_DM_PCI dm_pci_read_config16(dev, 0x0a, &cc); -# else - pci_read_config_word(pdev, 0x0a, &cc); -# endif if (cc == 0x0101) scc_s = "IDE"; else if (cc == 0x0106) @@ -428,11 +398,7 @@ static void ahci_print_info(struct ahci_uc_priv *uc_priv) } #if defined(CONFIG_DM_SCSI) || !defined(CONFIG_SCSI_AHCI_PLAT) -# if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI) static int ahci_init_one(struct ahci_uc_priv *uc_priv, struct udevice *dev) -# else -static int ahci_init_one(struct ahci_uc_priv *uc_priv, pci_dev_t dev) -# endif { #if !defined(CONFIG_DM_SCSI) u16 vendor; @@ -450,7 +416,6 @@ static int ahci_init_one(struct ahci_uc_priv *uc_priv, pci_dev_t dev) uc_priv->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */ #if !defined(CONFIG_DM_SCSI) -#ifdef CONFIG_DM_PCI uc_priv->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5, PCI_REGION_MEM); @@ -461,18 +426,6 @@ static int ahci_init_one(struct ahci_uc_priv *uc_priv, pci_dev_t dev) dm_pci_read_config16(dev, PCI_VENDOR_ID, &vendor); if (vendor == 0x197b) dm_pci_write_config8(dev, 0x41, 0xa1); -#else - uc_priv->mmio_base = pci_map_bar(dev, PCI_BASE_ADDRESS_5, - PCI_REGION_MEM); - - /* Take from kernel: - * JMicron-specific fixup: - * make sure we're in AHCI mode - */ - pci_read_config_word(dev, PCI_VENDOR_ID, &vendor); - if (vendor == 0x197b) - pci_write_config_byte(dev, 0x41, 0xa1); -#endif #else struct scsi_plat *plat = dev_get_uclass_plat(dev); uc_priv->mmio_base = (void *)plat->base; @@ -1006,7 +959,6 @@ void scsi_low_level_init(int busdevfunc) return; } uc_priv = probe_ent; -# if defined(CONFIG_DM_PCI) struct udevice *dev; int ret; @@ -1014,9 +966,6 @@ void scsi_low_level_init(int busdevfunc) if (ret) return; ahci_init_one(uc_priv, dev); -# else - ahci_init_one(uc_priv, busdevfunc); -# endif #else uc_priv = probe_ent; #endif @@ -1026,7 +975,6 @@ void scsi_low_level_init(int busdevfunc) #endif #ifndef CONFIG_SCSI_AHCI_PLAT -# if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI) int ahci_init_one_dm(struct udevice *dev) { struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev); @@ -1034,7 +982,6 @@ int ahci_init_one_dm(struct udevice *dev) return ahci_init_one(uc_priv, dev); } #endif -#endif int ahci_start_ports_dm(struct udevice *dev) { @@ -1196,7 +1143,6 @@ int ahci_probe_scsi(struct udevice *ahci_dev, ulong base) return 0; } -#ifdef CONFIG_DM_PCI int ahci_probe_scsi_pci(struct udevice *ahci_dev) { ulong base; @@ -1221,7 +1167,6 @@ int ahci_probe_scsi_pci(struct udevice *ahci_dev) PCI_REGION_MEM); return ahci_probe_scsi(ahci_dev, base); } -#endif struct scsi_ops scsi_ops = { .exec = ahci_scsi_exec, diff --git a/include/ahci.h b/include/ahci.h index fb96dd88611..d5453042d15 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -148,16 +148,12 @@ struct ahci_ioports { * where dev is the controller (although at present it sometimes stands alone). */ struct ahci_uc_priv { -#if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI) /* * TODO(sjg@chromium.org): Drop this once this structure is only used * in a driver-model context (i.e. attached to a device with * dev_get_uclass_priv() */ struct udevice *dev; -#else - pci_dev_t dev; -#endif struct ahci_ioports port[AHCI_MAX_PORTS]; u16 *ataid[AHCI_MAX_PORTS]; u32 n_ports; -- cgit v1.3.1 From 23cacd57040244e3ecab3e95a36f08c8242159b2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 1 Aug 2021 18:54:43 -0600 Subject: pci: Drop PCI_INDIRECT_BRIDGE This does not work with driver model so can be removed. Signed-off-by: Simon Glass --- README | 3 -- drivers/pci/Makefile | 1 - drivers/pci/pci_indirect.c | 71 ------------------------------------- include/configs/MPC8349EMDS.h | 4 --- include/configs/MPC8349EMDS_SDRAM.h | 4 --- include/configs/MPC837XERDB.h | 2 -- include/configs/MPC8540ADS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/pci.h | 4 --- scripts/config_whitelist.txt | 1 - 10 files changed, 92 deletions(-) delete mode 100644 drivers/pci/pci_indirect.c (limited to 'include') diff --git a/README b/README index 1c1db980987..a3f81e4aed0 100644 --- a/README +++ b/README @@ -2776,9 +2776,6 @@ Low Level (hardware related) configuration options: CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM: Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM) -- CONFIG_PCI_INDIRECT_BRIDGE: - Enable support for indirect PCI bridges. - - CONFIG_SYS_SRIO: Chip has SRIO or not diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index bdfdec98a08..4a131bf5ca4 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -14,7 +14,6 @@ obj-$(CONFIG_PCI) += pci_auto_common.o pci_common.o obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o obj-$(CONFIG_PCIE_ECAM_SYNQUACER) += pcie_ecam_synquacer.o obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o -obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o obj-$(CONFIG_PCI_MPC85XX) += pci_mpc85xx.o obj-$(CONFIG_PCI_MSC01) += pci_msc01.o diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c deleted file mode 100644 index 6134c22d1bc..00000000000 --- a/drivers/pci/pci_indirect.c +++ /dev/null @@ -1,71 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Support for indirect PCI bridges. - * - * Copyright (C) 1998 Gabriel Paubert. - */ - -#include - -#if !defined(__I386__) && !defined(CONFIG_DM_PCI) - -#include -#include -#include - -#define cfg_read(val, addr, type, op) *val = op((type)(addr)) -#define cfg_write(val, addr, type, op) op((type *)(addr), (val)) - -#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) -#define INDIRECT_PCI_OP(rw, size, type, op, mask) \ -static int \ -indirect_##rw##_config_##size(struct pci_controller *hose, \ - pci_dev_t dev, int offset, type val) \ -{ \ - u32 b, d,f; \ - b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \ - b = b - hose->first_busno; \ - dev = PCI_BDF(b, d, f); \ - *(hose->cfg_addr) = dev | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; \ - sync(); \ - cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - return 0; \ -} -#else -#define INDIRECT_PCI_OP(rw, size, type, op, mask) \ -static int \ -indirect_##rw##_config_##size(struct pci_controller *hose, \ - pci_dev_t dev, int offset, type val) \ -{ \ - u32 b, d,f; \ - b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \ - b = b - hose->first_busno; \ - dev = PCI_BDF(b, d, f); \ - out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ - cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - return 0; \ -} -#endif - -INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3) -INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2) -INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0) -INDIRECT_PCI_OP(write, byte, u8, out_8, 3) -INDIRECT_PCI_OP(write, word, u16, out_le16, 2) -INDIRECT_PCI_OP(write, dword, u32, out_le32, 0) - -void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) -{ - pci_set_ops(hose, - indirect_read_config_byte, - indirect_read_config_word, - indirect_read_config_dword, - indirect_write_config_byte, - indirect_write_config_word, - indirect_write_config_dword); - - hose->cfg_addr = (unsigned int *) cfg_addr; - hose->cfg_data = (unsigned char *) cfg_data; -} - -#endif /* !__I386__ */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index d6ae419456a..b4e1cae8938 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -303,10 +303,6 @@ #define CONFIG_SYS_SICRH 0 #define CONFIG_SYS_SICRL SICRL_LDP_A -#ifdef CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE -#endif - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #endif diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h index 8ebca99d98b..7924cbc8a3e 100644 --- a/include/configs/MPC8349EMDS_SDRAM.h +++ b/include/configs/MPC8349EMDS_SDRAM.h @@ -360,10 +360,6 @@ #define CONFIG_SYS_SICRH 0 #define CONFIG_SYS_SICRL SICRL_LDP_A -#ifdef CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE -#endif - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #endif diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 0a136b4f92f..a13b178d6af 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -255,8 +255,6 @@ #define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 #ifdef CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE - #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index ac9afa179a5..549fbfa65c7 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -26,7 +26,6 @@ #define CONFIG_HAS_FEC 1 /* 8540 has FEC */ #endif -#define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ /* diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 02aeb6f3d53..5254936a4b2 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -27,7 +27,6 @@ * assume U-Boot is less than 0.5MB */ -#define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ diff --git a/include/pci.h b/include/pci.h index 2c2930e7a74..0fc22adffd0 100644 --- a/include/pci.h +++ b/include/pci.h @@ -656,10 +656,6 @@ struct pci_controller { struct pci_region *pci_mem, *pci_io, *pci_prefetch; }; -#ifdef CONFIG_PCI_INDIRECT_BRIDGE -extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data); -#endif - #if defined(CONFIG_DM_PCI_COMPAT) extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, pci_addr_t addr, unsigned long flags); diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index fd891e0bf27..25f95da6991 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1087,7 +1087,6 @@ CONFIG_PCI_CONFIG_HOST_BRIDGE CONFIG_PCI_EHCI_DEVICE CONFIG_PCI_EHCI_DEVNO CONFIG_PCI_GT64120 -CONFIG_PCI_INDIRECT_BRIDGE CONFIG_PCI_IO_BUS CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_SIZE -- cgit v1.3.1 From de41f0ee0d68bcdf7d97018fdfe4bfe9fe3e53a2 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Wed, 18 Aug 2021 17:49:02 -0500 Subject: image: rsa: Move padding_algos to linker lists We are not guaranteed to have the padding_pkcs_15_verify symbol since commit 92c960bc1d ("lib: rsa: Remove #ifdefs from rsa.h"), and commit 61416fe9df ("Kconfig: FIT_SIGNATURE should not select RSA_VERIFY") The padding_algos only make sense with RSA verification, which can now be disabled in lieu of ECDSA. In fact this will lead to build failures because of the missing symbol mentioned earlier. To resolve this, move the padding_algos to a linker list, with declarations moved to rsa_verify.c. This is consistent with commit 6909edb4ce ("image: rsa: Move verification algorithm to a linker list") One could argue that the added #ifdef USE_HOSTCC is ugly, and should be hidden within the U_BOOT_PADDING_ALGO() macro. However, this would be inconsistent with the "cryptos" list. This logic for was not previously explored: Without knowledge of the U_BOOT_PADDING_ALGO() macro, its use is similar to something being declared. However, should #ifndef USE_HOSTCC be part of the macro, it would not be obvious that it behaves differently on host code and target code. Having the #ifndef outside the macro makes this obvious. Also, the #ifdef is not always necessary. For example ecda-verify makes use of U_BOOT_CRYPTO_ALGO() without any accompanying #ifdefs. The fundamental issue is a lack of separation of host and target code in rsa_verify. Therefore, the declaration of a padding algo with the external #ifdef is more readable and consistent. Signed-off-by: Alexandru Gagniuc --- common/image-sig.c | 23 ++++++----------------- include/image.h | 4 ++++ lib/rsa/rsa-verify.c | 15 +++++++++++++++ 3 files changed, 25 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/common/image-sig.c b/common/image-sig.c index fb0035524e0..fa9407bb300 100644 --- a/common/image-sig.c +++ b/common/image-sig.c @@ -51,19 +51,6 @@ struct checksum_algo checksum_algos[] = { }; -struct padding_algo padding_algos[] = { - { - .name = "pkcs-1.5", - .verify = padding_pkcs_15_verify, - }, -#ifdef CONFIG_FIT_RSASSA_PSS - { - .name = "pss", - .verify = padding_pss_verify, - } -#endif /* CONFIG_FIT_RSASSA_PSS */ -}; - struct checksum_algo *image_get_checksum_algo(const char *full_name) { int i; @@ -129,14 +116,16 @@ struct crypto_algo *image_get_crypto_algo(const char *full_name) struct padding_algo *image_get_padding_algo(const char *name) { - int i; + struct padding_algo *padding, *end; if (!name) return NULL; - for (i = 0; i < ARRAY_SIZE(padding_algos); i++) { - if (!strcmp(padding_algos[i].name, name)) - return &padding_algos[i]; + padding = ll_entry_start(struct padding_algo, paddings); + end = ll_entry_end(struct padding_algo, paddings); + for (; padding < end; padding++) { + if (!strcmp(padding->name, name)) + return padding; } return NULL; diff --git a/include/image.h b/include/image.h index 98b33d0629d..73a763a6936 100644 --- a/include/image.h +++ b/include/image.h @@ -1312,6 +1312,10 @@ struct padding_algo { const uint8_t *hash, int hash_len); }; +/* Declare a new U-Boot padding algorithm handler */ +#define U_BOOT_PADDING_ALGO(__name) \ +ll_entry_declare(struct padding_algo, __name, paddings) + /** * image_get_checksum_algo() - Look up a checksum algorithm * diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c index 3840764e420..ad6d33d043a 100644 --- a/lib/rsa/rsa-verify.c +++ b/lib/rsa/rsa-verify.c @@ -95,6 +95,13 @@ int padding_pkcs_15_verify(struct image_sign_info *info, return 0; } +#ifndef USE_HOSTCC +U_BOOT_PADDING_ALGO(pkcs_15) = { + .name = "pkcs-1.5", + .verify = padding_pkcs_15_verify, +}; +#endif + #ifdef CONFIG_FIT_RSASSA_PSS static void u32_i2osp(uint32_t val, uint8_t *buf) { @@ -296,6 +303,14 @@ out: return ret; } + +#ifndef USE_HOSTCC +U_BOOT_PADDING_ALGO(pss) = { + .name = "pss", + .verify = padding_pss_verify, +}; +#endif + #endif #if CONFIG_IS_ENABLED(FIT_SIGNATURE) || CONFIG_IS_ENABLED(RSA_VERIFY_WITH_PKEY) -- cgit v1.3.1